| 19e01bba | 11-Jun-2026 |
Leo Chen <leo.chen@amd.com> |
drm/amd/display: Refactor Driver PG's skip PG logic
[Why & How] When driver allows idle optimization, no HW state should be modified further by DC. Refactor the skip PG logic in pg_cntl in DCN42.
R
drm/amd/display: Refactor Driver PG's skip PG logic
[Why & How] When driver allows idle optimization, no HW state should be modified further by DC. Refactor the skip PG logic in pg_cntl in DCN42.
Reviewed-by: Ovidiu (Ovi) Bunea <ovidiu.bunea@amd.com> Signed-off-by: Leo Chen <leo.chen@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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| 7874b9d6 | 10-Jun-2026 |
Leo Chen <leo.chen@amd.com> |
drm/amd/display: Remove unnecessary DSCCLK enable during DSC PG
[Why & How] DSCCLK is not required when power gating or ungating the DSC block. Remove the unnecessary DSCCLK enable sequence.
Review
drm/amd/display: Remove unnecessary DSCCLK enable during DSC PG
[Why & How] DSCCLK is not required when power gating or ungating the DSC block. Remove the unnecessary DSCCLK enable sequence.
Reviewed-by: Ovidiu (Ovi) Bunea <ovidiu.bunea@amd.com> Signed-off-by: Leo Chen <leo.chen@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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