1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2018 Jernej Skrabec <jernej.skrabec@siol.net> 4 */ 5 6 #include <linux/component.h> 7 #include <linux/module.h> 8 #include <linux/of.h> 9 #include <linux/platform_device.h> 10 11 #include <drm/drm_modeset_helper_vtables.h> 12 #include <drm/drm_encoder.h> 13 #include <drm/drm_of.h> 14 15 #include "sun8i_dw_hdmi.h" 16 #include "sun8i_tcon_top.h" 17 18 static void sun8i_dw_hdmi_encoder_mode_set(struct drm_encoder *encoder, 19 struct drm_display_mode *mode, 20 struct drm_display_mode *adj_mode) 21 { 22 struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder); 23 24 clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000); 25 } 26 static const struct drm_encoder_funcs sun8i_dw_hdmi_encoder_funcs = { 27 .destroy = drm_encoder_cleanup, 28 }; 29 30 static const struct drm_encoder_helper_funcs 31 sun8i_dw_hdmi_encoder_helper_funcs = { 32 .mode_set = sun8i_dw_hdmi_encoder_mode_set, 33 }; 34 35 static enum drm_mode_status 36 sun8i_dw_hdmi_mode_valid_a83t(struct dw_hdmi *hdmi, void *data, 37 const struct drm_display_info *info, 38 const struct drm_display_mode *mode) 39 { 40 if (mode->clock > 297000) 41 return MODE_CLOCK_HIGH; 42 43 return MODE_OK; 44 } 45 46 static enum drm_mode_status 47 sun8i_dw_hdmi_mode_valid_h6(struct dw_hdmi *hdmi, void *data, 48 const struct drm_display_info *info, 49 const struct drm_display_mode *mode) 50 { 51 /* 52 * Controller support maximum of 594 MHz, which correlates to 53 * 4K@60Hz 4:4:4 or RGB. 54 */ 55 if (mode->clock > 594000) 56 return MODE_CLOCK_HIGH; 57 58 return MODE_OK; 59 } 60 61 static bool sun8i_dw_hdmi_node_is_tcon_top(struct device_node *node) 62 { 63 return IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP) && 64 !!of_match_node(sun8i_tcon_top_of_table, node); 65 } 66 67 static u32 sun8i_dw_hdmi_find_possible_crtcs(struct drm_device *drm, 68 struct device_node *node) 69 { 70 struct device_node *port, *ep, *remote, *remote_port; 71 u32 crtcs = 0; 72 73 remote = of_graph_get_remote_node(node, 0, -1); 74 if (!remote) 75 return 0; 76 77 if (sun8i_dw_hdmi_node_is_tcon_top(remote)) { 78 port = of_graph_get_port_by_id(remote, 4); 79 if (!port) 80 goto crtcs_exit; 81 82 for_each_child_of_node(port, ep) { 83 remote_port = of_graph_get_remote_port(ep); 84 if (remote_port) { 85 crtcs |= drm_of_crtc_port_mask(drm, remote_port); 86 of_node_put(remote_port); 87 } 88 } 89 90 of_node_put(port); 91 } else { 92 crtcs = drm_of_find_possible_crtcs(drm, node); 93 } 94 95 crtcs_exit: 96 of_node_put(remote); 97 98 return crtcs; 99 } 100 101 static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master, 102 void *data) 103 { 104 struct platform_device *pdev = to_platform_device(dev); 105 struct dw_hdmi_plat_data *plat_data; 106 struct drm_device *drm = data; 107 struct device_node *phy_node; 108 struct drm_encoder *encoder; 109 struct sun8i_dw_hdmi *hdmi; 110 int ret; 111 112 if (!pdev->dev.of_node) 113 return -ENODEV; 114 115 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); 116 if (!hdmi) 117 return -ENOMEM; 118 119 plat_data = &hdmi->plat_data; 120 hdmi->dev = &pdev->dev; 121 encoder = &hdmi->encoder; 122 123 hdmi->quirks = of_device_get_match_data(dev); 124 125 encoder->possible_crtcs = 126 sun8i_dw_hdmi_find_possible_crtcs(drm, dev->of_node); 127 /* 128 * If we failed to find the CRTC(s) which this encoder is 129 * supposed to be connected to, it's because the CRTC has 130 * not been registered yet. Defer probing, and hope that 131 * the required CRTC is added later. 132 */ 133 if (encoder->possible_crtcs == 0) 134 return -EPROBE_DEFER; 135 136 hdmi->rst_ctrl = devm_reset_control_get(dev, "ctrl"); 137 if (IS_ERR(hdmi->rst_ctrl)) 138 return dev_err_probe(dev, PTR_ERR(hdmi->rst_ctrl), 139 "Could not get ctrl reset control\n"); 140 141 hdmi->clk_tmds = devm_clk_get(dev, "tmds"); 142 if (IS_ERR(hdmi->clk_tmds)) 143 return dev_err_probe(dev, PTR_ERR(hdmi->clk_tmds), 144 "Couldn't get the tmds clock\n"); 145 146 hdmi->regulator = devm_regulator_get(dev, "hvcc"); 147 if (IS_ERR(hdmi->regulator)) 148 return dev_err_probe(dev, PTR_ERR(hdmi->regulator), 149 "Couldn't get regulator\n"); 150 151 ret = regulator_enable(hdmi->regulator); 152 if (ret) { 153 dev_err(dev, "Failed to enable regulator\n"); 154 return ret; 155 } 156 157 ret = reset_control_deassert(hdmi->rst_ctrl); 158 if (ret) { 159 dev_err(dev, "Could not deassert ctrl reset control\n"); 160 goto err_disable_regulator; 161 } 162 163 ret = clk_prepare_enable(hdmi->clk_tmds); 164 if (ret) { 165 dev_err(dev, "Could not enable tmds clock\n"); 166 goto err_assert_ctrl_reset; 167 } 168 169 phy_node = of_parse_phandle(dev->of_node, "phys", 0); 170 if (!phy_node) { 171 dev_err(dev, "Can't found PHY phandle\n"); 172 ret = -EINVAL; 173 goto err_disable_clk_tmds; 174 } 175 176 ret = sun8i_hdmi_phy_get(hdmi, phy_node); 177 of_node_put(phy_node); 178 if (ret) { 179 dev_err(dev, "Couldn't get the HDMI PHY\n"); 180 goto err_disable_clk_tmds; 181 } 182 183 ret = sun8i_hdmi_phy_init(hdmi->phy); 184 if (ret) 185 goto err_disable_clk_tmds; 186 187 drm_encoder_helper_add(encoder, &sun8i_dw_hdmi_encoder_helper_funcs); 188 drm_encoder_init(drm, encoder, &sun8i_dw_hdmi_encoder_funcs, 189 DRM_MODE_ENCODER_TMDS, NULL); 190 191 plat_data->mode_valid = hdmi->quirks->mode_valid; 192 plat_data->use_drm_infoframe = hdmi->quirks->use_drm_infoframe; 193 sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data); 194 195 platform_set_drvdata(pdev, hdmi); 196 197 hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data); 198 199 /* 200 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(), 201 * which would have called the encoder cleanup. Do it manually. 202 */ 203 if (IS_ERR(hdmi->hdmi)) { 204 ret = PTR_ERR(hdmi->hdmi); 205 goto cleanup_encoder; 206 } 207 208 return 0; 209 210 cleanup_encoder: 211 drm_encoder_cleanup(encoder); 212 err_disable_clk_tmds: 213 clk_disable_unprepare(hdmi->clk_tmds); 214 err_assert_ctrl_reset: 215 reset_control_assert(hdmi->rst_ctrl); 216 err_disable_regulator: 217 regulator_disable(hdmi->regulator); 218 219 return ret; 220 } 221 222 static void sun8i_dw_hdmi_unbind(struct device *dev, struct device *master, 223 void *data) 224 { 225 struct sun8i_dw_hdmi *hdmi = dev_get_drvdata(dev); 226 227 dw_hdmi_unbind(hdmi->hdmi); 228 sun8i_hdmi_phy_deinit(hdmi->phy); 229 clk_disable_unprepare(hdmi->clk_tmds); 230 reset_control_assert(hdmi->rst_ctrl); 231 regulator_disable(hdmi->regulator); 232 } 233 234 static const struct component_ops sun8i_dw_hdmi_ops = { 235 .bind = sun8i_dw_hdmi_bind, 236 .unbind = sun8i_dw_hdmi_unbind, 237 }; 238 239 static int sun8i_dw_hdmi_probe(struct platform_device *pdev) 240 { 241 return component_add(&pdev->dev, &sun8i_dw_hdmi_ops); 242 } 243 244 static void sun8i_dw_hdmi_remove(struct platform_device *pdev) 245 { 246 component_del(&pdev->dev, &sun8i_dw_hdmi_ops); 247 } 248 249 static const struct sun8i_dw_hdmi_quirks sun8i_a83t_quirks = { 250 .mode_valid = sun8i_dw_hdmi_mode_valid_a83t, 251 }; 252 253 static const struct sun8i_dw_hdmi_quirks sun50i_h6_quirks = { 254 .mode_valid = sun8i_dw_hdmi_mode_valid_h6, 255 .use_drm_infoframe = true, 256 }; 257 258 static const struct of_device_id sun8i_dw_hdmi_dt_ids[] = { 259 { 260 .compatible = "allwinner,sun8i-a83t-dw-hdmi", 261 .data = &sun8i_a83t_quirks, 262 }, 263 { 264 .compatible = "allwinner,sun50i-h6-dw-hdmi", 265 .data = &sun50i_h6_quirks, 266 }, 267 { /* sentinel */ }, 268 }; 269 MODULE_DEVICE_TABLE(of, sun8i_dw_hdmi_dt_ids); 270 271 static struct platform_driver sun8i_dw_hdmi_pltfm_driver = { 272 .probe = sun8i_dw_hdmi_probe, 273 .remove = sun8i_dw_hdmi_remove, 274 .driver = { 275 .name = "sun8i-dw-hdmi", 276 .of_match_table = sun8i_dw_hdmi_dt_ids, 277 }, 278 }; 279 280 static int __init sun8i_dw_hdmi_init(void) 281 { 282 int ret; 283 284 ret = platform_driver_register(&sun8i_dw_hdmi_pltfm_driver); 285 if (ret) 286 return ret; 287 288 ret = platform_driver_register(&sun8i_hdmi_phy_driver); 289 if (ret) { 290 platform_driver_unregister(&sun8i_dw_hdmi_pltfm_driver); 291 return ret; 292 } 293 294 return ret; 295 } 296 297 static void __exit sun8i_dw_hdmi_exit(void) 298 { 299 platform_driver_unregister(&sun8i_dw_hdmi_pltfm_driver); 300 platform_driver_unregister(&sun8i_hdmi_phy_driver); 301 } 302 303 module_init(sun8i_dw_hdmi_init); 304 module_exit(sun8i_dw_hdmi_exit); 305 306 MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>"); 307 MODULE_DESCRIPTION("Allwinner DW HDMI bridge"); 308 MODULE_LICENSE("GPL"); 309