1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * 4 * Copyright IBM Corp. 2007 5 * Copyright 2010-2011 Freescale Semiconductor, Inc. 6 * 7 * Authors: Hollis Blanchard <hollisb@us.ibm.com> 8 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 9 * Scott Wood <scottwood@freescale.com> 10 * Varun Sethi <varun.sethi@freescale.com> 11 */ 12 13 #include <linux/errno.h> 14 #include <linux/err.h> 15 #include <linux/kvm_host.h> 16 #include <linux/gfp.h> 17 #include <linux/module.h> 18 #include <linux/vmalloc.h> 19 #include <linux/fs.h> 20 21 #include <asm/cputable.h> 22 #include <linux/uaccess.h> 23 #include <asm/interrupt.h> 24 #include <asm/kvm_ppc.h> 25 #include <asm/cacheflush.h> 26 #include <asm/dbell.h> 27 #include <asm/hw_irq.h> 28 #include <asm/irq.h> 29 #include <asm/time.h> 30 31 #include "timing.h" 32 #include "booke.h" 33 34 #define CREATE_TRACE_POINTS 35 #include "trace_booke.h" 36 37 unsigned long kvmppc_booke_handlers; 38 39 const struct kvm_stats_desc kvm_vm_stats_desc[] = { 40 KVM_GENERIC_VM_STATS(), 41 STATS_DESC_ICOUNTER(VM, num_2M_pages), 42 STATS_DESC_ICOUNTER(VM, num_1G_pages) 43 }; 44 45 const struct kvm_stats_header kvm_vm_stats_header = { 46 .name_size = KVM_STATS_NAME_SIZE, 47 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc), 48 .id_offset = sizeof(struct kvm_stats_header), 49 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE, 50 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE + 51 sizeof(kvm_vm_stats_desc), 52 }; 53 54 const struct kvm_stats_desc kvm_vcpu_stats_desc[] = { 55 KVM_GENERIC_VCPU_STATS(), 56 STATS_DESC_COUNTER(VCPU, sum_exits), 57 STATS_DESC_COUNTER(VCPU, mmio_exits), 58 STATS_DESC_COUNTER(VCPU, signal_exits), 59 STATS_DESC_COUNTER(VCPU, light_exits), 60 STATS_DESC_COUNTER(VCPU, itlb_real_miss_exits), 61 STATS_DESC_COUNTER(VCPU, itlb_virt_miss_exits), 62 STATS_DESC_COUNTER(VCPU, dtlb_real_miss_exits), 63 STATS_DESC_COUNTER(VCPU, dtlb_virt_miss_exits), 64 STATS_DESC_COUNTER(VCPU, syscall_exits), 65 STATS_DESC_COUNTER(VCPU, isi_exits), 66 STATS_DESC_COUNTER(VCPU, dsi_exits), 67 STATS_DESC_COUNTER(VCPU, emulated_inst_exits), 68 STATS_DESC_COUNTER(VCPU, dec_exits), 69 STATS_DESC_COUNTER(VCPU, ext_intr_exits), 70 STATS_DESC_COUNTER(VCPU, halt_successful_wait), 71 STATS_DESC_COUNTER(VCPU, dbell_exits), 72 STATS_DESC_COUNTER(VCPU, gdbell_exits), 73 STATS_DESC_COUNTER(VCPU, ld), 74 STATS_DESC_COUNTER(VCPU, st), 75 STATS_DESC_COUNTER(VCPU, pthru_all), 76 STATS_DESC_COUNTER(VCPU, pthru_host), 77 STATS_DESC_COUNTER(VCPU, pthru_bad_aff) 78 }; 79 80 const struct kvm_stats_header kvm_vcpu_stats_header = { 81 .name_size = KVM_STATS_NAME_SIZE, 82 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc), 83 .id_offset = sizeof(struct kvm_stats_header), 84 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE, 85 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE + 86 sizeof(kvm_vcpu_stats_desc), 87 }; 88 89 /* TODO: use vcpu_printf() */ 90 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 91 { 92 int i; 93 94 printk("pc: %08lx msr: %08llx\n", vcpu->arch.regs.nip, 95 vcpu->arch.shared->msr); 96 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.regs.link, 97 vcpu->arch.regs.ctr); 98 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 99 vcpu->arch.shared->srr1); 100 101 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 102 103 for (i = 0; i < 32; i += 4) { 104 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 105 kvmppc_get_gpr(vcpu, i), 106 kvmppc_get_gpr(vcpu, i+1), 107 kvmppc_get_gpr(vcpu, i+2), 108 kvmppc_get_gpr(vcpu, i+3)); 109 } 110 } 111 112 #ifdef CONFIG_SPE 113 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 114 { 115 preempt_disable(); 116 enable_kernel_spe(); 117 kvmppc_save_guest_spe(vcpu); 118 disable_kernel_spe(); 119 vcpu->arch.shadow_msr &= ~MSR_SPE; 120 preempt_enable(); 121 } 122 123 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 124 { 125 preempt_disable(); 126 enable_kernel_spe(); 127 kvmppc_load_guest_spe(vcpu); 128 disable_kernel_spe(); 129 vcpu->arch.shadow_msr |= MSR_SPE; 130 preempt_enable(); 131 } 132 133 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 134 { 135 if (vcpu->arch.shared->msr & MSR_SPE) { 136 if (!(vcpu->arch.shadow_msr & MSR_SPE)) 137 kvmppc_vcpu_enable_spe(vcpu); 138 } else if (vcpu->arch.shadow_msr & MSR_SPE) { 139 kvmppc_vcpu_disable_spe(vcpu); 140 } 141 } 142 #else 143 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 144 { 145 } 146 #endif 147 148 /* 149 * Load up guest vcpu FP state if it's needed. 150 * It also set the MSR_FP in thread so that host know 151 * we're holding FPU, and then host can help to save 152 * guest vcpu FP state if other threads require to use FPU. 153 * This simulates an FP unavailable fault. 154 * 155 * It requires to be called with preemption disabled. 156 */ 157 static inline void kvmppc_load_guest_fp(struct kvm_vcpu *vcpu) 158 { 159 #ifdef CONFIG_PPC_FPU 160 if (!(current->thread.regs->msr & MSR_FP)) { 161 enable_kernel_fp(); 162 load_fp_state(&vcpu->arch.fp); 163 disable_kernel_fp(); 164 current->thread.fp_save_area = &vcpu->arch.fp; 165 current->thread.regs->msr |= MSR_FP; 166 } 167 #endif 168 } 169 170 /* 171 * Save guest vcpu FP state into thread. 172 * It requires to be called with preemption disabled. 173 */ 174 static inline void kvmppc_save_guest_fp(struct kvm_vcpu *vcpu) 175 { 176 #ifdef CONFIG_PPC_FPU 177 if (current->thread.regs->msr & MSR_FP) 178 giveup_fpu(current); 179 current->thread.fp_save_area = NULL; 180 #endif 181 } 182 183 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu) 184 { 185 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV) 186 /* We always treat the FP bit as enabled from the host 187 perspective, so only need to adjust the shadow MSR */ 188 vcpu->arch.shadow_msr &= ~MSR_FP; 189 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP; 190 #endif 191 } 192 193 /* 194 * Simulate AltiVec unavailable fault to load guest state 195 * from thread to AltiVec unit. 196 * It requires to be called with preemption disabled. 197 */ 198 static inline void kvmppc_load_guest_altivec(struct kvm_vcpu *vcpu) 199 { 200 #ifdef CONFIG_ALTIVEC 201 if (cpu_has_feature(CPU_FTR_ALTIVEC)) { 202 if (!(current->thread.regs->msr & MSR_VEC)) { 203 enable_kernel_altivec(); 204 load_vr_state(&vcpu->arch.vr); 205 disable_kernel_altivec(); 206 current->thread.vr_save_area = &vcpu->arch.vr; 207 current->thread.regs->msr |= MSR_VEC; 208 } 209 } 210 #endif 211 } 212 213 /* 214 * Save guest vcpu AltiVec state into thread. 215 * It requires to be called with preemption disabled. 216 */ 217 static inline void kvmppc_save_guest_altivec(struct kvm_vcpu *vcpu) 218 { 219 #ifdef CONFIG_ALTIVEC 220 if (cpu_has_feature(CPU_FTR_ALTIVEC)) { 221 if (current->thread.regs->msr & MSR_VEC) 222 giveup_altivec(current); 223 current->thread.vr_save_area = NULL; 224 } 225 #endif 226 } 227 228 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu) 229 { 230 /* Synchronize guest's desire to get debug interrupts into shadow MSR */ 231 #ifndef CONFIG_KVM_BOOKE_HV 232 vcpu->arch.shadow_msr &= ~MSR_DE; 233 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE; 234 #endif 235 236 /* Force enable debug interrupts when user space wants to debug */ 237 if (vcpu->guest_debug) { 238 #ifdef CONFIG_KVM_BOOKE_HV 239 /* 240 * Since there is no shadow MSR, sync MSR_DE into the guest 241 * visible MSR. 242 */ 243 vcpu->arch.shared->msr |= MSR_DE; 244 #else 245 vcpu->arch.shadow_msr |= MSR_DE; 246 vcpu->arch.shared->msr &= ~MSR_DE; 247 #endif 248 } 249 } 250 251 /* 252 * Helper function for "full" MSR writes. No need to call this if only 253 * EE/CE/ME/DE/RI are changing. 254 */ 255 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 256 { 257 u32 old_msr = vcpu->arch.shared->msr; 258 259 #ifdef CONFIG_KVM_BOOKE_HV 260 new_msr |= MSR_GS; 261 #endif 262 263 vcpu->arch.shared->msr = new_msr; 264 265 kvmppc_mmu_msr_notify(vcpu, old_msr); 266 kvmppc_vcpu_sync_spe(vcpu); 267 kvmppc_vcpu_sync_fpu(vcpu); 268 kvmppc_vcpu_sync_debug(vcpu); 269 } 270 271 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 272 unsigned int priority) 273 { 274 trace_kvm_booke_queue_irqprio(vcpu, priority); 275 set_bit(priority, &vcpu->arch.pending_exceptions); 276 } 277 278 void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 279 ulong dear_flags, ulong esr_flags) 280 { 281 vcpu->arch.queued_dear = dear_flags; 282 vcpu->arch.queued_esr = esr_flags; 283 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 284 } 285 286 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong srr1_flags, 287 ulong dear_flags, ulong esr_flags) 288 { 289 WARN_ON_ONCE(srr1_flags); 290 vcpu->arch.queued_dear = dear_flags; 291 vcpu->arch.queued_esr = esr_flags; 292 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 293 } 294 295 void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu) 296 { 297 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 298 } 299 300 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags) 301 { 302 vcpu->arch.queued_esr = esr_flags; 303 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 304 } 305 306 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags, 307 ulong esr_flags) 308 { 309 vcpu->arch.queued_dear = dear_flags; 310 vcpu->arch.queued_esr = esr_flags; 311 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT); 312 } 313 314 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 315 { 316 vcpu->arch.queued_esr = esr_flags; 317 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 318 } 319 320 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu, ulong srr1_flags) 321 { 322 WARN_ON_ONCE(srr1_flags); 323 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 324 } 325 326 #ifdef CONFIG_ALTIVEC 327 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu, ulong srr1_flags) 328 { 329 WARN_ON_ONCE(srr1_flags); 330 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL); 331 } 332 #endif 333 334 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 335 { 336 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 337 } 338 339 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 340 { 341 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 342 } 343 344 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 345 { 346 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 347 } 348 349 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 350 struct kvm_interrupt *irq) 351 { 352 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 353 354 if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 355 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 356 357 kvmppc_booke_queue_irqprio(vcpu, prio); 358 } 359 360 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 361 { 362 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 363 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 364 } 365 366 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu) 367 { 368 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG); 369 } 370 371 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu) 372 { 373 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions); 374 } 375 376 void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu) 377 { 378 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DEBUG); 379 } 380 381 void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu) 382 { 383 clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions); 384 } 385 386 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 387 { 388 kvmppc_set_srr0(vcpu, srr0); 389 kvmppc_set_srr1(vcpu, srr1); 390 } 391 392 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 393 { 394 vcpu->arch.csrr0 = srr0; 395 vcpu->arch.csrr1 = srr1; 396 } 397 398 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 399 { 400 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) { 401 vcpu->arch.dsrr0 = srr0; 402 vcpu->arch.dsrr1 = srr1; 403 } else { 404 set_guest_csrr(vcpu, srr0, srr1); 405 } 406 } 407 408 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 409 { 410 vcpu->arch.mcsrr0 = srr0; 411 vcpu->arch.mcsrr1 = srr1; 412 } 413 414 /* Deliver the interrupt of the corresponding priority, if possible. */ 415 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 416 unsigned int priority) 417 { 418 int allowed = 0; 419 ulong msr_mask = 0; 420 bool update_esr = false, update_dear = false, update_epr = false; 421 ulong crit_raw = vcpu->arch.shared->critical; 422 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 423 bool crit; 424 bool keep_irq = false; 425 enum int_class int_class; 426 ulong new_msr = vcpu->arch.shared->msr; 427 428 /* Truncate crit indicators in 32 bit mode */ 429 if (!(vcpu->arch.shared->msr & MSR_SF)) { 430 crit_raw &= 0xffffffff; 431 crit_r1 &= 0xffffffff; 432 } 433 434 /* Critical section when crit == r1 */ 435 crit = (crit_raw == crit_r1); 436 /* ... and we're in supervisor mode */ 437 crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 438 439 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 440 priority = BOOKE_IRQPRIO_EXTERNAL; 441 keep_irq = true; 442 } 443 444 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags) 445 update_epr = true; 446 447 switch (priority) { 448 case BOOKE_IRQPRIO_DTLB_MISS: 449 case BOOKE_IRQPRIO_DATA_STORAGE: 450 case BOOKE_IRQPRIO_ALIGNMENT: 451 update_dear = true; 452 fallthrough; 453 case BOOKE_IRQPRIO_INST_STORAGE: 454 case BOOKE_IRQPRIO_PROGRAM: 455 update_esr = true; 456 fallthrough; 457 case BOOKE_IRQPRIO_ITLB_MISS: 458 case BOOKE_IRQPRIO_SYSCALL: 459 case BOOKE_IRQPRIO_FP_UNAVAIL: 460 #ifdef CONFIG_SPE_POSSIBLE 461 case BOOKE_IRQPRIO_SPE_UNAVAIL: 462 case BOOKE_IRQPRIO_SPE_FP_DATA: 463 case BOOKE_IRQPRIO_SPE_FP_ROUND: 464 #endif 465 #ifdef CONFIG_ALTIVEC 466 case BOOKE_IRQPRIO_ALTIVEC_UNAVAIL: 467 case BOOKE_IRQPRIO_ALTIVEC_ASSIST: 468 #endif 469 case BOOKE_IRQPRIO_AP_UNAVAIL: 470 allowed = 1; 471 msr_mask = MSR_CE | MSR_ME | MSR_DE; 472 int_class = INT_CLASS_NONCRIT; 473 break; 474 case BOOKE_IRQPRIO_WATCHDOG: 475 case BOOKE_IRQPRIO_CRITICAL: 476 case BOOKE_IRQPRIO_DBELL_CRIT: 477 allowed = vcpu->arch.shared->msr & MSR_CE; 478 allowed = allowed && !crit; 479 msr_mask = MSR_ME; 480 int_class = INT_CLASS_CRIT; 481 break; 482 case BOOKE_IRQPRIO_MACHINE_CHECK: 483 allowed = vcpu->arch.shared->msr & MSR_ME; 484 allowed = allowed && !crit; 485 int_class = INT_CLASS_MC; 486 break; 487 case BOOKE_IRQPRIO_DECREMENTER: 488 case BOOKE_IRQPRIO_FIT: 489 keep_irq = true; 490 fallthrough; 491 case BOOKE_IRQPRIO_EXTERNAL: 492 case BOOKE_IRQPRIO_DBELL: 493 allowed = vcpu->arch.shared->msr & MSR_EE; 494 allowed = allowed && !crit; 495 msr_mask = MSR_CE | MSR_ME | MSR_DE; 496 int_class = INT_CLASS_NONCRIT; 497 break; 498 case BOOKE_IRQPRIO_DEBUG: 499 allowed = vcpu->arch.shared->msr & MSR_DE; 500 allowed = allowed && !crit; 501 msr_mask = MSR_ME; 502 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) 503 int_class = INT_CLASS_DBG; 504 else 505 int_class = INT_CLASS_CRIT; 506 507 break; 508 } 509 510 if (allowed) { 511 switch (int_class) { 512 case INT_CLASS_NONCRIT: 513 set_guest_srr(vcpu, vcpu->arch.regs.nip, 514 vcpu->arch.shared->msr); 515 break; 516 case INT_CLASS_CRIT: 517 set_guest_csrr(vcpu, vcpu->arch.regs.nip, 518 vcpu->arch.shared->msr); 519 break; 520 case INT_CLASS_DBG: 521 set_guest_dsrr(vcpu, vcpu->arch.regs.nip, 522 vcpu->arch.shared->msr); 523 break; 524 case INT_CLASS_MC: 525 set_guest_mcsrr(vcpu, vcpu->arch.regs.nip, 526 vcpu->arch.shared->msr); 527 break; 528 } 529 530 vcpu->arch.regs.nip = vcpu->arch.ivpr | 531 vcpu->arch.ivor[priority]; 532 if (update_esr) 533 kvmppc_set_esr(vcpu, vcpu->arch.queued_esr); 534 if (update_dear) 535 kvmppc_set_dar(vcpu, vcpu->arch.queued_dear); 536 if (update_epr) { 537 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER) 538 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu); 539 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) { 540 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC); 541 kvmppc_mpic_set_epr(vcpu); 542 } 543 } 544 545 new_msr &= msr_mask; 546 #if defined(CONFIG_64BIT) 547 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 548 new_msr |= MSR_CM; 549 #endif 550 kvmppc_set_msr(vcpu, new_msr); 551 552 if (!keep_irq) 553 clear_bit(priority, &vcpu->arch.pending_exceptions); 554 } 555 556 #ifdef CONFIG_KVM_BOOKE_HV 557 /* 558 * If an interrupt is pending but masked, raise a guest doorbell 559 * so that we are notified when the guest enables the relevant 560 * MSR bit. 561 */ 562 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE) 563 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT); 564 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE) 565 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT); 566 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK) 567 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC); 568 #endif 569 570 return allowed; 571 } 572 573 /* 574 * Return the number of jiffies until the next timeout. If the timeout is 575 * longer than the TIMER_NEXT_MAX_DELTA, then return TIMER_NEXT_MAX_DELTA 576 * because the larger value can break the timer APIs. 577 */ 578 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu) 579 { 580 u64 tb, wdt_tb, wdt_ticks = 0; 581 u64 nr_jiffies = 0; 582 u32 period = TCR_GET_WP(vcpu->arch.tcr); 583 584 wdt_tb = 1ULL << (63 - period); 585 tb = get_tb(); 586 /* 587 * The watchdog timeout will hapeen when TB bit corresponding 588 * to watchdog will toggle from 0 to 1. 589 */ 590 if (tb & wdt_tb) 591 wdt_ticks = wdt_tb; 592 593 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1)); 594 595 /* Convert timebase ticks to jiffies */ 596 nr_jiffies = wdt_ticks; 597 598 if (do_div(nr_jiffies, tb_ticks_per_jiffy)) 599 nr_jiffies++; 600 601 return min(nr_jiffies, TIMER_NEXT_MAX_DELTA); 602 } 603 604 static void arm_next_watchdog(struct kvm_vcpu *vcpu) 605 { 606 unsigned long nr_jiffies; 607 unsigned long flags; 608 609 /* 610 * If TSR_ENW and TSR_WIS are not set then no need to exit to 611 * userspace, so clear the KVM_REQ_WATCHDOG request. 612 */ 613 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) 614 kvm_clear_request(KVM_REQ_WATCHDOG, vcpu); 615 616 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags); 617 nr_jiffies = watchdog_next_timeout(vcpu); 618 /* 619 * If the number of jiffies of watchdog timer >= TIMER_NEXT_MAX_DELTA 620 * then do not run the watchdog timer as this can break timer APIs. 621 */ 622 if (nr_jiffies < TIMER_NEXT_MAX_DELTA) 623 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies); 624 else 625 timer_delete(&vcpu->arch.wdt_timer); 626 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags); 627 } 628 629 static void kvmppc_watchdog_func(struct timer_list *t) 630 { 631 struct kvm_vcpu *vcpu = timer_container_of(vcpu, t, arch.wdt_timer); 632 u32 tsr, new_tsr; 633 int final; 634 635 do { 636 new_tsr = tsr = vcpu->arch.tsr; 637 final = 0; 638 639 /* Time out event */ 640 if (tsr & TSR_ENW) { 641 if (tsr & TSR_WIS) 642 final = 1; 643 else 644 new_tsr = tsr | TSR_WIS; 645 } else { 646 new_tsr = tsr | TSR_ENW; 647 } 648 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr); 649 650 if (new_tsr & TSR_WIS) { 651 smp_wmb(); 652 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 653 kvm_vcpu_kick(vcpu); 654 } 655 656 /* 657 * If this is final watchdog expiry and some action is required 658 * then exit to userspace. 659 */ 660 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) && 661 vcpu->arch.watchdog_enabled) { 662 smp_wmb(); 663 kvm_make_request(KVM_REQ_WATCHDOG, vcpu); 664 kvm_vcpu_kick(vcpu); 665 } 666 667 /* 668 * Stop running the watchdog timer after final expiration to 669 * prevent the host from being flooded with timers if the 670 * guest sets a short period. 671 * Timers will resume when TSR/TCR is updated next time. 672 */ 673 if (!final) 674 arm_next_watchdog(vcpu); 675 } 676 677 static void update_timer_ints(struct kvm_vcpu *vcpu) 678 { 679 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) 680 kvmppc_core_queue_dec(vcpu); 681 else 682 kvmppc_core_dequeue_dec(vcpu); 683 684 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) 685 kvmppc_core_queue_watchdog(vcpu); 686 else 687 kvmppc_core_dequeue_watchdog(vcpu); 688 } 689 690 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu) 691 { 692 unsigned long *pending = &vcpu->arch.pending_exceptions; 693 unsigned int priority; 694 695 priority = __ffs(*pending); 696 while (priority < BOOKE_IRQPRIO_MAX) { 697 if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 698 break; 699 700 priority = find_next_bit(pending, 701 BITS_PER_BYTE * sizeof(*pending), 702 priority + 1); 703 } 704 705 /* Tell the guest about our interrupt status */ 706 vcpu->arch.shared->int_pending = !!*pending; 707 } 708 709 /* Check pending exceptions and deliver one, if possible. */ 710 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 711 { 712 int r = 0; 713 WARN_ON_ONCE(!irqs_disabled()); 714 715 kvmppc_core_check_exceptions(vcpu); 716 717 if (kvm_request_pending(vcpu)) { 718 /* Exception delivery raised request; start over */ 719 return 1; 720 } 721 722 if (vcpu->arch.shared->msr & MSR_WE) { 723 local_irq_enable(); 724 kvm_vcpu_halt(vcpu); 725 local_irq_disable(); 726 hard_irq_disable(); 727 728 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 729 r = 1; 730 } 731 732 return r; 733 } 734 735 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 736 { 737 int r = 1; /* Indicate we want to get back into the guest */ 738 739 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) 740 update_timer_ints(vcpu); 741 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 742 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 743 kvmppc_core_flush_tlb(vcpu); 744 #endif 745 746 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) { 747 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG; 748 r = 0; 749 } 750 751 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) { 752 vcpu->run->epr.epr = 0; 753 vcpu->arch.epr_needed = true; 754 vcpu->run->exit_reason = KVM_EXIT_EPR; 755 r = 0; 756 } 757 758 return r; 759 } 760 761 int kvmppc_vcpu_run(struct kvm_vcpu *vcpu) 762 { 763 int ret, s; 764 struct debug_reg debug; 765 766 if (!vcpu->arch.sane) { 767 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 768 return -EINVAL; 769 } 770 771 s = kvmppc_prepare_to_enter(vcpu); 772 if (s <= 0) { 773 ret = s; 774 goto out; 775 } 776 /* interrupts now hard-disabled */ 777 778 #ifdef CONFIG_PPC_FPU 779 /* Save userspace FPU state in stack */ 780 enable_kernel_fp(); 781 782 /* 783 * Since we can't trap on MSR_FP in GS-mode, we consider the guest 784 * as always using the FPU. 785 */ 786 kvmppc_load_guest_fp(vcpu); 787 #endif 788 789 #ifdef CONFIG_ALTIVEC 790 /* Save userspace AltiVec state in stack */ 791 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 792 enable_kernel_altivec(); 793 /* 794 * Since we can't trap on MSR_VEC in GS-mode, we consider the guest 795 * as always using the AltiVec. 796 */ 797 kvmppc_load_guest_altivec(vcpu); 798 #endif 799 800 /* Switch to guest debug context */ 801 debug = vcpu->arch.dbg_reg; 802 switch_booke_debug_regs(&debug); 803 debug = current->thread.debug; 804 current->thread.debug = vcpu->arch.dbg_reg; 805 806 vcpu->arch.pgdir = vcpu->kvm->mm->pgd; 807 kvmppc_fix_ee_before_entry(); 808 809 ret = __kvmppc_vcpu_run(vcpu); 810 811 /* No need for guest_exit. It's done in handle_exit. 812 We also get here with interrupts enabled. */ 813 814 /* Switch back to user space debug context */ 815 switch_booke_debug_regs(&debug); 816 current->thread.debug = debug; 817 818 #ifdef CONFIG_PPC_FPU 819 kvmppc_save_guest_fp(vcpu); 820 #endif 821 822 #ifdef CONFIG_ALTIVEC 823 kvmppc_save_guest_altivec(vcpu); 824 #endif 825 826 out: 827 vcpu->mode = OUTSIDE_GUEST_MODE; 828 return ret; 829 } 830 831 static int emulation_exit(struct kvm_vcpu *vcpu) 832 { 833 enum emulation_result er; 834 835 er = kvmppc_emulate_instruction(vcpu); 836 switch (er) { 837 case EMULATE_DONE: 838 /* don't overwrite subtypes, just account kvm_stats */ 839 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 840 /* Future optimization: only reload non-volatiles if 841 * they were actually modified by emulation. */ 842 return RESUME_GUEST_NV; 843 844 case EMULATE_AGAIN: 845 return RESUME_GUEST; 846 847 case EMULATE_FAIL: 848 printk(KERN_CRIT "%s: emulation at %lx failed (%08lx)\n", 849 __func__, vcpu->arch.regs.nip, vcpu->arch.last_inst); 850 /* For debugging, encode the failing instruction and 851 * report it to userspace. */ 852 vcpu->run->hw.hardware_exit_reason = ~0ULL << 32; 853 vcpu->run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 854 kvmppc_core_queue_program(vcpu, ESR_PIL); 855 return RESUME_HOST; 856 857 case EMULATE_EXIT_USER: 858 return RESUME_HOST; 859 860 default: 861 BUG(); 862 } 863 } 864 865 static int kvmppc_handle_debug(struct kvm_vcpu *vcpu) 866 { 867 struct kvm_run *run = vcpu->run; 868 struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg); 869 u32 dbsr = vcpu->arch.dbsr; 870 871 if (vcpu->guest_debug == 0) { 872 /* 873 * Debug resources belong to Guest. 874 * Imprecise debug event is not injected 875 */ 876 if (dbsr & DBSR_IDE) { 877 dbsr &= ~DBSR_IDE; 878 if (!dbsr) 879 return RESUME_GUEST; 880 } 881 882 if (dbsr && (vcpu->arch.shared->msr & MSR_DE) && 883 (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM)) 884 kvmppc_core_queue_debug(vcpu); 885 886 /* Inject a program interrupt if trap debug is not allowed */ 887 if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE)) 888 kvmppc_core_queue_program(vcpu, ESR_PTR); 889 890 return RESUME_GUEST; 891 } 892 893 /* 894 * Debug resource owned by userspace. 895 * Clear guest dbsr (vcpu->arch.dbsr) 896 */ 897 vcpu->arch.dbsr = 0; 898 run->debug.arch.status = 0; 899 run->debug.arch.address = vcpu->arch.regs.nip; 900 901 if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) { 902 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT; 903 } else { 904 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W)) 905 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE; 906 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R)) 907 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ; 908 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W)) 909 run->debug.arch.address = dbg_reg->dac1; 910 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W)) 911 run->debug.arch.address = dbg_reg->dac2; 912 } 913 914 return RESUME_HOST; 915 } 916 917 static void kvmppc_fill_pt_regs(struct pt_regs *regs) 918 { 919 ulong r1, msr, lr; 920 921 asm("mr %0, 1" : "=r"(r1)); 922 asm("mflr %0" : "=r"(lr)); 923 asm("mfmsr %0" : "=r"(msr)); 924 925 memset(regs, 0, sizeof(*regs)); 926 regs->gpr[1] = r1; 927 regs->nip = _THIS_IP_; 928 regs->msr = msr; 929 regs->link = lr; 930 } 931 932 /* 933 * For interrupts needed to be handled by host interrupt handlers, 934 * corresponding host handler are called from here in similar way 935 * (but not exact) as they are called from low level handler 936 * (such as from arch/powerpc/kernel/head_fsl_booke.S). 937 */ 938 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu, 939 unsigned int exit_nr) 940 { 941 struct pt_regs regs; 942 943 switch (exit_nr) { 944 case BOOKE_INTERRUPT_EXTERNAL: 945 kvmppc_fill_pt_regs(®s); 946 do_IRQ(®s); 947 break; 948 case BOOKE_INTERRUPT_DECREMENTER: 949 kvmppc_fill_pt_regs(®s); 950 timer_interrupt(®s); 951 break; 952 #if defined(CONFIG_PPC_DOORBELL) 953 case BOOKE_INTERRUPT_DOORBELL: 954 kvmppc_fill_pt_regs(®s); 955 doorbell_exception(®s); 956 break; 957 #endif 958 case BOOKE_INTERRUPT_MACHINE_CHECK: 959 /* FIXME */ 960 break; 961 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 962 kvmppc_fill_pt_regs(®s); 963 performance_monitor_exception(®s); 964 break; 965 case BOOKE_INTERRUPT_WATCHDOG: 966 kvmppc_fill_pt_regs(®s); 967 #ifdef CONFIG_BOOKE_WDT 968 WatchdogException(®s); 969 #else 970 unknown_exception(®s); 971 #endif 972 break; 973 case BOOKE_INTERRUPT_CRITICAL: 974 kvmppc_fill_pt_regs(®s); 975 unknown_exception(®s); 976 break; 977 case BOOKE_INTERRUPT_DEBUG: 978 /* Save DBSR before preemption is enabled */ 979 vcpu->arch.dbsr = mfspr(SPRN_DBSR); 980 kvmppc_clear_dbsr(); 981 break; 982 } 983 } 984 985 static int kvmppc_resume_inst_load(struct kvm_vcpu *vcpu, 986 enum emulation_result emulated, u32 last_inst) 987 { 988 switch (emulated) { 989 case EMULATE_AGAIN: 990 return RESUME_GUEST; 991 992 case EMULATE_FAIL: 993 pr_debug("%s: load instruction from guest address %lx failed\n", 994 __func__, vcpu->arch.regs.nip); 995 /* For debugging, encode the failing instruction and 996 * report it to userspace. */ 997 vcpu->run->hw.hardware_exit_reason = ~0ULL << 32; 998 vcpu->run->hw.hardware_exit_reason |= last_inst; 999 kvmppc_core_queue_program(vcpu, ESR_PIL); 1000 return RESUME_HOST; 1001 1002 default: 1003 BUG(); 1004 } 1005 } 1006 1007 /* 1008 * kvmppc_handle_exit 1009 * 1010 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 1011 */ 1012 int kvmppc_handle_exit(struct kvm_vcpu *vcpu, unsigned int exit_nr) 1013 { 1014 struct kvm_run *run = vcpu->run; 1015 int r = RESUME_HOST; 1016 int s; 1017 int idx; 1018 u32 last_inst = KVM_INST_FETCH_FAILED; 1019 ppc_inst_t pinst; 1020 enum emulation_result emulated = EMULATE_DONE; 1021 1022 /* Fix irq state (pairs with kvmppc_fix_ee_before_entry()) */ 1023 kvmppc_fix_ee_after_exit(); 1024 1025 /* update before a new last_exit_type is rewritten */ 1026 kvmppc_update_timing_stats(vcpu); 1027 1028 /* restart interrupts if they were meant for the host */ 1029 kvmppc_restart_interrupt(vcpu, exit_nr); 1030 1031 /* 1032 * get last instruction before being preempted 1033 * TODO: for e6500 check also BOOKE_INTERRUPT_LRAT_ERROR & ESR_DATA 1034 */ 1035 switch (exit_nr) { 1036 case BOOKE_INTERRUPT_DATA_STORAGE: 1037 case BOOKE_INTERRUPT_DTLB_MISS: 1038 case BOOKE_INTERRUPT_HV_PRIV: 1039 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &pinst); 1040 last_inst = ppc_inst_val(pinst); 1041 break; 1042 case BOOKE_INTERRUPT_PROGRAM: 1043 /* SW breakpoints arrive as illegal instructions on HV */ 1044 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { 1045 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &pinst); 1046 last_inst = ppc_inst_val(pinst); 1047 } 1048 break; 1049 default: 1050 break; 1051 } 1052 1053 trace_kvm_exit(exit_nr, vcpu); 1054 1055 context_tracking_guest_exit(); 1056 if (!vtime_accounting_enabled_this_cpu()) { 1057 local_irq_enable(); 1058 /* 1059 * Service IRQs here before vtime_account_guest_exit() so any 1060 * ticks that occurred while running the guest are accounted to 1061 * the guest. If vtime accounting is enabled, accounting uses 1062 * TB rather than ticks, so it can be done without enabling 1063 * interrupts here, which has the problem that it accounts 1064 * interrupt processing overhead to the host. 1065 */ 1066 local_irq_disable(); 1067 } 1068 vtime_account_guest_exit(); 1069 1070 local_irq_enable(); 1071 1072 run->exit_reason = KVM_EXIT_UNKNOWN; 1073 run->ready_for_interrupt_injection = 1; 1074 1075 if (emulated != EMULATE_DONE) { 1076 r = kvmppc_resume_inst_load(vcpu, emulated, last_inst); 1077 goto out; 1078 } 1079 1080 switch (exit_nr) { 1081 case BOOKE_INTERRUPT_MACHINE_CHECK: 1082 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 1083 kvmppc_dump_vcpu(vcpu); 1084 /* For debugging, send invalid exit reason to user space */ 1085 run->hw.hardware_exit_reason = ~1ULL << 32; 1086 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR); 1087 r = RESUME_HOST; 1088 break; 1089 1090 case BOOKE_INTERRUPT_EXTERNAL: 1091 kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 1092 r = RESUME_GUEST; 1093 break; 1094 1095 case BOOKE_INTERRUPT_DECREMENTER: 1096 kvmppc_account_exit(vcpu, DEC_EXITS); 1097 r = RESUME_GUEST; 1098 break; 1099 1100 case BOOKE_INTERRUPT_WATCHDOG: 1101 r = RESUME_GUEST; 1102 break; 1103 1104 case BOOKE_INTERRUPT_DOORBELL: 1105 kvmppc_account_exit(vcpu, DBELL_EXITS); 1106 r = RESUME_GUEST; 1107 break; 1108 1109 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT: 1110 kvmppc_account_exit(vcpu, GDBELL_EXITS); 1111 1112 /* 1113 * We are here because there is a pending guest interrupt 1114 * which could not be delivered as MSR_CE or MSR_ME was not 1115 * set. Once we break from here we will retry delivery. 1116 */ 1117 r = RESUME_GUEST; 1118 break; 1119 1120 case BOOKE_INTERRUPT_GUEST_DBELL: 1121 kvmppc_account_exit(vcpu, GDBELL_EXITS); 1122 1123 /* 1124 * We are here because there is a pending guest interrupt 1125 * which could not be delivered as MSR_EE was not set. Once 1126 * we break from here we will retry delivery. 1127 */ 1128 r = RESUME_GUEST; 1129 break; 1130 1131 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 1132 r = RESUME_GUEST; 1133 break; 1134 1135 case BOOKE_INTERRUPT_HV_PRIV: 1136 r = emulation_exit(vcpu); 1137 break; 1138 1139 case BOOKE_INTERRUPT_PROGRAM: 1140 if ((vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) && 1141 (last_inst == KVMPPC_INST_SW_BREAKPOINT)) { 1142 /* 1143 * We are here because of an SW breakpoint instr, 1144 * so lets return to host to handle. 1145 */ 1146 r = kvmppc_handle_debug(vcpu); 1147 run->exit_reason = KVM_EXIT_DEBUG; 1148 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1149 break; 1150 } 1151 1152 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) { 1153 /* 1154 * Program traps generated by user-level software must 1155 * be handled by the guest kernel. 1156 * 1157 * In GS mode, hypervisor privileged instructions trap 1158 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are 1159 * actual program interrupts, handled by the guest. 1160 */ 1161 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 1162 r = RESUME_GUEST; 1163 kvmppc_account_exit(vcpu, USR_PR_INST); 1164 break; 1165 } 1166 1167 r = emulation_exit(vcpu); 1168 break; 1169 1170 case BOOKE_INTERRUPT_FP_UNAVAIL: 1171 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 1172 kvmppc_account_exit(vcpu, FP_UNAVAIL); 1173 r = RESUME_GUEST; 1174 break; 1175 1176 #ifdef CONFIG_SPE 1177 case BOOKE_INTERRUPT_SPE_UNAVAIL: { 1178 if (vcpu->arch.shared->msr & MSR_SPE) 1179 kvmppc_vcpu_enable_spe(vcpu); 1180 else 1181 kvmppc_booke_queue_irqprio(vcpu, 1182 BOOKE_IRQPRIO_SPE_UNAVAIL); 1183 r = RESUME_GUEST; 1184 break; 1185 } 1186 1187 case BOOKE_INTERRUPT_SPE_FP_DATA: 1188 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 1189 r = RESUME_GUEST; 1190 break; 1191 1192 case BOOKE_INTERRUPT_SPE_FP_ROUND: 1193 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 1194 r = RESUME_GUEST; 1195 break; 1196 #elif defined(CONFIG_SPE_POSSIBLE) 1197 case BOOKE_INTERRUPT_SPE_UNAVAIL: 1198 /* 1199 * Guest wants SPE, but host kernel doesn't support it. Send 1200 * an "unimplemented operation" program check to the guest. 1201 */ 1202 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 1203 r = RESUME_GUEST; 1204 break; 1205 1206 /* 1207 * These really should never happen without CONFIG_SPE, 1208 * as we should never enable the real MSR[SPE] in the guest. 1209 */ 1210 case BOOKE_INTERRUPT_SPE_FP_DATA: 1211 case BOOKE_INTERRUPT_SPE_FP_ROUND: 1212 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 1213 __func__, exit_nr, vcpu->arch.regs.nip); 1214 run->hw.hardware_exit_reason = exit_nr; 1215 r = RESUME_HOST; 1216 break; 1217 #endif /* CONFIG_SPE_POSSIBLE */ 1218 1219 /* 1220 * On cores with Vector category, KVM is loaded only if CONFIG_ALTIVEC, 1221 * see kvmppc_e500mc_check_processor_compat(). 1222 */ 1223 #ifdef CONFIG_ALTIVEC 1224 case BOOKE_INTERRUPT_ALTIVEC_UNAVAIL: 1225 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL); 1226 r = RESUME_GUEST; 1227 break; 1228 1229 case BOOKE_INTERRUPT_ALTIVEC_ASSIST: 1230 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_ASSIST); 1231 r = RESUME_GUEST; 1232 break; 1233 #endif 1234 1235 case BOOKE_INTERRUPT_DATA_STORAGE: 1236 kvmppc_core_queue_data_storage(vcpu, 0, vcpu->arch.fault_dear, 1237 vcpu->arch.fault_esr); 1238 kvmppc_account_exit(vcpu, DSI_EXITS); 1239 r = RESUME_GUEST; 1240 break; 1241 1242 case BOOKE_INTERRUPT_INST_STORAGE: 1243 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 1244 kvmppc_account_exit(vcpu, ISI_EXITS); 1245 r = RESUME_GUEST; 1246 break; 1247 1248 case BOOKE_INTERRUPT_ALIGNMENT: 1249 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear, 1250 vcpu->arch.fault_esr); 1251 r = RESUME_GUEST; 1252 break; 1253 1254 #ifdef CONFIG_KVM_BOOKE_HV 1255 case BOOKE_INTERRUPT_HV_SYSCALL: 1256 if (!(vcpu->arch.shared->msr & MSR_PR)) { 1257 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1258 } else { 1259 /* 1260 * hcall from guest userspace -- send privileged 1261 * instruction program check. 1262 */ 1263 kvmppc_core_queue_program(vcpu, ESR_PPR); 1264 } 1265 1266 r = RESUME_GUEST; 1267 break; 1268 #else 1269 case BOOKE_INTERRUPT_SYSCALL: 1270 if (!(vcpu->arch.shared->msr & MSR_PR) && 1271 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 1272 /* KVM PV hypercalls */ 1273 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1274 r = RESUME_GUEST; 1275 } else { 1276 /* Guest syscalls */ 1277 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 1278 } 1279 kvmppc_account_exit(vcpu, SYSCALL_EXITS); 1280 r = RESUME_GUEST; 1281 break; 1282 #endif 1283 1284 case BOOKE_INTERRUPT_DTLB_MISS: { 1285 unsigned long eaddr = vcpu->arch.fault_dear; 1286 int gtlb_index; 1287 gpa_t gpaddr; 1288 gfn_t gfn; 1289 1290 #ifdef CONFIG_KVM_E500V2 1291 if (!(vcpu->arch.shared->msr & MSR_PR) && 1292 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1293 kvmppc_map_magic(vcpu); 1294 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1295 r = RESUME_GUEST; 1296 1297 break; 1298 } 1299 #endif 1300 1301 /* Check the guest TLB. */ 1302 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 1303 if (gtlb_index < 0) { 1304 /* The guest didn't have a mapping for it. */ 1305 kvmppc_core_queue_dtlb_miss(vcpu, 1306 vcpu->arch.fault_dear, 1307 vcpu->arch.fault_esr); 1308 kvmppc_mmu_dtlb_miss(vcpu); 1309 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 1310 r = RESUME_GUEST; 1311 break; 1312 } 1313 1314 idx = srcu_read_lock(&vcpu->kvm->srcu); 1315 1316 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1317 gfn = gpaddr >> PAGE_SHIFT; 1318 1319 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1320 /* The guest TLB had a mapping, but the shadow TLB 1321 * didn't, and it is RAM. This could be because: 1322 * a) the entry is mapping the host kernel, or 1323 * b) the guest used a large mapping which we're faking 1324 * Either way, we need to satisfy the fault without 1325 * invoking the guest. */ 1326 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1327 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1328 r = RESUME_GUEST; 1329 } else { 1330 /* Guest has mapped and accessed a page which is not 1331 * actually RAM. */ 1332 vcpu->arch.paddr_accessed = gpaddr; 1333 vcpu->arch.vaddr_accessed = eaddr; 1334 r = kvmppc_emulate_mmio(vcpu); 1335 kvmppc_account_exit(vcpu, MMIO_EXITS); 1336 } 1337 1338 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1339 break; 1340 } 1341 1342 case BOOKE_INTERRUPT_ITLB_MISS: { 1343 unsigned long eaddr = vcpu->arch.regs.nip; 1344 gpa_t gpaddr; 1345 gfn_t gfn; 1346 int gtlb_index; 1347 1348 r = RESUME_GUEST; 1349 1350 /* Check the guest TLB. */ 1351 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1352 if (gtlb_index < 0) { 1353 /* The guest didn't have a mapping for it. */ 1354 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 1355 kvmppc_mmu_itlb_miss(vcpu); 1356 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 1357 break; 1358 } 1359 1360 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 1361 1362 idx = srcu_read_lock(&vcpu->kvm->srcu); 1363 1364 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1365 gfn = gpaddr >> PAGE_SHIFT; 1366 1367 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1368 /* The guest TLB had a mapping, but the shadow TLB 1369 * didn't. This could be because: 1370 * a) the entry is mapping the host kernel, or 1371 * b) the guest used a large mapping which we're faking 1372 * Either way, we need to satisfy the fault without 1373 * invoking the guest. */ 1374 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1375 } else { 1376 /* Guest mapped and leaped at non-RAM! */ 1377 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 1378 } 1379 1380 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1381 break; 1382 } 1383 1384 case BOOKE_INTERRUPT_DEBUG: { 1385 r = kvmppc_handle_debug(vcpu); 1386 if (r == RESUME_HOST) 1387 run->exit_reason = KVM_EXIT_DEBUG; 1388 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1389 break; 1390 } 1391 1392 default: 1393 printk(KERN_EMERG "exit_nr %d\n", exit_nr); 1394 BUG(); 1395 } 1396 1397 out: 1398 /* 1399 * To avoid clobbering exit_reason, only check for signals if we 1400 * aren't already exiting to userspace for some other reason. 1401 */ 1402 if (!(r & RESUME_HOST)) { 1403 s = kvmppc_prepare_to_enter(vcpu); 1404 if (s <= 0) 1405 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 1406 else { 1407 /* interrupts now hard-disabled */ 1408 kvmppc_fix_ee_before_entry(); 1409 kvmppc_load_guest_fp(vcpu); 1410 kvmppc_load_guest_altivec(vcpu); 1411 } 1412 } 1413 1414 return r; 1415 } 1416 1417 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr) 1418 { 1419 u32 old_tsr = vcpu->arch.tsr; 1420 1421 vcpu->arch.tsr = new_tsr; 1422 1423 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS)) 1424 arm_next_watchdog(vcpu); 1425 1426 update_timer_ints(vcpu); 1427 } 1428 1429 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 1430 { 1431 /* setup watchdog timer once */ 1432 spin_lock_init(&vcpu->arch.wdt_lock); 1433 timer_setup(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 0); 1434 1435 /* 1436 * Clear DBSR.MRR to avoid guest debug interrupt as 1437 * this is of host interest 1438 */ 1439 mtspr(SPRN_DBSR, DBSR_MRR); 1440 return 0; 1441 } 1442 1443 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 1444 { 1445 timer_delete_sync(&vcpu->arch.wdt_timer); 1446 } 1447 1448 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1449 { 1450 int i; 1451 1452 vcpu_load(vcpu); 1453 1454 regs->pc = vcpu->arch.regs.nip; 1455 regs->cr = kvmppc_get_cr(vcpu); 1456 regs->ctr = vcpu->arch.regs.ctr; 1457 regs->lr = vcpu->arch.regs.link; 1458 regs->xer = kvmppc_get_xer(vcpu); 1459 regs->msr = vcpu->arch.shared->msr; 1460 regs->srr0 = kvmppc_get_srr0(vcpu); 1461 regs->srr1 = kvmppc_get_srr1(vcpu); 1462 regs->pid = vcpu->arch.pid; 1463 regs->sprg0 = kvmppc_get_sprg0(vcpu); 1464 regs->sprg1 = kvmppc_get_sprg1(vcpu); 1465 regs->sprg2 = kvmppc_get_sprg2(vcpu); 1466 regs->sprg3 = kvmppc_get_sprg3(vcpu); 1467 regs->sprg4 = kvmppc_get_sprg4(vcpu); 1468 regs->sprg5 = kvmppc_get_sprg5(vcpu); 1469 regs->sprg6 = kvmppc_get_sprg6(vcpu); 1470 regs->sprg7 = kvmppc_get_sprg7(vcpu); 1471 1472 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1473 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 1474 1475 vcpu_put(vcpu); 1476 return 0; 1477 } 1478 1479 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1480 { 1481 int i; 1482 1483 vcpu_load(vcpu); 1484 1485 vcpu->arch.regs.nip = regs->pc; 1486 kvmppc_set_cr(vcpu, regs->cr); 1487 vcpu->arch.regs.ctr = regs->ctr; 1488 vcpu->arch.regs.link = regs->lr; 1489 kvmppc_set_xer(vcpu, regs->xer); 1490 kvmppc_set_msr(vcpu, regs->msr); 1491 kvmppc_set_srr0(vcpu, regs->srr0); 1492 kvmppc_set_srr1(vcpu, regs->srr1); 1493 kvmppc_set_pid(vcpu, regs->pid); 1494 kvmppc_set_sprg0(vcpu, regs->sprg0); 1495 kvmppc_set_sprg1(vcpu, regs->sprg1); 1496 kvmppc_set_sprg2(vcpu, regs->sprg2); 1497 kvmppc_set_sprg3(vcpu, regs->sprg3); 1498 kvmppc_set_sprg4(vcpu, regs->sprg4); 1499 kvmppc_set_sprg5(vcpu, regs->sprg5); 1500 kvmppc_set_sprg6(vcpu, regs->sprg6); 1501 kvmppc_set_sprg7(vcpu, regs->sprg7); 1502 1503 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1504 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 1505 1506 vcpu_put(vcpu); 1507 return 0; 1508 } 1509 1510 static void get_sregs_base(struct kvm_vcpu *vcpu, 1511 struct kvm_sregs *sregs) 1512 { 1513 u64 tb = get_tb(); 1514 1515 sregs->u.e.features |= KVM_SREGS_E_BASE; 1516 1517 sregs->u.e.csrr0 = vcpu->arch.csrr0; 1518 sregs->u.e.csrr1 = vcpu->arch.csrr1; 1519 sregs->u.e.mcsr = vcpu->arch.mcsr; 1520 sregs->u.e.esr = kvmppc_get_esr(vcpu); 1521 sregs->u.e.dear = kvmppc_get_dar(vcpu); 1522 sregs->u.e.tsr = vcpu->arch.tsr; 1523 sregs->u.e.tcr = vcpu->arch.tcr; 1524 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 1525 sregs->u.e.tb = tb; 1526 sregs->u.e.vrsave = vcpu->arch.vrsave; 1527 } 1528 1529 static int set_sregs_base(struct kvm_vcpu *vcpu, 1530 struct kvm_sregs *sregs) 1531 { 1532 if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 1533 return 0; 1534 1535 vcpu->arch.csrr0 = sregs->u.e.csrr0; 1536 vcpu->arch.csrr1 = sregs->u.e.csrr1; 1537 vcpu->arch.mcsr = sregs->u.e.mcsr; 1538 kvmppc_set_esr(vcpu, sregs->u.e.esr); 1539 kvmppc_set_dar(vcpu, sregs->u.e.dear); 1540 vcpu->arch.vrsave = sregs->u.e.vrsave; 1541 kvmppc_set_tcr(vcpu, sregs->u.e.tcr); 1542 1543 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) { 1544 vcpu->arch.dec = sregs->u.e.dec; 1545 kvmppc_emulate_dec(vcpu); 1546 } 1547 1548 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) 1549 kvmppc_set_tsr(vcpu, sregs->u.e.tsr); 1550 1551 return 0; 1552 } 1553 1554 static void get_sregs_arch206(struct kvm_vcpu *vcpu, 1555 struct kvm_sregs *sregs) 1556 { 1557 sregs->u.e.features |= KVM_SREGS_E_ARCH206; 1558 1559 sregs->u.e.pir = vcpu->vcpu_id; 1560 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 1561 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 1562 sregs->u.e.decar = vcpu->arch.decar; 1563 sregs->u.e.ivpr = vcpu->arch.ivpr; 1564 } 1565 1566 static int set_sregs_arch206(struct kvm_vcpu *vcpu, 1567 struct kvm_sregs *sregs) 1568 { 1569 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 1570 return 0; 1571 1572 if (sregs->u.e.pir != vcpu->vcpu_id) 1573 return -EINVAL; 1574 1575 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 1576 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 1577 vcpu->arch.decar = sregs->u.e.decar; 1578 vcpu->arch.ivpr = sregs->u.e.ivpr; 1579 1580 return 0; 1581 } 1582 1583 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1584 { 1585 sregs->u.e.features |= KVM_SREGS_E_IVOR; 1586 1587 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 1588 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 1589 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 1590 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 1591 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 1592 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 1593 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 1594 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 1595 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 1596 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 1597 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 1598 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 1599 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 1600 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 1601 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 1602 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 1603 return 0; 1604 } 1605 1606 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1607 { 1608 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 1609 return 0; 1610 1611 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 1612 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 1613 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 1614 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 1615 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 1616 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 1617 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 1618 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 1619 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 1620 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 1621 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 1622 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 1623 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 1624 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 1625 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 1626 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 1627 1628 return 0; 1629 } 1630 1631 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 1632 struct kvm_sregs *sregs) 1633 { 1634 int ret; 1635 1636 vcpu_load(vcpu); 1637 1638 sregs->pvr = vcpu->arch.pvr; 1639 1640 get_sregs_base(vcpu, sregs); 1641 get_sregs_arch206(vcpu, sregs); 1642 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); 1643 1644 vcpu_put(vcpu); 1645 return ret; 1646 } 1647 1648 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 1649 struct kvm_sregs *sregs) 1650 { 1651 int ret = -EINVAL; 1652 1653 vcpu_load(vcpu); 1654 if (vcpu->arch.pvr != sregs->pvr) 1655 goto out; 1656 1657 ret = set_sregs_base(vcpu, sregs); 1658 if (ret < 0) 1659 goto out; 1660 1661 ret = set_sregs_arch206(vcpu, sregs); 1662 if (ret < 0) 1663 goto out; 1664 1665 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); 1666 1667 out: 1668 vcpu_put(vcpu); 1669 return ret; 1670 } 1671 1672 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 1673 union kvmppc_one_reg *val) 1674 { 1675 int r = 0; 1676 1677 switch (id) { 1678 case KVM_REG_PPC_IAC1: 1679 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1); 1680 break; 1681 case KVM_REG_PPC_IAC2: 1682 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac2); 1683 break; 1684 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1685 case KVM_REG_PPC_IAC3: 1686 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac3); 1687 break; 1688 case KVM_REG_PPC_IAC4: 1689 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac4); 1690 break; 1691 #endif 1692 case KVM_REG_PPC_DAC1: 1693 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac1); 1694 break; 1695 case KVM_REG_PPC_DAC2: 1696 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac2); 1697 break; 1698 case KVM_REG_PPC_EPR: { 1699 u32 epr = kvmppc_get_epr(vcpu); 1700 *val = get_reg_val(id, epr); 1701 break; 1702 } 1703 #if defined(CONFIG_64BIT) 1704 case KVM_REG_PPC_EPCR: 1705 *val = get_reg_val(id, vcpu->arch.epcr); 1706 break; 1707 #endif 1708 case KVM_REG_PPC_TCR: 1709 *val = get_reg_val(id, vcpu->arch.tcr); 1710 break; 1711 case KVM_REG_PPC_TSR: 1712 *val = get_reg_val(id, vcpu->arch.tsr); 1713 break; 1714 case KVM_REG_PPC_DEBUG_INST: 1715 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1716 break; 1717 case KVM_REG_PPC_VRSAVE: 1718 *val = get_reg_val(id, vcpu->arch.vrsave); 1719 break; 1720 default: 1721 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val); 1722 break; 1723 } 1724 1725 return r; 1726 } 1727 1728 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 1729 union kvmppc_one_reg *val) 1730 { 1731 int r = 0; 1732 1733 switch (id) { 1734 case KVM_REG_PPC_IAC1: 1735 vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val); 1736 break; 1737 case KVM_REG_PPC_IAC2: 1738 vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val); 1739 break; 1740 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1741 case KVM_REG_PPC_IAC3: 1742 vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val); 1743 break; 1744 case KVM_REG_PPC_IAC4: 1745 vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val); 1746 break; 1747 #endif 1748 case KVM_REG_PPC_DAC1: 1749 vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val); 1750 break; 1751 case KVM_REG_PPC_DAC2: 1752 vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val); 1753 break; 1754 case KVM_REG_PPC_EPR: { 1755 u32 new_epr = set_reg_val(id, *val); 1756 kvmppc_set_epr(vcpu, new_epr); 1757 break; 1758 } 1759 #if defined(CONFIG_64BIT) 1760 case KVM_REG_PPC_EPCR: { 1761 u32 new_epcr = set_reg_val(id, *val); 1762 kvmppc_set_epcr(vcpu, new_epcr); 1763 break; 1764 } 1765 #endif 1766 case KVM_REG_PPC_OR_TSR: { 1767 u32 tsr_bits = set_reg_val(id, *val); 1768 kvmppc_set_tsr_bits(vcpu, tsr_bits); 1769 break; 1770 } 1771 case KVM_REG_PPC_CLEAR_TSR: { 1772 u32 tsr_bits = set_reg_val(id, *val); 1773 kvmppc_clr_tsr_bits(vcpu, tsr_bits); 1774 break; 1775 } 1776 case KVM_REG_PPC_TSR: { 1777 u32 tsr = set_reg_val(id, *val); 1778 kvmppc_set_tsr(vcpu, tsr); 1779 break; 1780 } 1781 case KVM_REG_PPC_TCR: { 1782 u32 tcr = set_reg_val(id, *val); 1783 kvmppc_set_tcr(vcpu, tcr); 1784 break; 1785 } 1786 case KVM_REG_PPC_VRSAVE: 1787 vcpu->arch.vrsave = set_reg_val(id, *val); 1788 break; 1789 default: 1790 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val); 1791 break; 1792 } 1793 1794 return r; 1795 } 1796 1797 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1798 { 1799 return -EOPNOTSUPP; 1800 } 1801 1802 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1803 { 1804 return -EOPNOTSUPP; 1805 } 1806 1807 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 1808 struct kvm_translation *tr) 1809 { 1810 int r; 1811 1812 vcpu_load(vcpu); 1813 r = kvmppc_core_vcpu_translate(vcpu, tr); 1814 vcpu_put(vcpu); 1815 return r; 1816 } 1817 1818 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot) 1819 { 1820 1821 } 1822 1823 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 1824 { 1825 return -EOPNOTSUPP; 1826 } 1827 1828 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) 1829 { 1830 } 1831 1832 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1833 const struct kvm_memory_slot *old, 1834 struct kvm_memory_slot *new, 1835 enum kvm_mr_change change) 1836 { 1837 return 0; 1838 } 1839 1840 void kvmppc_core_commit_memory_region(struct kvm *kvm, 1841 struct kvm_memory_slot *old, 1842 const struct kvm_memory_slot *new, 1843 enum kvm_mr_change change) 1844 { 1845 } 1846 1847 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 1848 { 1849 } 1850 1851 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr) 1852 { 1853 #if defined(CONFIG_64BIT) 1854 vcpu->arch.epcr = new_epcr; 1855 #ifdef CONFIG_KVM_BOOKE_HV 1856 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM; 1857 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 1858 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM; 1859 #endif 1860 #endif 1861 } 1862 1863 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr) 1864 { 1865 vcpu->arch.tcr = new_tcr; 1866 arm_next_watchdog(vcpu); 1867 update_timer_ints(vcpu); 1868 } 1869 1870 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1871 { 1872 set_bits(tsr_bits, &vcpu->arch.tsr); 1873 smp_wmb(); 1874 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 1875 kvm_vcpu_kick(vcpu); 1876 } 1877 1878 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1879 { 1880 clear_bits(tsr_bits, &vcpu->arch.tsr); 1881 1882 /* 1883 * We may have stopped the watchdog due to 1884 * being stuck on final expiration. 1885 */ 1886 if (tsr_bits & (TSR_ENW | TSR_WIS)) 1887 arm_next_watchdog(vcpu); 1888 1889 update_timer_ints(vcpu); 1890 } 1891 1892 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu) 1893 { 1894 if (vcpu->arch.tcr & TCR_ARE) { 1895 vcpu->arch.dec = vcpu->arch.decar; 1896 kvmppc_emulate_dec(vcpu); 1897 } 1898 1899 kvmppc_set_tsr_bits(vcpu, TSR_DIS); 1900 } 1901 1902 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg, 1903 uint64_t addr, int index) 1904 { 1905 switch (index) { 1906 case 0: 1907 dbg_reg->dbcr0 |= DBCR0_IAC1; 1908 dbg_reg->iac1 = addr; 1909 break; 1910 case 1: 1911 dbg_reg->dbcr0 |= DBCR0_IAC2; 1912 dbg_reg->iac2 = addr; 1913 break; 1914 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1915 case 2: 1916 dbg_reg->dbcr0 |= DBCR0_IAC3; 1917 dbg_reg->iac3 = addr; 1918 break; 1919 case 3: 1920 dbg_reg->dbcr0 |= DBCR0_IAC4; 1921 dbg_reg->iac4 = addr; 1922 break; 1923 #endif 1924 default: 1925 return -EINVAL; 1926 } 1927 1928 dbg_reg->dbcr0 |= DBCR0_IDM; 1929 return 0; 1930 } 1931 1932 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr, 1933 int type, int index) 1934 { 1935 switch (index) { 1936 case 0: 1937 if (type & KVMPPC_DEBUG_WATCH_READ) 1938 dbg_reg->dbcr0 |= DBCR0_DAC1R; 1939 if (type & KVMPPC_DEBUG_WATCH_WRITE) 1940 dbg_reg->dbcr0 |= DBCR0_DAC1W; 1941 dbg_reg->dac1 = addr; 1942 break; 1943 case 1: 1944 if (type & KVMPPC_DEBUG_WATCH_READ) 1945 dbg_reg->dbcr0 |= DBCR0_DAC2R; 1946 if (type & KVMPPC_DEBUG_WATCH_WRITE) 1947 dbg_reg->dbcr0 |= DBCR0_DAC2W; 1948 dbg_reg->dac2 = addr; 1949 break; 1950 default: 1951 return -EINVAL; 1952 } 1953 1954 dbg_reg->dbcr0 |= DBCR0_IDM; 1955 return 0; 1956 } 1957 static void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, 1958 bool set) 1959 { 1960 /* XXX: Add similar MSR protection for BookE-PR */ 1961 #ifdef CONFIG_KVM_BOOKE_HV 1962 BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP)); 1963 if (set) { 1964 if (prot_bitmap & MSR_UCLE) 1965 vcpu->arch.shadow_msrp |= MSRP_UCLEP; 1966 if (prot_bitmap & MSR_DE) 1967 vcpu->arch.shadow_msrp |= MSRP_DEP; 1968 if (prot_bitmap & MSR_PMM) 1969 vcpu->arch.shadow_msrp |= MSRP_PMMP; 1970 } else { 1971 if (prot_bitmap & MSR_UCLE) 1972 vcpu->arch.shadow_msrp &= ~MSRP_UCLEP; 1973 if (prot_bitmap & MSR_DE) 1974 vcpu->arch.shadow_msrp &= ~MSRP_DEP; 1975 if (prot_bitmap & MSR_PMM) 1976 vcpu->arch.shadow_msrp &= ~MSRP_PMMP; 1977 } 1978 #endif 1979 } 1980 1981 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid, 1982 enum xlate_readwrite xlrw, struct kvmppc_pte *pte) 1983 { 1984 int gtlb_index; 1985 gpa_t gpaddr; 1986 1987 #ifdef CONFIG_KVM_E500V2 1988 if (!(vcpu->arch.shared->msr & MSR_PR) && 1989 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1990 pte->eaddr = eaddr; 1991 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) | 1992 (eaddr & ~PAGE_MASK); 1993 pte->vpage = eaddr >> PAGE_SHIFT; 1994 pte->may_read = true; 1995 pte->may_write = true; 1996 pte->may_execute = true; 1997 1998 return 0; 1999 } 2000 #endif 2001 2002 /* Check the guest TLB. */ 2003 switch (xlid) { 2004 case XLATE_INST: 2005 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 2006 break; 2007 case XLATE_DATA: 2008 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 2009 break; 2010 default: 2011 BUG(); 2012 } 2013 2014 /* Do we have a TLB entry at all? */ 2015 if (gtlb_index < 0) 2016 return -ENOENT; 2017 2018 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 2019 2020 pte->eaddr = eaddr; 2021 pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK); 2022 pte->vpage = eaddr >> PAGE_SHIFT; 2023 2024 /* XXX read permissions from the guest TLB */ 2025 pte->may_read = true; 2026 pte->may_write = true; 2027 pte->may_execute = true; 2028 2029 return 0; 2030 } 2031 2032 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 2033 struct kvm_guest_debug *dbg) 2034 { 2035 struct debug_reg *dbg_reg; 2036 int n, b = 0, w = 0; 2037 int ret = 0; 2038 2039 vcpu_load(vcpu); 2040 2041 if (!(dbg->control & KVM_GUESTDBG_ENABLE)) { 2042 vcpu->arch.dbg_reg.dbcr0 = 0; 2043 vcpu->guest_debug = 0; 2044 kvm_guest_protect_msr(vcpu, MSR_DE, false); 2045 goto out; 2046 } 2047 2048 kvm_guest_protect_msr(vcpu, MSR_DE, true); 2049 vcpu->guest_debug = dbg->control; 2050 vcpu->arch.dbg_reg.dbcr0 = 0; 2051 2052 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) 2053 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC; 2054 2055 /* Code below handles only HW breakpoints */ 2056 dbg_reg = &(vcpu->arch.dbg_reg); 2057 2058 #ifdef CONFIG_KVM_BOOKE_HV 2059 /* 2060 * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1 2061 * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0 2062 */ 2063 dbg_reg->dbcr1 = 0; 2064 dbg_reg->dbcr2 = 0; 2065 #else 2066 /* 2067 * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1 2068 * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR 2069 * is set. 2070 */ 2071 dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US | 2072 DBCR1_IAC4US; 2073 dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 2074 #endif 2075 2076 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) 2077 goto out; 2078 2079 ret = -EINVAL; 2080 for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) { 2081 uint64_t addr = dbg->arch.bp[n].addr; 2082 uint32_t type = dbg->arch.bp[n].type; 2083 2084 if (type == KVMPPC_DEBUG_NONE) 2085 continue; 2086 2087 if (type & ~(KVMPPC_DEBUG_WATCH_READ | 2088 KVMPPC_DEBUG_WATCH_WRITE | 2089 KVMPPC_DEBUG_BREAKPOINT)) 2090 goto out; 2091 2092 if (type & KVMPPC_DEBUG_BREAKPOINT) { 2093 /* Setting H/W breakpoint */ 2094 if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++)) 2095 goto out; 2096 } else { 2097 /* Setting H/W watchpoint */ 2098 if (kvmppc_booke_add_watchpoint(dbg_reg, addr, 2099 type, w++)) 2100 goto out; 2101 } 2102 } 2103 2104 ret = 0; 2105 out: 2106 vcpu_put(vcpu); 2107 return ret; 2108 } 2109 2110 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 2111 { 2112 vcpu->cpu = smp_processor_id(); 2113 current->thread.kvm_vcpu = vcpu; 2114 } 2115 2116 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu) 2117 { 2118 current->thread.kvm_vcpu = NULL; 2119 vcpu->cpu = -1; 2120 2121 /* Clear pending debug event in DBSR */ 2122 kvmppc_clear_dbsr(); 2123 } 2124 2125 int kvmppc_core_init_vm(struct kvm *kvm) 2126 { 2127 return kvm->arch.kvm_ops->init_vm(kvm); 2128 } 2129 2130 int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu) 2131 { 2132 int i; 2133 int r; 2134 2135 r = vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu); 2136 if (r) 2137 return r; 2138 2139 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 2140 vcpu->arch.regs.nip = 0; 2141 vcpu->arch.shared->pir = vcpu->vcpu_id; 2142 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 2143 kvmppc_set_msr(vcpu, 0); 2144 2145 #ifndef CONFIG_KVM_BOOKE_HV 2146 vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS; 2147 vcpu->arch.shadow_pid = 1; 2148 vcpu->arch.shared->msr = 0; 2149 #endif 2150 2151 /* Eye-catching numbers so we know if the guest takes an interrupt 2152 * before it's programmed its own IVPR/IVORs. */ 2153 vcpu->arch.ivpr = 0x55550000; 2154 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 2155 vcpu->arch.ivor[i] = 0x7700 | i * 4; 2156 2157 kvmppc_init_timing_stats(vcpu); 2158 2159 r = kvmppc_core_vcpu_setup(vcpu); 2160 if (r) 2161 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 2162 kvmppc_sanity_check(vcpu); 2163 return r; 2164 } 2165 2166 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 2167 { 2168 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 2169 } 2170 2171 void kvmppc_core_destroy_vm(struct kvm *kvm) 2172 { 2173 kvm->arch.kvm_ops->destroy_vm(kvm); 2174 } 2175 2176 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 2177 { 2178 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); 2179 } 2180 2181 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 2182 { 2183 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); 2184 } 2185 2186 int __init kvmppc_booke_init(void) 2187 { 2188 #ifndef CONFIG_KVM_BOOKE_HV 2189 unsigned long ivor[16]; 2190 unsigned long *handler = kvmppc_booke_handler_addr; 2191 unsigned long max_ivor = 0; 2192 unsigned long handler_len; 2193 int i; 2194 2195 /* We install our own exception handlers by hijacking IVPR. IVPR must 2196 * be 16-bit aligned, so we need a 64KB allocation. */ 2197 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 2198 VCPU_SIZE_ORDER); 2199 if (!kvmppc_booke_handlers) 2200 return -ENOMEM; 2201 2202 /* XXX make sure our handlers are smaller than Linux's */ 2203 2204 /* Copy our interrupt handlers to match host IVORs. That way we don't 2205 * have to swap the IVORs on every guest/host transition. */ 2206 ivor[0] = mfspr(SPRN_IVOR0); 2207 ivor[1] = mfspr(SPRN_IVOR1); 2208 ivor[2] = mfspr(SPRN_IVOR2); 2209 ivor[3] = mfspr(SPRN_IVOR3); 2210 ivor[4] = mfspr(SPRN_IVOR4); 2211 ivor[5] = mfspr(SPRN_IVOR5); 2212 ivor[6] = mfspr(SPRN_IVOR6); 2213 ivor[7] = mfspr(SPRN_IVOR7); 2214 ivor[8] = mfspr(SPRN_IVOR8); 2215 ivor[9] = mfspr(SPRN_IVOR9); 2216 ivor[10] = mfspr(SPRN_IVOR10); 2217 ivor[11] = mfspr(SPRN_IVOR11); 2218 ivor[12] = mfspr(SPRN_IVOR12); 2219 ivor[13] = mfspr(SPRN_IVOR13); 2220 ivor[14] = mfspr(SPRN_IVOR14); 2221 ivor[15] = mfspr(SPRN_IVOR15); 2222 2223 for (i = 0; i < 16; i++) { 2224 if (ivor[i] > max_ivor) 2225 max_ivor = i; 2226 2227 handler_len = handler[i + 1] - handler[i]; 2228 memcpy((void *)kvmppc_booke_handlers + ivor[i], 2229 (void *)handler[i], handler_len); 2230 } 2231 2232 handler_len = handler[max_ivor + 1] - handler[max_ivor]; 2233 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers + 2234 ivor[max_ivor] + handler_len); 2235 #endif /* !BOOKE_HV */ 2236 return 0; 2237 } 2238 2239 void __exit kvmppc_booke_exit(void) 2240 { 2241 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 2242 kvm_exit(); 2243 } 2244