xref: /linux/drivers/gpu/drm/imagination/pvr_rogue_mips_check.h (revision 3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d)
1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
2 /* Copyright (c) 2023 Imagination Technologies Ltd. */
3 
4 #ifndef PVR_ROGUE_MIPS_CHECK_H
5 #define PVR_ROGUE_MIPS_CHECK_H
6 
7 #include "pvr_check.h"
8 
9 OFFSET_CHECK(struct rogue_mips_tlb_entry, tlb_page_mask, 0);
10 OFFSET_CHECK(struct rogue_mips_tlb_entry, tlb_hi, 4);
11 OFFSET_CHECK(struct rogue_mips_tlb_entry, tlb_lo0, 8);
12 OFFSET_CHECK(struct rogue_mips_tlb_entry, tlb_lo1, 12);
13 SIZE_CHECK(struct rogue_mips_tlb_entry, 16);
14 
15 OFFSET_CHECK(struct rogue_mips_remap_entry, remap_addr_in, 0);
16 OFFSET_CHECK(struct rogue_mips_remap_entry, remap_addr_out, 4);
17 OFFSET_CHECK(struct rogue_mips_remap_entry, remap_region_size, 8);
18 SIZE_CHECK(struct rogue_mips_remap_entry, 12);
19 
20 OFFSET_CHECK(struct rogue_mips_state, error_state, 0);
21 OFFSET_CHECK(struct rogue_mips_state, error_epc, 4);
22 OFFSET_CHECK(struct rogue_mips_state, status_register, 8);
23 OFFSET_CHECK(struct rogue_mips_state, cause_register, 12);
24 OFFSET_CHECK(struct rogue_mips_state, bad_register, 16);
25 OFFSET_CHECK(struct rogue_mips_state, epc, 20);
26 OFFSET_CHECK(struct rogue_mips_state, sp, 24);
27 OFFSET_CHECK(struct rogue_mips_state, debug, 28);
28 OFFSET_CHECK(struct rogue_mips_state, depc, 32);
29 OFFSET_CHECK(struct rogue_mips_state, bad_instr, 36);
30 OFFSET_CHECK(struct rogue_mips_state, unmapped_address, 40);
31 OFFSET_CHECK(struct rogue_mips_state, tlb, 44);
32 OFFSET_CHECK(struct rogue_mips_state, remap, 300);
33 SIZE_CHECK(struct rogue_mips_state, 684);
34 
35 #endif /* PVR_ROGUE_MIPS_CHECK_H */
36