1 /* 2 * arch/xtensa/kernel/time.c 3 * 4 * Timer and clock support. 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 * 10 * Copyright (C) 2005 Tensilica Inc. 11 * 12 * Chris Zankel <chris@zankel.net> 13 */ 14 15 #include <linux/clk.h> 16 #include <linux/of_clk.h> 17 #include <linux/errno.h> 18 #include <linux/sched.h> 19 #include <linux/time.h> 20 #include <linux/clocksource.h> 21 #include <linux/clockchips.h> 22 #include <linux/interrupt.h> 23 #include <linux/module.h> 24 #include <linux/init.h> 25 #include <linux/irq.h> 26 #include <linux/delay.h> 27 #include <linux/irqdomain.h> 28 #include <linux/sched_clock.h> 29 30 #include <asm/timex.h> 31 #include <asm/platform.h> 32 33 unsigned long ccount_freq; /* ccount Hz */ 34 EXPORT_SYMBOL(ccount_freq); 35 36 static u64 ccount_read(struct clocksource *cs) 37 { 38 return (u64)get_ccount(); 39 } 40 41 static u64 notrace ccount_sched_clock_read(void) 42 { 43 return get_ccount(); 44 } 45 46 static struct clocksource ccount_clocksource = { 47 .name = "ccount", 48 .rating = 200, 49 .read = ccount_read, 50 .mask = CLOCKSOURCE_MASK(32), 51 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 52 }; 53 54 struct ccount_timer { 55 struct clock_event_device evt; 56 int irq_enabled; 57 char name[24]; 58 }; 59 60 static int ccount_timer_set_next_event(unsigned long delta, 61 struct clock_event_device *dev) 62 { 63 unsigned long flags, next; 64 int ret = 0; 65 66 local_irq_save(flags); 67 next = get_ccount() + delta; 68 set_linux_timer(next); 69 if (next - get_ccount() > delta) 70 ret = -ETIME; 71 local_irq_restore(flags); 72 73 return ret; 74 } 75 76 /* 77 * There is no way to disable the timer interrupt at the device level, 78 * only at the intenable register itself. Since enable_irq/disable_irq 79 * calls are nested, we need to make sure that these calls are 80 * balanced. 81 */ 82 static int ccount_timer_shutdown(struct clock_event_device *evt) 83 { 84 struct ccount_timer *timer = 85 container_of(evt, struct ccount_timer, evt); 86 87 if (timer->irq_enabled) { 88 disable_irq_nosync(evt->irq); 89 timer->irq_enabled = 0; 90 } 91 return 0; 92 } 93 94 static int ccount_timer_set_oneshot(struct clock_event_device *evt) 95 { 96 struct ccount_timer *timer = 97 container_of(evt, struct ccount_timer, evt); 98 99 if (!timer->irq_enabled) { 100 enable_irq(evt->irq); 101 timer->irq_enabled = 1; 102 } 103 return 0; 104 } 105 106 static DEFINE_PER_CPU(struct ccount_timer, ccount_timer) = { 107 .evt = { 108 .features = CLOCK_EVT_FEAT_ONESHOT, 109 .rating = 300, 110 .set_next_event = ccount_timer_set_next_event, 111 .set_state_shutdown = ccount_timer_shutdown, 112 .set_state_oneshot = ccount_timer_set_oneshot, 113 .tick_resume = ccount_timer_set_oneshot, 114 }, 115 }; 116 117 static irqreturn_t timer_interrupt(int irq, void *dev_id) 118 { 119 struct clock_event_device *evt = &this_cpu_ptr(&ccount_timer)->evt; 120 121 set_linux_timer(get_linux_timer()); 122 evt->event_handler(evt); 123 return IRQ_HANDLED; 124 } 125 126 void local_timer_setup(unsigned cpu) 127 { 128 struct ccount_timer *timer = &per_cpu(ccount_timer, cpu); 129 struct clock_event_device *clockevent = &timer->evt; 130 131 timer->irq_enabled = 1; 132 snprintf(timer->name, sizeof(timer->name), "ccount_clockevent_%u", cpu); 133 clockevent->name = timer->name; 134 clockevent->cpumask = cpumask_of(cpu); 135 clockevent->irq = irq_create_mapping(NULL, LINUX_TIMER_INT); 136 if (WARN(!clockevent->irq, "error: can't map timer irq")) 137 return; 138 clockevents_config_and_register(clockevent, ccount_freq, 139 0xf, 0xffffffff); 140 } 141 142 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT 143 #ifdef CONFIG_OF 144 static void __init calibrate_ccount(void) 145 { 146 struct device_node *cpu; 147 struct clk *clk; 148 149 cpu = of_find_compatible_node(NULL, NULL, "cdns,xtensa-cpu"); 150 if (cpu) { 151 clk = of_clk_get(cpu, 0); 152 of_node_put(cpu); 153 if (!IS_ERR(clk)) { 154 ccount_freq = clk_get_rate(clk); 155 return; 156 } else { 157 pr_warn("%s: CPU input clock not found\n", 158 __func__); 159 } 160 } else { 161 pr_warn("%s: CPU node not found in the device tree\n", 162 __func__); 163 } 164 165 platform_calibrate_ccount(); 166 } 167 #else 168 static inline void calibrate_ccount(void) 169 { 170 platform_calibrate_ccount(); 171 } 172 #endif 173 #endif 174 175 void __init time_init(void) 176 { 177 int irq; 178 179 of_clk_init(NULL); 180 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT 181 pr_info("Calibrating CPU frequency "); 182 calibrate_ccount(); 183 pr_cont("%d.%02d MHz\n", 184 (int)ccount_freq / 1000000, 185 (int)(ccount_freq / 10000) % 100); 186 #else 187 ccount_freq = CONFIG_XTENSA_CPU_CLOCK*1000000UL; 188 #endif 189 WARN(!ccount_freq, 190 "%s: CPU clock frequency is not set up correctly\n", 191 __func__); 192 clocksource_register_hz(&ccount_clocksource, ccount_freq); 193 local_timer_setup(0); 194 irq = this_cpu_ptr(&ccount_timer)->evt.irq; 195 if (request_irq(irq, timer_interrupt, IRQF_TIMER, "timer", NULL)) 196 pr_err("Failed to request irq %d (timer)\n", irq); 197 sched_clock_register(ccount_sched_clock_read, 32, ccount_freq); 198 timer_probe(); 199 } 200 201 #ifndef CONFIG_GENERIC_CALIBRATE_DELAY 202 void calibrate_delay(void) 203 { 204 loops_per_jiffy = ccount_freq / HZ; 205 pr_info("Calibrating delay loop (skipped)... %lu.%02lu BogoMIPS preset\n", 206 loops_per_jiffy / (1000000 / HZ), 207 (loops_per_jiffy / (10000 / HZ)) % 100); 208 } 209 #endif 210