1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Mediatek 8250 driver. 4 * 5 * Copyright (c) 2014 MundoReader S.L. 6 * Author: Matthias Brugger <matthias.bgg@gmail.com> 7 */ 8 #include <linux/clk.h> 9 #include <linux/io.h> 10 #include <linux/module.h> 11 #include <linux/of.h> 12 #include <linux/of_irq.h> 13 #include <linux/of_platform.h> 14 #include <linux/pinctrl/consumer.h> 15 #include <linux/platform_device.h> 16 #include <linux/pm_runtime.h> 17 #include <linux/serial_8250.h> 18 #include <linux/serial_reg.h> 19 #include <linux/console.h> 20 #include <linux/dma-mapping.h> 21 #include <linux/tty.h> 22 #include <linux/tty_flip.h> 23 #include <linux/units.h> 24 25 #include "8250.h" 26 27 #define MTK_UART_HIGHS 0x09 /* Highspeed register */ 28 #define MTK_UART_SAMPLE_COUNT 0x0a /* Sample count register */ 29 #define MTK_UART_SAMPLE_POINT 0x0b /* Sample point register */ 30 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */ 31 #define MTK_UART_ESCAPE_DAT 0x10 /* Escape Character register */ 32 #define MTK_UART_ESCAPE_EN 0x11 /* Escape Enable register */ 33 #define MTK_UART_DMA_EN 0x13 /* DMA Enable register */ 34 #define MTK_UART_RXTRI_AD 0x14 /* RX Trigger address */ 35 #define MTK_UART_FRACDIV_L 0x15 /* Fractional divider LSB address */ 36 #define MTK_UART_FRACDIV_M 0x16 /* Fractional divider MSB address */ 37 #define MTK_UART_DEBUG0 0x18 38 #define MTK_UART_IER_XOFFI 0x20 /* Enable XOFF character interrupt */ 39 #define MTK_UART_IER_RTSI 0x40 /* Enable RTS Modem status interrupt */ 40 #define MTK_UART_IER_CTSI 0x80 /* Enable CTS Modem status interrupt */ 41 42 #define MTK_UART_EFR 38 /* I/O: Extended Features Register */ 43 #define MTK_UART_EFR_EN 0x10 /* Enable enhancement feature */ 44 #define MTK_UART_EFR_RTS 0x40 /* Enable hardware rx flow control */ 45 #define MTK_UART_EFR_CTS 0x80 /* Enable hardware tx flow control */ 46 #define MTK_UART_EFR_NO_SW_FC 0x0 /* no sw flow control */ 47 #define MTK_UART_EFR_XON1_XOFF1 0xa /* XON1/XOFF1 as sw flow control */ 48 #define MTK_UART_EFR_XON2_XOFF2 0x5 /* XON2/XOFF2 as sw flow control */ 49 #define MTK_UART_EFR_SW_FC_MASK 0xf /* Enable CTS Modem status interrupt */ 50 #define MTK_UART_EFR_HW_FC (MTK_UART_EFR_RTS | MTK_UART_EFR_CTS) 51 #define MTK_UART_DMA_EN_TX 0x2 52 #define MTK_UART_DMA_EN_RX 0x5 53 54 #define MTK_UART_ESCAPE_CHAR 0x77 /* Escape char added under sw fc */ 55 #define MTK_UART_RX_SIZE 0x8000 56 #define MTK_UART_TX_TRIGGER 1 57 #define MTK_UART_RX_TRIGGER MTK_UART_RX_SIZE 58 59 #define MTK_UART_XON1 40 /* I/O: Xon character 1 */ 60 #define MTK_UART_XOFF1 42 /* I/O: Xoff character 1 */ 61 62 #ifdef CONFIG_SERIAL_8250_DMA 63 enum dma_rx_status { 64 DMA_RX_START = 0, 65 DMA_RX_RUNNING = 1, 66 DMA_RX_SHUTDOWN = 2, 67 }; 68 #endif 69 70 struct mtk8250_data { 71 int line; 72 unsigned int rx_pos; 73 unsigned int clk_count; 74 struct clk *uart_clk; 75 struct clk *bus_clk; 76 struct uart_8250_dma *dma; 77 #ifdef CONFIG_SERIAL_8250_DMA 78 enum dma_rx_status rx_status; 79 #endif 80 int rx_wakeup_irq; 81 }; 82 83 /* flow control mode */ 84 enum { 85 MTK_UART_FC_NONE, 86 MTK_UART_FC_SW, 87 MTK_UART_FC_HW, 88 }; 89 90 #ifdef CONFIG_SERIAL_8250_DMA 91 static void mtk8250_rx_dma(struct uart_8250_port *up); 92 93 static void mtk8250_dma_rx_complete(void *param) 94 { 95 struct uart_8250_port *up = param; 96 struct uart_8250_dma *dma = up->dma; 97 struct mtk8250_data *data = up->port.private_data; 98 struct tty_port *tty_port = &up->port.state->port; 99 struct dma_tx_state state; 100 int copied, total, cnt; 101 unsigned char *ptr; 102 unsigned long flags; 103 104 if (data->rx_status == DMA_RX_SHUTDOWN) 105 return; 106 107 uart_port_lock_irqsave(&up->port, &flags); 108 109 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); 110 total = dma->rx_size - state.residue; 111 cnt = total; 112 113 if ((data->rx_pos + cnt) > dma->rx_size) 114 cnt = dma->rx_size - data->rx_pos; 115 116 ptr = (unsigned char *)(data->rx_pos + dma->rx_buf); 117 copied = tty_insert_flip_string(tty_port, ptr, cnt); 118 data->rx_pos += cnt; 119 120 if (total > cnt) { 121 ptr = (unsigned char *)(dma->rx_buf); 122 cnt = total - cnt; 123 copied += tty_insert_flip_string(tty_port, ptr, cnt); 124 data->rx_pos = cnt; 125 } 126 127 up->port.icount.rx += copied; 128 129 tty_flip_buffer_push(tty_port); 130 131 mtk8250_rx_dma(up); 132 133 uart_port_unlock_irqrestore(&up->port, flags); 134 } 135 136 static void mtk8250_rx_dma(struct uart_8250_port *up) 137 { 138 struct uart_8250_dma *dma = up->dma; 139 struct dma_async_tx_descriptor *desc; 140 141 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, 142 dma->rx_size, DMA_DEV_TO_MEM, 143 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 144 if (!desc) { 145 pr_err("failed to prepare rx slave single\n"); 146 return; 147 } 148 149 desc->callback = mtk8250_dma_rx_complete; 150 desc->callback_param = up; 151 152 dma->rx_cookie = dmaengine_submit(desc); 153 154 dma_async_issue_pending(dma->rxchan); 155 } 156 157 static void mtk8250_dma_enable(struct uart_8250_port *up) 158 { 159 struct uart_8250_dma *dma = up->dma; 160 struct mtk8250_data *data = up->port.private_data; 161 int lcr = serial_in(up, UART_LCR); 162 163 if (data->rx_status != DMA_RX_START) 164 return; 165 166 dma->rxconf.src_port_window_size = dma->rx_size; 167 dma->rxconf.src_addr = dma->rx_addr; 168 169 dma->txconf.dst_port_window_size = UART_XMIT_SIZE; 170 dma->txconf.dst_addr = dma->tx_addr; 171 172 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | 173 UART_FCR_CLEAR_XMIT); 174 serial_out(up, MTK_UART_DMA_EN, 175 MTK_UART_DMA_EN_RX | MTK_UART_DMA_EN_TX); 176 177 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 178 serial_out(up, MTK_UART_EFR, UART_EFR_ECB); 179 serial_out(up, UART_LCR, lcr); 180 181 if (dmaengine_slave_config(dma->rxchan, &dma->rxconf) != 0) 182 pr_err("failed to configure rx dma channel\n"); 183 if (dmaengine_slave_config(dma->txchan, &dma->txconf) != 0) 184 pr_err("failed to configure tx dma channel\n"); 185 186 data->rx_status = DMA_RX_RUNNING; 187 data->rx_pos = 0; 188 mtk8250_rx_dma(up); 189 } 190 #endif 191 192 static int mtk8250_startup(struct uart_port *port) 193 { 194 #ifdef CONFIG_SERIAL_8250_DMA 195 struct uart_8250_port *up = up_to_u8250p(port); 196 struct mtk8250_data *data = port->private_data; 197 198 /* disable DMA for console */ 199 if (uart_console(port)) 200 up->dma = NULL; 201 202 if (up->dma) { 203 data->rx_status = DMA_RX_START; 204 kfifo_reset(&port->state->port.xmit_fifo); 205 } 206 #endif 207 memset(&port->icount, 0, sizeof(port->icount)); 208 209 return serial8250_do_startup(port); 210 } 211 212 static void mtk8250_shutdown(struct uart_port *port) 213 { 214 struct uart_8250_port *up = up_to_u8250p(port); 215 struct mtk8250_data *data = port->private_data; 216 int irq = data->rx_wakeup_irq; 217 218 #ifdef CONFIG_SERIAL_8250_DMA 219 if (up->dma) 220 data->rx_status = DMA_RX_SHUTDOWN; 221 #endif 222 223 serial8250_do_shutdown(port); 224 225 if (irq >= 0) 226 serial8250_do_set_mctrl(&up->port, TIOCM_RTS); 227 } 228 229 static void mtk8250_disable_intrs(struct uart_8250_port *up, int mask) 230 { 231 /* Port locked to synchronize UART_IER access against the console. */ 232 lockdep_assert_held_once(&up->port.lock); 233 234 serial_out(up, UART_IER, serial_in(up, UART_IER) & (~mask)); 235 } 236 237 static void mtk8250_enable_intrs(struct uart_8250_port *up, int mask) 238 { 239 /* Port locked to synchronize UART_IER access against the console. */ 240 lockdep_assert_held_once(&up->port.lock); 241 242 serial_out(up, UART_IER, serial_in(up, UART_IER) | mask); 243 } 244 245 static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode) 246 { 247 struct uart_port *port = &up->port; 248 int lcr = serial_in(up, UART_LCR); 249 250 /* Port locked to synchronize UART_IER access against the console. */ 251 lockdep_assert_held_once(&port->lock); 252 253 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 254 serial_out(up, MTK_UART_EFR, UART_EFR_ECB); 255 serial_out(up, UART_LCR, lcr); 256 lcr = serial_in(up, UART_LCR); 257 258 switch (mode) { 259 case MTK_UART_FC_NONE: 260 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR); 261 serial_out(up, MTK_UART_ESCAPE_EN, 0x00); 262 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 263 serial_out(up, MTK_UART_EFR, serial_in(up, MTK_UART_EFR) & 264 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))); 265 serial_out(up, UART_LCR, lcr); 266 mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI | 267 MTK_UART_IER_RTSI | MTK_UART_IER_CTSI); 268 break; 269 270 case MTK_UART_FC_HW: 271 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR); 272 serial_out(up, MTK_UART_ESCAPE_EN, 0x00); 273 serial_out(up, UART_MCR, UART_MCR_RTS); 274 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 275 276 /*enable hw flow control*/ 277 serial_out(up, MTK_UART_EFR, MTK_UART_EFR_HW_FC | 278 (serial_in(up, MTK_UART_EFR) & 279 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)))); 280 281 serial_out(up, UART_LCR, lcr); 282 mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI); 283 mtk8250_enable_intrs(up, MTK_UART_IER_CTSI | MTK_UART_IER_RTSI); 284 break; 285 286 case MTK_UART_FC_SW: /*MTK software flow control */ 287 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR); 288 serial_out(up, MTK_UART_ESCAPE_EN, 0x01); 289 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 290 291 /*enable sw flow control */ 292 serial_out(up, MTK_UART_EFR, MTK_UART_EFR_XON1_XOFF1 | 293 (serial_in(up, MTK_UART_EFR) & 294 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)))); 295 296 serial_out(up, MTK_UART_XON1, START_CHAR(port->state->port.tty)); 297 serial_out(up, MTK_UART_XOFF1, STOP_CHAR(port->state->port.tty)); 298 serial_out(up, UART_LCR, lcr); 299 mtk8250_disable_intrs(up, MTK_UART_IER_CTSI|MTK_UART_IER_RTSI); 300 mtk8250_enable_intrs(up, MTK_UART_IER_XOFFI); 301 break; 302 default: 303 break; 304 } 305 } 306 307 static void 308 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, 309 const struct ktermios *old) 310 { 311 static const unsigned short fraction_L_mapping[] = { 312 0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF 313 }; 314 static const unsigned short fraction_M_mapping[] = { 315 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3 316 }; 317 struct uart_8250_port *up = up_to_u8250p(port); 318 unsigned int baud, quot, fraction; 319 unsigned long flags; 320 int mode; 321 322 #ifdef CONFIG_SERIAL_8250_DMA 323 if (up->dma) { 324 if (uart_console(port)) { 325 devm_kfree(up->port.dev, up->dma); 326 up->dma = NULL; 327 } else { 328 mtk8250_dma_enable(up); 329 } 330 } 331 #endif 332 333 /* 334 * Store the requested baud rate before calling the generic 8250 335 * set_termios method. Standard 8250 port expects bauds to be 336 * no higher than (uartclk / 16) so the baud will be clamped if it 337 * gets out of that bound. Mediatek 8250 port supports speed 338 * higher than that, therefore we'll get original baud rate back 339 * after calling the generic set_termios method and recalculate 340 * the speed later in this method. 341 */ 342 baud = tty_termios_baud_rate(termios); 343 344 serial8250_do_set_termios(port, termios, NULL); 345 346 tty_termios_encode_baud_rate(termios, baud, baud); 347 348 /* 349 * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS) 350 * 351 * We need to recalculate the quot register, as the calculation depends 352 * on the value in the highspeed register. 353 * 354 * Some baudrates are not supported by the chip, so we use the next 355 * lower rate supported and update termios c_flag. 356 * 357 * If highspeed register is set to 3, we need to specify sample count 358 * and sample point to increase accuracy. If not, we reset the 359 * registers to their default values. 360 */ 361 baud = uart_get_baud_rate(port, termios, old, 362 port->uartclk / 16 / UART_DIV_MAX, 363 port->uartclk); 364 365 if (baud < 115200) { 366 serial_port_out(port, MTK_UART_HIGHS, 0x0); 367 quot = uart_get_divisor(port, baud); 368 } else { 369 serial_port_out(port, MTK_UART_HIGHS, 0x3); 370 quot = DIV_ROUND_UP(port->uartclk, 256 * baud); 371 } 372 373 /* 374 * Ok, we're now changing the port state. Do it with 375 * interrupts disabled. 376 */ 377 uart_port_lock_irqsave(port, &flags); 378 379 /* 380 * Update the per-port timeout. 381 */ 382 uart_update_timeout(port, termios->c_cflag, baud); 383 384 /* set DLAB we have cval saved in up->lcr from the call to the core */ 385 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB); 386 serial_dl_write(up, quot); 387 388 /* reset DLAB */ 389 serial_port_out(port, UART_LCR, up->lcr); 390 391 if (baud >= 115200) { 392 unsigned int tmp; 393 394 tmp = (port->uartclk / (baud * quot)) - 1; 395 serial_port_out(port, MTK_UART_SAMPLE_COUNT, tmp); 396 serial_port_out(port, MTK_UART_SAMPLE_POINT, 397 (tmp >> 1) - 1); 398 399 /*count fraction to set fractoin register */ 400 fraction = ((port->uartclk * 100) / baud / quot) % 100; 401 fraction = DIV_ROUND_CLOSEST(fraction, 10); 402 serial_port_out(port, MTK_UART_FRACDIV_L, 403 fraction_L_mapping[fraction]); 404 serial_port_out(port, MTK_UART_FRACDIV_M, 405 fraction_M_mapping[fraction]); 406 } else { 407 serial_port_out(port, MTK_UART_SAMPLE_COUNT, 0x00); 408 serial_port_out(port, MTK_UART_SAMPLE_POINT, 0xff); 409 serial_port_out(port, MTK_UART_FRACDIV_L, 0x00); 410 serial_port_out(port, MTK_UART_FRACDIV_M, 0x00); 411 } 412 413 if ((termios->c_cflag & CRTSCTS) && (!(termios->c_iflag & CRTSCTS))) 414 mode = MTK_UART_FC_HW; 415 else if (termios->c_iflag & CRTSCTS) 416 mode = MTK_UART_FC_SW; 417 else 418 mode = MTK_UART_FC_NONE; 419 420 mtk8250_set_flow_ctrl(up, mode); 421 422 if (uart_console(port)) 423 up->port.cons->cflag = termios->c_cflag; 424 425 uart_port_unlock_irqrestore(port, flags); 426 /* Don't rewrite B0 */ 427 if (tty_termios_baud_rate(termios)) 428 tty_termios_encode_baud_rate(termios, baud, baud); 429 } 430 431 static int __maybe_unused mtk8250_runtime_suspend(struct device *dev) 432 { 433 struct mtk8250_data *data = dev_get_drvdata(dev); 434 struct uart_8250_port *up = serial8250_get_port(data->line); 435 436 /* wait until UART in idle status */ 437 while 438 (serial_in(up, MTK_UART_DEBUG0)); 439 440 clk_disable_unprepare(data->uart_clk); 441 clk_disable_unprepare(data->bus_clk); 442 443 return 0; 444 } 445 446 static int __maybe_unused mtk8250_runtime_resume(struct device *dev) 447 { 448 struct mtk8250_data *data = dev_get_drvdata(dev); 449 450 clk_prepare_enable(data->bus_clk); 451 clk_prepare_enable(data->uart_clk); 452 453 return 0; 454 } 455 456 static void 457 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old) 458 { 459 if (!state) 460 pm_runtime_get_sync(port->dev); 461 462 serial8250_do_pm(port, state, old); 463 464 if (state) 465 pm_runtime_put_sync_suspend(port->dev); 466 } 467 468 #ifdef CONFIG_SERIAL_8250_DMA 469 static bool mtk8250_dma_filter(struct dma_chan *chan, void *param) 470 { 471 return false; 472 } 473 #endif 474 475 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p, 476 struct mtk8250_data *data) 477 { 478 #ifdef CONFIG_SERIAL_8250_DMA 479 int dmacnt; 480 #endif 481 482 data->uart_clk = devm_clk_get_enabled(&pdev->dev, "baud"); 483 if (IS_ERR(data->uart_clk)) { 484 /* 485 * For compatibility with older device trees try unnamed 486 * clk when no baud clk can be found. 487 */ 488 data->uart_clk = devm_clk_get_enabled(&pdev->dev, NULL); 489 if (IS_ERR(data->uart_clk)) { 490 dev_warn(&pdev->dev, "Can't get uart clock\n"); 491 return PTR_ERR(data->uart_clk); 492 } 493 494 return 0; 495 } 496 497 data->bus_clk = devm_clk_get_enabled(&pdev->dev, "bus"); 498 if (IS_ERR(data->bus_clk)) 499 return PTR_ERR(data->bus_clk); 500 501 data->dma = NULL; 502 #ifdef CONFIG_SERIAL_8250_DMA 503 dmacnt = of_property_count_strings(pdev->dev.of_node, "dma-names"); 504 if (dmacnt == 2) { 505 data->dma = devm_kzalloc(&pdev->dev, sizeof(*data->dma), 506 GFP_KERNEL); 507 if (!data->dma) 508 return -ENOMEM; 509 510 data->dma->fn = mtk8250_dma_filter; 511 data->dma->rx_size = MTK_UART_RX_SIZE; 512 data->dma->rxconf.src_maxburst = MTK_UART_RX_TRIGGER; 513 data->dma->txconf.dst_maxburst = MTK_UART_TX_TRIGGER; 514 } 515 #endif 516 517 return 0; 518 } 519 520 static int mtk8250_probe(struct platform_device *pdev) 521 { 522 struct uart_8250_port uart = {}; 523 struct mtk8250_data *data; 524 struct resource *regs; 525 int irq, err, line; 526 struct fwnode_handle *fwnode = dev_fwnode(&pdev->dev); 527 528 irq = platform_get_irq(pdev, 0); 529 if (irq < 0) 530 return irq; 531 532 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 533 if (!regs) { 534 dev_err(&pdev->dev, "no registers defined\n"); 535 return -EINVAL; 536 } 537 538 uart.port.membase = devm_ioremap(&pdev->dev, regs->start, 539 resource_size(regs)); 540 if (!uart.port.membase) 541 return -ENOMEM; 542 543 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 544 if (!data) 545 return -ENOMEM; 546 547 data->clk_count = 0; 548 549 if (is_of_node(fwnode)) { 550 err = mtk8250_probe_of(pdev, &uart.port, data); 551 if (err) 552 return err; 553 } else if (!fwnode) { 554 return -ENODEV; 555 } 556 557 spin_lock_init(&uart.port.lock); 558 uart.port.mapbase = regs->start; 559 uart.port.irq = irq; 560 uart.port.pm = mtk8250_do_pm; 561 uart.port.type = PORT_16550; 562 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; 563 uart.port.dev = &pdev->dev; 564 uart.port.iotype = UPIO_MEM32; 565 uart.port.regshift = 2; 566 uart.port.private_data = data; 567 uart.port.shutdown = mtk8250_shutdown; 568 uart.port.startup = mtk8250_startup; 569 uart.port.set_termios = mtk8250_set_termios; 570 uart.port.uartclk = clk_get_rate(data->uart_clk); 571 if (!uart.port.uartclk) 572 uart.port.uartclk = 26 * HZ_PER_MHZ; 573 #ifdef CONFIG_SERIAL_8250_DMA 574 if (data->dma) 575 uart.dma = data->dma; 576 #endif 577 578 if (is_of_node(fwnode)) { 579 line = of_alias_get_id(pdev->dev.of_node, "serial"); 580 if (line >= 0) 581 uart.port.line = line; 582 583 /* Disable Rate Fix function */ 584 writel(0x0, uart.port.membase + 585 (MTK_UART_RATE_FIX << uart.port.regshift)); 586 } 587 588 platform_set_drvdata(pdev, data); 589 590 data->line = serial8250_register_8250_port(&uart); 591 if (data->line < 0) 592 return data->line; 593 594 data->rx_wakeup_irq = platform_get_irq_optional(pdev, 1); 595 596 pm_runtime_set_active(&pdev->dev); 597 pm_runtime_enable(&pdev->dev); 598 599 return 0; 600 } 601 602 static void mtk8250_remove(struct platform_device *pdev) 603 { 604 struct mtk8250_data *data = platform_get_drvdata(pdev); 605 606 pm_runtime_get_sync(&pdev->dev); 607 608 serial8250_unregister_port(data->line); 609 610 pm_runtime_disable(&pdev->dev); 611 pm_runtime_put_noidle(&pdev->dev); 612 } 613 614 static int __maybe_unused mtk8250_suspend(struct device *dev) 615 { 616 struct mtk8250_data *data = dev_get_drvdata(dev); 617 int irq = data->rx_wakeup_irq; 618 int err; 619 620 serial8250_suspend_port(data->line); 621 622 pinctrl_pm_select_sleep_state(dev); 623 if (irq >= 0) { 624 err = enable_irq_wake(irq); 625 if (err) { 626 dev_err(dev, 627 "failed to enable irq wake on IRQ %d: %d\n", 628 irq, err); 629 pinctrl_pm_select_default_state(dev); 630 serial8250_resume_port(data->line); 631 return err; 632 } 633 } 634 635 return 0; 636 } 637 638 static int __maybe_unused mtk8250_resume(struct device *dev) 639 { 640 struct mtk8250_data *data = dev_get_drvdata(dev); 641 int irq = data->rx_wakeup_irq; 642 643 if (irq >= 0) 644 disable_irq_wake(irq); 645 pinctrl_pm_select_default_state(dev); 646 647 serial8250_resume_port(data->line); 648 649 return 0; 650 } 651 652 static const struct dev_pm_ops mtk8250_pm_ops = { 653 SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume) 654 SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume, 655 NULL) 656 }; 657 658 static const struct of_device_id mtk8250_of_match[] = { 659 { .compatible = "mediatek,mt6577-uart" }, 660 { /* Sentinel */ } 661 }; 662 MODULE_DEVICE_TABLE(of, mtk8250_of_match); 663 664 static const struct acpi_device_id mtk8250_acpi_match[] = { 665 { "MTKI0511" }, 666 { "NVDA0240" }, 667 {} 668 }; 669 MODULE_DEVICE_TABLE(acpi, mtk8250_acpi_match); 670 671 static struct platform_driver mtk8250_platform_driver = { 672 .driver = { 673 .name = "mt6577-uart", 674 .pm = &mtk8250_pm_ops, 675 .of_match_table = mtk8250_of_match, 676 .acpi_match_table = mtk8250_acpi_match, 677 }, 678 .probe = mtk8250_probe, 679 .remove = mtk8250_remove, 680 }; 681 module_platform_driver(mtk8250_platform_driver); 682 683 #ifdef CONFIG_SERIAL_8250_CONSOLE 684 static int __init early_mtk8250_setup(struct earlycon_device *device, 685 const char *options) 686 { 687 if (!device->port.membase) 688 return -ENODEV; 689 690 device->port.iotype = UPIO_MEM32; 691 device->port.regshift = 2; 692 693 return early_serial8250_setup(device, NULL); 694 } 695 696 OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup); 697 #endif 698 699 MODULE_AUTHOR("Matthias Brugger"); 700 MODULE_LICENSE("GPL"); 701 MODULE_DESCRIPTION("Mediatek 8250 serial port driver"); 702