1# SPDX-License-Identifier: GPL-2.0 2 3menu "Cadence-based PCIe controllers" 4 depends on PCI 5 6config PCIE_CADENCE 7 tristate 8 9config PCIE_CADENCE_DEBUGFS 10 bool "Cadence PCIe debugfs entries" 11 depends on DEBUG_FS 12 depends on PCIE_CADENCE_HOST || PCIE_CADENCE_EP 13 help 14 Say Y here to enable debugfs entries for the PCIe controller. These 15 entries provide various debug features related to the controller and 16 the LTSSM status of link can be displayed. 17 18config PCIE_CADENCE_HOST 19 tristate 20 depends on OF 21 select IRQ_DOMAIN 22 select PCIE_CADENCE 23 24config PCIE_CADENCE_EP 25 tristate 26 depends on OF 27 depends on PCI_ENDPOINT 28 select PCIE_CADENCE 29 30config PCIE_CADENCE_PLAT 31 tristate 32 select PCIE_CADENCE_HOST if PCIE_CADENCE_PLAT_HOST != n 33 select PCIE_CADENCE_EP if PCIE_CADENCE_PLAT_EP != n 34 35config PCIE_CADENCE_PLAT_HOST 36 tristate "Cadence platform PCIe controller (host mode)" 37 depends on OF 38 select PCIE_CADENCE_PLAT 39 help 40 Say Y here if you want to support the Cadence PCIe platform controller in 41 host mode. This PCIe controller may be embedded into many different 42 vendors SoCs. 43 44config PCIE_CADENCE_PLAT_EP 45 tristate "Cadence platform PCIe controller (endpoint mode)" 46 depends on OF 47 depends on PCI_ENDPOINT 48 select PCIE_CADENCE_PLAT 49 help 50 Say Y here if you want to support the Cadence PCIe platform controller in 51 endpoint mode. This PCIe controller may be embedded into many 52 different vendors SoCs. 53 54config PCI_SKY1_HOST 55 tristate "CIX SKY1 PCIe controller (host mode)" 56 depends on OF && (ARCH_CIX || COMPILE_TEST) 57 select PCIE_CADENCE_HOST 58 select PCI_ECAM 59 help 60 Say Y here if you want to support the CIX SKY1 PCIe platform 61 controller in host mode. CIX SKY1 PCIe controller uses Cadence 62 HPA (High Performance Architecture IP [Second generation of 63 Cadence PCIe IP]) 64 65 This driver requires Cadence PCIe core infrastructure 66 (PCIE_CADENCE_HOST) and hardware platform adaptation layer 67 to function. 68 69config PCIE_SG2042_HOST 70 tristate "Sophgo SG2042 PCIe controller (host mode)" 71 depends on OF && (ARCH_SOPHGO || COMPILE_TEST) 72 select PCIE_CADENCE_HOST 73 help 74 Say Y here if you want to support the Sophgo SG2042 PCIe platform 75 controller in host mode. Sophgo SG2042 PCIe controller uses Cadence 76 PCIe core. 77 78config PCI_J721E 79 tristate 80 select PCIE_CADENCE_HOST if PCI_J721E_HOST != n 81 select PCIE_CADENCE_EP if PCI_J721E_EP != n 82 83config PCI_J721E_HOST 84 tristate "TI J721E PCIe controller (host mode)" 85 depends on ARCH_K3 || COMPILE_TEST 86 depends on OF 87 select PCI_J721E 88 help 89 Say Y here if you want to support the TI J721E PCIe platform 90 controller in host mode. TI J721E PCIe controller uses Cadence PCIe 91 core. 92 93config PCI_J721E_EP 94 tristate "TI J721E PCIe controller (endpoint mode)" 95 depends on ARCH_K3 || COMPILE_TEST 96 depends on OF 97 depends on PCI_ENDPOINT 98 select PCI_J721E 99 help 100 Say Y here if you want to support the TI J721E PCIe platform 101 controller in endpoint mode. TI J721E PCIe controller uses Cadence PCIe 102 core. 103 104endmenu 105