xref: /linux/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml (revision 3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/rockchip,dwc3.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip SuperSpeed DWC3 USB SoC controller
8
9maintainers:
10  - Heiko Stuebner <heiko@sntech.de>
11
12description:
13  The common content of the node is defined in snps,dwc3.yaml.
14
15  Phy documentation is provided in the following places.
16
17  USB2.0 PHY
18  Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
19
20  Type-C PHY
21  Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml
22
23select:
24  properties:
25    compatible:
26      contains:
27        enum:
28          - rockchip,rk3328-dwc3
29          - rockchip,rk3528-dwc3
30          - rockchip,rk3562-dwc3
31          - rockchip,rk3568-dwc3
32          - rockchip,rk3576-dwc3
33          - rockchip,rk3588-dwc3
34  required:
35    - compatible
36
37properties:
38  compatible:
39    items:
40      - enum:
41          - rockchip,rk3328-dwc3
42          - rockchip,rk3528-dwc3
43          - rockchip,rk3562-dwc3
44          - rockchip,rk3568-dwc3
45          - rockchip,rk3576-dwc3
46          - rockchip,rk3588-dwc3
47      - const: snps,dwc3
48
49  reg:
50    maxItems: 1
51
52  interrupts:
53    maxItems: 1
54
55  clocks:
56    minItems: 3
57    items:
58      - description:
59          Controller reference clock, must to be 24 MHz
60      - description:
61          Controller suspend clock, must to be 24 MHz or 32 KHz
62      - description:
63          Master/Core clock, must to be >= 62.5 MHz for SS
64          operation and >= 30MHz for HS operation
65      - description:
66          Controller grf clock OR UTMI clock
67      - description:
68          PIPE clock
69
70  clock-names:
71    minItems: 3
72    items:
73      - const: ref_clk
74      - const: suspend_clk
75      - const: bus_clk
76      - enum:
77          - grf_clk
78          - utmi
79          - pipe
80      - const: pipe
81
82  power-domains:
83    maxItems: 1
84
85  resets:
86    maxItems: 1
87
88  reset-names:
89    const: usb3-otg
90
91unevaluatedProperties: false
92
93required:
94  - compatible
95  - reg
96  - interrupts
97  - clocks
98  - clock-names
99
100allOf:
101  - $ref: snps,dwc3.yaml#
102  - if:
103      properties:
104        compatible:
105          contains:
106            const: rockchip,rk3328-dwc3
107    then:
108      properties:
109        clocks:
110          minItems: 3
111          maxItems: 4
112        clock-names:
113          minItems: 3
114          items:
115            - const: ref_clk
116            - const: suspend_clk
117            - const: bus_clk
118            - const: grf_clk
119  - if:
120      properties:
121        compatible:
122          contains:
123            const: rockchip,rk3562-dwc3
124    then:
125      properties:
126        clocks:
127          minItems: 4
128          maxItems: 4
129        clock-names:
130          items:
131            - const: ref_clk
132            - const: suspend_clk
133            - const: bus_clk
134            - const: pipe
135  - if:
136      properties:
137        compatible:
138          contains:
139            enum:
140              - rockchip,rk3528-dwc3
141              - rockchip,rk3568-dwc3
142              - rockchip,rk3576-dwc3
143    then:
144      properties:
145        clocks:
146          maxItems: 3
147        clock-names:
148          maxItems: 3
149  - if:
150      properties:
151        compatible:
152          contains:
153            const: rockchip,rk3588-dwc3
154    then:
155      properties:
156        clock-names:
157          minItems: 3
158          items:
159            - const: ref_clk
160            - const: suspend_clk
161            - const: bus_clk
162            - const: utmi
163            - const: pipe
164
165examples:
166  - |
167    #include <dt-bindings/clock/rk3328-cru.h>
168    #include <dt-bindings/interrupt-controller/arm-gic.h>
169
170    bus {
171      #address-cells = <2>;
172      #size-cells = <2>;
173
174      usbdrd3_0: usb@fe800000 {
175        compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
176        reg = <0x0 0xfe800000 0x0 0x100000>;
177        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
178        clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
179                 <&cru ACLK_USB3OTG>;
180        clock-names = "ref_clk", "suspend_clk",
181                      "bus_clk", "grf_clk";
182        dr_mode = "otg";
183      };
184    };
185