1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct mall_stream_config { 42 /* MALL stream config to indicate if the stream is phantom or not. 43 * We will use a phantom stream to indicate that the pipe is phantom. 44 */ 45 enum mall_stream_type type; 46 struct dc_stream_state *paired_stream; // master / slave stream 47 bool subvp_limit_cursor_size; /* stream has/is using subvp limiting hw cursor support */ 48 bool cursor_size_limit_subvp; /* stream is using hw cursor config preventing subvp */ 49 }; 50 51 struct dc_stream_status { 52 int primary_otg_inst; 53 int stream_enc_inst; 54 55 /** 56 * @plane_count: Total of planes attached to a single stream 57 */ 58 int plane_count; 59 int audio_inst; 60 struct timing_sync_info timing_sync_info; 61 struct dc_plane_state *plane_states[MAX_SURFACES]; 62 bool is_abm_supported; 63 struct mall_stream_config mall_stream_config; 64 bool fpo_in_use; 65 }; 66 67 enum hubp_dmdata_mode { 68 DMDATA_SW_MODE, 69 DMDATA_HW_MODE 70 }; 71 72 struct dc_dmdata_attributes { 73 /* Specifies whether dynamic meta data will be updated by software 74 * or has to be fetched by hardware (DMA mode) 75 */ 76 enum hubp_dmdata_mode dmdata_mode; 77 /* Specifies if current dynamic meta data is to be used only for the current frame */ 78 bool dmdata_repeat; 79 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 80 uint32_t dmdata_size; 81 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 82 bool dmdata_updated; 83 /* If hardware mode is used, the base address where DMDATA surface is located */ 84 PHYSICAL_ADDRESS_LOC address; 85 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 86 bool dmdata_qos_mode; 87 /* If qos_mode = 1, this is the QOS value to be used: */ 88 uint32_t dmdata_qos_level; 89 /* Specifies the value in unit of REFCLK cycles to be added to the 90 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 91 */ 92 uint32_t dmdata_dl_delta; 93 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 94 uint32_t *dmdata_sw_data; 95 }; 96 97 struct dc_writeback_info { 98 bool wb_enabled; 99 int dwb_pipe_inst; 100 struct dc_dwb_params dwb_params; 101 struct mcif_buf_params mcif_buf_params; 102 struct mcif_warmup_params mcif_warmup_params; 103 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 104 struct dc_plane_state *writeback_source_plane; 105 /* source MPCC instance. for use by internally by dc */ 106 int mpcc_inst; 107 }; 108 109 struct dc_writeback_update { 110 unsigned int num_wb_info; 111 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 112 }; 113 114 enum vertical_interrupt_ref_point { 115 START_V_UPDATE = 0, 116 START_V_SYNC, 117 INVALID_POINT 118 119 //For now, only v_update interrupt is used. 120 //START_V_BLANK, 121 //START_V_ACTIVE 122 }; 123 124 struct periodic_interrupt_config { 125 enum vertical_interrupt_ref_point ref_point; 126 int lines_offset; 127 }; 128 129 struct dc_mst_stream_bw_update { 130 bool is_increase; // is bandwidth reduced or increased 131 uint32_t mst_stream_bw; // new mst bandwidth in kbps 132 }; 133 134 union stream_update_flags { 135 struct { 136 uint32_t scaling:1; 137 uint32_t out_tf:1; 138 uint32_t out_csc:1; 139 uint32_t abm_level:1; 140 uint32_t dpms_off:1; 141 uint32_t gamut_remap:1; 142 uint32_t wb_update:1; 143 uint32_t dsc_changed : 1; 144 uint32_t mst_bw : 1; 145 uint32_t crtc_timing_adjust : 1; 146 uint32_t fams_changed : 1; 147 uint32_t scaler_sharpener : 1; 148 uint32_t sharpening_required : 1; 149 } bits; 150 151 uint32_t raw; 152 }; 153 154 struct test_pattern { 155 enum dp_test_pattern type; 156 enum dp_test_pattern_color_space color_space; 157 struct link_training_settings const *p_link_settings; 158 unsigned char const *p_custom_pattern; 159 unsigned int cust_pattern_size; 160 }; 161 162 #define SUBVP_DRR_MARGIN_US 100 // 100us for DRR margin (SubVP + DRR) 163 164 struct dc_stream_debug_options { 165 char force_odm_combine_segments; 166 /* 167 * When force_odm_combine_segments is non zero, allow dc to 168 * temporarily transition to ODM bypass when minimal transition state 169 * is required to prevent visual glitches showing on the screen 170 */ 171 char allow_transition_for_forced_odm; 172 }; 173 174 #define LUMINANCE_DATA_TABLE_SIZE 10 175 176 struct luminance_data { 177 bool is_valid; 178 int refresh_rate_hz[LUMINANCE_DATA_TABLE_SIZE]; 179 int luminance_millinits[LUMINANCE_DATA_TABLE_SIZE]; 180 int flicker_criteria_milli_nits_GAMING; 181 int flicker_criteria_milli_nits_STATIC; 182 int nominal_refresh_rate; 183 int dm_max_decrease_from_nominal; 184 }; 185 186 enum dc_drr_trigger_mode { 187 DRR_TRIGGER_ON_FLIP = 0, 188 DRR_TRIGGER_ON_FLIP_AND_CURSOR, 189 }; 190 191 struct dc_stream_state { 192 // sink is deprecated, new code should not reference 193 // this pointer 194 struct dc_sink *sink; 195 196 struct dc_link *link; 197 /* For dynamic link encoder assignment, update the link encoder assigned to 198 * a stream via the volatile dc_state rather than the static dc_link. 199 */ 200 struct link_encoder *link_enc; 201 struct dc_stream_debug_options debug; 202 struct dc_panel_patch sink_patches; 203 struct dc_crtc_timing timing; 204 struct dc_crtc_timing_adjust adjust; 205 struct dc_info_packet vrr_infopacket; 206 struct dc_info_packet vsc_infopacket; 207 struct dc_info_packet vsp_infopacket; 208 struct dc_info_packet hfvsif_infopacket; 209 struct dc_info_packet vtem_infopacket; 210 struct dc_info_packet adaptive_sync_infopacket; 211 struct dc_info_packet avi_infopacket; 212 uint8_t dsc_packed_pps[128]; 213 struct rect src; /* composition area */ 214 struct rect dst; /* stream addressable area */ 215 216 struct audio_info audio_info; 217 218 struct dc_info_packet hdr_static_metadata; 219 PHYSICAL_ADDRESS_LOC dmdata_address; 220 bool use_dynamic_meta; 221 222 struct dc_transfer_func out_transfer_func; 223 struct colorspace_transform gamut_remap_matrix; 224 struct dc_csc_transform csc_color_matrix; 225 226 enum dc_color_space output_color_space; 227 enum display_content_type content_type; 228 enum dc_dither_option dither_option; 229 230 enum view_3d_format view_format; 231 232 bool use_vsc_sdp_for_colorimetry; 233 bool ignore_msa_timing_param; 234 235 /** 236 * @allow_freesync: 237 * 238 * It say if Freesync is enabled or not. 239 */ 240 bool allow_freesync; 241 242 /** 243 * @vrr_active_variable: 244 * 245 * It describes if VRR is in use. 246 */ 247 bool vrr_active_variable; 248 bool freesync_on_desktop; 249 bool vrr_active_fixed; 250 251 bool converter_disable_audio; 252 uint8_t qs_bit; 253 uint8_t qy_bit; 254 255 /* TODO: custom INFO packets */ 256 /* TODO: ABM info (DMCU) */ 257 /* TODO: CEA VIC */ 258 259 /* DMCU info */ 260 unsigned int abm_level; 261 262 struct periodic_interrupt_config periodic_interrupt; 263 264 /* from core_stream struct */ 265 struct dc_context *ctx; 266 267 /* used by DCP and FMT */ 268 struct bit_depth_reduction_params bit_depth_params; 269 struct clamping_and_pixel_encoding_params clamping; 270 271 int phy_pix_clk; 272 enum signal_type signal; 273 bool dpms_off; 274 275 void *dm_stream_context; 276 277 struct dc_cursor_attributes cursor_attributes; 278 struct dc_cursor_position cursor_position; 279 bool hw_cursor_req; 280 281 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 282 283 /* from stream struct */ 284 struct kref refcount; 285 286 struct crtc_trigger_info triggered_crtc_reset; 287 288 /* writeback */ 289 unsigned int num_wb_info; 290 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 291 const struct dc_transfer_func *func_shaper; 292 const struct dc_3dlut *lut3d_func; 293 /* Computed state bits */ 294 bool mode_changed : 1; 295 296 /* Output from DC when stream state is committed or altered 297 * DC may only access these values during: 298 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 299 * values may not change outside of those calls 300 */ 301 struct { 302 // For interrupt management, some hardware instance 303 // offsets need to be exposed to DM 304 uint8_t otg_offset; 305 } out; 306 307 bool apply_edp_fast_boot_optimization; 308 bool apply_seamless_boot_optimization; 309 uint32_t apply_boot_odm_mode; 310 311 uint32_t stream_id; 312 313 struct test_pattern test_pattern; 314 union stream_update_flags update_flags; 315 316 bool has_non_synchronizable_pclk; 317 bool vblank_synchronized; 318 bool is_phantom; 319 320 struct luminance_data lumin_data; 321 bool scaler_sharpener_update; 322 bool sharpening_required; 323 324 enum dc_drr_trigger_mode drr_trigger_mode; 325 326 struct dc_update_scratch_space *update_scratch; 327 }; 328 329 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 330 331 struct dc_stream_update { 332 struct dc_stream_state *stream; 333 334 struct rect src; 335 struct rect dst; 336 struct dc_transfer_func *out_transfer_func; 337 struct dc_info_packet *hdr_static_metadata; 338 unsigned int *abm_level; 339 340 struct periodic_interrupt_config *periodic_interrupt; 341 342 struct dc_info_packet *vrr_infopacket; 343 struct dc_info_packet *vsc_infopacket; 344 struct dc_info_packet *vsp_infopacket; 345 struct dc_info_packet *hfvsif_infopacket; 346 struct dc_info_packet *vtem_infopacket; 347 struct dc_info_packet *adaptive_sync_infopacket; 348 struct dc_info_packet *avi_infopacket; 349 350 bool *dpms_off; 351 bool integer_scaling_update; 352 bool *allow_freesync; 353 bool *vrr_active_variable; 354 bool *vrr_active_fixed; 355 356 struct colorspace_transform *gamut_remap; 357 enum dc_color_space *output_color_space; 358 enum dc_dither_option *dither_option; 359 360 struct dc_csc_transform *output_csc_transform; 361 362 struct dc_writeback_update *wb_update; 363 struct dc_dsc_config *dsc_config; 364 struct dc_mst_stream_bw_update *mst_bw_update; 365 struct dc_transfer_func *func_shaper; 366 struct dc_3dlut *lut3d_func; 367 368 struct test_pattern *pending_test_pattern; 369 struct dc_crtc_timing_adjust *crtc_timing_adjust; 370 371 struct dc_cursor_attributes *cursor_attributes; 372 struct dc_cursor_position *cursor_position; 373 bool *hw_cursor_req; 374 bool *scaler_sharpener_update; 375 bool *sharpening_required; 376 377 enum dc_drr_trigger_mode *drr_trigger_mode; 378 }; 379 380 bool dc_is_stream_unchanged( 381 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 382 bool dc_is_stream_scaling_unchanged( 383 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 384 385 /* 386 * Setup stream attributes if no stream updates are provided 387 * there will be no impact on the stream parameters 388 * 389 * Set up surface attributes and associate to a stream 390 * The surfaces parameter is an absolute set of all surface active for the stream. 391 * If no surfaces are provided, the stream will be blanked; no memory read. 392 * Any flip related attribute changes must be done through this interface. 393 * 394 * After this call: 395 * Surfaces attributes are programmed and configured to be composed into stream. 396 * This does not trigger a flip. No surface address is programmed. 397 * 398 */ 399 bool dc_update_planes_and_stream(struct dc *dc, 400 struct dc_surface_update *surface_updates, int surface_count, 401 struct dc_stream_state *dc_stream, 402 struct dc_stream_update *stream_update); 403 404 struct dc_update_scratch_space; 405 406 size_t dc_update_scratch_space_size(void); 407 408 struct dc_update_scratch_space *dc_update_planes_and_stream_init( 409 struct dc *dc, 410 struct dc_surface_update *surface_updates, 411 int surface_count, 412 struct dc_stream_state *dc_stream, 413 struct dc_stream_update *stream_update 414 ); 415 416 // Locked, false is failed 417 bool dc_update_planes_and_stream_prepare( 418 struct dc_update_scratch_space *scratch 419 ); 420 421 // Unlocked 422 void dc_update_planes_and_stream_execute( 423 const struct dc_update_scratch_space *scratch 424 ); 425 426 // Locked, true if call again 427 bool dc_update_planes_and_stream_cleanup( 428 struct dc_update_scratch_space *scratch 429 ); 430 431 /* 432 * Set up surface attributes and associate to a stream 433 * The surfaces parameter is an absolute set of all surface active for the stream. 434 * If no surfaces are provided, the stream will be blanked; no memory read. 435 * Any flip related attribute changes must be done through this interface. 436 * 437 * After this call: 438 * Surfaces attributes are programmed and configured to be composed into stream. 439 * This does not trigger a flip. No surface address is programmed. 440 */ 441 void dc_commit_updates_for_stream(struct dc *dc, 442 struct dc_surface_update *srf_updates, 443 int surface_count, 444 struct dc_stream_state *stream, 445 struct dc_stream_update *stream_update, 446 struct dc_state *state); 447 /* 448 * Log the current stream state. 449 */ 450 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 451 452 uint8_t dc_get_current_stream_count(struct dc *dc); 453 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 454 455 /* 456 * Return the current frame counter. 457 */ 458 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 459 460 /* 461 * Send dp sdp message. 462 */ 463 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 464 const uint8_t *custom_sdp_message, 465 unsigned int sdp_message_size); 466 467 /* TODO: Return parsed values rather than direct register read 468 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 469 * being refactored properly to be dce-specific 470 */ 471 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 472 uint32_t *v_blank_start, 473 uint32_t *v_blank_end, 474 uint32_t *h_position, 475 uint32_t *v_position); 476 477 bool dc_stream_add_writeback(struct dc *dc, 478 struct dc_stream_state *stream, 479 struct dc_writeback_info *wb_info); 480 481 bool dc_stream_fc_disable_writeback(struct dc *dc, 482 struct dc_stream_state *stream, 483 uint32_t dwb_pipe_inst); 484 485 bool dc_stream_remove_writeback(struct dc *dc, 486 struct dc_stream_state *stream, 487 uint32_t dwb_pipe_inst); 488 489 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 490 struct dc_state *state, 491 struct dc_stream_state *stream); 492 493 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 494 495 bool dc_stream_set_dynamic_metadata(struct dc *dc, 496 struct dc_stream_state *stream, 497 struct dc_dmdata_attributes *dmdata_attr); 498 499 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 500 501 /* 502 * Enable stereo when commit_streams is not required, 503 * for example, frame alternate. 504 */ 505 void dc_enable_stereo( 506 struct dc *dc, 507 struct dc_state *context, 508 struct dc_stream_state *streams[], 509 uint8_t stream_count); 510 511 /* Triggers multi-stream synchronization. */ 512 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 513 514 struct surface_update_descriptor dc_check_update_surfaces_for_stream( 515 const struct dc_check_config *check_config, 516 struct dc_surface_update *updates, 517 int surface_count, 518 struct dc_stream_update *stream_update); 519 520 /** 521 * Create a new default stream for the requested sink 522 */ 523 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 524 525 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 526 527 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 528 529 void dc_stream_retain(struct dc_stream_state *dc_stream); 530 void dc_stream_release(struct dc_stream_state *dc_stream); 531 532 struct dc_stream_status *dc_stream_get_status(struct dc_stream_state *dc_stream); 533 const struct dc_stream_status *dc_stream_get_status_const(const struct dc_stream_state *dc_stream); 534 535 /******************************************************************************* 536 * Cursor interfaces - To manages the cursor within a stream 537 ******************************************************************************/ 538 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 539 540 void program_cursor_attributes( 541 struct dc *dc, 542 struct dc_stream_state *stream); 543 544 void program_cursor_position( 545 struct dc *dc, 546 struct dc_stream_state *stream); 547 548 bool dc_stream_check_cursor_attributes( 549 const struct dc_stream_state *stream, 550 struct dc_state *state, 551 const struct dc_cursor_attributes *attributes); 552 553 bool dc_stream_set_cursor_attributes( 554 struct dc_stream_state *stream, 555 const struct dc_cursor_attributes *attributes); 556 557 bool dc_stream_program_cursor_attributes( 558 struct dc_stream_state *stream, 559 const struct dc_cursor_attributes *attributes); 560 561 bool dc_stream_set_cursor_position( 562 struct dc_stream_state *stream, 563 const struct dc_cursor_position *position); 564 565 bool dc_stream_program_cursor_position( 566 struct dc_stream_state *stream, 567 const struct dc_cursor_position *position); 568 569 570 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 571 struct dc_stream_state *stream, 572 struct dc_crtc_timing_adjust *adjust); 573 574 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 575 struct dc_stream_state *stream, 576 uint32_t *refresh_rate); 577 578 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 579 bool dc_stream_forward_crc_window(struct dc_stream_state *stream, 580 struct rect *rect, 581 uint8_t phy_id, 582 bool is_stop); 583 584 bool dc_stream_forward_multiple_crc_window(struct dc_stream_state *stream, 585 struct crc_window *window, 586 uint8_t phy_id, 587 bool stop); 588 #endif 589 590 bool dc_stream_configure_crc(struct dc *dc, 591 struct dc_stream_state *stream, 592 struct crc_params *crc_window, 593 bool enable, 594 bool continuous, 595 uint8_t idx, 596 bool reset, 597 enum crc_poly_mode crc_poly_mode); 598 599 bool dc_stream_get_crc(struct dc *dc, 600 struct dc_stream_state *stream, 601 uint8_t idx, 602 uint32_t *r_cr, 603 uint32_t *g_y, 604 uint32_t *b_cb); 605 606 void dc_stream_set_static_screen_params(struct dc *dc, 607 struct dc_stream_state **stream, 608 int num_streams, 609 const struct dc_static_screen_params *params); 610 611 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 612 enum dc_dynamic_expansion option); 613 614 void dc_stream_set_dither_option(struct dc_stream_state *stream, 615 enum dc_dither_option option); 616 617 bool dc_stream_set_gamut_remap(struct dc *dc, 618 const struct dc_stream_state *stream); 619 620 bool dc_stream_program_csc_matrix(struct dc *dc, 621 struct dc_stream_state *stream); 622 623 struct dc_rmcm_3dlut *dc_stream_get_3dlut_for_stream( 624 const struct dc *dc, 625 const struct dc_stream_state *stream, 626 bool allocate_one); 627 628 void dc_stream_release_3dlut_for_stream( 629 const struct dc *dc, 630 const struct dc_stream_state *stream); 631 632 void dc_stream_init_rmcm_3dlut(struct dc *dc); 633 634 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 635 636 void dc_dmub_update_dirty_rect(struct dc *dc, 637 int surface_count, 638 struct dc_stream_state *stream, 639 const struct dc_surface_update *srf_updates, 640 struct dc_state *context); 641 642 bool dc_stream_is_cursor_limit_pending(struct dc *dc, struct dc_stream_state *stream); 643 bool dc_stream_can_clear_cursor_limit(struct dc *dc, struct dc_stream_state *stream); 644 645 #endif /* DC_STREAM_H_ */ 646