1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 3 #include <linux/etherdevice.h> 4 #include <linux/platform_device.h> 5 #include <linux/pci.h> 6 #include <linux/module.h> 7 #include "mt7603.h" 8 #include "mac.h" 9 #include "eeprom.h" 10 11 static int 12 mt7603_start(struct ieee80211_hw *hw) 13 { 14 struct mt7603_dev *dev = hw->priv; 15 16 mt7603_mac_reset_counters(dev); 17 mt7603_mac_start(dev); 18 dev->mphy.survey_time = ktime_get_boottime(); 19 set_bit(MT76_STATE_RUNNING, &dev->mphy.state); 20 mt7603_mac_work(&dev->mphy.mac_work.work); 21 22 return 0; 23 } 24 25 static void 26 mt7603_stop(struct ieee80211_hw *hw, bool suspend) 27 { 28 struct mt7603_dev *dev = hw->priv; 29 30 clear_bit(MT76_STATE_RUNNING, &dev->mphy.state); 31 cancel_delayed_work_sync(&dev->mphy.mac_work); 32 mt7603_mac_stop(dev); 33 } 34 35 static int 36 mt7603_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 37 { 38 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 39 struct mt7603_dev *dev = hw->priv; 40 struct mt76_txq *mtxq; 41 u8 bc_addr[ETH_ALEN]; 42 int idx; 43 int ret = 0; 44 45 mutex_lock(&dev->mt76.mutex); 46 47 mvif->idx = __ffs64(~dev->mt76.vif_mask); 48 if (mvif->idx >= MT7603_MAX_INTERFACES) { 49 ret = -ENOSPC; 50 goto out; 51 } 52 53 mt76_wr(dev, MT_MAC_ADDR0(mvif->idx), 54 get_unaligned_le32(vif->addr)); 55 mt76_wr(dev, MT_MAC_ADDR1(mvif->idx), 56 (get_unaligned_le16(vif->addr + 4) | 57 MT_MAC_ADDR1_VALID)); 58 59 if (vif->type == NL80211_IFTYPE_AP) { 60 mt76_wr(dev, MT_BSSID0(mvif->idx), 61 get_unaligned_le32(vif->addr)); 62 mt76_wr(dev, MT_BSSID1(mvif->idx), 63 (get_unaligned_le16(vif->addr + 4) | 64 MT_BSSID1_VALID)); 65 } 66 67 idx = MT7603_WTBL_RESERVED - 1 - mvif->idx; 68 dev->mt76.vif_mask |= BIT_ULL(mvif->idx); 69 mvif->sta.wcid.idx = idx; 70 mvif->sta.vif = mvif; 71 mt76_wcid_init(&mvif->sta.wcid, 0); 72 73 eth_broadcast_addr(bc_addr); 74 mt7603_wtbl_init(dev, idx, mvif->idx, bc_addr); 75 76 mtxq = (struct mt76_txq *)vif->txq->drv_priv; 77 mtxq->wcid = idx; 78 rcu_assign_pointer(dev->mt76.wcid[idx], &mvif->sta.wcid); 79 80 out: 81 mutex_unlock(&dev->mt76.mutex); 82 83 return ret; 84 } 85 86 static void 87 mt7603_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 88 { 89 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 90 struct mt7603_sta *msta = &mvif->sta; 91 struct mt7603_dev *dev = hw->priv; 92 int idx = msta->wcid.idx; 93 94 mt76_wr(dev, MT_MAC_ADDR0(mvif->idx), 0); 95 mt76_wr(dev, MT_MAC_ADDR1(mvif->idx), 0); 96 mt76_wr(dev, MT_BSSID0(mvif->idx), 0); 97 mt76_wr(dev, MT_BSSID1(mvif->idx), 0); 98 mt7603_beacon_set_timer(dev, mvif->idx, 0); 99 100 rcu_assign_pointer(dev->mt76.wcid[idx], NULL); 101 102 spin_lock_bh(&dev->mt76.sta_poll_lock); 103 if (!list_empty(&msta->wcid.poll_list)) 104 list_del_init(&msta->wcid.poll_list); 105 spin_unlock_bh(&dev->mt76.sta_poll_lock); 106 107 mutex_lock(&dev->mt76.mutex); 108 dev->mt76.vif_mask &= ~BIT_ULL(mvif->idx); 109 mutex_unlock(&dev->mt76.mutex); 110 111 mt76_wcid_cleanup(&dev->mt76, &mvif->sta.wcid); 112 } 113 114 void mt7603_init_edcca(struct mt7603_dev *dev) 115 { 116 /* Set lower signal level to -65dBm */ 117 mt76_rmw_field(dev, MT_RXTD(8), MT_RXTD_8_LOWER_SIGNAL, 0x23); 118 119 /* clear previous energy detect monitor results */ 120 mt76_rr(dev, MT_MIB_STAT_ED); 121 122 if (dev->ed_monitor) 123 mt76_set(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME); 124 else 125 mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME); 126 127 dev->ed_strict_mode = 0xff; 128 dev->ed_strong_signal = 0; 129 dev->ed_time = ktime_get_boottime(); 130 131 mt7603_edcca_set_strict(dev, false); 132 } 133 134 int mt7603_set_channel(struct mt76_phy *mphy) 135 { 136 struct mt7603_dev *dev = container_of(mphy->dev, struct mt7603_dev, mt76); 137 struct cfg80211_chan_def *def = &mphy->chandef; 138 139 u8 *rssi_data = (u8 *)dev->mt76.eeprom.data; 140 int idx, ret; 141 u8 bw = MT_BW_20; 142 bool failed = false; 143 144 tasklet_disable(&dev->mt76.pre_tbtt_tasklet); 145 146 mt7603_beacon_set_timer(dev, -1, 0); 147 mt7603_mac_stop(dev); 148 149 if (def->width == NL80211_CHAN_WIDTH_40) 150 bw = MT_BW_40; 151 152 mt76_rmw_field(dev, MT_AGG_BWCR, MT_AGG_BWCR_BW, bw); 153 ret = mt7603_mcu_set_channel(dev); 154 if (ret) { 155 failed = true; 156 goto out; 157 } 158 159 if (def->chan->band == NL80211_BAND_5GHZ) { 160 idx = 1; 161 rssi_data += MT_EE_RSSI_OFFSET_5G; 162 } else { 163 idx = 0; 164 rssi_data += MT_EE_RSSI_OFFSET_2G; 165 } 166 167 memcpy(dev->rssi_offset, rssi_data, sizeof(dev->rssi_offset)); 168 169 idx |= (def->chan - 170 mt76_hw(dev)->wiphy->bands[def->chan->band]->channels) << 1; 171 mt76_wr(dev, MT_WF_RMAC_CH_FREQ, idx); 172 mt7603_mac_set_timing(dev); 173 mt7603_mac_start(dev); 174 175 ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mphy.mac_work, 176 msecs_to_jiffies(MT7603_WATCHDOG_TIME)); 177 178 /* reset channel stats */ 179 mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_READ_CLR_DIS); 180 mt76_set(dev, MT_MIB_CTL, 181 MT_MIB_CTL_CCA_NAV_TX | MT_MIB_CTL_PSCCA_TIME); 182 mt76_rr(dev, MT_MIB_STAT_CCA); 183 mt7603_cca_stats_reset(dev); 184 185 dev->mphy.survey_time = ktime_get_boottime(); 186 187 mt7603_init_edcca(dev); 188 189 out: 190 if (!mphy->offchannel) 191 mt7603_beacon_set_timer(dev, -1, dev->mt76.beacon_int); 192 193 tasklet_enable(&dev->mt76.pre_tbtt_tasklet); 194 195 if (failed) 196 mt7603_mac_work(&dev->mphy.mac_work.work); 197 198 return ret; 199 } 200 201 static int mt7603_set_sar_specs(struct ieee80211_hw *hw, 202 const struct cfg80211_sar_specs *sar) 203 { 204 struct mt7603_dev *dev = hw->priv; 205 struct mt76_phy *mphy = &dev->mphy; 206 int err; 207 208 if (!cfg80211_chandef_valid(&mphy->chandef)) 209 return -EINVAL; 210 211 err = mt76_init_sar_power(hw, sar); 212 if (err) 213 return err; 214 215 return mt76_update_channel(mphy); 216 } 217 218 static int 219 mt7603_config(struct ieee80211_hw *hw, int radio_idx, u32 changed) 220 { 221 struct mt7603_dev *dev = hw->priv; 222 int ret = 0; 223 224 if (changed & (IEEE80211_CONF_CHANGE_CHANNEL | 225 IEEE80211_CONF_CHANGE_POWER)) 226 ret = mt76_update_channel(&dev->mphy); 227 228 if (changed & IEEE80211_CONF_CHANGE_MONITOR) { 229 mutex_lock(&dev->mt76.mutex); 230 231 if (!(hw->conf.flags & IEEE80211_CONF_MONITOR)) 232 dev->rxfilter |= MT_WF_RFCR_DROP_OTHER_UC; 233 else 234 dev->rxfilter &= ~MT_WF_RFCR_DROP_OTHER_UC; 235 236 mt76_wr(dev, MT_WF_RFCR, dev->rxfilter); 237 238 mutex_unlock(&dev->mt76.mutex); 239 } 240 241 return ret; 242 } 243 244 static void 245 mt7603_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, 246 unsigned int *total_flags, u64 multicast) 247 { 248 struct mt7603_dev *dev = hw->priv; 249 u32 flags = 0; 250 251 #define MT76_FILTER(_flag, _hw) do { \ 252 flags |= *total_flags & FIF_##_flag; \ 253 dev->rxfilter &= ~(_hw); \ 254 dev->rxfilter |= !(flags & FIF_##_flag) * (_hw); \ 255 } while (0) 256 257 dev->rxfilter &= ~(MT_WF_RFCR_DROP_OTHER_BSS | 258 MT_WF_RFCR_DROP_OTHER_BEACON | 259 MT_WF_RFCR_DROP_FRAME_REPORT | 260 MT_WF_RFCR_DROP_PROBEREQ | 261 MT_WF_RFCR_DROP_MCAST_FILTERED | 262 MT_WF_RFCR_DROP_MCAST | 263 MT_WF_RFCR_DROP_BCAST | 264 MT_WF_RFCR_DROP_DUPLICATE | 265 MT_WF_RFCR_DROP_A2_BSSID | 266 MT_WF_RFCR_DROP_UNWANTED_CTL | 267 MT_WF_RFCR_DROP_STBC_MULTI); 268 269 MT76_FILTER(OTHER_BSS, MT_WF_RFCR_DROP_OTHER_TIM | 270 MT_WF_RFCR_DROP_A3_MAC | 271 MT_WF_RFCR_DROP_A3_BSSID); 272 273 MT76_FILTER(FCSFAIL, MT_WF_RFCR_DROP_FCSFAIL); 274 275 MT76_FILTER(CONTROL, MT_WF_RFCR_DROP_CTS | 276 MT_WF_RFCR_DROP_RTS | 277 MT_WF_RFCR_DROP_CTL_RSV | 278 MT_WF_RFCR_DROP_NDPA); 279 280 *total_flags = flags; 281 mt76_wr(dev, MT_WF_RFCR, dev->rxfilter); 282 } 283 284 static void 285 mt7603_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 286 struct ieee80211_bss_conf *info, u64 changed) 287 { 288 struct mt7603_dev *dev = hw->priv; 289 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 290 291 mutex_lock(&dev->mt76.mutex); 292 293 if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BSSID)) { 294 if (vif->cfg.assoc || vif->cfg.ibss_joined) { 295 mt76_wr(dev, MT_BSSID0(mvif->idx), 296 get_unaligned_le32(info->bssid)); 297 mt76_wr(dev, MT_BSSID1(mvif->idx), 298 (get_unaligned_le16(info->bssid + 4) | 299 MT_BSSID1_VALID)); 300 } else { 301 mt76_wr(dev, MT_BSSID0(mvif->idx), 0); 302 mt76_wr(dev, MT_BSSID1(mvif->idx), 0); 303 } 304 } 305 306 if (changed & BSS_CHANGED_ERP_SLOT) { 307 int slottime = info->use_short_slot ? 9 : 20; 308 309 if (slottime != dev->slottime) { 310 dev->slottime = slottime; 311 mt7603_mac_set_timing(dev); 312 } 313 } 314 315 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON_INT)) { 316 int beacon_int = !!info->enable_beacon * info->beacon_int; 317 318 tasklet_disable(&dev->mt76.pre_tbtt_tasklet); 319 mt7603_beacon_set_timer(dev, mvif->idx, beacon_int); 320 tasklet_enable(&dev->mt76.pre_tbtt_tasklet); 321 } 322 323 mutex_unlock(&dev->mt76.mutex); 324 } 325 326 int 327 mt7603_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 328 struct ieee80211_sta *sta) 329 { 330 struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76); 331 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 332 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 333 int idx; 334 int ret = 0; 335 336 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7603_WTBL_STA - 1); 337 if (idx < 0) 338 return -ENOSPC; 339 340 INIT_LIST_HEAD(&msta->wcid.poll_list); 341 __skb_queue_head_init(&msta->psq); 342 msta->ps = ~0; 343 msta->smps = ~0; 344 msta->wcid.sta = 1; 345 msta->wcid.idx = idx; 346 msta->vif = mvif; 347 mt7603_wtbl_init(dev, idx, mvif->idx, sta->addr); 348 mt7603_wtbl_set_ps(dev, msta, false); 349 350 if (vif->type == NL80211_IFTYPE_AP) 351 set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags); 352 353 return ret; 354 } 355 356 int 357 mt7603_sta_event(struct mt76_dev *mdev, struct ieee80211_vif *vif, 358 struct ieee80211_sta *sta, enum mt76_sta_event ev) 359 { 360 struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76); 361 362 if (ev == MT76_STA_EVENT_ASSOC) { 363 mutex_lock(&dev->mt76.mutex); 364 mt7603_wtbl_update_cap(dev, sta); 365 mutex_unlock(&dev->mt76.mutex); 366 } 367 368 return 0; 369 } 370 371 void 372 mt7603_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 373 struct ieee80211_sta *sta) 374 { 375 struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76); 376 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 377 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 378 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; 379 380 spin_lock_bh(&dev->ps_lock); 381 __skb_queue_purge(&msta->psq); 382 mt7603_filter_tx(dev, mvif->idx, wcid->idx, true); 383 spin_unlock_bh(&dev->ps_lock); 384 385 spin_lock_bh(&mdev->sta_poll_lock); 386 if (!list_empty(&msta->wcid.poll_list)) 387 list_del_init(&msta->wcid.poll_list); 388 spin_unlock_bh(&mdev->sta_poll_lock); 389 390 mt7603_wtbl_clear(dev, wcid->idx); 391 } 392 393 static void 394 mt7603_ps_tx_list(struct mt7603_dev *dev, struct sk_buff_head *list) 395 { 396 struct sk_buff *skb; 397 398 while ((skb = __skb_dequeue(list)) != NULL) { 399 int qid = skb_get_queue_mapping(skb); 400 401 mt76_tx_queue_skb_raw(dev, dev->mphy.q_tx[qid], skb, 0); 402 } 403 } 404 405 void 406 mt7603_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps) 407 { 408 struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76); 409 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 410 struct sk_buff_head list; 411 412 mt76_stop_tx_queues(&dev->mphy, sta, true); 413 mt7603_wtbl_sta_ps(dev, msta, ps); 414 if (ps) 415 return; 416 417 __skb_queue_head_init(&list); 418 419 spin_lock_bh(&dev->ps_lock); 420 skb_queue_splice_tail_init(&msta->psq, &list); 421 spin_unlock_bh(&dev->ps_lock); 422 423 mt7603_ps_tx_list(dev, &list); 424 } 425 426 static struct ieee80211_hdr * 427 mt7603_ps_skb_hdr(struct sk_buff *skb) 428 { 429 return (struct ieee80211_hdr *)&skb->data[MT_TXD_SIZE]; 430 } 431 432 /* 433 * Buffered frames can be recycled into the PS queue by mt7603_filter_tx(), so 434 * both bits have to be assigned, not just set. 435 */ 436 static void 437 mt7603_ps_set_flags(struct sk_buff *skb, bool more_data, bool eosp) 438 { 439 struct ieee80211_hdr *hdr = mt7603_ps_skb_hdr(skb); 440 441 if (more_data) 442 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA); 443 else 444 hdr->frame_control &= ~cpu_to_le16(IEEE80211_FCTL_MOREDATA); 445 446 if (!ieee80211_is_data_qos(hdr->frame_control)) 447 return; 448 449 if (eosp) 450 *ieee80211_get_qos_ctl(hdr) |= IEEE80211_QOS_CTL_EOSP; 451 else 452 *ieee80211_get_qos_ctl(hdr) &= ~IEEE80211_QOS_CTL_EOSP; 453 } 454 455 static void 456 mt7603_release_buffered_frames(struct ieee80211_hw *hw, 457 struct ieee80211_sta *sta, 458 u16 tids, int nframes, 459 enum ieee80211_frame_release_type reason, 460 bool more_data) 461 { 462 struct mt7603_dev *dev = hw->priv; 463 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 464 struct sk_buff_head list; 465 struct sk_buff *skb, *tmp, *last; 466 bool eosp_null, uapsd; 467 unsigned long drained; 468 u16 pending = 0; 469 u8 last_tid; 470 int i; 471 472 __skb_queue_head_init(&list); 473 474 mt7603_wtbl_set_ps(dev, msta, false); 475 476 spin_lock_bh(&dev->ps_lock); 477 skb_queue_walk_safe(&msta->psq, skb, tmp) { 478 if (!nframes) 479 break; 480 481 if (!(tids & BIT(skb->priority))) 482 continue; 483 484 skb_set_queue_mapping(skb, MT_TXQ_PSD); 485 __skb_unlink(skb, &msta->psq); 486 __skb_queue_tail(&list, skb); 487 nframes--; 488 } 489 490 skb_queue_walk(&msta->psq, skb) 491 pending |= BIT(skb->priority); 492 spin_unlock_bh(&dev->ps_lock); 493 494 /* 495 * Without this, mac80211 keeps the TIM bit set for the station and 496 * keeps routing every service period to the driver, even though there 497 * is nothing left to release. 498 */ 499 drained = tids & ~pending; 500 for_each_set_bit(i, &drained, IEEE80211_NUM_TIDS) 501 ieee80211_sta_set_buffered(sta, i, false); 502 503 last = skb_peek_tail(&list); 504 if (!last) { 505 mt76_release_buffered_frames(hw, sta, tids, nframes, reason, 506 more_data); 507 return; 508 } 509 510 /* 511 * End the service period here instead of passing the remaining frame 512 * budget on to mt76_release_buffered_frames(), which would signal the 513 * end of the same service period a second time. 514 */ 515 uapsd = reason == IEEE80211_FRAME_RELEASE_UAPSD; 516 more_data |= !!(pending & tids); 517 518 skb_queue_walk(&list, skb) 519 mt7603_ps_set_flags(skb, skb != last || more_data, 520 skb == last && uapsd); 521 522 /* 523 * EOSP lives in the QoS control field, so a bufferable MMPDU cannot 524 * terminate a U-APSD service period on its own. In that case mac80211 525 * has to append a QoS-Null frame, which ends the SP through its tx 526 * status. 527 */ 528 eosp_null = uapsd && 529 !ieee80211_is_data_qos(mt7603_ps_skb_hdr(last)->frame_control); 530 last_tid = __fls(tids); 531 532 mt7603_ps_tx_list(dev, &list); 533 534 if (eosp_null) 535 ieee80211_send_eosp_nullfunc(sta, last_tid); 536 else 537 ieee80211_sta_eosp(sta); 538 } 539 540 static int 541 mt7603_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 542 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 543 struct ieee80211_key_conf *key) 544 { 545 struct mt7603_dev *dev = hw->priv; 546 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 547 struct mt7603_sta *msta = sta ? (struct mt7603_sta *)sta->drv_priv : 548 &mvif->sta; 549 struct mt76_wcid *wcid = &msta->wcid; 550 int idx = key->keyidx; 551 552 /* fall back to sw encryption for unsupported ciphers */ 553 switch (key->cipher) { 554 case WLAN_CIPHER_SUITE_TKIP: 555 case WLAN_CIPHER_SUITE_CCMP: 556 break; 557 default: 558 return -EOPNOTSUPP; 559 } 560 561 /* 562 * The hardware does not support per-STA RX GTK, fall back 563 * to software mode for these. 564 */ 565 if ((vif->type == NL80211_IFTYPE_ADHOC || 566 vif->type == NL80211_IFTYPE_MESH_POINT) && 567 (key->cipher == WLAN_CIPHER_SUITE_TKIP || 568 key->cipher == WLAN_CIPHER_SUITE_CCMP) && 569 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) 570 return -EOPNOTSUPP; 571 572 if (cmd != SET_KEY) { 573 if (idx == wcid->hw_key_idx) 574 wcid->hw_key_idx = -1; 575 576 return 0; 577 } 578 579 key->hw_key_idx = wcid->idx; 580 wcid->hw_key_idx = idx; 581 mt76_wcid_key_setup(&dev->mt76, wcid, key); 582 583 return mt7603_wtbl_set_key(dev, wcid->idx, key); 584 } 585 586 static int 587 mt7603_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 588 unsigned int link_id, u16 queue, 589 const struct ieee80211_tx_queue_params *params) 590 { 591 struct mt7603_dev *dev = hw->priv; 592 u16 cw_min = (1 << 5) - 1; 593 u16 cw_max = (1 << 10) - 1; 594 u32 val; 595 596 queue = dev->mphy.q_tx[queue]->hw_idx; 597 598 if (params->cw_min) 599 cw_min = params->cw_min; 600 if (params->cw_max) 601 cw_max = params->cw_max; 602 603 mutex_lock(&dev->mt76.mutex); 604 mt7603_mac_stop(dev); 605 606 val = mt76_rr(dev, MT_WMM_TXOP(queue)); 607 val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(queue)); 608 val |= params->txop << MT_WMM_TXOP_SHIFT(queue); 609 mt76_wr(dev, MT_WMM_TXOP(queue), val); 610 611 val = mt76_rr(dev, MT_WMM_AIFSN); 612 val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(queue)); 613 val |= params->aifs << MT_WMM_AIFSN_SHIFT(queue); 614 mt76_wr(dev, MT_WMM_AIFSN, val); 615 616 val = mt76_rr(dev, MT_WMM_CWMIN); 617 val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(queue)); 618 val |= cw_min << MT_WMM_CWMIN_SHIFT(queue); 619 mt76_wr(dev, MT_WMM_CWMIN, val); 620 621 val = mt76_rr(dev, MT_WMM_CWMAX(queue)); 622 val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(queue)); 623 val |= cw_max << MT_WMM_CWMAX_SHIFT(queue); 624 mt76_wr(dev, MT_WMM_CWMAX(queue), val); 625 626 mt7603_mac_start(dev); 627 mutex_unlock(&dev->mt76.mutex); 628 629 return 0; 630 } 631 632 static void 633 mt7603_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 634 u32 queues, bool drop) 635 { 636 } 637 638 static int 639 mt7603_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 640 struct ieee80211_ampdu_params *params) 641 { 642 enum ieee80211_ampdu_mlme_action action = params->action; 643 struct mt7603_dev *dev = hw->priv; 644 struct ieee80211_sta *sta = params->sta; 645 struct ieee80211_txq *txq = sta->txq[params->tid]; 646 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 647 u16 tid = params->tid; 648 u16 ssn = params->ssn; 649 u8 ba_size = params->buf_size; 650 struct mt76_txq *mtxq; 651 int ret = 0; 652 653 if (!txq) 654 return -EINVAL; 655 656 mtxq = (struct mt76_txq *)txq->drv_priv; 657 658 mutex_lock(&dev->mt76.mutex); 659 switch (action) { 660 case IEEE80211_AMPDU_RX_START: 661 mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, ssn, 662 params->buf_size); 663 mt7603_mac_rx_ba_reset(dev, sta->addr, tid); 664 break; 665 case IEEE80211_AMPDU_RX_STOP: 666 mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid); 667 break; 668 case IEEE80211_AMPDU_TX_OPERATIONAL: 669 mtxq->aggr = true; 670 mtxq->send_bar = false; 671 mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, ba_size); 672 break; 673 case IEEE80211_AMPDU_TX_STOP_FLUSH: 674 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: 675 mtxq->aggr = false; 676 mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1); 677 break; 678 case IEEE80211_AMPDU_TX_START: 679 mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn); 680 ret = IEEE80211_AMPDU_TX_START_IMMEDIATE; 681 break; 682 case IEEE80211_AMPDU_TX_STOP_CONT: 683 mtxq->aggr = false; 684 mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1); 685 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 686 break; 687 } 688 mutex_unlock(&dev->mt76.mutex); 689 690 return ret; 691 } 692 693 static void 694 mt7603_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 695 struct ieee80211_sta *sta) 696 { 697 struct mt7603_dev *dev = hw->priv; 698 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 699 struct ieee80211_sta_rates *sta_rates = rcu_dereference(sta->rates); 700 int i; 701 702 if (!sta_rates) 703 return; 704 705 spin_lock_bh(&dev->mt76.lock); 706 for (i = 0; i < ARRAY_SIZE(msta->rates); i++) { 707 msta->rates[i].idx = sta_rates->rate[i].idx; 708 msta->rates[i].count = sta_rates->rate[i].count; 709 msta->rates[i].flags = sta_rates->rate[i].flags; 710 711 if (msta->rates[i].idx < 0 || !msta->rates[i].count) 712 break; 713 } 714 msta->n_rates = i; 715 mt7603_wtbl_set_rates(dev, msta, NULL, msta->rates); 716 msta->rate_probe = false; 717 mt7603_wtbl_set_smps(dev, msta, 718 sta->deflink.smps_mode == IEEE80211_SMPS_DYNAMIC); 719 spin_unlock_bh(&dev->mt76.lock); 720 } 721 722 static void 723 mt7603_set_coverage_class(struct ieee80211_hw *hw, int radio_idx, 724 s16 coverage_class) 725 { 726 struct mt7603_dev *dev = hw->priv; 727 728 mutex_lock(&dev->mt76.mutex); 729 dev->coverage_class = max_t(s16, coverage_class, 0); 730 mt7603_mac_set_timing(dev); 731 mutex_unlock(&dev->mt76.mutex); 732 } 733 734 static void mt7603_tx(struct ieee80211_hw *hw, 735 struct ieee80211_tx_control *control, 736 struct sk_buff *skb) 737 { 738 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 739 struct ieee80211_vif *vif = info->control.vif; 740 struct mt7603_dev *dev = hw->priv; 741 struct mt76_wcid *wcid = &dev->global_sta.wcid; 742 743 if (control->sta) { 744 struct mt7603_sta *msta; 745 746 msta = (struct mt7603_sta *)control->sta->drv_priv; 747 wcid = &msta->wcid; 748 } else if (vif) { 749 struct mt7603_vif *mvif; 750 751 mvif = (struct mt7603_vif *)vif->drv_priv; 752 wcid = &mvif->sta.wcid; 753 } 754 755 mt76_tx(&dev->mphy, control->sta, wcid, skb); 756 } 757 758 const struct ieee80211_ops mt7603_ops = { 759 .add_chanctx = ieee80211_emulate_add_chanctx, 760 .remove_chanctx = ieee80211_emulate_remove_chanctx, 761 .change_chanctx = ieee80211_emulate_change_chanctx, 762 .switch_vif_chanctx = ieee80211_emulate_switch_vif_chanctx, 763 .tx = mt7603_tx, 764 .start = mt7603_start, 765 .stop = mt7603_stop, 766 .add_interface = mt7603_add_interface, 767 .remove_interface = mt7603_remove_interface, 768 .config = mt7603_config, 769 .configure_filter = mt7603_configure_filter, 770 .bss_info_changed = mt7603_bss_info_changed, 771 .sta_state = mt76_sta_state, 772 .sta_pre_rcu_remove = mt76_sta_pre_rcu_remove, 773 .set_key = mt7603_set_key, 774 .conf_tx = mt7603_conf_tx, 775 .sw_scan_start = mt76_sw_scan, 776 .sw_scan_complete = mt76_sw_scan_complete, 777 .flush = mt7603_flush, 778 .ampdu_action = mt7603_ampdu_action, 779 .get_txpower = mt76_get_txpower, 780 .wake_tx_queue = mt76_wake_tx_queue, 781 .sta_rate_tbl_update = mt7603_sta_rate_tbl_update, 782 .release_buffered_frames = mt7603_release_buffered_frames, 783 .set_coverage_class = mt7603_set_coverage_class, 784 .set_tim = mt76_set_tim, 785 .get_survey = mt76_get_survey, 786 .get_antenna = mt76_get_antenna, 787 .set_sar_specs = mt7603_set_sar_specs, 788 }; 789 790 MODULE_DESCRIPTION("MediaTek MT7603E and MT76x8 wireless driver"); 791 MODULE_LICENSE("Dual BSD/GPL"); 792 793 static int __init mt7603_init(void) 794 { 795 int ret; 796 797 ret = platform_driver_register(&mt76_wmac_driver); 798 if (ret) 799 return ret; 800 801 #ifdef CONFIG_PCI 802 ret = pci_register_driver(&mt7603_pci_driver); 803 if (ret) 804 platform_driver_unregister(&mt76_wmac_driver); 805 #endif 806 return ret; 807 } 808 809 static void __exit mt7603_exit(void) 810 { 811 #ifdef CONFIG_PCI 812 pci_unregister_driver(&mt7603_pci_driver); 813 #endif 814 platform_driver_unregister(&mt76_wmac_driver); 815 } 816 817 module_init(mt7603_init); 818 module_exit(mt7603_exit); 819