xref: /linux/drivers/gpu/drm/sti/sti_dvo.c (revision 3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) STMicroelectronics SA 2014
4  * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
5  */
6 
7 #include <linux/clk.h>
8 #include <linux/component.h>
9 #include <linux/debugfs.h>
10 #include <linux/io.h>
11 #include <linux/module.h>
12 #include <linux/of.h>
13 #include <linux/platform_device.h>
14 
15 #include <drm/drm_atomic_helper.h>
16 #include <drm/drm_bridge.h>
17 #include <drm/drm_device.h>
18 #include <drm/drm_panel.h>
19 #include <drm/drm_print.h>
20 #include <drm/drm_probe_helper.h>
21 
22 #include "sti_awg_utils.h"
23 #include "sti_drv.h"
24 #include "sti_mixer.h"
25 
26 /* DVO registers */
27 #define DVO_AWG_DIGSYNC_CTRL      0x0000
28 #define DVO_DOF_CFG               0x0004
29 #define DVO_LUT_PROG_LOW          0x0008
30 #define DVO_LUT_PROG_MID          0x000C
31 #define DVO_LUT_PROG_HIGH         0x0010
32 #define DVO_DIGSYNC_INSTR_I       0x0100
33 
34 #define DVO_AWG_CTRL_EN           BIT(0)
35 #define DVO_AWG_FRAME_BASED_SYNC  BIT(2)
36 
37 #define DVO_DOF_EN_LOWBYTE        BIT(0)
38 #define DVO_DOF_EN_MIDBYTE        BIT(1)
39 #define DVO_DOF_EN_HIGHBYTE       BIT(2)
40 #define DVO_DOF_EN                BIT(6)
41 #define DVO_DOF_MOD_COUNT_SHIFT   8
42 
43 #define DVO_LUT_ZERO              0
44 #define DVO_LUT_Y_G               1
45 #define DVO_LUT_Y_G_DEL           2
46 #define DVO_LUT_CB_B              3
47 #define DVO_LUT_CB_B_DEL          4
48 #define DVO_LUT_CR_R              5
49 #define DVO_LUT_CR_R_DEL          6
50 #define DVO_LUT_HOLD              7
51 
52 struct dvo_config {
53 	u32 flags;
54 	u32 lowbyte;
55 	u32 midbyte;
56 	u32 highbyte;
57 	int (*awg_fwgen_fct)(
58 			struct awg_code_generation_params *fw_gen_params,
59 			struct awg_timing *timing);
60 };
61 
62 static struct dvo_config rgb_24bit_de_cfg = {
63 	.flags         = (0L << DVO_DOF_MOD_COUNT_SHIFT),
64 	.lowbyte       = DVO_LUT_CR_R,
65 	.midbyte       = DVO_LUT_Y_G,
66 	.highbyte      = DVO_LUT_CB_B,
67 	.awg_fwgen_fct = sti_awg_generate_code_data_enable_mode,
68 };
69 
70 /*
71  * STI digital video output structure
72  *
73  * @dev: driver device
74  * @drm_dev: pointer to drm device
75  * @mode: current display mode selected
76  * @regs: dvo registers
77  * @clk_pix: pixel clock for dvo
78  * @clk: clock for dvo
79  * @clk_main_parent: dvo parent clock if main path used
80  * @clk_aux_parent: dvo parent clock if aux path used
81  * @panel_node: panel node reference from device tree
82  * @panel: reference to the panel connected to the dvo
83  * @enabled: true if dvo is enabled else false
84  * @encoder: drm_encoder it is bound
85  */
86 struct sti_dvo {
87 	struct device dev;
88 	struct drm_device *drm_dev;
89 	struct drm_display_mode mode;
90 	void __iomem *regs;
91 	struct clk *clk_pix;
92 	struct clk *clk;
93 	struct clk *clk_main_parent;
94 	struct clk *clk_aux_parent;
95 	struct device_node *panel_node;
96 	struct drm_panel *panel;
97 	struct dvo_config *config;
98 	bool enabled;
99 	struct drm_encoder *encoder;
100 	struct drm_bridge bridge;
101 };
102 
103 struct sti_dvo_connector {
104 	struct drm_connector drm_connector;
105 	struct drm_encoder *encoder;
106 	struct sti_dvo *dvo;
107 };
108 
109 #define to_sti_dvo_connector(x) \
110 	container_of(x, struct sti_dvo_connector, drm_connector)
111 
112 #define BLANKING_LEVEL 16
113 static int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code)
114 {
115 	struct drm_display_mode *mode = &dvo->mode;
116 	struct dvo_config *config = dvo->config;
117 	struct awg_code_generation_params fw_gen_params;
118 	struct awg_timing timing;
119 
120 	fw_gen_params.ram_code = ram_code;
121 	fw_gen_params.instruction_offset = 0;
122 
123 	timing.total_lines = mode->vtotal;
124 	timing.active_lines = mode->vdisplay;
125 	timing.blanking_lines = mode->vsync_start - mode->vdisplay;
126 	timing.trailing_lines = mode->vtotal - mode->vsync_start;
127 	timing.total_pixels = mode->htotal;
128 	timing.active_pixels = mode->hdisplay;
129 	timing.blanking_pixels = mode->hsync_start - mode->hdisplay;
130 	timing.trailing_pixels = mode->htotal - mode->hsync_start;
131 	timing.blanking_level = BLANKING_LEVEL;
132 
133 	if (config->awg_fwgen_fct(&fw_gen_params, &timing)) {
134 		DRM_ERROR("AWG firmware not properly generated\n");
135 		return -EINVAL;
136 	}
137 
138 	*ram_size = fw_gen_params.instruction_offset;
139 
140 	return 0;
141 }
142 
143 /* Configure AWG, writing instructions
144  *
145  * @dvo: pointer to DVO structure
146  * @awg_ram_code: pointer to AWG instructions table
147  * @nb: nb of AWG instructions
148  */
149 static void dvo_awg_configure(struct sti_dvo *dvo, u32 *awg_ram_code, int nb)
150 {
151 	int i;
152 
153 	DRM_DEBUG_DRIVER("\n");
154 
155 	for (i = 0; i < nb; i++)
156 		writel(awg_ram_code[i],
157 		       dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
158 	for (i = nb; i < AWG_MAX_INST; i++)
159 		writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
160 
161 	writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
162 }
163 
164 #define DBGFS_DUMP(reg) seq_printf(s, "\n  %-25s 0x%08X", #reg, \
165 				   readl(dvo->regs + reg))
166 
167 static void dvo_dbg_awg_microcode(struct seq_file *s, void __iomem *reg)
168 {
169 	unsigned int i;
170 
171 	seq_puts(s, "\n\n");
172 	seq_puts(s, "  DVO AWG microcode:");
173 	for (i = 0; i < AWG_MAX_INST; i++) {
174 		if (i % 8 == 0)
175 			seq_printf(s, "\n  %04X:", i);
176 		seq_printf(s, " %04X", readl(reg + i * 4));
177 	}
178 }
179 
180 static int dvo_dbg_show(struct seq_file *s, void *data)
181 {
182 	struct drm_info_node *node = s->private;
183 	struct sti_dvo *dvo = (struct sti_dvo *)node->info_ent->data;
184 
185 	seq_printf(s, "DVO: (vaddr = 0x%p)", dvo->regs);
186 	DBGFS_DUMP(DVO_AWG_DIGSYNC_CTRL);
187 	DBGFS_DUMP(DVO_DOF_CFG);
188 	DBGFS_DUMP(DVO_LUT_PROG_LOW);
189 	DBGFS_DUMP(DVO_LUT_PROG_MID);
190 	DBGFS_DUMP(DVO_LUT_PROG_HIGH);
191 	dvo_dbg_awg_microcode(s, dvo->regs + DVO_DIGSYNC_INSTR_I);
192 	seq_putc(s, '\n');
193 	return 0;
194 }
195 
196 static struct drm_info_list dvo_debugfs_files[] = {
197 	{ "dvo", dvo_dbg_show, 0, NULL },
198 };
199 
200 static void dvo_debugfs_init(struct sti_dvo *dvo, struct drm_minor *minor)
201 {
202 	unsigned int i;
203 
204 	for (i = 0; i < ARRAY_SIZE(dvo_debugfs_files); i++)
205 		dvo_debugfs_files[i].data = dvo;
206 
207 	drm_debugfs_create_files(dvo_debugfs_files,
208 				 ARRAY_SIZE(dvo_debugfs_files),
209 				 minor->debugfs_root, minor);
210 }
211 
212 static void sti_dvo_disable(struct drm_bridge *bridge,
213 			    struct drm_atomic_commit *commit)
214 {
215 	struct sti_dvo *dvo = bridge->driver_private;
216 
217 	if (!dvo->enabled)
218 		return;
219 
220 	DRM_DEBUG_DRIVER("\n");
221 
222 	if (dvo->config->awg_fwgen_fct)
223 		writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
224 
225 	writel(0x00000000, dvo->regs + DVO_DOF_CFG);
226 
227 	drm_panel_disable(dvo->panel);
228 
229 	/* Disable/unprepare dvo clock */
230 	clk_disable_unprepare(dvo->clk_pix);
231 	clk_disable_unprepare(dvo->clk);
232 
233 	dvo->enabled = false;
234 }
235 
236 static void sti_dvo_pre_enable(struct drm_bridge *bridge,
237 			       struct drm_atomic_commit *commit)
238 {
239 	struct sti_dvo *dvo = bridge->driver_private;
240 	struct dvo_config *config = dvo->config;
241 	u32 val;
242 
243 	DRM_DEBUG_DRIVER("\n");
244 
245 	if (dvo->enabled)
246 		return;
247 
248 	/* Make sure DVO is disabled */
249 	writel(0x00000000, dvo->regs + DVO_DOF_CFG);
250 	writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
251 
252 	if (config->awg_fwgen_fct) {
253 		u8 nb_instr;
254 		u32 awg_ram_code[AWG_MAX_INST];
255 		/* Configure AWG */
256 		if (!dvo_awg_generate_code(dvo, &nb_instr, awg_ram_code))
257 			dvo_awg_configure(dvo, awg_ram_code, nb_instr);
258 		else
259 			return;
260 	}
261 
262 	/* Prepare/enable clocks */
263 	if (clk_prepare_enable(dvo->clk_pix))
264 		DRM_ERROR("Failed to prepare/enable dvo_pix clk\n");
265 	if (clk_prepare_enable(dvo->clk))
266 		DRM_ERROR("Failed to prepare/enable dvo clk\n");
267 
268 	drm_panel_enable(dvo->panel);
269 
270 	/* Set LUT */
271 	writel(config->lowbyte,  dvo->regs + DVO_LUT_PROG_LOW);
272 	writel(config->midbyte,  dvo->regs + DVO_LUT_PROG_MID);
273 	writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH);
274 
275 	/* Digital output formatter config */
276 	val = (config->flags | DVO_DOF_EN);
277 	writel(val, dvo->regs + DVO_DOF_CFG);
278 
279 	dvo->enabled = true;
280 }
281 
282 static void sti_dvo_set_mode(struct drm_bridge *bridge,
283 			     const struct drm_display_mode *mode,
284 			     const struct drm_display_mode *adjusted_mode)
285 {
286 	struct sti_dvo *dvo = bridge->driver_private;
287 	struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc);
288 	int rate = mode->clock * 1000;
289 	struct clk *clkp;
290 	int ret;
291 
292 	DRM_DEBUG_DRIVER("\n");
293 
294 	drm_mode_copy(&dvo->mode, mode);
295 
296 	/* According to the path used (main or aux), the dvo clocks should
297 	 * have a different parent clock. */
298 	if (mixer->id == STI_MIXER_MAIN)
299 		clkp = dvo->clk_main_parent;
300 	else
301 		clkp = dvo->clk_aux_parent;
302 
303 	if (clkp) {
304 		clk_set_parent(dvo->clk_pix, clkp);
305 		clk_set_parent(dvo->clk, clkp);
306 	}
307 
308 	/* DVO clocks = compositor clock */
309 	ret = clk_set_rate(dvo->clk_pix, rate);
310 	if (ret < 0) {
311 		DRM_ERROR("Cannot set rate (%dHz) for dvo_pix clk\n", rate);
312 		return;
313 	}
314 
315 	ret = clk_set_rate(dvo->clk, rate);
316 	if (ret < 0) {
317 		DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate);
318 		return;
319 	}
320 
321 	/* For now, we only support 24bit data enable (DE) synchro format */
322 	dvo->config = &rgb_24bit_de_cfg;
323 }
324 
325 static void sti_dvo_bridge_nope(struct drm_bridge *bridge,
326 				struct drm_atomic_commit *commit)
327 {
328 	/* do nothing */
329 }
330 
331 static const struct drm_bridge_funcs sti_dvo_bridge_funcs = {
332 	.atomic_create_state = drm_atomic_helper_bridge_create_state,
333 	.atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
334 	.atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
335 	.atomic_pre_enable = sti_dvo_pre_enable,
336 	.atomic_enable = sti_dvo_bridge_nope,
337 	.atomic_disable = sti_dvo_disable,
338 	.atomic_post_disable = sti_dvo_bridge_nope,
339 	.mode_set = sti_dvo_set_mode,
340 };
341 
342 static int sti_dvo_connector_get_modes(struct drm_connector *connector)
343 {
344 	struct sti_dvo_connector *dvo_connector
345 		= to_sti_dvo_connector(connector);
346 	struct sti_dvo *dvo = dvo_connector->dvo;
347 
348 	if (dvo->panel)
349 		return drm_panel_get_modes(dvo->panel, connector);
350 
351 	return 0;
352 }
353 
354 #define CLK_TOLERANCE_HZ 50
355 
356 static enum drm_mode_status
357 sti_dvo_connector_mode_valid(struct drm_connector *connector,
358 			     const struct drm_display_mode *mode)
359 {
360 	int target = mode->clock * 1000;
361 	int target_min = target - CLK_TOLERANCE_HZ;
362 	int target_max = target + CLK_TOLERANCE_HZ;
363 	int result;
364 	struct sti_dvo_connector *dvo_connector
365 		= to_sti_dvo_connector(connector);
366 	struct sti_dvo *dvo = dvo_connector->dvo;
367 
368 	result = clk_round_rate(dvo->clk_pix, target);
369 
370 	DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
371 			 target, result);
372 
373 	if ((result < target_min) || (result > target_max)) {
374 		DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target);
375 		return MODE_BAD;
376 	}
377 
378 	return MODE_OK;
379 }
380 
381 static const
382 struct drm_connector_helper_funcs sti_dvo_connector_helper_funcs = {
383 	.get_modes = sti_dvo_connector_get_modes,
384 	.mode_valid = sti_dvo_connector_mode_valid,
385 };
386 
387 static enum drm_connector_status
388 sti_dvo_connector_detect(struct drm_connector *connector, bool force)
389 {
390 	struct sti_dvo_connector *dvo_connector
391 		= to_sti_dvo_connector(connector);
392 	struct sti_dvo *dvo = dvo_connector->dvo;
393 
394 	DRM_DEBUG_DRIVER("\n");
395 
396 	if (!dvo->panel) {
397 		dvo->panel = of_drm_find_panel(dvo->panel_node);
398 		if (IS_ERR(dvo->panel))
399 			dvo->panel = NULL;
400 	}
401 
402 	if (dvo->panel)
403 		return connector_status_connected;
404 
405 	return connector_status_disconnected;
406 }
407 
408 static int sti_dvo_late_register(struct drm_connector *connector)
409 {
410 	struct sti_dvo_connector *dvo_connector
411 		= to_sti_dvo_connector(connector);
412 	struct sti_dvo *dvo = dvo_connector->dvo;
413 
414 	dvo_debugfs_init(dvo, dvo->drm_dev->primary);
415 
416 	return 0;
417 }
418 
419 static const struct drm_connector_funcs sti_dvo_connector_funcs = {
420 	.fill_modes = drm_helper_probe_single_connector_modes,
421 	.detect = sti_dvo_connector_detect,
422 	.destroy = drm_connector_cleanup,
423 	.reset = drm_atomic_helper_connector_reset,
424 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
425 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
426 	.late_register = sti_dvo_late_register,
427 };
428 
429 static struct drm_encoder *sti_dvo_find_encoder(struct drm_device *dev)
430 {
431 	struct drm_encoder *encoder;
432 
433 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
434 		if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS)
435 			return encoder;
436 	}
437 
438 	return NULL;
439 }
440 
441 static int sti_dvo_bind(struct device *dev, struct device *master, void *data)
442 {
443 	struct sti_dvo *dvo = dev_get_drvdata(dev);
444 	struct drm_device *drm_dev = data;
445 	struct drm_encoder *encoder;
446 	struct sti_dvo_connector *connector;
447 	struct drm_connector *drm_connector;
448 	int err;
449 
450 	/* Set the drm device handle */
451 	dvo->drm_dev = drm_dev;
452 
453 	encoder = sti_dvo_find_encoder(drm_dev);
454 	if (!encoder)
455 		return -ENOMEM;
456 
457 	connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
458 	if (!connector)
459 		return -ENOMEM;
460 
461 	connector->dvo = dvo;
462 
463 	dvo->bridge.driver_private = dvo;
464 	dvo->bridge.of_node = dvo->dev.of_node;
465 	drm_bridge_add(&dvo->bridge);
466 
467 	err = drm_bridge_attach(encoder, &dvo->bridge, NULL, 0);
468 	if (err)
469 		return err;
470 
471 	connector->encoder = encoder;
472 	dvo->encoder = encoder;
473 
474 	drm_connector = (struct drm_connector *)connector;
475 
476 	drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
477 
478 	drm_connector_init(drm_dev, drm_connector,
479 			   &sti_dvo_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
480 	drm_connector_helper_add(drm_connector,
481 				 &sti_dvo_connector_helper_funcs);
482 
483 	err = drm_connector_attach_encoder(drm_connector, encoder);
484 	if (err) {
485 		DRM_ERROR("Failed to attach a connector to a encoder\n");
486 		goto err_sysfs;
487 	}
488 
489 	return 0;
490 
491 err_sysfs:
492 	drm_bridge_remove(&dvo->bridge);
493 	return -EINVAL;
494 }
495 
496 static void sti_dvo_unbind(struct device *dev,
497 			   struct device *master, void *data)
498 {
499 	struct sti_dvo *dvo = dev_get_drvdata(dev);
500 
501 	if (dvo->panel)
502 		drm_panel_put(dvo->panel);
503 
504 	drm_bridge_remove(&dvo->bridge);
505 }
506 
507 static const struct component_ops sti_dvo_ops = {
508 	.bind = sti_dvo_bind,
509 	.unbind = sti_dvo_unbind,
510 };
511 
512 static int sti_dvo_probe(struct platform_device *pdev)
513 {
514 	struct device *dev = &pdev->dev;
515 	struct sti_dvo *dvo;
516 	struct device_node *np = dev->of_node;
517 
518 	DRM_INFO("%s\n", __func__);
519 
520 	dvo = devm_drm_bridge_alloc(dev, struct sti_dvo, bridge, &sti_dvo_bridge_funcs);
521 	if (IS_ERR(dvo)) {
522 		DRM_ERROR("Failed to allocate DVO\n");
523 		return PTR_ERR(dvo);
524 	}
525 
526 	dvo->dev = pdev->dev;
527 	dvo->regs = devm_platform_ioremap_resource_byname(pdev, "dvo-reg");
528 	if (IS_ERR(dvo->regs))
529 		return PTR_ERR(dvo->regs);
530 
531 	dvo->clk_pix = devm_clk_get(dev, "dvo_pix");
532 	if (IS_ERR(dvo->clk_pix)) {
533 		DRM_ERROR("Cannot get dvo_pix clock\n");
534 		return PTR_ERR(dvo->clk_pix);
535 	}
536 
537 	dvo->clk = devm_clk_get(dev, "dvo");
538 	if (IS_ERR(dvo->clk)) {
539 		DRM_ERROR("Cannot get dvo clock\n");
540 		return PTR_ERR(dvo->clk);
541 	}
542 
543 	dvo->clk_main_parent = devm_clk_get(dev, "main_parent");
544 	if (IS_ERR(dvo->clk_main_parent)) {
545 		DRM_DEBUG_DRIVER("Cannot get main_parent clock\n");
546 		dvo->clk_main_parent = NULL;
547 	}
548 
549 	dvo->clk_aux_parent = devm_clk_get(dev, "aux_parent");
550 	if (IS_ERR(dvo->clk_aux_parent)) {
551 		DRM_DEBUG_DRIVER("Cannot get aux_parent clock\n");
552 		dvo->clk_aux_parent = NULL;
553 	}
554 
555 	dvo->panel_node = of_parse_phandle(np, "sti,panel", 0);
556 	if (!dvo->panel_node)
557 		DRM_ERROR("No panel associated to the dvo output\n");
558 	of_node_put(dvo->panel_node);
559 
560 	platform_set_drvdata(pdev, dvo);
561 
562 	return component_add(&pdev->dev, &sti_dvo_ops);
563 }
564 
565 static void sti_dvo_remove(struct platform_device *pdev)
566 {
567 	component_del(&pdev->dev, &sti_dvo_ops);
568 }
569 
570 static const struct of_device_id dvo_of_match[] = {
571 	{ .compatible = "st,stih407-dvo", },
572 	{ /* end node */ }
573 };
574 MODULE_DEVICE_TABLE(of, dvo_of_match);
575 
576 struct platform_driver sti_dvo_driver = {
577 	.driver = {
578 		.name = "sti-dvo",
579 		.of_match_table = dvo_of_match,
580 	},
581 	.probe = sti_dvo_probe,
582 	.remove = sti_dvo_remove,
583 };
584 
585 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
586 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
587 MODULE_LICENSE("GPL");
588