1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* Copyright (c) 2020-2021 Microchip Technology Inc */ 3 4/dts-v1/; 5 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/interrupt-controller/irq.h> 8#include "mpfs.dtsi" 9#include "mpfs-beaglev-fire-fabric.dtsi" 10 11/* Clock frequency (in Hz) of MTIMER */ 12#define MTIMER_FREQ 1000000 13 14/ { 15 #address-cells = <2>; 16 #size-cells = <2>; 17 model = "BeagleBoard BeagleV-Fire"; 18 compatible = "beagle,beaglev-fire", "microchip,mpfs"; 19 20 aliases { 21 serial0 = &mmuart0; 22 serial1 = &mmuart1; 23 serial2 = &mmuart2; 24 serial3 = &mmuart3; 25 serial4 = &mmuart4; 26 }; 27 28 chosen { 29 stdout-path = "serial0:115200n8"; 30 }; 31 32 cpus { 33 timebase-frequency = <MTIMER_FREQ>; 34 }; 35 36 ddrc_cache_lo: memory@80000000 { 37 device_type = "memory"; 38 reg = <0x0 0x80000000 0x0 0x40000000>; 39 status = "okay"; 40 }; 41 42 reserved-memory { 43 #address-cells = <2>; 44 #size-cells = <2>; 45 ranges; 46 47 hss: hss-buffer@103fc00000 { 48 compatible = "shared-dma-pool"; 49 reg = <0x10 0x3fc00000 0x0 0x400000>; 50 no-map; 51 }; 52 }; 53 54 imx219_clk: camera-clk { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <24000000>; 58 }; 59 60 imx219_vana: fixedregulator-0 { 61 compatible = "regulator-fixed"; 62 regulator-name = "imx219_vana"; 63 regulator-min-microvolt = <2800000>; 64 regulator-max-microvolt = <2800000>; 65 }; 66 67 imx219_vdig: regulator-1v8 { 68 compatible = "regulator-fixed"; 69 regulator-name = "imx219_vdig"; 70 regulator-min-microvolt = <1800000>; 71 regulator-max-microvolt = <1800000>; 72 }; 73 74 imx219_vddl: regulator-1v2 { 75 compatible = "regulator-fixed"; 76 regulator-name = "imx219_vddl"; 77 regulator-min-microvolt = <1200000>; 78 regulator-max-microvolt = <1200000>; 79 }; 80 81 regulator-1v8-syzygy { 82 compatible = "regulator-fixed"; 83 gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>; 84 regulator-name = "syzygy_1v8"; 85 regulator-min-microvolt = <1800000>; 86 regulator-max-microvolt = <1800000>; 87 regulator-always-on; 88 enable-active-high; 89 }; 90}; 91 92&gpio0 { 93 interrupts = <13>, <14>, <15>, <16>, 94 <17>, <18>, <19>, <20>, 95 <21>, <22>, <23>, <24>, 96 <25>, <26>; 97 ngpios = <14>; 98 gpio-line-names = "", "", "", "", "", "", "", 99 "", "", "", "", "", "SD_CARD_CS", "USER_BUTTON"; 100 status = "okay"; 101}; 102 103&gpio1 { 104 interrupts = <27>, <28>, <29>, <30>, 105 <31>, <32>, <33>, <34>, 106 <35>, <36>, <37>, <38>, 107 <39>, <40>, <41>, <42>, 108 <43>, <44>, <45>, <46>, 109 <47>, <48>, <49>, <50>; 110 ngpios = <24>; 111 gpio-line-names = "", "", "", "", "", "", "", "", "", "", 112 "", "", "", "", "", "", "", "", "", "", 113 "ADC_IRQn", "", "", "USB_OCn"; 114 status = "okay"; 115}; 116 117&gpio2 { 118 interrupts = <53>, <53>, <53>, <53>, 119 <53>, <53>, <53>, <53>, 120 <53>, <53>, <53>, <53>, 121 <53>, <53>, <53>, <53>, 122 <53>, <53>, <53>, <53>, 123 <53>, <53>, <53>, <53>, 124 <53>, <53>, <53>, <53>, 125 <53>, <53>, <53>, <53>; 126 ngpios = <32>; 127 gpio-line-names = "P8_PIN3_USER_LED_0", "P8_PIN4_USER_LED_1", "P8_PIN5_USER_LED_2", 128 "P8_PIN6_USER_LED_3", "P8_PIN7_USER_LED_4", "P8_PIN8_USER_LED_5", 129 "P8_PIN9_USER_LED_6", "P8_PIN10_USER_LED_7", "P8_PIN11_USER_LED_8", 130 "P8_PIN12_USER_LED_9", "P8_PIN13_USER_LED_10", "P8_PIN14_USER_LED_11", 131 "P8_PIN15", "P8_PIN16", "P8_PIN17", "P8_PIN18", "P8_PIN19", "P8_PIN20", 132 "P8_PIN21", "P8_PIN22", "P8_PIN23", "P8_PIN24", "P8_PIN25", "P8_PIN26", 133 "P8_PIN27", "P8_PIN28", "P8_PIN29", "P8_PIN30", "M2_W_DISABLE1", 134 "M2_W_DISABLE2", "VIO_ENABLE", "SD_DET"; 135 status = "okay"; 136}; 137 138&i2c0 { 139 status = "okay"; 140}; 141 142&i2c1 { 143 status = "okay"; 144 145 eeprom: eeprom@50 { 146 compatible = "atmel,24c32"; 147 reg = <0x50>; 148 }; 149 150 imx219: sensor@10 { 151 compatible = "sony,imx219"; 152 reg = <0x10>; 153 clocks = <&imx219_clk>; 154 VANA-supply = <&imx219_vana>; /* 2.8v */ 155 VDIG-supply = <&imx219_vdig>; /* 1.8v */ 156 VDDL-supply = <&imx219_vddl>; /* 1.2v */ 157 158 port { 159 imx219_0: endpoint { 160 data-lanes = <1 2>; 161 clock-noncontinuous; 162 link-frequencies = /bits/ 64 <456000000>; 163 }; 164 }; 165 }; 166}; 167 168&irqmux { 169 interrupt-map = <0 &plic 13>, <1 &plic 14>, <2 &plic 15>, 170 <3 &plic 16>, <4 &plic 17>, <5 &plic 18>, 171 <6 &plic 19>, <7 &plic 20>, <8 &plic 21>, 172 <9 &plic 22>, <10 &plic 23>, <11 &plic 24>, 173 <12 &plic 25>, <13 &plic 26>, 174 175 <32 &plic 27>, <33 &plic 28>, <34 &plic 29>, 176 <35 &plic 30>, <36 &plic 31>, <37 &plic 32>, 177 <38 &plic 33>, <39 &plic 34>, <40 &plic 35>, 178 <41 &plic 36>, <42 &plic 37>, <43 &plic 38>, 179 <44 &plic 39>, <45 &plic 40>, <46 &plic 41>, 180 <47 &plic 42>, <48 &plic 43>, <49 &plic 44>, 181 <50 &plic 45>, <51 &plic 46>, <52 &plic 47>, 182 <53 &plic 48>, <54 &plic 49>, <55 &plic 50>, 183 184 <64 &plic 53>, <65 &plic 53>, <66 &plic 53>, 185 <67 &plic 53>, <68 &plic 53>, <69 &plic 53>, 186 <70 &plic 53>, <71 &plic 53>, <72 &plic 53>, 187 <73 &plic 53>, <74 &plic 53>, <75 &plic 53>, 188 <76 &plic 53>, <77 &plic 53>, <78 &plic 53>, 189 <79 &plic 53>, <80 &plic 53>, <81 &plic 53>, 190 <82 &plic 53>, <83 &plic 53>, <84 &plic 53>, 191 <85 &plic 53>, <86 &plic 53>, <87 &plic 53>, 192 <88 &plic 53>, <89 &plic 53>, <90 &plic 53>, 193 <91 &plic 53>, <92 &plic 53>, <93 &plic 53>, 194 <94 &plic 53>, <95 &plic 53>; 195}; 196 197&mac0 { 198 status = "okay"; 199 phy-mode = "sgmii"; 200 phy-handle = <&phy0>; 201 phy0: ethernet-phy@0 { 202 reg = <0>; 203 }; 204}; 205 206&mbox { 207 status = "okay"; 208}; 209 210&mmc { 211 bus-width = <4>; 212 disable-wp; 213 cap-sd-highspeed; 214 cap-mmc-highspeed; 215 mmc-ddr-1_8v; 216 mmc-hs200-1_8v; 217 sd-uhs-sdr12; 218 sd-uhs-sdr25; 219 sd-uhs-sdr50; 220 sd-uhs-sdr104; 221 status = "okay"; 222}; 223 224&mmuart0 { 225 status = "okay"; 226}; 227 228&mmuart1 { 229 status = "okay"; 230}; 231 232&refclk { 233 clock-frequency = <125000000>; 234}; 235 236&refclk_ccc { 237 clock-frequency = <50000000>; 238}; 239 240&rtc { 241 status = "okay"; 242}; 243 244&spi0 { 245 status = "okay"; 246}; 247 248&spi1 { 249 status = "okay"; 250}; 251 252&qspi { 253 status = "okay"; 254 cs-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>, <&gpio0 12 GPIO_ACTIVE_LOW>; 255 num-cs = <2>; 256 257 adc@0 { 258 compatible = "microchip,mcp3464r"; 259 reg = <0>; /* CE0 */ 260 spi-cpol; 261 spi-cpha; 262 spi-max-frequency = <5000000>; 263 microchip,hw-device-address = <1>; 264 interrupts-extended = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>; 265 #address-cells = <1>; 266 #size-cells = <0>; 267 status = "okay"; 268 269 channel@0 { 270 /* CH0 to AGND */ 271 reg = <0>; 272 label = "CH0"; 273 }; 274 275 channel@1 { 276 /* CH1 to AGND */ 277 reg = <1>; 278 label = "CH1"; 279 }; 280 281 channel@2 { 282 /* CH2 to AGND */ 283 reg = <2>; 284 label = "CH2"; 285 }; 286 287 channel@3 { 288 /* CH3 to AGND */ 289 reg = <3>; 290 label = "CH3"; 291 }; 292 293 channel@4 { 294 /* CH4 to AGND */ 295 reg = <4>; 296 label = "CH4"; 297 }; 298 299 channel@5 { 300 /* CH5 to AGND */ 301 reg = <5>; 302 label = "CH5"; 303 }; 304 305 channel@6 { 306 /* CH6 to AGND */ 307 reg = <6>; 308 label = "CH6"; 309 }; 310 311 channel@7 { 312 /* CH7 is connected to AGND */ 313 reg = <7>; 314 label = "CH7"; 315 }; 316 }; 317 318 mmc@1 { 319 compatible = "mmc-spi-slot"; 320 reg = <1>; 321 cd-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>; 322 voltage-ranges = <3300 3300>; 323 spi-max-frequency = <5000000>; 324 disable-wp; 325 }; 326}; 327 328 329&syscontroller { 330 microchip,bitstream-flash = <&sys_ctrl_flash>; 331}; 332 333&syscontroller_qspi { 334 status = "okay"; 335 336 sys_ctrl_flash: flash@0 { // MT25QL01GBBB8ESF-0SIT 337 compatible = "jedec,spi-nor"; 338 #address-cells = <1>; 339 #size-cells = <1>; 340 spi-max-frequency = <20000000>; 341 spi-rx-bus-width = <1>; 342 reg = <0>; 343 }; 344}; 345 346&usb { 347 status = "okay"; 348 dr_mode = "otg"; 349}; 350