xref: /linux/arch/x86/kernel/asm-offsets.c (revision 69050f8d6d075dc01af7a5f2f550a8067510366f)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Generate definitions needed by assembly language modules.
4  * This code generates raw asm output which is post-processed to extract
5  * and format the required data.
6  */
7 #define COMPILE_OFFSETS
8 
9 #include <linux/crypto.h>
10 #include <crypto/aria.h>
11 #include <linux/sched.h>
12 #include <linux/stddef.h>
13 #include <linux/hardirq.h>
14 #include <linux/suspend.h>
15 #include <linux/kbuild.h>
16 #include <asm/processor.h>
17 #include <asm/thread_info.h>
18 #include <asm/sigframe.h>
19 #include <asm/bootparam.h>
20 #include <asm/suspend.h>
21 #include <asm/tlbflush.h>
22 #include <asm/tdx.h>
23 
24 #ifdef CONFIG_XEN
25 #include <xen/interface/xen.h>
26 #endif
27 
28 #ifdef CONFIG_X86_32
29 # include "asm-offsets_32.c"
30 #else
31 # include "asm-offsets_64.c"
32 #endif
33 
34 static void __used common(void)
35 {
36 	OFFSET(CPUINFO_x86, cpuinfo_x86, x86);
37 	OFFSET(CPUINFO_x86_vendor, cpuinfo_x86, x86_vendor);
38 	OFFSET(CPUINFO_x86_model, cpuinfo_x86, x86_model);
39 	OFFSET(CPUINFO_x86_stepping, cpuinfo_x86, x86_stepping);
40 	OFFSET(CPUINFO_cpuid_level, cpuinfo_x86, cpuid_level);
41 	OFFSET(CPUINFO_x86_capability, cpuinfo_x86, x86_capability);
42 	OFFSET(CPUINFO_x86_vendor_id, cpuinfo_x86, x86_vendor_id);
43 
44 	BLANK();
45 	OFFSET(TASK_threadsp, task_struct, thread.sp);
46 #ifdef CONFIG_STACKPROTECTOR
47 	OFFSET(TASK_stack_canary, task_struct, stack_canary);
48 #endif
49 
50 	BLANK();
51 	OFFSET(pbe_address, pbe, address);
52 	OFFSET(pbe_orig_address, pbe, orig_address);
53 	OFFSET(pbe_next, pbe, next);
54 
55 #if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)
56 	BLANK();
57 	OFFSET(IA32_SIGCONTEXT_ax, sigcontext_32, ax);
58 	OFFSET(IA32_SIGCONTEXT_bx, sigcontext_32, bx);
59 	OFFSET(IA32_SIGCONTEXT_cx, sigcontext_32, cx);
60 	OFFSET(IA32_SIGCONTEXT_dx, sigcontext_32, dx);
61 	OFFSET(IA32_SIGCONTEXT_si, sigcontext_32, si);
62 	OFFSET(IA32_SIGCONTEXT_di, sigcontext_32, di);
63 	OFFSET(IA32_SIGCONTEXT_bp, sigcontext_32, bp);
64 	OFFSET(IA32_SIGCONTEXT_sp, sigcontext_32, sp);
65 	OFFSET(IA32_SIGCONTEXT_ip, sigcontext_32, ip);
66 	OFFSET(IA32_SIGCONTEXT_es, sigcontext_32, es);
67 	OFFSET(IA32_SIGCONTEXT_cs, sigcontext_32, cs);
68 	OFFSET(IA32_SIGCONTEXT_ss, sigcontext_32, ss);
69 	OFFSET(IA32_SIGCONTEXT_ds, sigcontext_32, ds);
70 	OFFSET(IA32_SIGCONTEXT_flags, sigcontext_32, flags);
71 
72 	BLANK();
73 	OFFSET(IA32_SIGFRAME_sigcontext,    sigframe_ia32,    sc);
74 	OFFSET(IA32_RT_SIGFRAME_sigcontext, rt_sigframe_ia32, uc.uc_mcontext);
75 #endif
76 
77 #ifdef CONFIG_XEN
78 	BLANK();
79 	OFFSET(XEN_vcpu_info_mask, vcpu_info, evtchn_upcall_mask);
80 	OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending);
81 	OFFSET(XEN_vcpu_info_arch_cr2, vcpu_info, arch.cr2);
82 #endif
83 
84 	BLANK();
85 	OFFSET(TDX_MODULE_rcx, tdx_module_args, rcx);
86 	OFFSET(TDX_MODULE_rdx, tdx_module_args, rdx);
87 	OFFSET(TDX_MODULE_r8,  tdx_module_args, r8);
88 	OFFSET(TDX_MODULE_r9,  tdx_module_args, r9);
89 	OFFSET(TDX_MODULE_r10, tdx_module_args, r10);
90 	OFFSET(TDX_MODULE_r11, tdx_module_args, r11);
91 	OFFSET(TDX_MODULE_r12, tdx_module_args, r12);
92 	OFFSET(TDX_MODULE_r13, tdx_module_args, r13);
93 	OFFSET(TDX_MODULE_r14, tdx_module_args, r14);
94 	OFFSET(TDX_MODULE_r15, tdx_module_args, r15);
95 	OFFSET(TDX_MODULE_rbx, tdx_module_args, rbx);
96 	OFFSET(TDX_MODULE_rdi, tdx_module_args, rdi);
97 	OFFSET(TDX_MODULE_rsi, tdx_module_args, rsi);
98 
99 	BLANK();
100 	OFFSET(BP_scratch, boot_params, scratch);
101 	OFFSET(BP_secure_boot, boot_params, secure_boot);
102 	OFFSET(BP_loadflags, boot_params, hdr.loadflags);
103 	OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch);
104 	OFFSET(BP_version, boot_params, hdr.version);
105 	OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment);
106 	OFFSET(BP_init_size, boot_params, hdr.init_size);
107 	OFFSET(BP_pref_address, boot_params, hdr.pref_address);
108 
109 	BLANK();
110 	DEFINE(PTREGS_SIZE, sizeof(struct pt_regs));
111 	OFFSET(C_PTREGS_SIZE, pt_regs, orig_ax);
112 
113 	/* TLB state for the entry code */
114 	OFFSET(TLB_STATE_user_pcid_flush_mask, tlb_state, user_pcid_flush_mask);
115 
116 	/* Layout info for cpu_entry_area */
117 	OFFSET(CPU_ENTRY_AREA_entry_stack, cpu_entry_area, entry_stack_page);
118 	DEFINE(SIZEOF_entry_stack, sizeof(struct entry_stack));
119 	DEFINE(MASK_entry_stack, (~(sizeof(struct entry_stack) - 1)));
120 
121 	/* Offset for fields in tss_struct */
122 	OFFSET(TSS_sp0, tss_struct, x86_tss.sp0);
123 	OFFSET(TSS_sp1, tss_struct, x86_tss.sp1);
124 	OFFSET(TSS_sp2, tss_struct, x86_tss.sp2);
125 #if IS_ENABLED(CONFIG_CRYPTO_ARIA_AESNI_AVX_X86_64)
126 	/* Offset for fields in aria_ctx */
127 	BLANK();
128 	OFFSET(ARIA_CTX_enc_key, aria_ctx, enc_key);
129 	OFFSET(ARIA_CTX_dec_key, aria_ctx, dec_key);
130 	OFFSET(ARIA_CTX_rounds, aria_ctx, rounds);
131 #endif
132 
133 	BLANK();
134 	DEFINE(ALT_INSTR_SIZE,	sizeof(struct alt_instr));
135 	DEFINE(EXTABLE_SIZE,	sizeof(struct exception_table_entry));
136 }
137