xref: /linux/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c (revision 3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d)
1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2023, Linaro Limited
3 
4 #include <linux/backlight.h>
5 #include <linux/delay.h>
6 #include <linux/gpio/consumer.h>
7 #include <linux/regulator/consumer.h>
8 #include <linux/module.h>
9 #include <linux/of.h>
10 
11 #include <drm/display/drm_dsc.h>
12 #include <drm/display/drm_dsc_helper.h>
13 #include <drm/drm_mipi_dsi.h>
14 #include <drm/drm_modes.h>
15 #include <drm/drm_panel.h>
16 
17 #include <video/mipi_display.h>
18 
19 struct visionox_vtdr6130 {
20 	struct drm_panel panel;
21 	struct drm_dsc_config dsc;
22 	struct mipi_dsi_device *dsi;
23 	struct gpio_desc *reset_gpio;
24 	struct regulator_bulk_data *supplies;
25 };
26 
27 static const struct regulator_bulk_data visionox_vtdr6130_supplies[] = {
28 	{ .supply = "vddio" },
29 	{ .supply = "vci" },
30 	{ .supply = "vdd" },
31 };
32 
33 static inline struct visionox_vtdr6130 *to_visionox_vtdr6130(struct drm_panel *panel)
34 {
35 	return container_of(panel, struct visionox_vtdr6130, panel);
36 }
37 
38 static void visionox_vtdr6130_reset(struct visionox_vtdr6130 *ctx)
39 {
40 	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
41 	usleep_range(10000, 11000);
42 	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
43 	usleep_range(10000, 11000);
44 	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
45 	usleep_range(10000, 11000);
46 }
47 
48 static int visionox_vtdr6130_on(struct visionox_vtdr6130 *ctx)
49 {
50 	struct mipi_dsi_device *dsi = ctx->dsi;
51 	struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
52 	struct drm_dsc_picture_parameter_set pps;
53 
54 	dsi->mode_flags |= MIPI_DSI_MODE_LPM;
55 
56 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x01);
57 
58 	mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
59 
60 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx,
61 				     MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
62 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx,
63 				     MIPI_DCS_SET_DISPLAY_BRIGHTNESS, 0x00,
64 				     0x00);
65 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x09);
66 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x01);
67 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x00);
68 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x01);
69 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x12, 0x00, 0x00, 0xab,
70 				     0x30, 0x80, 0x09, 0x60, 0x04, 0x38, 0x00,
71 				     0x28, 0x02, 0x1c, 0x02, 0x1c, 0x02, 0x00,
72 				     0x02, 0x0e, 0x00, 0x20, 0x03, 0xdd, 0x00,
73 				     0x07, 0x00, 0x0c, 0x02, 0x77, 0x02, 0x8b,
74 				     0x18, 0x00, 0x10, 0xf0, 0x07, 0x10, 0x20,
75 				     0x00, 0x06, 0x0f, 0x0f, 0x33, 0x0e, 0x1c,
76 				     0x2a, 0x38, 0x46, 0x54, 0x62, 0x69, 0x70,
77 				     0x77, 0x79, 0x7b, 0x7d, 0x7e, 0x02, 0x02,
78 				     0x22, 0x00, 0x2a, 0x40, 0x2a, 0xbe, 0x3a,
79 				     0xfc, 0x3a, 0xfa, 0x3a, 0xf8, 0x3b, 0x38,
80 				     0x3b, 0x78, 0x3b, 0xb6, 0x4b, 0xb6, 0x4b,
81 				     0xf4, 0x4b, 0xf4, 0x6c, 0x34, 0x84, 0x74,
82 				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
83 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x10);
84 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x01, 0x38, 0x00, 0x14,
85 				     0x00, 0x1c, 0x00, 0x01, 0x66, 0x00, 0x14,
86 				     0x00, 0x14, 0x00, 0x01, 0x66, 0x00, 0x14,
87 				     0x05, 0xcc, 0x00);
88 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x13);
89 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xce, 0x09, 0x11, 0x09, 0x11,
90 				     0x08, 0xc1, 0x07, 0xfa, 0x05, 0xa4, 0x00,
91 				     0x3c, 0x00, 0x34, 0x00, 0x24, 0x00, 0x0c,
92 				     0x00, 0x0c, 0x04, 0x00, 0x35);
93 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x14);
94 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x03, 0x33);
95 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x00, 0x33, 0x00, 0x00,
96 				     0x00, 0x3e, 0x00, 0x00, 0x00, 0x3e, 0x00,
97 				     0x00);
98 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0x00, 0x09, 0x09, 0x09,
99 				     0x09, 0x09, 0x09, 0x06, 0x01);
100 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x00, 0x00, 0x08, 0x09,
101 				     0x09, 0x09);
102 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbc, 0x10, 0x00, 0x00, 0x06,
103 				     0x11, 0x09, 0x3b, 0x09, 0x47, 0x09, 0x47,
104 				     0x00);
105 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbe, 0x10, 0x10, 0x00, 0x08,
106 				     0x22, 0x09, 0x19, 0x09, 0x25, 0x09, 0x25,
107 				     0x00);
108 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x80);
109 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x14);
110 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfa, 0x08, 0x08, 0x08);
111 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x81);
112 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x05);
113 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0x0f);
114 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x00);
115 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x82);
116 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf9, 0x00);
117 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x51, 0x83);
118 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x04);
119 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf8, 0x00);
120 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x00);
121 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x01);
122 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf4, 0x9a);
123 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x00);
124 
125 	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
126 	mipi_dsi_msleep(&dsi_ctx, 120);
127 
128 	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
129 	mipi_dsi_msleep(&dsi_ctx, 20);
130 
131 	drm_dsc_pps_payload_pack(&pps, dsi->dsc);
132 	mipi_dsi_picture_parameter_set_multi(&dsi_ctx, &pps);
133 
134 	return dsi_ctx.accum_err;
135 }
136 
137 static void visionox_vtdr6130_off(struct visionox_vtdr6130 *ctx)
138 {
139 	struct mipi_dsi_device *dsi = ctx->dsi;
140 	struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
141 
142 	dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
143 
144 	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
145 	mipi_dsi_msleep(&dsi_ctx, 20);
146 
147 	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
148 	mipi_dsi_msleep(&dsi_ctx, 120);
149 }
150 
151 static int visionox_vtdr6130_prepare(struct drm_panel *panel)
152 {
153 	struct visionox_vtdr6130 *ctx = to_visionox_vtdr6130(panel);
154 	int ret;
155 
156 	ret = regulator_bulk_enable(ARRAY_SIZE(visionox_vtdr6130_supplies),
157 				    ctx->supplies);
158 	if (ret < 0)
159 		return ret;
160 
161 	visionox_vtdr6130_reset(ctx);
162 
163 	ret = visionox_vtdr6130_on(ctx);
164 	if (ret < 0) {
165 		gpiod_set_value_cansleep(ctx->reset_gpio, 1);
166 		regulator_bulk_disable(ARRAY_SIZE(visionox_vtdr6130_supplies),
167 				       ctx->supplies);
168 		return ret;
169 	}
170 
171 	return 0;
172 }
173 
174 static int visionox_vtdr6130_unprepare(struct drm_panel *panel)
175 {
176 	struct visionox_vtdr6130 *ctx = to_visionox_vtdr6130(panel);
177 
178 	visionox_vtdr6130_off(ctx);
179 
180 	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
181 
182 	regulator_bulk_disable(ARRAY_SIZE(visionox_vtdr6130_supplies),
183 			       ctx->supplies);
184 
185 	return 0;
186 }
187 
188 static const struct drm_display_mode visionox_vtdr6130_mode = {
189 	.clock = (1080 + 20 + 2 + 20) * (2400 + 20 + 2 + 18) * 144 / 1000,
190 	.hdisplay = 1080,
191 	.hsync_start = 1080 + 20,
192 	.hsync_end = 1080 + 20 + 2,
193 	.htotal = 1080 + 20 + 2 + 20,
194 	.vdisplay = 2400,
195 	.vsync_start = 2400 + 20,
196 	.vsync_end = 2400 + 20 + 2,
197 	.vtotal = 2400 + 20 + 2 + 18,
198 	.width_mm = 71,
199 	.height_mm = 157,
200 };
201 
202 static int visionox_vtdr6130_get_modes(struct drm_panel *panel,
203 				       struct drm_connector *connector)
204 {
205 	struct drm_display_mode *mode;
206 
207 	mode = drm_mode_duplicate(connector->dev, &visionox_vtdr6130_mode);
208 	if (!mode)
209 		return -ENOMEM;
210 
211 	drm_mode_set_name(mode);
212 
213 	mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
214 	connector->display_info.width_mm = mode->width_mm;
215 	connector->display_info.height_mm = mode->height_mm;
216 	drm_mode_probed_add(connector, mode);
217 
218 	return 1;
219 }
220 
221 static const struct drm_panel_funcs visionox_vtdr6130_panel_funcs = {
222 	.prepare = visionox_vtdr6130_prepare,
223 	.unprepare = visionox_vtdr6130_unprepare,
224 	.get_modes = visionox_vtdr6130_get_modes,
225 };
226 
227 static int visionox_vtdr6130_bl_update_status(struct backlight_device *bl)
228 {
229 	struct mipi_dsi_device *dsi = bl_get_data(bl);
230 	u16 brightness = backlight_get_brightness(bl);
231 
232 	return mipi_dsi_dcs_set_display_brightness_large(dsi, brightness);
233 }
234 
235 static const struct backlight_ops visionox_vtdr6130_bl_ops = {
236 	.update_status = visionox_vtdr6130_bl_update_status,
237 };
238 
239 static struct backlight_device *
240 visionox_vtdr6130_create_backlight(struct mipi_dsi_device *dsi)
241 {
242 	struct device *dev = &dsi->dev;
243 	const struct backlight_properties props = {
244 		.type = BACKLIGHT_RAW,
245 		.brightness = 4095,
246 		.max_brightness = 4095,
247 	};
248 
249 	return devm_backlight_device_register(dev, dev_name(dev), dev, dsi,
250 					      &visionox_vtdr6130_bl_ops, &props);
251 }
252 
253 static int visionox_vtdr6130_probe(struct mipi_dsi_device *dsi)
254 {
255 	struct device *dev = &dsi->dev;
256 	struct visionox_vtdr6130 *ctx;
257 	int ret;
258 
259 	ctx = devm_drm_panel_alloc(dev, struct visionox_vtdr6130, panel,
260 				   &visionox_vtdr6130_panel_funcs,
261 				   DRM_MODE_CONNECTOR_DSI);
262 	if (IS_ERR(ctx))
263 		return PTR_ERR(ctx);
264 
265 	ret = devm_regulator_bulk_get_const(&dsi->dev,
266 					    ARRAY_SIZE(visionox_vtdr6130_supplies),
267 					    visionox_vtdr6130_supplies,
268 					    &ctx->supplies);
269 	if (ret < 0)
270 		return ret;
271 
272 	ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
273 	if (IS_ERR(ctx->reset_gpio))
274 		return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
275 				     "Failed to get reset-gpios\n");
276 
277 	ctx->dsi = dsi;
278 	mipi_dsi_set_drvdata(dsi, ctx);
279 
280 	ctx->dsc.dsc_version_major = 0x1;
281 	ctx->dsc.dsc_version_minor = 0x2;
282 	ctx->dsc.slice_height = 40;
283 	ctx->dsc.slice_width = 540;
284 	ctx->dsc.slice_count = 2;
285 	ctx->dsc.bits_per_component = 8;
286 	ctx->dsc.bits_per_pixel = 8 << 4;
287 	ctx->dsc.block_pred_enable = true;
288 
289 	dsi->dsc = &ctx->dsc;
290 	dsi->lanes = 4;
291 	dsi->format = MIPI_DSI_FMT_RGB888;
292 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_NO_EOT_PACKET |
293 			  MIPI_DSI_CLOCK_NON_CONTINUOUS;
294 	ctx->panel.prepare_prev_first = true;
295 
296 	ctx->panel.backlight = visionox_vtdr6130_create_backlight(dsi);
297 	if (IS_ERR(ctx->panel.backlight))
298 		return dev_err_probe(dev, PTR_ERR(ctx->panel.backlight),
299 				     "Failed to create backlight\n");
300 
301 	ret = devm_drm_panel_add(dev, &ctx->panel);
302 	if (ret)
303 		return ret;
304 
305 	return devm_mipi_dsi_attach(dev, dsi);
306 }
307 
308 static const struct of_device_id visionox_vtdr6130_of_match[] = {
309 	{ .compatible = "visionox,vtdr6130" },
310 	{ /* sentinel */ }
311 };
312 MODULE_DEVICE_TABLE(of, visionox_vtdr6130_of_match);
313 
314 static struct mipi_dsi_driver visionox_vtdr6130_driver = {
315 	.probe = visionox_vtdr6130_probe,
316 	.driver = {
317 		.name = "panel-visionox-vtdr6130",
318 		.of_match_table = visionox_vtdr6130_of_match,
319 	},
320 };
321 module_mipi_dsi_driver(visionox_vtdr6130_driver);
322 
323 MODULE_AUTHOR("Neil Armstrong <neil.armstrong@linaro.org>");
324 MODULE_DESCRIPTION("Panel driver for the Visionox VTDR6130 AMOLED DSI panel");
325 MODULE_LICENSE("GPL");
326