1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright 2020-2021 NXP
4 */
5
6 #include <linux/init.h>
7 #include <linux/interconnect.h>
8 #include <linux/ioctl.h>
9 #include <linux/list.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/videodev2.h>
13 #include <media/v4l2-device.h>
14 #include <media/v4l2-event.h>
15 #include <media/v4l2-mem2mem.h>
16 #include <media/v4l2-ioctl.h>
17 #include <media/videobuf2-v4l2.h>
18 #include <media/videobuf2-dma-contig.h>
19 #include "vpu.h"
20 #include "vpu_defs.h"
21 #include "vpu_core.h"
22 #include "vpu_helpers.h"
23 #include "vpu_v4l2.h"
24 #include "vpu_cmds.h"
25 #include "vpu_rpc.h"
26
27 #define VDEC_SLOT_CNT_DFT 32
28 #define VDEC_MIN_BUFFER_CAP 8
29 #define VDEC_MIN_BUFFER_OUT 8
30
31 struct vdec_fs_info {
32 char name[8];
33 u32 type;
34 u32 max_count;
35 u32 req_count;
36 u32 count;
37 u32 index;
38 u32 size;
39 struct vpu_buffer buffer[32];
40 u32 tag;
41 };
42
43 struct vdec_frame_store_t {
44 struct vpu_vb2_buffer *curr;
45 struct vpu_vb2_buffer *pend;
46 dma_addr_t addr;
47 unsigned int state;
48 u32 tag;
49 };
50
51 struct vdec_t {
52 u32 seq_hdr_found;
53 struct vpu_buffer udata;
54 struct vpu_decode_params params;
55 struct vpu_dec_codec_info codec_info;
56 enum vpu_codec_state state;
57
58 struct vdec_frame_store_t *slots;
59 u32 slot_count;
60 u32 req_frame_count;
61 struct vdec_fs_info mbi;
62 struct vdec_fs_info dcp;
63 u32 seq_tag;
64
65 bool reset_codec;
66 bool fixed_fmt;
67 u32 decoded_frame_count;
68 u32 display_frame_count;
69 u32 sequence;
70 u32 eos_received;
71 bool is_source_changed;
72 u32 source_change;
73 u32 drain;
74 bool aborting;
75 };
76
77 static const struct vpu_format vdec_formats[] = {
78 {
79 .pixfmt = V4L2_PIX_FMT_NV12M_8L128,
80 .mem_planes = 2,
81 .comp_planes = 2,
82 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
83 .sibling = V4L2_PIX_FMT_NV12_8L128,
84 },
85 {
86 .pixfmt = V4L2_PIX_FMT_NV12_8L128,
87 .mem_planes = 1,
88 .comp_planes = 2,
89 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
90 .sibling = V4L2_PIX_FMT_NV12M_8L128,
91 },
92 {
93 .pixfmt = V4L2_PIX_FMT_NV12M_10BE_8L128,
94 .mem_planes = 2,
95 .comp_planes = 2,
96 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
97 .sibling = V4L2_PIX_FMT_NV12_10BE_8L128,
98 },
99 {
100 .pixfmt = V4L2_PIX_FMT_NV12_10BE_8L128,
101 .mem_planes = 1,
102 .comp_planes = 2,
103 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
104 .sibling = V4L2_PIX_FMT_NV12M_10BE_8L128
105 },
106 {
107 .pixfmt = V4L2_PIX_FMT_H264,
108 .mem_planes = 1,
109 .comp_planes = 1,
110 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
111 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
112 },
113 {
114 .pixfmt = V4L2_PIX_FMT_H264_MVC,
115 .mem_planes = 1,
116 .comp_planes = 1,
117 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
118 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
119 },
120 {
121 .pixfmt = V4L2_PIX_FMT_HEVC,
122 .mem_planes = 1,
123 .comp_planes = 1,
124 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
125 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
126 },
127 {
128 .pixfmt = V4L2_PIX_FMT_VC1_ANNEX_G,
129 .mem_planes = 1,
130 .comp_planes = 1,
131 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
132 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
133 },
134 {
135 .pixfmt = V4L2_PIX_FMT_VC1_ANNEX_L,
136 .mem_planes = 1,
137 .comp_planes = 1,
138 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
139 .flags = V4L2_FMT_FLAG_COMPRESSED
140 },
141 {
142 .pixfmt = V4L2_PIX_FMT_MPEG2,
143 .mem_planes = 1,
144 .comp_planes = 1,
145 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
146 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
147 },
148 {
149 .pixfmt = V4L2_PIX_FMT_MPEG4,
150 .mem_planes = 1,
151 .comp_planes = 1,
152 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
153 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
154 },
155 {
156 .pixfmt = V4L2_PIX_FMT_XVID,
157 .mem_planes = 1,
158 .comp_planes = 1,
159 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
160 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
161 },
162 {
163 .pixfmt = V4L2_PIX_FMT_VP8,
164 .mem_planes = 1,
165 .comp_planes = 1,
166 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
167 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
168 },
169 {
170 .pixfmt = V4L2_PIX_FMT_H263,
171 .mem_planes = 1,
172 .comp_planes = 1,
173 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
174 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
175 },
176 {
177 .pixfmt = V4L2_PIX_FMT_SPK,
178 .mem_planes = 1,
179 .comp_planes = 1,
180 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
181 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
182 },
183 {
184 .pixfmt = V4L2_PIX_FMT_RV30,
185 .mem_planes = 1,
186 .comp_planes = 1,
187 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
188 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
189 },
190 {
191 .pixfmt = V4L2_PIX_FMT_RV40,
192 .mem_planes = 1,
193 .comp_planes = 1,
194 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
195 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
196 },
197 {0, 0, 0, 0},
198 };
199
vdec_op_s_ctrl(struct v4l2_ctrl * ctrl)200 static int vdec_op_s_ctrl(struct v4l2_ctrl *ctrl)
201 {
202 struct vpu_inst *inst = ctrl_to_inst(ctrl);
203 struct vdec_t *vdec = inst->priv;
204 int ret = 0;
205
206 switch (ctrl->id) {
207 case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE:
208 vdec->params.display_delay_enable = ctrl->val;
209 break;
210 case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY:
211 vdec->params.display_delay = ctrl->val;
212 break;
213 default:
214 ret = -EINVAL;
215 break;
216 }
217
218 return ret;
219 }
220
221 static const struct v4l2_ctrl_ops vdec_ctrl_ops = {
222 .s_ctrl = vdec_op_s_ctrl,
223 .g_volatile_ctrl = vpu_helper_g_volatile_ctrl,
224 };
225
vdec_ctrl_init(struct vpu_inst * inst)226 static int vdec_ctrl_init(struct vpu_inst *inst)
227 {
228 struct v4l2_ctrl *ctrl;
229 int ret;
230
231 ret = v4l2_ctrl_handler_init(&inst->ctrl_handler, 20);
232 if (ret)
233 return ret;
234
235 v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops,
236 V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY,
237 0, 0, 1, 0);
238
239 v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops,
240 V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE,
241 0, 1, 1, 0);
242
243 v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL,
244 V4L2_CID_MPEG_VIDEO_H264_PROFILE,
245 V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH,
246 ~((1 << V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) |
247 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) |
248 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) |
249 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED) |
250 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_HIGH)),
251 V4L2_MPEG_VIDEO_H264_PROFILE_MAIN);
252
253 v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL,
254 V4L2_CID_MPEG_VIDEO_H264_LEVEL,
255 V4L2_MPEG_VIDEO_H264_LEVEL_6_2,
256 0,
257 V4L2_MPEG_VIDEO_H264_LEVEL_4_0);
258
259 v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL,
260 V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
261 V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10,
262 ~((1 << V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) |
263 (1 << V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10)),
264 V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN);
265
266 v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL,
267 V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
268 V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
269 0,
270 V4L2_MPEG_VIDEO_HEVC_LEVEL_4);
271
272 ctrl = v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops,
273 V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, 1, 32, 1, 2);
274 if (ctrl)
275 ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
276
277 ctrl = v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops,
278 V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, 1, 32, 1, 2);
279 if (ctrl)
280 ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
281
282 if (inst->ctrl_handler.error) {
283 ret = inst->ctrl_handler.error;
284 v4l2_ctrl_handler_free(&inst->ctrl_handler);
285 return ret;
286 }
287
288 ret = v4l2_ctrl_handler_setup(&inst->ctrl_handler);
289 if (ret) {
290 dev_err(inst->dev, "[%d] setup ctrls fail, ret = %d\n", inst->id, ret);
291 v4l2_ctrl_handler_free(&inst->ctrl_handler);
292 return ret;
293 }
294
295 return 0;
296 }
297
vdec_attach_frame_store(struct vpu_inst * inst,struct vb2_buffer * vb)298 static void vdec_attach_frame_store(struct vpu_inst *inst, struct vb2_buffer *vb)
299 {
300 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
301 struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf);
302 struct vdec_t *vdec = inst->priv;
303 struct vdec_frame_store_t *new_slots = NULL;
304 dma_addr_t addr;
305 int i;
306
307 addr = vpu_get_vb_phy_addr(vb, 0);
308 for (i = 0; i < vdec->slot_count; i++) {
309 if (addr == vdec->slots[i].addr) {
310 if (vdec->slots[i].curr && vdec->slots[i].curr != vpu_buf) {
311 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_CHANGED);
312 vdec->slots[i].pend = vpu_buf;
313 } else {
314 vpu_set_buffer_state(vbuf, vdec->slots[i].state);
315 }
316 vpu_buf->fs_id = i;
317 return;
318 }
319 }
320
321 for (i = 0; i < vdec->slot_count; i++) {
322 if (!vdec->slots[i].addr) {
323 vdec->slots[i].addr = addr;
324 vpu_buf->fs_id = i;
325 return;
326 }
327 }
328
329 new_slots = krealloc_array(vdec->slots, vdec->slot_count * 2,
330 sizeof(*vdec->slots),
331 GFP_KERNEL | __GFP_ZERO);
332 if (!new_slots) {
333 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_ERROR);
334 return;
335 }
336
337 vdec->slots = new_slots;
338 vdec->slot_count *= 2;
339
340 vdec->slots[i].addr = addr;
341 vpu_buf->fs_id = i;
342 }
343
vdec_reset_frame_store(struct vpu_inst * inst)344 static void vdec_reset_frame_store(struct vpu_inst *inst)
345 {
346 struct vdec_t *vdec = inst->priv;
347
348 if (!vdec->slots || !vdec->slot_count)
349 return;
350
351 vpu_trace(inst->dev, "inst[%d] reset slots\n", inst->id);
352 memset(vdec->slots, 0, sizeof(*vdec->slots) * vdec->slot_count);
353 }
354
vdec_handle_resolution_change(struct vpu_inst * inst)355 static void vdec_handle_resolution_change(struct vpu_inst *inst)
356 {
357 struct vdec_t *vdec = inst->priv;
358 struct vb2_queue *q;
359
360 if (!inst->fh.m2m_ctx)
361 return;
362
363 if (inst->state != VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE)
364 return;
365 if (!vdec->source_change)
366 return;
367
368 q = v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx);
369 if (!list_empty(&q->done_list))
370 return;
371
372 vdec->source_change--;
373 vpu_notify_source_change(inst);
374 vpu_set_last_buffer_dequeued(inst, false);
375 }
376
vdec_update_state(struct vpu_inst * inst,enum vpu_codec_state state,u32 force)377 static int vdec_update_state(struct vpu_inst *inst, enum vpu_codec_state state, u32 force)
378 {
379 struct vdec_t *vdec = inst->priv;
380 enum vpu_codec_state pre_state = inst->state;
381
382 if (state == VPU_CODEC_STATE_SEEK) {
383 if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE)
384 vdec->state = inst->state;
385 else
386 vdec->state = VPU_CODEC_STATE_ACTIVE;
387 }
388 if (inst->state != VPU_CODEC_STATE_SEEK || force)
389 inst->state = state;
390 else if (state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE)
391 vdec->state = VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE;
392
393 if (inst->state != pre_state)
394 vpu_trace(inst->dev, "[%d] %s -> %s\n", inst->id,
395 vpu_codec_state_name(pre_state), vpu_codec_state_name(inst->state));
396
397 if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE)
398 vdec_handle_resolution_change(inst);
399
400 return 0;
401 }
402
vdec_set_last_buffer_dequeued(struct vpu_inst * inst)403 static void vdec_set_last_buffer_dequeued(struct vpu_inst *inst)
404 {
405 struct vdec_t *vdec = inst->priv;
406
407 if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE)
408 return;
409
410 if (vdec->eos_received) {
411 if (!vpu_set_last_buffer_dequeued(inst, true)) {
412 vdec->eos_received--;
413 vdec_update_state(inst, VPU_CODEC_STATE_DRAIN, 0);
414 }
415 }
416 }
417
vdec_querycap(struct file * file,void * fh,struct v4l2_capability * cap)418 static int vdec_querycap(struct file *file, void *fh, struct v4l2_capability *cap)
419 {
420 strscpy(cap->driver, "amphion-vpu", sizeof(cap->driver));
421 strscpy(cap->card, "amphion vpu decoder", sizeof(cap->card));
422 strscpy(cap->bus_info, "platform: amphion-vpu", sizeof(cap->bus_info));
423
424 return 0;
425 }
426
vdec_enum_fmt(struct file * file,void * fh,struct v4l2_fmtdesc * f)427 static int vdec_enum_fmt(struct file *file, void *fh, struct v4l2_fmtdesc *f)
428 {
429 struct vpu_inst *inst = to_inst(file);
430 struct vdec_t *vdec = inst->priv;
431 const struct vpu_format *fmt;
432 int ret = -EINVAL;
433
434 vpu_inst_lock(inst);
435 if (V4L2_TYPE_IS_CAPTURE(f->type) && vdec->fixed_fmt) {
436 fmt = vpu_get_format(inst, f->type);
437 if (f->index == 1)
438 fmt = vpu_helper_find_sibling(inst, f->type, fmt->pixfmt);
439 if (f->index > 1)
440 fmt = NULL;
441 } else {
442 fmt = vpu_helper_enum_format(inst, f->type, f->index);
443 }
444 if (!fmt)
445 goto exit;
446
447 memset(f->reserved, 0, sizeof(f->reserved));
448 f->pixelformat = fmt->pixfmt;
449 f->flags = fmt->flags;
450 ret = 0;
451 exit:
452 vpu_inst_unlock(inst);
453 return ret;
454 }
455
vdec_g_fmt(struct file * file,void * fh,struct v4l2_format * f)456 static int vdec_g_fmt(struct file *file, void *fh, struct v4l2_format *f)
457 {
458 struct vpu_inst *inst = to_inst(file);
459 struct vdec_t *vdec = inst->priv;
460 struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp;
461 struct vpu_format *cur_fmt;
462 int i;
463
464 vpu_inst_lock(inst);
465 cur_fmt = vpu_get_format(inst, f->type);
466
467 pixmp->pixelformat = cur_fmt->pixfmt;
468 pixmp->num_planes = cur_fmt->mem_planes;
469 pixmp->width = cur_fmt->width;
470 pixmp->height = cur_fmt->height;
471 pixmp->field = cur_fmt->field;
472 pixmp->flags = cur_fmt->flags;
473 for (i = 0; i < pixmp->num_planes; i++) {
474 pixmp->plane_fmt[i].bytesperline = cur_fmt->bytesperline[i];
475 pixmp->plane_fmt[i].sizeimage = vpu_get_fmt_plane_size(cur_fmt, i);
476 }
477
478 f->fmt.pix_mp.colorspace = vdec->codec_info.color_primaries;
479 f->fmt.pix_mp.xfer_func = vdec->codec_info.transfer_chars;
480 f->fmt.pix_mp.ycbcr_enc = vdec->codec_info.matrix_coeffs;
481 f->fmt.pix_mp.quantization = vdec->codec_info.full_range;
482 vpu_inst_unlock(inst);
483
484 return 0;
485 }
486
vdec_try_fmt(struct file * file,void * fh,struct v4l2_format * f)487 static int vdec_try_fmt(struct file *file, void *fh, struct v4l2_format *f)
488 {
489 struct vpu_inst *inst = to_inst(file);
490 struct vdec_t *vdec = inst->priv;
491 struct vpu_format fmt;
492
493 vpu_inst_lock(inst);
494 if (V4L2_TYPE_IS_CAPTURE(f->type) && vdec->fixed_fmt) {
495 struct vpu_format *cap_fmt = vpu_get_format(inst, f->type);
496
497 if (!vpu_helper_match_format(inst, cap_fmt->type, cap_fmt->pixfmt,
498 f->fmt.pix_mp.pixelformat))
499 f->fmt.pix_mp.pixelformat = cap_fmt->pixfmt;
500 }
501
502 vpu_try_fmt_common(inst, f, &fmt);
503
504 if (vdec->fixed_fmt) {
505 f->fmt.pix_mp.colorspace = vdec->codec_info.color_primaries;
506 f->fmt.pix_mp.xfer_func = vdec->codec_info.transfer_chars;
507 f->fmt.pix_mp.ycbcr_enc = vdec->codec_info.matrix_coeffs;
508 f->fmt.pix_mp.quantization = vdec->codec_info.full_range;
509 } else {
510 f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT;
511 f->fmt.pix_mp.xfer_func = V4L2_XFER_FUNC_DEFAULT;
512 f->fmt.pix_mp.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
513 f->fmt.pix_mp.quantization = V4L2_QUANTIZATION_DEFAULT;
514 }
515 vpu_inst_unlock(inst);
516
517 return 0;
518 }
519
vdec_s_fmt_common(struct vpu_inst * inst,struct v4l2_format * f)520 static int vdec_s_fmt_common(struct vpu_inst *inst, struct v4l2_format *f)
521 {
522 struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp;
523 struct vpu_format fmt;
524 struct vpu_format *cur_fmt;
525 struct vb2_queue *q;
526 struct vdec_t *vdec = inst->priv;
527 int i;
528
529 if (!inst->fh.m2m_ctx)
530 return -EINVAL;
531
532 q = v4l2_m2m_get_vq(inst->fh.m2m_ctx, f->type);
533 if (vb2_is_busy(q))
534 return -EBUSY;
535
536 if (vpu_try_fmt_common(inst, f, &fmt))
537 return -EINVAL;
538
539 cur_fmt = vpu_get_format(inst, f->type);
540 if (V4L2_TYPE_IS_OUTPUT(f->type) && inst->state != VPU_CODEC_STATE_DEINIT) {
541 if (cur_fmt->pixfmt != fmt.pixfmt) {
542 vdec->reset_codec = true;
543 vdec->fixed_fmt = false;
544 }
545 }
546 if (V4L2_TYPE_IS_OUTPUT(f->type) || !vdec->fixed_fmt) {
547 memcpy(cur_fmt, &fmt, sizeof(*cur_fmt));
548 } else {
549 if (vpu_helper_match_format(inst, f->type, cur_fmt->pixfmt, pixmp->pixelformat)) {
550 cur_fmt->pixfmt = fmt.pixfmt;
551 cur_fmt->mem_planes = fmt.mem_planes;
552 }
553 pixmp->pixelformat = cur_fmt->pixfmt;
554 pixmp->num_planes = cur_fmt->mem_planes;
555 pixmp->width = cur_fmt->width;
556 pixmp->height = cur_fmt->height;
557 for (i = 0; i < pixmp->num_planes; i++) {
558 pixmp->plane_fmt[i].bytesperline = cur_fmt->bytesperline[i];
559 pixmp->plane_fmt[i].sizeimage = vpu_get_fmt_plane_size(cur_fmt, i);
560 }
561 pixmp->field = cur_fmt->field;
562 }
563
564 if (!vdec->fixed_fmt) {
565 if (V4L2_TYPE_IS_OUTPUT(f->type)) {
566 vdec->params.codec_format = cur_fmt->pixfmt;
567 vdec->codec_info.color_primaries = f->fmt.pix_mp.colorspace;
568 vdec->codec_info.transfer_chars = f->fmt.pix_mp.xfer_func;
569 vdec->codec_info.matrix_coeffs = f->fmt.pix_mp.ycbcr_enc;
570 vdec->codec_info.full_range = f->fmt.pix_mp.quantization;
571 } else {
572 vdec->params.output_format = cur_fmt->pixfmt;
573 inst->crop.left = 0;
574 inst->crop.top = 0;
575 inst->crop.width = cur_fmt->width;
576 inst->crop.height = cur_fmt->height;
577 }
578 }
579
580 vpu_trace(inst->dev, "[%d] %c%c%c%c %dx%d\n", inst->id,
581 f->fmt.pix_mp.pixelformat,
582 f->fmt.pix_mp.pixelformat >> 8,
583 f->fmt.pix_mp.pixelformat >> 16,
584 f->fmt.pix_mp.pixelformat >> 24,
585 f->fmt.pix_mp.width,
586 f->fmt.pix_mp.height);
587
588 return 0;
589 }
590
vdec_s_fmt(struct file * file,void * fh,struct v4l2_format * f)591 static int vdec_s_fmt(struct file *file, void *fh, struct v4l2_format *f)
592 {
593 struct vpu_inst *inst = to_inst(file);
594 struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp;
595 struct vdec_t *vdec = inst->priv;
596 int ret = 0;
597
598 vpu_inst_lock(inst);
599 ret = vdec_s_fmt_common(inst, f);
600 if (ret)
601 goto exit;
602
603 if (V4L2_TYPE_IS_OUTPUT(f->type) && !vdec->fixed_fmt) {
604 struct v4l2_format fc;
605
606 memset(&fc, 0, sizeof(fc));
607 fc.type = inst->cap_format.type;
608 fc.fmt.pix_mp.pixelformat = inst->cap_format.pixfmt;
609 fc.fmt.pix_mp.width = pixmp->width;
610 fc.fmt.pix_mp.height = pixmp->height;
611 vdec_s_fmt_common(inst, &fc);
612 }
613
614 f->fmt.pix_mp.colorspace = vdec->codec_info.color_primaries;
615 f->fmt.pix_mp.xfer_func = vdec->codec_info.transfer_chars;
616 f->fmt.pix_mp.ycbcr_enc = vdec->codec_info.matrix_coeffs;
617 f->fmt.pix_mp.quantization = vdec->codec_info.full_range;
618
619 exit:
620 vpu_inst_unlock(inst);
621 return ret;
622 }
623
vdec_g_selection(struct file * file,void * fh,struct v4l2_selection * s)624 static int vdec_g_selection(struct file *file, void *fh, struct v4l2_selection *s)
625 {
626 struct vpu_inst *inst = to_inst(file);
627
628 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
629 return -EINVAL;
630
631 switch (s->target) {
632 case V4L2_SEL_TGT_COMPOSE:
633 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
634 case V4L2_SEL_TGT_COMPOSE_PADDED:
635 s->r = inst->crop;
636 break;
637 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
638 s->r.left = 0;
639 s->r.top = 0;
640 s->r.width = inst->cap_format.width;
641 s->r.height = inst->cap_format.height;
642 break;
643 default:
644 return -EINVAL;
645 }
646
647 return 0;
648 }
649
vdec_drain(struct vpu_inst * inst)650 static int vdec_drain(struct vpu_inst *inst)
651 {
652 struct vdec_t *vdec = inst->priv;
653
654 if (!inst->fh.m2m_ctx)
655 return 0;
656
657 if (!vdec->drain)
658 return 0;
659
660 if (!vpu_is_source_empty(inst))
661 return 0;
662
663 if (!vdec->params.frame_count) {
664 vpu_set_last_buffer_dequeued(inst, true);
665 return 0;
666 }
667
668 vpu_iface_add_scode(inst, SCODE_PADDING_EOS);
669 vdec->params.end_flag = 1;
670 vpu_iface_set_decode_params(inst, &vdec->params, 1);
671 vdec->drain = 0;
672 vpu_trace(inst->dev, "[%d] frame_count = %d\n", inst->id, vdec->params.frame_count);
673
674 return 0;
675 }
676
vdec_cmd_start(struct vpu_inst * inst)677 static int vdec_cmd_start(struct vpu_inst *inst)
678 {
679 struct vdec_t *vdec = inst->priv;
680
681 switch (inst->state) {
682 case VPU_CODEC_STATE_STARTED:
683 case VPU_CODEC_STATE_DRAIN:
684 case VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE:
685 vdec_update_state(inst, VPU_CODEC_STATE_ACTIVE, 0);
686 break;
687 default:
688 break;
689 }
690 vpu_process_capture_buffer(inst);
691 if (vdec->eos_received)
692 vdec_set_last_buffer_dequeued(inst);
693 return 0;
694 }
695
vdec_cmd_stop(struct vpu_inst * inst)696 static int vdec_cmd_stop(struct vpu_inst *inst)
697 {
698 struct vdec_t *vdec = inst->priv;
699
700 vpu_trace(inst->dev, "[%d]\n", inst->id);
701
702 if (inst->state == VPU_CODEC_STATE_DEINIT) {
703 vpu_set_last_buffer_dequeued(inst, true);
704 } else {
705 vdec->drain = 1;
706 vdec_drain(inst);
707 }
708
709 return 0;
710 }
711
vdec_decoder_cmd(struct file * file,void * fh,struct v4l2_decoder_cmd * cmd)712 static int vdec_decoder_cmd(struct file *file, void *fh, struct v4l2_decoder_cmd *cmd)
713 {
714 struct vpu_inst *inst = to_inst(file);
715 int ret;
716
717 ret = v4l2_m2m_ioctl_try_decoder_cmd(file, fh, cmd);
718 if (ret)
719 return ret;
720
721 vpu_inst_lock(inst);
722 switch (cmd->cmd) {
723 case V4L2_DEC_CMD_START:
724 vdec_cmd_start(inst);
725 vb2_clear_last_buffer_dequeued(v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx));
726 break;
727 case V4L2_DEC_CMD_STOP:
728 vdec_cmd_stop(inst);
729 break;
730 default:
731 break;
732 }
733 vpu_inst_unlock(inst);
734
735 return 0;
736 }
737
vdec_subscribe_event(struct v4l2_fh * fh,const struct v4l2_event_subscription * sub)738 static int vdec_subscribe_event(struct v4l2_fh *fh, const struct v4l2_event_subscription *sub)
739 {
740 switch (sub->type) {
741 case V4L2_EVENT_EOS:
742 return v4l2_event_subscribe(fh, sub, 0, NULL);
743 case V4L2_EVENT_SOURCE_CHANGE:
744 return v4l2_src_change_event_subscribe(fh, sub);
745 case V4L2_EVENT_CTRL:
746 return v4l2_ctrl_subscribe_event(fh, sub);
747 default:
748 return -EINVAL;
749 }
750
751 return 0;
752 }
753
754 static const struct v4l2_ioctl_ops vdec_ioctl_ops = {
755 .vidioc_querycap = vdec_querycap,
756 .vidioc_enum_fmt_vid_cap = vdec_enum_fmt,
757 .vidioc_enum_fmt_vid_out = vdec_enum_fmt,
758 .vidioc_g_fmt_vid_cap_mplane = vdec_g_fmt,
759 .vidioc_g_fmt_vid_out_mplane = vdec_g_fmt,
760 .vidioc_try_fmt_vid_cap_mplane = vdec_try_fmt,
761 .vidioc_try_fmt_vid_out_mplane = vdec_try_fmt,
762 .vidioc_s_fmt_vid_cap_mplane = vdec_s_fmt,
763 .vidioc_s_fmt_vid_out_mplane = vdec_s_fmt,
764 .vidioc_g_selection = vdec_g_selection,
765 .vidioc_try_decoder_cmd = v4l2_m2m_ioctl_try_decoder_cmd,
766 .vidioc_decoder_cmd = vdec_decoder_cmd,
767 .vidioc_subscribe_event = vdec_subscribe_event,
768 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
769 .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs,
770 .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs,
771 .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf,
772 .vidioc_querybuf = v4l2_m2m_ioctl_querybuf,
773 .vidioc_qbuf = v4l2_m2m_ioctl_qbuf,
774 .vidioc_expbuf = v4l2_m2m_ioctl_expbuf,
775 .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf,
776 .vidioc_streamon = v4l2_m2m_ioctl_streamon,
777 .vidioc_streamoff = v4l2_m2m_ioctl_streamoff,
778 };
779
vdec_check_ready(struct vpu_inst * inst,unsigned int type)780 static bool vdec_check_ready(struct vpu_inst *inst, unsigned int type)
781 {
782 struct vdec_t *vdec = inst->priv;
783
784 if (V4L2_TYPE_IS_OUTPUT(type))
785 return true;
786
787 if (vdec->req_frame_count)
788 return true;
789
790 return false;
791 }
792
vdec_get_src_buffer(struct vpu_inst * inst,u32 count)793 static struct vb2_v4l2_buffer *vdec_get_src_buffer(struct vpu_inst *inst, u32 count)
794 {
795 if (count > 1)
796 vpu_skip_frame(inst, count - 1);
797
798 return vpu_next_src_buf(inst);
799 }
800
vdec_frame_decoded(struct vpu_inst * inst,void * arg)801 static int vdec_frame_decoded(struct vpu_inst *inst, void *arg)
802 {
803 struct vdec_t *vdec = inst->priv;
804 struct vpu_dec_pic_info *info = arg;
805 struct vpu_vb2_buffer *vpu_buf;
806 struct vb2_v4l2_buffer *vbuf;
807 struct vb2_v4l2_buffer *src_buf;
808 int ret = 0;
809
810 if (!info || info->id >= vdec->slot_count)
811 return -EINVAL;
812
813 vpu_inst_lock(inst);
814 vpu_buf = vdec->slots[info->id].curr;
815 if (!vpu_buf) {
816 dev_err(inst->dev, "[%d] decoded invalid frame[%d]\n", inst->id, info->id);
817 ret = -EINVAL;
818 goto exit;
819 }
820 vbuf = &vpu_buf->m2m_buf.vb;
821 src_buf = vdec_get_src_buffer(inst, info->consumed_count);
822 if (src_buf) {
823 v4l2_m2m_buf_copy_metadata(src_buf, vbuf);
824 if (info->consumed_count) {
825 v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx);
826 vpu_set_buffer_state(src_buf, VPU_BUF_STATE_IDLE);
827 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
828 } else {
829 vpu_set_buffer_state(src_buf, VPU_BUF_STATE_DECODED);
830 }
831 }
832 if (vpu_get_buffer_state(vbuf) == VPU_BUF_STATE_DECODED)
833 dev_info(inst->dev, "[%d] buf[%d] has been decoded\n", inst->id, info->id);
834 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_DECODED);
835 vdec->slots[info->id].state = VPU_BUF_STATE_DECODED;
836 vdec->decoded_frame_count++;
837 if (vdec->params.display_delay_enable) {
838 struct vpu_format *cur_fmt;
839
840 cur_fmt = vpu_get_format(inst, inst->cap_format.type);
841 vdec->slots[info->id].state = VPU_BUF_STATE_READY;
842 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_READY);
843 for (int i = 0; i < vbuf->vb2_buf.num_planes; i++)
844 vb2_set_plane_payload(&vbuf->vb2_buf,
845 i, vpu_get_fmt_plane_size(cur_fmt, i));
846 vbuf->field = cur_fmt->field;
847 vbuf->sequence = vdec->sequence++;
848 dev_dbg(inst->dev, "[%d][OUTPUT TS]%32lld\n", inst->id, vbuf->vb2_buf.timestamp);
849
850 v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_DONE);
851 vdec->display_frame_count++;
852 }
853 exit:
854 vpu_inst_unlock(inst);
855
856 return ret;
857 }
858
vdec_find_buffer(struct vpu_inst * inst,u32 luma)859 static struct vpu_vb2_buffer *vdec_find_buffer(struct vpu_inst *inst, u32 luma)
860 {
861 struct vdec_t *vdec = inst->priv;
862 int i;
863
864 for (i = 0; i < vdec->slot_count; i++) {
865 if (!vdec->slots[i].curr)
866 continue;
867 if (luma == vdec->slots[i].addr)
868 return vdec->slots[i].curr;
869 }
870
871 return NULL;
872 }
873
vdec_buf_done(struct vpu_inst * inst,struct vpu_frame_info * frame)874 static void vdec_buf_done(struct vpu_inst *inst, struct vpu_frame_info *frame)
875 {
876 struct vdec_t *vdec = inst->priv;
877 struct vpu_format *cur_fmt;
878 struct vpu_vb2_buffer *vpu_buf;
879 struct vb2_v4l2_buffer *vbuf;
880 int i;
881
882 if (!frame)
883 return;
884
885 vpu_inst_lock(inst);
886 if (!vdec->params.display_delay_enable)
887 vdec->sequence++;
888 vpu_buf = vdec_find_buffer(inst, frame->luma);
889 vpu_inst_unlock(inst);
890 if (!vpu_buf) {
891 dev_err(inst->dev, "[%d] can't find buffer, id = %d, addr = 0x%x\n",
892 inst->id, frame->id, frame->luma);
893 return;
894 }
895 if (frame->skipped) {
896 dev_dbg(inst->dev, "[%d] frame skip\n", inst->id);
897 return;
898 }
899
900 cur_fmt = vpu_get_format(inst, inst->cap_format.type);
901 vbuf = &vpu_buf->m2m_buf.vb;
902 if (vpu_buf->fs_id != frame->id)
903 dev_err(inst->dev, "[%d] buffer id(%d(%d), %d) mismatch\n",
904 inst->id, vpu_buf->fs_id, vbuf->vb2_buf.index, frame->id);
905
906 if (vdec->params.display_delay_enable)
907 return;
908
909 if (vpu_get_buffer_state(vbuf) != VPU_BUF_STATE_DECODED)
910 dev_err(inst->dev, "[%d] buffer(%d) ready without decoded\n", inst->id, frame->id);
911
912 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_READY);
913 for (i = 0; i < vbuf->vb2_buf.num_planes; i++)
914 vb2_set_plane_payload(&vbuf->vb2_buf, i, vpu_get_fmt_plane_size(cur_fmt, i));
915 vbuf->field = cur_fmt->field;
916 vbuf->sequence = vdec->sequence;
917 dev_dbg(inst->dev, "[%d][OUTPUT TS]%32lld\n", inst->id, vbuf->vb2_buf.timestamp);
918
919 vpu_inst_lock(inst);
920 vdec->slots[vpu_buf->fs_id].state = VPU_BUF_STATE_READY;
921 vdec->display_frame_count++;
922 vpu_inst_unlock(inst);
923 v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_DONE);
924 dev_dbg(inst->dev, "[%d] decoded : %d, display : %d, sequence : %d\n",
925 inst->id, vdec->decoded_frame_count, vdec->display_frame_count, vdec->sequence);
926 }
927
vdec_stop_done(struct vpu_inst * inst)928 static void vdec_stop_done(struct vpu_inst *inst)
929 {
930 struct vdec_t *vdec = inst->priv;
931
932 vpu_inst_lock(inst);
933 vdec_update_state(inst, VPU_CODEC_STATE_DEINIT, 0);
934 vdec->seq_hdr_found = 0;
935 vdec->req_frame_count = 0;
936 vdec->reset_codec = false;
937 vdec->fixed_fmt = false;
938 vdec->params.end_flag = 0;
939 vdec->drain = 0;
940 vdec->params.frame_count = 0;
941 vdec->decoded_frame_count = 0;
942 vdec->display_frame_count = 0;
943 vdec->sequence = 0;
944 vdec->eos_received = 0;
945 vdec->is_source_changed = false;
946 vdec->source_change = 0;
947 inst->total_input_count = 0;
948 vpu_inst_unlock(inst);
949 }
950
vdec_check_source_change(struct vpu_inst * inst,struct vpu_dec_codec_info * hdr)951 static bool vdec_check_source_change(struct vpu_inst *inst, struct vpu_dec_codec_info *hdr)
952 {
953 struct vdec_t *vdec = inst->priv;
954 const struct vpu_format *sibling;
955
956 if (!inst->fh.m2m_ctx)
957 return false;
958
959 if (vdec->reset_codec)
960 return false;
961
962 sibling = vpu_helper_find_sibling(inst, inst->cap_format.type, inst->cap_format.pixfmt);
963 if (sibling && hdr->pixfmt == sibling->pixfmt)
964 hdr->pixfmt = inst->cap_format.pixfmt;
965
966 if (!vb2_is_streaming(v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx)))
967 return true;
968 if (inst->cap_format.pixfmt != hdr->pixfmt)
969 return true;
970 if (inst->cap_format.width != hdr->decoded_width)
971 return true;
972 if (inst->cap_format.height != hdr->decoded_height)
973 return true;
974 if (vpu_get_num_buffers(inst, inst->cap_format.type) < inst->min_buffer_cap)
975 return true;
976 if (inst->crop.left != hdr->offset_x)
977 return true;
978 if (inst->crop.top != hdr->offset_y)
979 return true;
980 if (inst->crop.width != hdr->width)
981 return true;
982 if (inst->crop.height != hdr->height)
983 return true;
984 if (!hdr->progressive)
985 return true;
986
987 if (vdec->seq_hdr_found &&
988 (hdr->color_primaries != vdec->codec_info.color_primaries ||
989 hdr->transfer_chars != vdec->codec_info.transfer_chars ||
990 hdr->matrix_coeffs != vdec->codec_info.matrix_coeffs ||
991 hdr->full_range != vdec->codec_info.full_range))
992 return true;
993
994 return false;
995 }
996
vdec_init_fmt(struct vpu_inst * inst)997 static void vdec_init_fmt(struct vpu_inst *inst)
998 {
999 struct vdec_t *vdec = inst->priv;
1000 struct v4l2_format f;
1001
1002 memset(&f, 0, sizeof(f));
1003 f.type = inst->cap_format.type;
1004 f.fmt.pix_mp.pixelformat = vdec->codec_info.pixfmt;
1005 f.fmt.pix_mp.width = vdec->codec_info.decoded_width;
1006 f.fmt.pix_mp.height = vdec->codec_info.decoded_height;
1007 if (vdec->codec_info.progressive)
1008 f.fmt.pix_mp.field = V4L2_FIELD_NONE;
1009 else
1010 f.fmt.pix_mp.field = V4L2_FIELD_SEQ_TB;
1011 vpu_try_fmt_common(inst, &f, &inst->cap_format);
1012
1013 inst->out_format.width = vdec->codec_info.width;
1014 inst->out_format.height = vdec->codec_info.height;
1015 }
1016
vdec_init_crop(struct vpu_inst * inst)1017 static void vdec_init_crop(struct vpu_inst *inst)
1018 {
1019 struct vdec_t *vdec = inst->priv;
1020
1021 inst->crop.left = vdec->codec_info.offset_x;
1022 inst->crop.top = vdec->codec_info.offset_y;
1023 inst->crop.width = vdec->codec_info.width;
1024 inst->crop.height = vdec->codec_info.height;
1025 }
1026
vdec_init_mbi(struct vpu_inst * inst)1027 static void vdec_init_mbi(struct vpu_inst *inst)
1028 {
1029 struct vdec_t *vdec = inst->priv;
1030
1031 vdec->mbi.size = vdec->codec_info.mbi_size;
1032 vdec->mbi.max_count = ARRAY_SIZE(vdec->mbi.buffer);
1033 scnprintf(vdec->mbi.name, sizeof(vdec->mbi.name), "mbi");
1034 vdec->mbi.type = MEM_RES_MBI;
1035 vdec->mbi.tag = vdec->seq_tag;
1036 }
1037
vdec_init_dcp(struct vpu_inst * inst)1038 static void vdec_init_dcp(struct vpu_inst *inst)
1039 {
1040 struct vdec_t *vdec = inst->priv;
1041
1042 vdec->dcp.size = vdec->codec_info.dcp_size;
1043 vdec->dcp.max_count = ARRAY_SIZE(vdec->dcp.buffer);
1044 scnprintf(vdec->dcp.name, sizeof(vdec->dcp.name), "dcp");
1045 vdec->dcp.type = MEM_RES_DCP;
1046 vdec->dcp.tag = vdec->seq_tag;
1047 }
1048
vdec_request_one_fs(struct vdec_fs_info * fs)1049 static void vdec_request_one_fs(struct vdec_fs_info *fs)
1050 {
1051 fs->req_count++;
1052 if (fs->req_count > fs->max_count)
1053 fs->req_count = fs->max_count;
1054 }
1055
vdec_alloc_fs_buffer(struct vpu_inst * inst,struct vdec_fs_info * fs)1056 static int vdec_alloc_fs_buffer(struct vpu_inst *inst, struct vdec_fs_info *fs)
1057 {
1058 struct vpu_buffer *buffer;
1059
1060 if (!fs->size)
1061 return -EINVAL;
1062
1063 if (fs->count >= fs->req_count)
1064 return -EINVAL;
1065
1066 buffer = &fs->buffer[fs->count];
1067 if (buffer->virt && buffer->length >= fs->size)
1068 return 0;
1069
1070 vpu_free_dma(buffer);
1071 buffer->length = fs->size;
1072 return vpu_alloc_dma(inst->core, buffer);
1073 }
1074
vdec_alloc_fs(struct vpu_inst * inst,struct vdec_fs_info * fs)1075 static void vdec_alloc_fs(struct vpu_inst *inst, struct vdec_fs_info *fs)
1076 {
1077 int ret;
1078
1079 while (fs->count < fs->req_count) {
1080 ret = vdec_alloc_fs_buffer(inst, fs);
1081 if (ret)
1082 break;
1083 fs->count++;
1084 }
1085 }
1086
vdec_clear_fs(struct vdec_fs_info * fs)1087 static void vdec_clear_fs(struct vdec_fs_info *fs)
1088 {
1089 u32 i;
1090
1091 if (!fs)
1092 return;
1093
1094 for (i = 0; i < ARRAY_SIZE(fs->buffer); i++)
1095 vpu_free_dma(&fs->buffer[i]);
1096 memset(fs, 0, sizeof(*fs));
1097 }
1098
vdec_response_fs(struct vpu_inst * inst,struct vdec_fs_info * fs)1099 static int vdec_response_fs(struct vpu_inst *inst, struct vdec_fs_info *fs)
1100 {
1101 struct vpu_fs_info info;
1102 int ret;
1103
1104 if (fs->index >= fs->count)
1105 return 0;
1106
1107 memset(&info, 0, sizeof(info));
1108 info.id = fs->index;
1109 info.type = fs->type;
1110 info.tag = fs->tag;
1111 info.luma_addr = fs->buffer[fs->index].phys;
1112 info.luma_size = fs->buffer[fs->index].length;
1113 ret = vpu_session_alloc_fs(inst, &info);
1114 if (ret)
1115 return ret;
1116
1117 fs->index++;
1118 return 0;
1119 }
1120
vdec_response_frame_abnormal(struct vpu_inst * inst)1121 static int vdec_response_frame_abnormal(struct vpu_inst *inst)
1122 {
1123 struct vdec_t *vdec = inst->priv;
1124 struct vpu_fs_info info;
1125 int ret;
1126
1127 if (!vdec->req_frame_count)
1128 return 0;
1129
1130 memset(&info, 0, sizeof(info));
1131 info.type = MEM_RES_FRAME;
1132 info.tag = vdec->seq_tag + 0xf0;
1133 ret = vpu_session_alloc_fs(inst, &info);
1134 if (ret)
1135 return ret;
1136 vdec->req_frame_count--;
1137
1138 return 0;
1139 }
1140
vdec_response_frame(struct vpu_inst * inst,struct vb2_v4l2_buffer * vbuf)1141 static int vdec_response_frame(struct vpu_inst *inst, struct vb2_v4l2_buffer *vbuf)
1142 {
1143 struct vdec_t *vdec = inst->priv;
1144 struct vpu_vb2_buffer *vpu_buf;
1145 struct vpu_fs_info info;
1146 int ret;
1147
1148 if (inst->state != VPU_CODEC_STATE_ACTIVE)
1149 return -EINVAL;
1150
1151 if (vdec->aborting)
1152 return -EINVAL;
1153
1154 if (!vdec->req_frame_count)
1155 return -EINVAL;
1156
1157 if (!vbuf)
1158 return -EINVAL;
1159
1160 vpu_buf = to_vpu_vb2_buffer(vbuf);
1161 if (vpu_buf->fs_id < 0 || vpu_buf->fs_id >= vdec->slot_count) {
1162 dev_err(inst->dev, "invalid fs %d for v4l2 buffer %d\n",
1163 vpu_buf->fs_id, vbuf->vb2_buf.index);
1164 return -EINVAL;
1165 }
1166
1167 if (vdec->slots[vpu_buf->fs_id].curr) {
1168 if (vdec->slots[vpu_buf->fs_id].curr != vpu_buf) {
1169 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_CHANGED);
1170 vdec->slots[vpu_buf->fs_id].pend = vpu_buf;
1171 } else {
1172 vpu_set_buffer_state(vbuf, vdec->slots[vpu_buf->fs_id].state);
1173 }
1174 dev_err(inst->dev, "[%d] repeat alloc fs %d (v4l2 index %d)\n",
1175 inst->id, vpu_buf->fs_id, vbuf->vb2_buf.index);
1176 return -EAGAIN;
1177 }
1178
1179 dev_dbg(inst->dev, "[%d] state = %s, alloc fs %d, tag = 0x%x\n",
1180 inst->id, vpu_codec_state_name(inst->state), vbuf->vb2_buf.index, vdec->seq_tag);
1181
1182 memset(&info, 0, sizeof(info));
1183 info.id = vpu_buf->fs_id;
1184 info.type = MEM_RES_FRAME;
1185 info.tag = vdec->seq_tag;
1186 info.luma_addr = vpu_get_vb_phy_addr(&vbuf->vb2_buf, 0);
1187 info.luma_size = inst->cap_format.sizeimage[0];
1188 if (vbuf->vb2_buf.num_planes > 1)
1189 info.chroma_addr = vpu_get_vb_phy_addr(&vbuf->vb2_buf, 1);
1190 else
1191 info.chroma_addr = info.luma_addr + info.luma_size;
1192 info.chromau_size = inst->cap_format.sizeimage[1];
1193 info.bytesperline = inst->cap_format.bytesperline[0];
1194 ret = vpu_session_alloc_fs(inst, &info);
1195 if (ret)
1196 return ret;
1197
1198 vpu_buf->luma = info.luma_addr;
1199 vpu_buf->chroma_u = info.chroma_addr;
1200 vpu_buf->chroma_v = 0;
1201 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_INUSE);
1202 vdec->slots[info.id].tag = info.tag;
1203 vdec->slots[info.id].curr = vpu_buf;
1204 vdec->slots[info.id].state = VPU_BUF_STATE_INUSE;
1205 vdec->req_frame_count--;
1206
1207 return 0;
1208 }
1209
vdec_response_fs_request(struct vpu_inst * inst,bool force)1210 static void vdec_response_fs_request(struct vpu_inst *inst, bool force)
1211 {
1212 struct vdec_t *vdec = inst->priv;
1213 int i;
1214 int ret;
1215
1216 if (force) {
1217 for (i = vdec->req_frame_count; i > 0; i--)
1218 vdec_response_frame_abnormal(inst);
1219 return;
1220 }
1221
1222 for (i = vdec->req_frame_count; i > 0; i--) {
1223 ret = vpu_process_capture_buffer(inst);
1224 if (ret)
1225 break;
1226 if (vdec->eos_received)
1227 break;
1228 }
1229
1230 for (i = vdec->mbi.index; i < vdec->mbi.count; i++) {
1231 if (vdec_response_fs(inst, &vdec->mbi))
1232 break;
1233 if (vdec->eos_received)
1234 break;
1235 }
1236 for (i = vdec->dcp.index; i < vdec->dcp.count; i++) {
1237 if (vdec_response_fs(inst, &vdec->dcp))
1238 break;
1239 if (vdec->eos_received)
1240 break;
1241 }
1242 }
1243
vdec_response_fs_release(struct vpu_inst * inst,u32 id,u32 tag)1244 static void vdec_response_fs_release(struct vpu_inst *inst, u32 id, u32 tag)
1245 {
1246 struct vpu_fs_info info;
1247
1248 memset(&info, 0, sizeof(info));
1249 info.id = id;
1250 info.tag = tag;
1251 vpu_session_release_fs(inst, &info);
1252 }
1253
vdec_recycle_buffer(struct vpu_inst * inst,struct vb2_v4l2_buffer * vbuf)1254 static void vdec_recycle_buffer(struct vpu_inst *inst, struct vb2_v4l2_buffer *vbuf)
1255 {
1256 if (!inst->fh.m2m_ctx)
1257 return;
1258 if (vbuf->vb2_buf.state != VB2_BUF_STATE_ACTIVE)
1259 return;
1260 if (vpu_find_buf_by_idx(inst, vbuf->vb2_buf.type, vbuf->vb2_buf.index))
1261 return;
1262 v4l2_m2m_buf_queue(inst->fh.m2m_ctx, vbuf);
1263 }
1264
vdec_release_curr_frame_store(struct vpu_inst * inst,u32 id)1265 static void vdec_release_curr_frame_store(struct vpu_inst *inst, u32 id)
1266 {
1267 struct vdec_t *vdec = inst->priv;
1268 struct vpu_vb2_buffer *vpu_buf;
1269 struct vb2_v4l2_buffer *vbuf;
1270
1271 if (id >= vdec->slot_count)
1272 return;
1273 if (!vdec->slots[id].curr)
1274 return;
1275
1276 vpu_buf = vdec->slots[id].curr;
1277 vbuf = &vpu_buf->m2m_buf.vb;
1278
1279 vdec_response_fs_release(inst, id, vdec->slots[id].tag);
1280 if (vpu_buf->fs_id == id) {
1281 if (vpu_buf->state != VPU_BUF_STATE_READY)
1282 vdec_recycle_buffer(inst, vbuf);
1283 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_IDLE);
1284 }
1285
1286 vdec->slots[id].curr = NULL;
1287 vdec->slots[id].state = VPU_BUF_STATE_IDLE;
1288
1289 if (vdec->slots[id].pend) {
1290 vpu_set_buffer_state(&vdec->slots[id].pend->m2m_buf.vb, VPU_BUF_STATE_IDLE);
1291 vdec->slots[id].pend = NULL;
1292 }
1293 }
1294
vdec_clear_slots(struct vpu_inst * inst)1295 static void vdec_clear_slots(struct vpu_inst *inst)
1296 {
1297 struct vdec_t *vdec = inst->priv;
1298 int i;
1299
1300 for (i = 0; i < vdec->slot_count; i++) {
1301 if (!vdec->slots[i].curr)
1302 continue;
1303
1304 vpu_trace(inst->dev, "clear slot %d\n", i);
1305 vdec_release_curr_frame_store(inst, i);
1306 }
1307 }
1308
vdec_update_v4l2_ctrl(struct vpu_inst * inst,u32 id,u32 val)1309 static void vdec_update_v4l2_ctrl(struct vpu_inst *inst, u32 id, u32 val)
1310 {
1311 struct v4l2_ctrl *ctrl = v4l2_ctrl_find(&inst->ctrl_handler, id);
1312
1313 if (ctrl)
1314 v4l2_ctrl_s_ctrl(ctrl, val);
1315 }
1316
vdec_update_v4l2_profile_level(struct vpu_inst * inst,struct vpu_dec_codec_info * hdr)1317 static void vdec_update_v4l2_profile_level(struct vpu_inst *inst, struct vpu_dec_codec_info *hdr)
1318 {
1319 switch (inst->out_format.pixfmt) {
1320 case V4L2_PIX_FMT_H264:
1321 case V4L2_PIX_FMT_H264_MVC:
1322 vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_H264_PROFILE,
1323 vpu_get_h264_v4l2_profile(hdr));
1324 vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_H264_LEVEL,
1325 vpu_get_h264_v4l2_level(hdr));
1326 break;
1327 case V4L2_PIX_FMT_HEVC:
1328 vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
1329 vpu_get_hevc_v4l2_profile(hdr));
1330 vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
1331 vpu_get_hevc_v4l2_level(hdr));
1332 break;
1333 default:
1334 return;
1335 }
1336 }
1337
vdec_event_seq_hdr(struct vpu_inst * inst,struct vpu_dec_codec_info * hdr)1338 static void vdec_event_seq_hdr(struct vpu_inst *inst, struct vpu_dec_codec_info *hdr)
1339 {
1340 struct vdec_t *vdec = inst->priv;
1341
1342 vpu_inst_lock(inst);
1343
1344 vpu_trace(inst->dev,
1345 "[%d] %d x %d, crop : (%d, %d) %d x %d, %d, %d, colorspace: %d, %d, %d, %d\n",
1346 inst->id,
1347 hdr->decoded_width,
1348 hdr->decoded_height,
1349 hdr->offset_x,
1350 hdr->offset_y,
1351 hdr->width,
1352 hdr->height,
1353 hdr->num_ref_frms,
1354 hdr->num_dpb_frms,
1355 hdr->color_primaries,
1356 hdr->transfer_chars,
1357 hdr->matrix_coeffs,
1358 hdr->full_range);
1359 inst->min_buffer_cap = hdr->num_ref_frms + hdr->num_dpb_frms;
1360 vdec->is_source_changed = vdec_check_source_change(inst, hdr);
1361 memcpy(&vdec->codec_info, hdr, sizeof(vdec->codec_info));
1362 vdec_init_fmt(inst);
1363 vdec_init_crop(inst);
1364 vdec_init_mbi(inst);
1365 vdec_init_dcp(inst);
1366 vdec_update_v4l2_profile_level(inst, hdr);
1367 if (!vdec->seq_hdr_found) {
1368 vdec->seq_tag = vdec->codec_info.tag;
1369 if (vdec->is_source_changed) {
1370 vdec_update_state(inst, VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE, 0);
1371 vdec->source_change++;
1372 vdec_handle_resolution_change(inst);
1373 vdec->is_source_changed = false;
1374 }
1375 }
1376 if (vdec->seq_tag != vdec->codec_info.tag) {
1377 vdec_response_fs_request(inst, true);
1378 vpu_trace(inst->dev, "[%d] seq tag change: %d -> %d\n",
1379 inst->id, vdec->seq_tag, vdec->codec_info.tag);
1380 }
1381 vdec->seq_hdr_found++;
1382 vdec->fixed_fmt = true;
1383 vpu_inst_unlock(inst);
1384 }
1385
vdec_event_resolution_change(struct vpu_inst * inst)1386 static void vdec_event_resolution_change(struct vpu_inst *inst)
1387 {
1388 struct vdec_t *vdec = inst->priv;
1389
1390 vpu_trace(inst->dev, "[%d] input : %d, decoded : %d, display : %d, sequence : %d\n",
1391 inst->id,
1392 vdec->params.frame_count,
1393 vdec->decoded_frame_count,
1394 vdec->display_frame_count,
1395 vdec->sequence);
1396 vpu_inst_lock(inst);
1397 vdec->seq_tag = vdec->codec_info.tag;
1398 vdec_clear_fs(&vdec->mbi);
1399 vdec_clear_fs(&vdec->dcp);
1400 vdec_clear_slots(inst);
1401 vdec_init_mbi(inst);
1402 vdec_init_dcp(inst);
1403 if (vdec->is_source_changed) {
1404 vdec_update_state(inst, VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE, 0);
1405 vdec->source_change++;
1406 vdec_handle_resolution_change(inst);
1407 vdec->is_source_changed = false;
1408 }
1409 vpu_inst_unlock(inst);
1410 }
1411
vdec_event_req_fs(struct vpu_inst * inst,struct vpu_fs_info * fs)1412 static void vdec_event_req_fs(struct vpu_inst *inst, struct vpu_fs_info *fs)
1413 {
1414 struct vdec_t *vdec = inst->priv;
1415
1416 if (!fs)
1417 return;
1418
1419 vpu_inst_lock(inst);
1420
1421 switch (fs->type) {
1422 case MEM_RES_FRAME:
1423 vdec->req_frame_count++;
1424 break;
1425 case MEM_RES_MBI:
1426 vdec_request_one_fs(&vdec->mbi);
1427 break;
1428 case MEM_RES_DCP:
1429 vdec_request_one_fs(&vdec->dcp);
1430 break;
1431 default:
1432 break;
1433 }
1434
1435 vdec_alloc_fs(inst, &vdec->mbi);
1436 vdec_alloc_fs(inst, &vdec->dcp);
1437
1438 vdec_response_fs_request(inst, false);
1439
1440 vpu_inst_unlock(inst);
1441 }
1442
vdec_evnet_rel_fs(struct vpu_inst * inst,struct vpu_fs_info * fs)1443 static void vdec_evnet_rel_fs(struct vpu_inst *inst, struct vpu_fs_info *fs)
1444 {
1445 struct vdec_t *vdec = inst->priv;
1446
1447 if (!fs || fs->id >= vdec->slot_count)
1448 return;
1449 if (fs->type != MEM_RES_FRAME)
1450 return;
1451
1452 if (fs->id >= vdec->slot_count) {
1453 dev_err(inst->dev, "[%d] invalid fs(%d) to release\n", inst->id, fs->id);
1454 return;
1455 }
1456
1457 vpu_inst_lock(inst);
1458 if (!vdec->slots[fs->id].curr) {
1459 dev_dbg(inst->dev, "[%d] fs[%d] has bee released\n", inst->id, fs->id);
1460 goto exit;
1461 }
1462
1463 if (vdec->slots[fs->id].state == VPU_BUF_STATE_DECODED) {
1464 dev_dbg(inst->dev, "[%d] frame skip\n", inst->id);
1465 vdec->sequence++;
1466 }
1467
1468 vdec_release_curr_frame_store(inst, fs->id);
1469 vpu_process_capture_buffer(inst);
1470
1471 exit:
1472 vpu_inst_unlock(inst);
1473 }
1474
vdec_event_eos(struct vpu_inst * inst)1475 static void vdec_event_eos(struct vpu_inst *inst)
1476 {
1477 struct vdec_t *vdec = inst->priv;
1478
1479 vpu_trace(inst->dev, "[%d] input : %d, decoded : %d, display : %d, sequence : %d\n",
1480 inst->id,
1481 vdec->params.frame_count,
1482 vdec->decoded_frame_count,
1483 vdec->display_frame_count,
1484 vdec->sequence);
1485 vpu_inst_lock(inst);
1486 vdec->eos_received++;
1487 vdec->fixed_fmt = false;
1488 inst->min_buffer_cap = VDEC_MIN_BUFFER_CAP;
1489 vdec_set_last_buffer_dequeued(inst);
1490 vpu_inst_unlock(inst);
1491 }
1492
vdec_event_notify(struct vpu_inst * inst,u32 event,void * data)1493 static void vdec_event_notify(struct vpu_inst *inst, u32 event, void *data)
1494 {
1495 switch (event) {
1496 case VPU_MSG_ID_SEQ_HDR_FOUND:
1497 vdec_event_seq_hdr(inst, data);
1498 break;
1499 case VPU_MSG_ID_RES_CHANGE:
1500 vdec_event_resolution_change(inst);
1501 break;
1502 case VPU_MSG_ID_FRAME_REQ:
1503 vdec_event_req_fs(inst, data);
1504 break;
1505 case VPU_MSG_ID_FRAME_RELEASE:
1506 vdec_evnet_rel_fs(inst, data);
1507 break;
1508 case VPU_MSG_ID_PIC_EOS:
1509 vdec_event_eos(inst);
1510 break;
1511 default:
1512 break;
1513 }
1514 }
1515
vdec_process_output(struct vpu_inst * inst,struct vb2_buffer * vb)1516 static int vdec_process_output(struct vpu_inst *inst, struct vb2_buffer *vb)
1517 {
1518 struct vdec_t *vdec = inst->priv;
1519 struct vb2_v4l2_buffer *vbuf;
1520 struct vpu_rpc_buffer_desc desc;
1521 u32 free_space;
1522 int ret;
1523
1524 vbuf = to_vb2_v4l2_buffer(vb);
1525 dev_dbg(inst->dev, "[%d] dec output [%d] %d : %ld\n",
1526 inst->id, vbuf->sequence, vb->index, vb2_get_plane_payload(vb, 0));
1527
1528 if (inst->state == VPU_CODEC_STATE_DEINIT)
1529 return -EINVAL;
1530 if (vdec->reset_codec)
1531 return -EINVAL;
1532
1533 if (inst->state == VPU_CODEC_STATE_STARTED)
1534 vdec_update_state(inst, VPU_CODEC_STATE_ACTIVE, 0);
1535
1536 ret = vpu_iface_get_stream_buffer_desc(inst, &desc);
1537 if (ret)
1538 return ret;
1539
1540 free_space = vpu_helper_get_free_space(inst);
1541 if (free_space < vb2_get_plane_payload(vb, 0) + 0x40000)
1542 return -ENOMEM;
1543
1544 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_INUSE);
1545 ret = vpu_iface_input_frame(inst, vb);
1546 if (ret < 0)
1547 return -ENOMEM;
1548
1549 dev_dbg(inst->dev, "[%d][INPUT TS]%32lld\n", inst->id, vb->timestamp);
1550 vdec->params.frame_count++;
1551
1552 if (vdec->drain)
1553 vdec_drain(inst);
1554
1555 return 0;
1556 }
1557
vdec_process_capture(struct vpu_inst * inst,struct vb2_buffer * vb)1558 static int vdec_process_capture(struct vpu_inst *inst, struct vb2_buffer *vb)
1559 {
1560 struct vdec_t *vdec = inst->priv;
1561 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
1562 int ret;
1563
1564 if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE)
1565 return -EINVAL;
1566 if (vdec->reset_codec)
1567 return -EINVAL;
1568
1569 ret = vdec_response_frame(inst, vbuf);
1570 if (ret)
1571 return ret;
1572 v4l2_m2m_dst_buf_remove_by_buf(inst->fh.m2m_ctx, vbuf);
1573 return 0;
1574 }
1575
vdec_on_queue_empty(struct vpu_inst * inst,u32 type)1576 static void vdec_on_queue_empty(struct vpu_inst *inst, u32 type)
1577 {
1578 struct vdec_t *vdec = inst->priv;
1579
1580 if (V4L2_TYPE_IS_OUTPUT(type))
1581 return;
1582
1583 vdec_handle_resolution_change(inst);
1584 if (vdec->eos_received)
1585 vdec_set_last_buffer_dequeued(inst);
1586 }
1587
vdec_abort(struct vpu_inst * inst)1588 static void vdec_abort(struct vpu_inst *inst)
1589 {
1590 struct vdec_t *vdec = inst->priv;
1591 struct vpu_rpc_buffer_desc desc;
1592 int ret;
1593
1594 vpu_trace(inst->dev, "[%d] state = %s\n", inst->id, vpu_codec_state_name(inst->state));
1595
1596 vdec->aborting = true;
1597 vpu_iface_add_scode(inst, SCODE_PADDING_ABORT);
1598 vdec->params.end_flag = 1;
1599 vpu_iface_set_decode_params(inst, &vdec->params, 1);
1600
1601 vpu_session_abort(inst);
1602
1603 ret = vpu_iface_get_stream_buffer_desc(inst, &desc);
1604 if (!ret)
1605 vpu_iface_update_stream_buffer(inst, desc.rptr, 1);
1606
1607 vpu_session_rst_buf(inst);
1608 vpu_trace(inst->dev, "[%d] input : %d, decoded : %d, display : %d, sequence : %d\n",
1609 inst->id,
1610 vdec->params.frame_count,
1611 vdec->decoded_frame_count,
1612 vdec->display_frame_count,
1613 vdec->sequence);
1614 if (!vdec->seq_hdr_found)
1615 vdec->reset_codec = true;
1616 vdec->params.end_flag = 0;
1617 vdec->drain = 0;
1618 vdec->params.frame_count = 0;
1619 vdec->decoded_frame_count = 0;
1620 vdec->display_frame_count = 0;
1621 vdec->sequence = 0;
1622 vdec->aborting = false;
1623 inst->extra_size = 0;
1624 }
1625
vdec_stop(struct vpu_inst * inst,bool free)1626 static void vdec_stop(struct vpu_inst *inst, bool free)
1627 {
1628 struct vdec_t *vdec = inst->priv;
1629
1630 vdec_clear_slots(inst);
1631 if (inst->state != VPU_CODEC_STATE_DEINIT)
1632 vpu_session_stop(inst);
1633 vdec_clear_fs(&vdec->mbi);
1634 vdec_clear_fs(&vdec->dcp);
1635 if (free) {
1636 vpu_free_dma(&vdec->udata);
1637 vpu_free_dma(&inst->stream_buffer);
1638 }
1639 vdec_update_state(inst, VPU_CODEC_STATE_DEINIT, 1);
1640 vdec->reset_codec = false;
1641 }
1642
vdec_release(struct vpu_inst * inst)1643 static void vdec_release(struct vpu_inst *inst)
1644 {
1645 if (inst->id != VPU_INST_NULL_ID)
1646 vpu_trace(inst->dev, "[%d]\n", inst->id);
1647 vdec_stop(inst, true);
1648 }
1649
vdec_cleanup(struct vpu_inst * inst)1650 static void vdec_cleanup(struct vpu_inst *inst)
1651 {
1652 struct vdec_t *vdec;
1653
1654 if (!inst)
1655 return;
1656
1657 vdec = inst->priv;
1658 if (vdec) {
1659 kfree(vdec->slots);
1660 vdec->slots = NULL;
1661 vdec->slot_count = 0;
1662 }
1663 kfree(vdec);
1664 inst->priv = NULL;
1665 kfree(inst);
1666 }
1667
vdec_init_params(struct vdec_t * vdec)1668 static void vdec_init_params(struct vdec_t *vdec)
1669 {
1670 vdec->params.frame_count = 0;
1671 vdec->params.end_flag = 0;
1672 }
1673
vdec_start(struct vpu_inst * inst)1674 static int vdec_start(struct vpu_inst *inst)
1675 {
1676 struct vdec_t *vdec = inst->priv;
1677 int stream_buffer_size;
1678 int ret;
1679
1680 if (inst->state != VPU_CODEC_STATE_DEINIT)
1681 return 0;
1682
1683 vpu_trace(inst->dev, "[%d]\n", inst->id);
1684 if (!vdec->udata.virt) {
1685 vdec->udata.length = 0x1000;
1686 ret = vpu_alloc_dma(inst->core, &vdec->udata);
1687 if (ret) {
1688 dev_err(inst->dev, "[%d] alloc udata fail\n", inst->id);
1689 goto error;
1690 }
1691 }
1692
1693 if (!inst->stream_buffer.virt) {
1694 stream_buffer_size = vpu_iface_get_stream_buffer_size(inst->core);
1695 if (stream_buffer_size > 0) {
1696 inst->stream_buffer.length = stream_buffer_size;
1697 ret = vpu_alloc_dma(inst->core, &inst->stream_buffer);
1698 if (ret) {
1699 dev_err(inst->dev, "[%d] alloc stream buffer fail\n", inst->id);
1700 goto error;
1701 }
1702 inst->use_stream_buffer = true;
1703 }
1704 }
1705
1706 if (inst->use_stream_buffer)
1707 vpu_iface_config_stream_buffer(inst, &inst->stream_buffer);
1708 vpu_iface_init_instance(inst);
1709 vdec->params.udata.base = vdec->udata.phys;
1710 vdec->params.udata.size = vdec->udata.length;
1711 ret = vpu_iface_set_decode_params(inst, &vdec->params, 0);
1712 if (ret) {
1713 dev_err(inst->dev, "[%d] set decode params fail\n", inst->id);
1714 goto error;
1715 }
1716
1717 vdec_init_params(vdec);
1718 ret = vpu_session_start(inst);
1719 if (ret) {
1720 dev_err(inst->dev, "[%d] start fail\n", inst->id);
1721 goto error;
1722 }
1723
1724 vdec_update_state(inst, VPU_CODEC_STATE_STARTED, 0);
1725
1726 return 0;
1727 error:
1728 vpu_free_dma(&vdec->udata);
1729 vpu_free_dma(&inst->stream_buffer);
1730 return ret;
1731 }
1732
vdec_start_session(struct vpu_inst * inst,u32 type)1733 static int vdec_start_session(struct vpu_inst *inst, u32 type)
1734 {
1735 struct vdec_t *vdec = inst->priv;
1736 int ret = 0;
1737
1738 if (V4L2_TYPE_IS_OUTPUT(type)) {
1739 if (vdec->reset_codec)
1740 vdec_stop(inst, false);
1741 if (inst->state == VPU_CODEC_STATE_DEINIT) {
1742 ret = vdec_start(inst);
1743 if (ret)
1744 return ret;
1745 }
1746 }
1747
1748 if (V4L2_TYPE_IS_OUTPUT(type)) {
1749 vdec_update_state(inst, vdec->state, 1);
1750 vdec->eos_received = 0;
1751 vpu_process_output_buffer(inst);
1752 } else {
1753 vdec_cmd_start(inst);
1754 }
1755 if (inst->state == VPU_CODEC_STATE_ACTIVE)
1756 vdec_response_fs_request(inst, false);
1757
1758 return ret;
1759 }
1760
vdec_stop_session(struct vpu_inst * inst,u32 type)1761 static int vdec_stop_session(struct vpu_inst *inst, u32 type)
1762 {
1763 struct vdec_t *vdec = inst->priv;
1764
1765 if (inst->state == VPU_CODEC_STATE_DEINIT)
1766 return 0;
1767
1768 if (V4L2_TYPE_IS_OUTPUT(type)) {
1769 vdec_update_state(inst, VPU_CODEC_STATE_SEEK, 0);
1770 vdec->drain = 0;
1771 vdec_abort(inst);
1772 } else {
1773 if (inst->state != VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) {
1774 if (vb2_is_streaming(v4l2_m2m_get_src_vq(inst->fh.m2m_ctx)))
1775 vdec_abort(inst);
1776 vdec->eos_received = 0;
1777 }
1778 vdec_clear_slots(inst);
1779 }
1780
1781 return 0;
1782 }
1783
vdec_get_slot_debug_info(struct vpu_inst * inst,char * str,u32 size,u32 i)1784 static int vdec_get_slot_debug_info(struct vpu_inst *inst, char *str, u32 size, u32 i)
1785 {
1786 struct vdec_t *vdec = inst->priv;
1787 struct vpu_vb2_buffer *vpu_buf;
1788 int num = -1;
1789
1790 vpu_inst_lock(inst);
1791 if (i >= vdec->slot_count || !vdec->slots[i].addr)
1792 goto exit;
1793
1794 vpu_buf = vdec->slots[i].curr;
1795
1796 num = scnprintf(str, size, "slot[%2d] :", i);
1797 if (vpu_buf) {
1798 num += scnprintf(str + num, size - num, " %2d",
1799 vpu_buf->m2m_buf.vb.vb2_buf.index);
1800 num += scnprintf(str + num, size - num, "; state = %d", vdec->slots[i].state);
1801 } else {
1802 num += scnprintf(str + num, size - num, " -1");
1803 }
1804
1805 if (vdec->slots[i].pend)
1806 num += scnprintf(str + num, size - num, "; %d",
1807 vdec->slots[i].pend->m2m_buf.vb.vb2_buf.index);
1808
1809 num += scnprintf(str + num, size - num, "\n");
1810 exit:
1811 vpu_inst_unlock(inst);
1812
1813 return num;
1814 }
1815
vdec_get_debug_info(struct vpu_inst * inst,char * str,u32 size,u32 i)1816 static int vdec_get_debug_info(struct vpu_inst *inst, char *str, u32 size, u32 i)
1817 {
1818 struct vdec_t *vdec = inst->priv;
1819 int num;
1820
1821 switch (i) {
1822 case 0:
1823 num = scnprintf(str, size,
1824 "req_frame_count = %d\ninterlaced = %d\n",
1825 vdec->req_frame_count,
1826 vdec->codec_info.progressive ? 0 : 1);
1827 break;
1828 case 1:
1829 num = scnprintf(str, size,
1830 "mbi: size = 0x%x request = %d, alloc = %d, response = %d\n",
1831 vdec->mbi.size,
1832 vdec->mbi.req_count,
1833 vdec->mbi.count,
1834 vdec->mbi.index);
1835 break;
1836 case 2:
1837 num = scnprintf(str, size,
1838 "dcp: size = 0x%x request = %d, alloc = %d, response = %d\n",
1839 vdec->dcp.size,
1840 vdec->dcp.req_count,
1841 vdec->dcp.count,
1842 vdec->dcp.index);
1843 break;
1844 case 3:
1845 num = scnprintf(str, size, "input_frame_count = %d\n", vdec->params.frame_count);
1846 break;
1847 case 4:
1848 num = scnprintf(str, size, "decoded_frame_count = %d\n", vdec->decoded_frame_count);
1849 break;
1850 case 5:
1851 num = scnprintf(str, size, "display_frame_count = %d\n", vdec->display_frame_count);
1852 break;
1853 case 6:
1854 num = scnprintf(str, size, "sequence = %d\n", vdec->sequence);
1855 break;
1856 case 7:
1857 num = scnprintf(str, size, "drain = %d, eos = %d, source_change = %d\n",
1858 vdec->drain, vdec->eos_received, vdec->source_change);
1859 break;
1860 case 8:
1861 num = scnprintf(str, size, "fps = %d/%d\n",
1862 vdec->codec_info.frame_rate.numerator,
1863 vdec->codec_info.frame_rate.denominator);
1864 break;
1865 case 9:
1866 num = scnprintf(str, size, "colorspace: %d, %d, %d, %d (%d)\n",
1867 vdec->codec_info.color_primaries,
1868 vdec->codec_info.transfer_chars,
1869 vdec->codec_info.matrix_coeffs,
1870 vdec->codec_info.full_range,
1871 vdec->codec_info.vui_present);
1872 break;
1873 default:
1874 num = vdec_get_slot_debug_info(inst, str, size, i - 10);
1875 break;
1876 }
1877
1878 return num;
1879 }
1880
1881 static struct vpu_inst_ops vdec_inst_ops = {
1882 .ctrl_init = vdec_ctrl_init,
1883 .check_ready = vdec_check_ready,
1884 .buf_done = vdec_buf_done,
1885 .get_one_frame = vdec_frame_decoded,
1886 .stop_done = vdec_stop_done,
1887 .event_notify = vdec_event_notify,
1888 .release = vdec_release,
1889 .cleanup = vdec_cleanup,
1890 .start = vdec_start_session,
1891 .stop = vdec_stop_session,
1892 .process_output = vdec_process_output,
1893 .process_capture = vdec_process_capture,
1894 .on_queue_empty = vdec_on_queue_empty,
1895 .get_debug_info = vdec_get_debug_info,
1896 .wait_prepare = vpu_inst_unlock,
1897 .wait_finish = vpu_inst_lock,
1898 .attach_frame_store = vdec_attach_frame_store,
1899 .reset_frame_store = vdec_reset_frame_store,
1900 };
1901
vdec_init(struct file * file)1902 static void vdec_init(struct file *file)
1903 {
1904 struct vpu_inst *inst = to_inst(file);
1905 struct v4l2_format f;
1906
1907 memset(&f, 0, sizeof(f));
1908 f.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
1909 f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264;
1910 f.fmt.pix_mp.width = 1280;
1911 f.fmt.pix_mp.height = 720;
1912 f.fmt.pix_mp.field = V4L2_FIELD_NONE;
1913 vdec_s_fmt(file, &inst->fh, &f);
1914
1915 memset(&f, 0, sizeof(f));
1916 f.type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1917 f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12M_8L128;
1918 f.fmt.pix_mp.width = 1280;
1919 f.fmt.pix_mp.height = 720;
1920 f.fmt.pix_mp.field = V4L2_FIELD_NONE;
1921 vdec_s_fmt(file, &inst->fh, &f);
1922 }
1923
vdec_open(struct file * file)1924 static int vdec_open(struct file *file)
1925 {
1926 struct vpu_inst *inst;
1927 struct vdec_t *vdec;
1928 int ret;
1929
1930 inst = kzalloc_obj(*inst);
1931 if (!inst)
1932 return -ENOMEM;
1933
1934 vdec = kzalloc_obj(*vdec);
1935 if (!vdec) {
1936 kfree(inst);
1937 return -ENOMEM;
1938 }
1939
1940 vdec->slots = kmalloc_objs(*vdec->slots, VDEC_SLOT_CNT_DFT,
1941 GFP_KERNEL | __GFP_ZERO);
1942 if (!vdec->slots) {
1943 kfree(vdec);
1944 kfree(inst);
1945 return -ENOMEM;
1946 }
1947 vdec->slot_count = VDEC_SLOT_CNT_DFT;
1948
1949 inst->ops = &vdec_inst_ops;
1950 inst->formats = vdec_formats;
1951 inst->type = VPU_CORE_TYPE_DEC;
1952 inst->priv = vdec;
1953
1954 ret = vpu_v4l2_open(file, inst);
1955 if (ret)
1956 return ret;
1957
1958 vdec->fixed_fmt = false;
1959 vdec->state = VPU_CODEC_STATE_ACTIVE;
1960 inst->min_buffer_cap = VDEC_MIN_BUFFER_CAP;
1961 inst->min_buffer_out = VDEC_MIN_BUFFER_OUT;
1962 vdec_init(file);
1963
1964 return 0;
1965 }
1966
1967 static const struct v4l2_file_operations vdec_fops = {
1968 .owner = THIS_MODULE,
1969 .open = vdec_open,
1970 .release = vpu_v4l2_close,
1971 .unlocked_ioctl = video_ioctl2,
1972 .poll = v4l2_m2m_fop_poll,
1973 .mmap = v4l2_m2m_fop_mmap,
1974 };
1975
vdec_get_ioctl_ops(void)1976 const struct v4l2_ioctl_ops *vdec_get_ioctl_ops(void)
1977 {
1978 return &vdec_ioctl_ops;
1979 }
1980
vdec_get_fops(void)1981 const struct v4l2_file_operations *vdec_get_fops(void)
1982 {
1983 return &vdec_fops;
1984 }
1985