1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * System Control and Power Interface (SCPI) Protocol based clock driver 4 * 5 * Copyright (C) 2015 ARM Ltd. 6 */ 7 8 #include <linux/clk-provider.h> 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/of.h> 12 #include <linux/module.h> 13 #include <linux/platform_device.h> 14 #include <linux/scpi_protocol.h> 15 16 struct scpi_clk { 17 u32 id; 18 struct clk_hw hw; 19 struct scpi_dvfs_info *info; 20 struct scpi_ops *scpi_ops; 21 }; 22 23 #define to_scpi_clk(clk) container_of(clk, struct scpi_clk, hw) 24 25 static struct platform_device *cpufreq_dev; 26 27 static unsigned long scpi_clk_recalc_rate(struct clk_hw *hw, 28 unsigned long parent_rate) 29 { 30 struct scpi_clk *clk = to_scpi_clk(hw); 31 32 return clk->scpi_ops->clk_get_val(clk->id); 33 } 34 35 static int scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate, 36 unsigned long parent_rate) 37 { 38 struct scpi_clk *clk = to_scpi_clk(hw); 39 40 return clk->scpi_ops->clk_set_val(clk->id, rate); 41 } 42 43 static const struct clk_ops scpi_clk_ops = { 44 .recalc_rate = scpi_clk_recalc_rate, 45 .determine_rate = clk_determine_rate_noop, 46 .set_rate = scpi_clk_set_rate, 47 }; 48 49 /* find closest match to given frequency in OPP table */ 50 static long __scpi_dvfs_round_rate(struct scpi_clk *clk, unsigned long rate) 51 { 52 int idx; 53 unsigned long fmin = 0, fmax = ~0, ftmp; 54 const struct scpi_opp *opp = clk->info->opps; 55 56 for (idx = 0; idx < clk->info->count; idx++, opp++) { 57 ftmp = opp->freq; 58 if (ftmp >= rate) { 59 if (ftmp <= fmax) 60 fmax = ftmp; 61 break; 62 } else if (ftmp >= fmin) { 63 fmin = ftmp; 64 } 65 } 66 return fmax != ~0 ? fmax : fmin; 67 } 68 69 static unsigned long scpi_dvfs_recalc_rate(struct clk_hw *hw, 70 unsigned long parent_rate) 71 { 72 struct scpi_clk *clk = to_scpi_clk(hw); 73 int idx = clk->scpi_ops->dvfs_get_idx(clk->id); 74 const struct scpi_opp *opp; 75 76 if (idx < 0) 77 return 0; 78 79 opp = clk->info->opps + idx; 80 return opp->freq; 81 } 82 83 static int scpi_dvfs_determine_rate(struct clk_hw *hw, 84 struct clk_rate_request *req) 85 { 86 struct scpi_clk *clk = to_scpi_clk(hw); 87 88 req->rate = __scpi_dvfs_round_rate(clk, req->rate); 89 90 return 0; 91 } 92 93 static int __scpi_find_dvfs_index(struct scpi_clk *clk, unsigned long rate) 94 { 95 int idx, max_opp = clk->info->count; 96 const struct scpi_opp *opp = clk->info->opps; 97 98 for (idx = 0; idx < max_opp; idx++, opp++) 99 if (opp->freq == rate) 100 return idx; 101 return -EINVAL; 102 } 103 104 static int scpi_dvfs_set_rate(struct clk_hw *hw, unsigned long rate, 105 unsigned long parent_rate) 106 { 107 struct scpi_clk *clk = to_scpi_clk(hw); 108 int ret = __scpi_find_dvfs_index(clk, rate); 109 110 if (ret < 0) 111 return ret; 112 return clk->scpi_ops->dvfs_set_idx(clk->id, (u8)ret); 113 } 114 115 static const struct clk_ops scpi_dvfs_ops = { 116 .recalc_rate = scpi_dvfs_recalc_rate, 117 .determine_rate = scpi_dvfs_determine_rate, 118 .set_rate = scpi_dvfs_set_rate, 119 }; 120 121 static const struct of_device_id scpi_clk_match[] __maybe_unused = { 122 { .compatible = "arm,scpi-dvfs-clocks", .data = &scpi_dvfs_ops, }, 123 { .compatible = "arm,scpi-variable-clocks", .data = &scpi_clk_ops, }, 124 {} 125 }; 126 127 static int 128 scpi_clk_ops_init(struct device *dev, const struct of_device_id *match, 129 struct scpi_clk *sclk, const char *name) 130 { 131 struct clk_init_data init; 132 unsigned long min = 0, max = 0; 133 int ret; 134 135 init.name = name; 136 init.flags = 0; 137 init.num_parents = 0; 138 init.ops = match->data; 139 sclk->hw.init = &init; 140 sclk->scpi_ops = get_scpi_ops(); 141 142 if (init.ops == &scpi_dvfs_ops) { 143 sclk->info = sclk->scpi_ops->dvfs_get_info(sclk->id); 144 if (IS_ERR(sclk->info)) 145 return PTR_ERR(sclk->info); 146 } else if (init.ops == &scpi_clk_ops) { 147 if (sclk->scpi_ops->clk_get_range(sclk->id, &min, &max) || !max) 148 return -EINVAL; 149 } else { 150 return -EINVAL; 151 } 152 153 ret = devm_clk_hw_register(dev, &sclk->hw); 154 if (!ret && max) 155 clk_hw_set_rate_range(&sclk->hw, min, max); 156 return ret; 157 } 158 159 struct scpi_clk_data { 160 struct scpi_clk **clk; 161 unsigned int clk_num; 162 }; 163 164 static struct clk_hw * 165 scpi_of_clk_src_get(struct of_phandle_args *clkspec, void *data) 166 { 167 struct scpi_clk *sclk; 168 struct scpi_clk_data *clk_data = data; 169 unsigned int idx = clkspec->args[0], count; 170 171 for (count = 0; count < clk_data->clk_num; count++) { 172 sclk = clk_data->clk[count]; 173 if (idx == sclk->id) 174 return &sclk->hw; 175 } 176 177 return ERR_PTR(-EINVAL); 178 } 179 180 static int scpi_clk_add(struct device *dev, struct device_node *np, 181 const struct of_device_id *match) 182 { 183 int idx, count, err; 184 struct scpi_clk_data *clk_data; 185 186 count = of_property_count_strings(np, "clock-output-names"); 187 if (count < 0) { 188 dev_err(dev, "%pOFn: invalid clock output count\n", np); 189 return -EINVAL; 190 } 191 192 clk_data = devm_kmalloc(dev, sizeof(*clk_data), GFP_KERNEL); 193 if (!clk_data) 194 return -ENOMEM; 195 196 clk_data->clk_num = count; 197 clk_data->clk = devm_kcalloc(dev, count, sizeof(*clk_data->clk), 198 GFP_KERNEL); 199 if (!clk_data->clk) 200 return -ENOMEM; 201 202 for (idx = 0; idx < count; idx++) { 203 struct scpi_clk *sclk; 204 const char *name; 205 u32 val; 206 207 sclk = devm_kzalloc(dev, sizeof(*sclk), GFP_KERNEL); 208 if (!sclk) 209 return -ENOMEM; 210 211 if (of_property_read_string_index(np, "clock-output-names", 212 idx, &name)) { 213 dev_err(dev, "invalid clock name @ %pOFn\n", np); 214 return -EINVAL; 215 } 216 217 if (of_property_read_u32_index(np, "clock-indices", 218 idx, &val)) { 219 dev_err(dev, "invalid clock index @ %pOFn\n", np); 220 return -EINVAL; 221 } 222 223 sclk->id = val; 224 225 err = scpi_clk_ops_init(dev, match, sclk, name); 226 if (err) { 227 dev_err(dev, "failed to register clock '%s'\n", name); 228 return err; 229 } 230 231 dev_dbg(dev, "Registered clock '%s'\n", name); 232 clk_data->clk[idx] = sclk; 233 } 234 235 return of_clk_add_hw_provider(np, scpi_of_clk_src_get, clk_data); 236 } 237 238 static void scpi_clocks_remove(struct platform_device *pdev) 239 { 240 struct device *dev = &pdev->dev; 241 struct device_node *child, *np = dev->of_node; 242 243 if (cpufreq_dev) { 244 platform_device_unregister(cpufreq_dev); 245 cpufreq_dev = NULL; 246 } 247 248 for_each_available_child_of_node(np, child) 249 of_clk_del_provider(child); 250 } 251 252 static int scpi_clocks_probe(struct platform_device *pdev) 253 { 254 int ret; 255 struct device *dev = &pdev->dev; 256 struct device_node *np = dev->of_node; 257 const struct of_device_id *match; 258 259 if (!get_scpi_ops()) 260 return -ENXIO; 261 262 for_each_available_child_of_node_scoped(np, child) { 263 match = of_match_node(scpi_clk_match, child); 264 if (!match) 265 continue; 266 ret = scpi_clk_add(dev, child, match); 267 if (ret) { 268 scpi_clocks_remove(pdev); 269 return ret; 270 } 271 272 if (match->data != &scpi_dvfs_ops) 273 continue; 274 /* Add the virtual cpufreq device if it's DVFS clock provider */ 275 cpufreq_dev = platform_device_register_simple("scpi-cpufreq", 276 -1, NULL, 0); 277 if (IS_ERR(cpufreq_dev)) 278 pr_warn("unable to register cpufreq device"); 279 } 280 return 0; 281 } 282 283 static const struct of_device_id scpi_clocks_ids[] = { 284 { .compatible = "arm,scpi-clocks", }, 285 {} 286 }; 287 MODULE_DEVICE_TABLE(of, scpi_clocks_ids); 288 289 static struct platform_driver scpi_clocks_driver = { 290 .driver = { 291 .name = "scpi_clocks", 292 .of_match_table = scpi_clocks_ids, 293 }, 294 .probe = scpi_clocks_probe, 295 .remove = scpi_clocks_remove, 296 }; 297 module_platform_driver(scpi_clocks_driver); 298 299 MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>"); 300 MODULE_DESCRIPTION("ARM SCPI clock driver"); 301 MODULE_LICENSE("GPL v2"); 302