xref: /linux/drivers/infiniband/hw/mlx4/mr.c (revision 3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d)
1 /*
2  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
3  * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4  *
5  * This software is available to you under a choice of one of two
6  * licenses.  You may choose to be licensed under the terms of the GNU
7  * General Public License (GPL) Version 2, available from the file
8  * COPYING in the main directory of this source tree, or the
9  * OpenIB.org BSD license below:
10  *
11  *     Redistribution and use in source and binary forms, with or
12  *     without modification, are permitted provided that the following
13  *     conditions are met:
14  *
15  *      - Redistributions of source code must retain the above
16  *        copyright notice, this list of conditions and the following
17  *        disclaimer.
18  *
19  *      - Redistributions in binary form must reproduce the above
20  *        copyright notice, this list of conditions and the following
21  *        disclaimer in the documentation and/or other materials
22  *        provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  */
33 
34 #include <linux/slab.h>
35 #include <rdma/ib_user_verbs.h>
36 #include <rdma/iter.h>
37 
38 #include "mlx4_ib.h"
39 
40 static u32 convert_access(int acc)
41 {
42 	return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX4_PERM_ATOMIC       : 0) |
43 	       (acc & IB_ACCESS_REMOTE_WRITE  ? MLX4_PERM_REMOTE_WRITE : 0) |
44 	       (acc & IB_ACCESS_REMOTE_READ   ? MLX4_PERM_REMOTE_READ  : 0) |
45 	       (acc & IB_ACCESS_LOCAL_WRITE   ? MLX4_PERM_LOCAL_WRITE  : 0) |
46 	       (acc & IB_ACCESS_MW_BIND	      ? MLX4_PERM_BIND_MW      : 0) |
47 	       MLX4_PERM_LOCAL_READ;
48 }
49 
50 static enum mlx4_mw_type to_mlx4_type(enum ib_mw_type type)
51 {
52 	switch (type) {
53 	case IB_MW_TYPE_1:	return MLX4_MW_TYPE_1;
54 	case IB_MW_TYPE_2:	return MLX4_MW_TYPE_2;
55 	default:		return -1;
56 	}
57 }
58 
59 struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc)
60 {
61 	struct mlx4_ib_mr *mr;
62 	int err;
63 
64 	mr = kzalloc_obj(*mr);
65 	if (!mr)
66 		return ERR_PTR(-ENOMEM);
67 
68 	err = mlx4_mr_alloc(to_mdev(pd->device)->dev, to_mpd(pd)->pdn, 0,
69 			    ~0ull, convert_access(acc), 0, 0, &mr->mmr);
70 	if (err)
71 		goto err_free;
72 
73 	err = mlx4_mr_enable(to_mdev(pd->device)->dev, &mr->mmr);
74 	if (err)
75 		goto err_mr;
76 
77 	mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
78 	mr->umem = NULL;
79 
80 	return &mr->ibmr;
81 
82 err_mr:
83 	(void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr);
84 
85 err_free:
86 	kfree(mr);
87 
88 	return ERR_PTR(err);
89 }
90 
91 int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
92 			   struct ib_umem *umem)
93 {
94 	struct ib_block_iter biter;
95 	int err, i = 0;
96 	u64 addr;
97 
98 	rdma_umem_for_each_dma_block(umem, &biter, BIT(mtt->page_shift)) {
99 		addr = rdma_block_iter_dma_address(&biter);
100 		err = mlx4_write_mtt(dev->dev, mtt, i++, 1, &addr);
101 		if (err)
102 			return err;
103 	}
104 	return 0;
105 }
106 
107 static struct ib_umem *mlx4_get_umem_mr(struct ib_device *device, u64 start,
108 					u64 length, int access_flags)
109 {
110 	/*
111 	 * Force registering the memory as writable if the underlying pages
112 	 * are writable.  This is so rereg can change the access permissions
113 	 * from readable to writable without having to run through ib_umem_get_va
114 	 * again
115 	 */
116 	if (!ib_access_writable(access_flags)) {
117 		unsigned long untagged_start = untagged_addr(start);
118 		struct vm_area_struct *vma;
119 
120 		mmap_read_lock(current->mm);
121 		/*
122 		 * FIXME: Ideally this would iterate over all the vmas that
123 		 * cover the memory, but for now it requires a single vma to
124 		 * entirely cover the MR to support RO mappings.
125 		 */
126 		vma = find_vma(current->mm, untagged_start);
127 		if (vma && vma->vm_end >= untagged_start + length &&
128 		    vma->vm_start <= untagged_start) {
129 			if (vma->vm_flags & VM_WRITE)
130 				access_flags |= IB_ACCESS_LOCAL_WRITE;
131 		} else {
132 			access_flags |= IB_ACCESS_LOCAL_WRITE;
133 		}
134 
135 		mmap_read_unlock(current->mm);
136 	}
137 
138 	return ib_umem_get_va(device, start, length, access_flags);
139 }
140 
141 struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
142 				  u64 virt_addr, int access_flags,
143 				  struct ib_dmah *dmah,
144 				  struct ib_udata *udata)
145 {
146 	struct mlx4_ib_dev *dev = to_mdev(pd->device);
147 	struct mlx4_ib_mr *mr;
148 	int shift;
149 	int err;
150 	int n;
151 
152 	if (dmah)
153 		return ERR_PTR(-EOPNOTSUPP);
154 
155 	mr = kzalloc_obj(*mr);
156 	if (!mr)
157 		return ERR_PTR(-ENOMEM);
158 
159 	mr->umem = mlx4_get_umem_mr(pd->device, start, length, access_flags);
160 	if (IS_ERR(mr->umem)) {
161 		err = PTR_ERR(mr->umem);
162 		goto err_free;
163 	}
164 
165 	shift = mlx4_ib_umem_calc_optimal_mtt_size(mr->umem, start, &n);
166 	if (shift < 0) {
167 		err = shift;
168 		goto err_umem;
169 	}
170 
171 	err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, virt_addr, length,
172 			    convert_access(access_flags), n, shift, &mr->mmr);
173 	if (err)
174 		goto err_umem;
175 
176 	err = mlx4_ib_umem_write_mtt(dev, &mr->mmr.mtt, mr->umem);
177 	if (err)
178 		goto err_mr;
179 
180 	err = mlx4_mr_enable(dev->dev, &mr->mmr);
181 	if (err)
182 		goto err_mr;
183 
184 	mr->access_flags = access_flags;
185 	mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
186 	mr->ibmr.page_size = 1U << shift;
187 
188 	return &mr->ibmr;
189 
190 err_mr:
191 	(void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr);
192 
193 err_umem:
194 	ib_umem_release(mr->umem);
195 
196 err_free:
197 	kfree(mr);
198 
199 	return ERR_PTR(err);
200 }
201 
202 struct ib_mr *mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags, u64 start,
203 				    u64 length, u64 virt_addr,
204 				    int mr_access_flags, struct ib_pd *pd,
205 				    struct ib_udata *udata)
206 {
207 	struct mlx4_ib_dev *dev = to_mdev(mr->device);
208 	struct mlx4_ib_mr *mmr = to_mmr(mr);
209 	struct mlx4_mpt_entry *mpt_entry;
210 	struct mlx4_mpt_entry **pmpt_entry = &mpt_entry;
211 	int err;
212 
213 	err = ib_umem_check_rereg(mmr->umem, flags, mr_access_flags);
214 	if (err)
215 		return ERR_PTR(err);
216 
217 	/* Since we synchronize this call and mlx4_ib_dereg_mr via uverbs,
218 	 * we assume that the calls can't run concurrently. Otherwise, a
219 	 * race exists.
220 	 */
221 	err =  mlx4_mr_hw_get_mpt(dev->dev, &mmr->mmr, &pmpt_entry);
222 	if (err)
223 		return ERR_PTR(err);
224 
225 	if (flags & IB_MR_REREG_PD) {
226 		err = mlx4_mr_hw_change_pd(dev->dev, *pmpt_entry,
227 					   to_mpd(pd)->pdn);
228 
229 		if (err)
230 			goto release_mpt_entry;
231 	}
232 
233 	if (flags & IB_MR_REREG_ACCESS) {
234 		if (ib_access_writable(mr_access_flags) &&
235 		    !mmr->umem->writable) {
236 			err = -EPERM;
237 			goto release_mpt_entry;
238 		}
239 
240 		err = mlx4_mr_hw_change_access(dev->dev, *pmpt_entry,
241 					       convert_access(mr_access_flags));
242 
243 		if (err)
244 			goto release_mpt_entry;
245 	} else {
246 		mr_access_flags = mmr->access_flags;
247 	}
248 
249 	if (flags & IB_MR_REREG_TRANS) {
250 		int shift;
251 		int n;
252 
253 		mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr);
254 		ib_umem_release(mmr->umem);
255 		mmr->umem = mlx4_get_umem_mr(mr->device, start, length,
256 					     mr_access_flags);
257 		if (IS_ERR(mmr->umem)) {
258 			err = PTR_ERR(mmr->umem);
259 			/* Prevent mlx4_ib_dereg_mr from free'ing invalid pointer */
260 			mmr->umem = NULL;
261 			goto release_mpt_entry;
262 		}
263 		n = ib_umem_num_dma_blocks(mmr->umem, PAGE_SIZE);
264 		shift = PAGE_SHIFT;
265 
266 		err = mlx4_mr_rereg_mem_write(dev->dev, &mmr->mmr,
267 					      virt_addr, length, n, shift,
268 					      *pmpt_entry);
269 		if (err) {
270 			ib_umem_release(mmr->umem);
271 			goto release_mpt_entry;
272 		}
273 		mmr->mmr.iova       = virt_addr;
274 		mmr->mmr.size       = length;
275 
276 		err = mlx4_ib_umem_write_mtt(dev, &mmr->mmr.mtt, mmr->umem);
277 		if (err) {
278 			mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr);
279 			ib_umem_release(mmr->umem);
280 			goto release_mpt_entry;
281 		}
282 	}
283 
284 	/* If we couldn't transfer the MR to the HCA, just remember to
285 	 * return a failure. But dereg_mr will free the resources.
286 	 */
287 	err = mlx4_mr_hw_write_mpt(dev->dev, &mmr->mmr, pmpt_entry);
288 	if (!err && flags & IB_MR_REREG_ACCESS) {
289 		mmr->access_flags = mr_access_flags;
290 		mmr->mmr.access = convert_access(mr_access_flags);
291 	}
292 
293 release_mpt_entry:
294 	mlx4_mr_hw_put_mpt(dev->dev, pmpt_entry);
295 	if (err)
296 		return ERR_PTR(err);
297 	return NULL;
298 }
299 
300 static int
301 mlx4_alloc_priv_pages(struct ib_device *device,
302 		      struct mlx4_ib_mr *mr,
303 		      int max_pages)
304 {
305 	int ret;
306 
307 	/* Ensure that size is aligned to DMA cacheline
308 	 * requirements.
309 	 * max_pages is limited to MLX4_MAX_FAST_REG_PAGES
310 	 * so page_map_size will never cross PAGE_SIZE.
311 	 */
312 	mr->page_map_size = roundup(max_pages * sizeof(u64),
313 				    MLX4_MR_PAGES_ALIGN);
314 
315 	/* Prevent cross page boundary allocation. */
316 	mr->pages = kzalloc(PAGE_SIZE, GFP_KERNEL);
317 	if (!mr->pages)
318 		return -ENOMEM;
319 
320 	mr->page_map = dma_map_single(device->dev.parent, mr->pages,
321 				      mr->page_map_size, DMA_TO_DEVICE);
322 
323 	if (dma_mapping_error(device->dev.parent, mr->page_map)) {
324 		ret = -ENOMEM;
325 		goto err;
326 	}
327 
328 	return 0;
329 
330 err:
331 	kfree(mr->pages);
332 	return ret;
333 }
334 
335 static void
336 mlx4_free_priv_pages(struct mlx4_ib_mr *mr)
337 {
338 	if (mr->pages) {
339 		struct ib_device *device = mr->ibmr.device;
340 
341 		dma_unmap_single(device->dev.parent, mr->page_map,
342 				 mr->page_map_size, DMA_TO_DEVICE);
343 		kfree(mr->pages);
344 		mr->pages = NULL;
345 	}
346 }
347 
348 int mlx4_ib_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
349 {
350 	struct mlx4_ib_mr *mr = to_mmr(ibmr);
351 	int ret;
352 
353 	mlx4_free_priv_pages(mr);
354 
355 	ret = mlx4_mr_free(to_mdev(ibmr->device)->dev, &mr->mmr);
356 	if (ret)
357 		return ret;
358 	if (mr->umem)
359 		ib_umem_release(mr->umem);
360 	kfree(mr);
361 
362 	return 0;
363 }
364 
365 int mlx4_ib_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata)
366 {
367 	struct mlx4_ib_dev *dev = to_mdev(ibmw->device);
368 	struct mlx4_ib_mw *mw = to_mmw(ibmw);
369 	int err;
370 
371 	err = mlx4_mw_alloc(dev->dev, to_mpd(ibmw->pd)->pdn,
372 			    to_mlx4_type(ibmw->type), &mw->mmw);
373 	if (err)
374 		return err;
375 
376 	err = mlx4_mw_enable(dev->dev, &mw->mmw);
377 	if (err)
378 		goto err_mw;
379 
380 	ibmw->rkey = mw->mmw.key;
381 	return 0;
382 
383 err_mw:
384 	mlx4_mw_free(dev->dev, &mw->mmw);
385 	return err;
386 }
387 
388 int mlx4_ib_dealloc_mw(struct ib_mw *ibmw)
389 {
390 	struct mlx4_ib_mw *mw = to_mmw(ibmw);
391 
392 	mlx4_mw_free(to_mdev(ibmw->device)->dev, &mw->mmw);
393 	return 0;
394 }
395 
396 struct ib_mr *mlx4_ib_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
397 			       u32 max_num_sg)
398 {
399 	struct mlx4_ib_dev *dev = to_mdev(pd->device);
400 	struct mlx4_ib_mr *mr;
401 	int err;
402 
403 	if (mr_type != IB_MR_TYPE_MEM_REG ||
404 	    max_num_sg > MLX4_MAX_FAST_REG_PAGES)
405 		return ERR_PTR(-EINVAL);
406 
407 	mr = kzalloc_obj(*mr);
408 	if (!mr)
409 		return ERR_PTR(-ENOMEM);
410 
411 	err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, 0, 0, 0,
412 			    max_num_sg, 0, &mr->mmr);
413 	if (err)
414 		goto err_free;
415 
416 	err = mlx4_alloc_priv_pages(pd->device, mr, max_num_sg);
417 	if (err)
418 		goto err_free_mr;
419 
420 	mr->max_pages = max_num_sg;
421 	err = mlx4_mr_enable(dev->dev, &mr->mmr);
422 	if (err)
423 		goto err_free_pl;
424 
425 	mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
426 	mr->umem = NULL;
427 
428 	return &mr->ibmr;
429 
430 err_free_pl:
431 	mr->ibmr.device = pd->device;
432 	mlx4_free_priv_pages(mr);
433 err_free_mr:
434 	(void) mlx4_mr_free(dev->dev, &mr->mmr);
435 err_free:
436 	kfree(mr);
437 	return ERR_PTR(err);
438 }
439 
440 static int mlx4_set_page(struct ib_mr *ibmr, u64 addr)
441 {
442 	struct mlx4_ib_mr *mr = to_mmr(ibmr);
443 
444 	if (unlikely(mr->npages == mr->max_pages))
445 		return -ENOMEM;
446 
447 	mr->pages[mr->npages++] = cpu_to_be64(addr | MLX4_MTT_FLAG_PRESENT);
448 
449 	return 0;
450 }
451 
452 int mlx4_ib_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
453 		      unsigned int *sg_offset)
454 {
455 	struct mlx4_ib_mr *mr = to_mmr(ibmr);
456 	int rc;
457 
458 	mr->npages = 0;
459 
460 	ib_dma_sync_single_for_cpu(ibmr->device, mr->page_map,
461 				   mr->page_map_size, DMA_TO_DEVICE);
462 
463 	rc = ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, mlx4_set_page);
464 
465 	ib_dma_sync_single_for_device(ibmr->device, mr->page_map,
466 				      mr->page_map_size, DMA_TO_DEVICE);
467 
468 	return rc;
469 }
470