1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 *
5 */
6
7 #include <linux/bitfield.h>
8 #include <linux/bitmap.h>
9 #include <linux/bitops.h>
10 #include <linux/cleanup.h>
11 #include <linux/device.h>
12 #include <linux/io.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/mutex.h>
16 #include <linux/nvmem-consumer.h>
17 #include <linux/of.h>
18 #include <linux/regmap.h>
19 #include <linux/sizes.h>
20 #include <linux/slab.h>
21 #include <linux/soc/qcom/llcc-qcom.h>
22
23 #define ACTIVATE BIT(0)
24 #define DEACTIVATE BIT(1)
25 #define ACT_CLEAR BIT(0)
26 #define ACT_COMPLETE BIT(4)
27 #define ACT_CTRL_OPCODE_ACTIVATE BIT(0)
28 #define ACT_CTRL_OPCODE_DEACTIVATE BIT(1)
29 #define ACT_CTRL_ACT_TRIG BIT(0)
30 #define ACT_CTRL_OPCODE_SHIFT 1
31 #define ATTR1_PROBE_TARGET_WAYS_SHIFT 2
32 #define ATTR1_FIXED_SIZE_SHIFT 3
33 #define ATTR1_PRIORITY_SHIFT 4
34 #define ATTR1_MAX_CAP_SHIFT 16
35 #define ATTR0_RES_WAYS_MASK GENMASK(15, 0)
36 #define ATTR0_BONUS_WAYS_MASK GENMASK(31, 16)
37 #define ATTR0_BONUS_WAYS_SHIFT 16
38 #define ATTR2_PROBE_TARGET_WAYS_MASK BIT(4)
39 #define ATTR2_FIXED_SIZE_MASK BIT(8)
40 #define ATTR2_PRIORITY_MASK GENMASK(14, 12)
41 #define ATTR2_PARENT_SCID_MASK GENMASK(21, 16)
42 #define ATTR2_IN_A_GROUP_MASK BIT(24)
43 #define LLCC_STATUS_READ_DELAY 100
44
45 #define CACHE_LINE_SIZE_SHIFT 6
46
47 #define LLCC_LB_CNT_MASK GENMASK(31, 28)
48 #define LLCC_LB_CNT_SHIFT 28
49
50 #define MAX_CAP_TO_BYTES(n) (n * SZ_1K)
51 #define LLCC_TRP_ACT_CTRLn(n) (n * SZ_4K)
52 #define LLCC_TRP_ACT_CLEARn(n) (8 + n * SZ_4K)
53 #define LLCC_TRP_STATUSn(n) (4 + n * SZ_4K)
54 #define LLCC_TRP_ATTR0_CFGn(n) (0x21000 + SZ_8 * n)
55 #define LLCC_TRP_ATTR1_CFGn(n) (0x21004 + SZ_8 * n)
56 #define LLCC_TRP_ATTR2_CFGn(n) (0x21100 + SZ_4 * n)
57 #define LLCC_V6_TRP_ATTR0_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR0_CFG] + SZ_64 * (n))
58 #define LLCC_V6_TRP_ATTR1_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR1_CFG] + SZ_64 * (n))
59 #define LLCC_V6_TRP_ATTR2_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR2_CFG] + SZ_64 * (n))
60 #define LLCC_V6_TRP_ATTR3_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR3_CFG] + SZ_64 * (n))
61
62 #define LLCC_TRP_SCID_DIS_CAP_ALLOC 0x21f00
63 #define LLCC_TRP_PCB_ACT 0x21f04
64 #define LLCC_TRP_ALGO_CFG1 0x21f0c
65 #define LLCC_TRP_ALGO_CFG2 0x21f10
66 #define LLCC_TRP_ALGO_CFG3 0x21f14
67 #define LLCC_TRP_ALGO_CFG4 0x21f18
68 #define LLCC_TRP_ALGO_CFG5 0x21f1c
69 #define LLCC_TRP_WRSC_EN 0x21f20
70 #define LLCC_TRP_ALGO_CFG6 0x21f24
71 #define LLCC_TRP_ALGO_CFG7 0x21f28
72 #define LLCC_TRP_WRSC_CACHEABLE_EN 0x21f2c
73 #define LLCC_TRP_ALGO_CFG8 0x21f30
74
75 #define LLCC_VERSION_2_0_0_0 0x02000000
76 #define LLCC_VERSION_2_1_0_0 0x02010000
77 #define LLCC_VERSION_4_1_0_0 0x04010000
78 #define LLCC_VERSION_6_0_0_0 0X06000000
79
80 /**
81 * struct llcc_slice_config - Data associated with the llcc slice
82 * @usecase_id: Unique id for the client's use case
83 * @slice_id: llcc slice id for each client
84 * @max_cap: The maximum capacity of the cache slice provided in KB
85 * @priority: Priority of the client used to select victim line for replacement
86 * @fixed_size: Boolean indicating if the slice has a fixed capacity
87 * @bonus_ways: Bonus ways are additional ways to be used for any slice,
88 * if client ends up using more than reserved cache ways. Bonus
89 * ways are allocated only if they are not reserved for some
90 * other client.
91 * @res_ways: Reserved ways for the cache slice, the reserved ways cannot
92 * be used by any other client than the one its assigned to.
93 * @cache_mode: Each slice operates as a cache, this controls the mode of the
94 * slice: normal or TCM(Tightly Coupled Memory)
95 * @probe_target_ways: Determines what ways to probe for access hit. When
96 * configured to 1 only bonus and reserved ways are probed.
97 * When configured to 0 all ways in llcc are probed.
98 * @dis_cap_alloc: Disable capacity based allocation for a client
99 * @retain_on_pc: If this bit is set and client has maintained active vote
100 * then the ways assigned to this client are not flushed on power
101 * collapse.
102 * @activate_on_init: Activate the slice immediately after it is programmed
103 * @write_scid_en: Bit enables write cache support for a given scid.
104 * @write_scid_cacheable_en: Enables write cache cacheable support for a
105 * given scid (not supported on v2 or older hardware).
106 * @stale_en: Bit enables stale.
107 * @stale_cap_en: Bit enables stale only if current scid is over-cap.
108 * @mru_uncap_en: Roll-over on reserved cache ways if current scid is
109 * under-cap.
110 * @mru_rollover: Roll-over on reserved cache ways.
111 * @alloc_oneway_en: Allways allocate one way on over-cap even if there's no
112 * same-scid lines for replacement.
113 * @ovcap_en: Once current scid is over-capacity, allocate other over-cap SCID.
114 * @ovcap_prio: Once current scid is over-capacity, allocate other low priority
115 * over-cap scid. Depends on corresponding bit being set in
116 * ovcap_en.
117 * @vict_prio: When current scid is under-capacity, allocate over other
118 * lower-than victim priority-line threshold scid.
119 * @parent_slice_id: For grouped slices, specifies the slice id of the parent.
120 */
121 struct llcc_slice_config {
122 u32 usecase_id;
123 u32 slice_id;
124 u32 max_cap;
125 u32 priority;
126 bool fixed_size;
127 u32 bonus_ways;
128 u32 res_ways;
129 u32 cache_mode;
130 u32 probe_target_ways;
131 bool dis_cap_alloc;
132 bool retain_on_pc;
133 bool activate_on_init;
134 bool write_scid_en;
135 bool write_scid_cacheable_en;
136 bool stale_en;
137 bool stale_cap_en;
138 bool mru_uncap_en;
139 bool mru_rollover;
140 bool alloc_oneway_en;
141 bool ovcap_en;
142 bool ovcap_prio;
143 bool vict_prio;
144 u32 parent_slice_id;
145 };
146
147 struct qcom_llcc_config {
148 const struct llcc_slice_config *sct_data;
149 const u32 *reg_offset;
150 const struct llcc_edac_reg_offset *edac_reg_offset;
151 u32 max_cap_shift; /* instead of ATTR1_MAX_CAP_SHIFT */
152 u32 num_banks;
153 int size;
154 bool skip_llcc_cfg;
155 bool no_edac;
156 bool irq_configured;
157 bool no_broadcast_register;
158 };
159
160 struct qcom_sct_config {
161 const struct qcom_llcc_config *llcc_config;
162 int num_config;
163 };
164
165 enum llcc_reg_offset {
166 LLCC_COMMON_HW_INFO,
167 LLCC_COMMON_STATUS0,
168 LLCC_TRP_ATTR0_CFG,
169 LLCC_TRP_ATTR1_CFG,
170 LLCC_TRP_ATTR2_CFG,
171 LLCC_TRP_ATTR3_CFG,
172 LLCC_TRP_SID_DIS_CAP_ALLOC,
173 LLCC_TRP_ALGO_STALE_EN,
174 LLCC_TRP_ALGO_STALE_CAP_EN,
175 LLCC_TRP_ALGO_MRU0,
176 LLCC_TRP_ALGO_MRU1,
177 LLCC_TRP_ALGO_ALLOC0,
178 LLCC_TRP_ALGO_ALLOC1,
179 LLCC_TRP_ALGO_ALLOC2,
180 LLCC_TRP_ALGO_ALLOC3,
181 LLCC_TRP_WRS_EN,
182 LLCC_TRP_WRS_CACHEABLE_EN,
183 };
184
185 static const struct llcc_slice_config glymur_data[] = {
186 {
187 .usecase_id = LLCC_CPUSS,
188 .slice_id = 1,
189 .max_cap = 7680,
190 .priority = 1,
191 .bonus_ways = 0xFFF,
192 .res_ways = 0x0,
193 .vict_prio = true,
194 .activate_on_init = true,
195 }, {
196 .usecase_id = LLCC_VIDSC0,
197 .slice_id = 2,
198 .max_cap = 512,
199 .priority = 3,
200 .fixed_size = true,
201 .bonus_ways = 0xFFF,
202 .res_ways = 0x0,
203 .vict_prio = true,
204 }, {
205 .usecase_id = LLCC_AUDIO,
206 .slice_id = 6,
207 .max_cap = 1024,
208 .priority = 1,
209 .fixed_size = true,
210 .bonus_ways = 0xFFF,
211 .res_ways = 0x0,
212 .vict_prio = true,
213 }, {
214 .usecase_id = LLCC_VIDSC1,
215 .slice_id = 4,
216 .max_cap = 512,
217 .priority = 3,
218 .fixed_size = true,
219 .bonus_ways = 0xFFF,
220 .res_ways = 0x0,
221 .vict_prio = true,
222 }, {
223 .usecase_id = LLCC_CMPT,
224 .slice_id = 10,
225 .max_cap = 7680,
226 .priority = 1,
227 .fixed_size = true,
228 .bonus_ways = 0xFFF,
229 .res_ways = 0x0,
230 .vict_prio = true,
231 }, {
232 .usecase_id = LLCC_GPUHTW,
233 .slice_id = 11,
234 .max_cap = 512,
235 .priority = 1,
236 .fixed_size = true,
237 .bonus_ways = 0xFFF,
238 .res_ways = 0x0,
239 .vict_prio = true,
240 }, {
241 .usecase_id = LLCC_GPU,
242 .slice_id = 9,
243 .max_cap = 7680,
244 .priority = 1,
245 .bonus_ways = 0xFFF,
246 .res_ways = 0x0,
247 .write_scid_en = true,
248 .write_scid_cacheable_en = true,
249 .stale_en = true,
250 .vict_prio = true,
251 }, {
252 .usecase_id = LLCC_MMUHWT,
253 .slice_id = 18,
254 .max_cap = 768,
255 .priority = 1,
256 .fixed_size = true,
257 .bonus_ways = 0xFFF,
258 .res_ways = 0x0,
259 .vict_prio = true,
260 .activate_on_init = true,
261 }, {
262 .usecase_id = LLCC_AUDHW,
263 .slice_id = 22,
264 .max_cap = 1024,
265 .priority = 1,
266 .fixed_size = true,
267 .bonus_ways = 0xFFF,
268 .res_ways = 0x0,
269 .vict_prio = true,
270 }, {
271 .usecase_id = LLCC_CVP,
272 .slice_id = 8,
273 .max_cap = 64,
274 .priority = 3,
275 .fixed_size = true,
276 .bonus_ways = 0xFFF,
277 .res_ways = 0x0,
278 .vict_prio = true,
279 }, {
280 .usecase_id = LLCC_WRCACHE,
281 .slice_id = 31,
282 .max_cap = 1536,
283 .priority = 1,
284 .fixed_size = true,
285 .bonus_ways = 0xFFF,
286 .res_ways = 0x0,
287 .vict_prio = true,
288 .activate_on_init = true,
289 }, {
290 .usecase_id = LLCC_CMPTHCP,
291 .slice_id = 17,
292 .max_cap = 256,
293 .priority = 3,
294 .fixed_size = true,
295 .bonus_ways = 0xFFF,
296 .res_ways = 0x0,
297 .vict_prio = true,
298 }, {
299 .usecase_id = LLCC_LCPDARE,
300 .slice_id = 30,
301 .max_cap = 768,
302 .priority = 3,
303 .fixed_size = true,
304 .bonus_ways = 0xFFF,
305 .res_ways = 0x0,
306 .alloc_oneway_en = true,
307 .vict_prio = true,
308 .activate_on_init = true,
309 }, {
310 .usecase_id = LLCC_AENPU,
311 .slice_id = 3,
312 .max_cap = 3072,
313 .priority = 1,
314 .fixed_size = true,
315 .bonus_ways = 0xFFF,
316 .res_ways = 0x0,
317 .cache_mode = 2,
318 .vict_prio = true,
319 }, {
320 .usecase_id = LLCC_ISLAND1,
321 .slice_id = 12,
322 .max_cap = 5632,
323 .priority = 7,
324 .fixed_size = true,
325 .bonus_ways = 0x0,
326 .res_ways = 0x7FF,
327 .vict_prio = true,
328 }, {
329 .usecase_id = LLCC_VIDVSP,
330 .slice_id = 28,
331 .max_cap = 256,
332 .priority = 3,
333 .fixed_size = true,
334 .bonus_ways = 0xFFF,
335 .res_ways = 0x0,
336 .vict_prio = true,
337 }, {
338 .usecase_id = LLCC_OOBM_NS,
339 .slice_id = 5,
340 .max_cap = 512,
341 .priority = 1,
342 .bonus_ways = 0xFFF,
343 .res_ways = 0x0,
344 .vict_prio = true,
345 }, {
346 .usecase_id = LLCC_CPUSS_OPP,
347 .slice_id = 32,
348 .max_cap = 0,
349 .fixed_size = true,
350 .bonus_ways = 0x0,
351 .res_ways = 0x0,
352 .vict_prio = true,
353 .activate_on_init = true,
354 }, {
355 .usecase_id = LLCC_PCIE_TCU,
356 .slice_id = 19,
357 .max_cap = 256,
358 .priority = 1,
359 .fixed_size = true,
360 .bonus_ways = 0xFFF,
361 .res_ways = 0x0,
362 .vict_prio = true,
363 .activate_on_init = true,
364 }, {
365 .usecase_id = LLCC_VIDSC_VSP1,
366 .slice_id = 29,
367 .max_cap = 256,
368 .priority = 3,
369 .fixed_size = true,
370 .bonus_ways = 0xFFF,
371 .res_ways = 0x0,
372 .vict_prio = true,
373 }
374 };
375
376 static const struct llcc_slice_config ipq5424_data[] = {
377 {
378 .usecase_id = LLCC_CPUSS,
379 .slice_id = 1,
380 .max_cap = 768,
381 .priority = 1,
382 .bonus_ways = 0xFFFF,
383 .retain_on_pc = true,
384 .activate_on_init = true,
385 .write_scid_cacheable_en = true,
386 .stale_en = true,
387 .stale_cap_en = true,
388 .alloc_oneway_en = true,
389 .ovcap_en = true,
390 .ovcap_prio = true,
391 .vict_prio = true,
392 },
393 {
394 .usecase_id = LLCC_VIDSC0,
395 .slice_id = 2,
396 .max_cap = 256,
397 .priority = 2,
398 .fixed_size = true,
399 .bonus_ways = 0xF000,
400 .retain_on_pc = true,
401 .activate_on_init = true,
402 .write_scid_cacheable_en = true,
403 .stale_en = true,
404 .stale_cap_en = true,
405 },
406 };
407
408 static const struct llcc_slice_config kaanapali_data[] = {
409 {
410 .usecase_id = LLCC_CPUSS,
411 .slice_id = 1,
412 .max_cap = 5120,
413 .priority = 1,
414 .bonus_ways = 0xffffffff,
415 .activate_on_init = true,
416 .write_scid_en = true,
417 .stale_en = true,
418 .mru_uncap_en = true,
419 .vict_prio = true,
420 }, {
421 .usecase_id = LLCC_VIDSC0,
422 .slice_id = 2,
423 .max_cap = 512,
424 .priority = 4,
425 .fixed_size = true,
426 .bonus_ways = 0xffffffff,
427 .mru_uncap_en = true,
428 .vict_prio = true,
429 }, {
430 .usecase_id = LLCC_AUDIO,
431 .slice_id = 35,
432 .max_cap = 512,
433 .priority = 1,
434 .fixed_size = true,
435 .bonus_ways = 0xffffffff,
436 .mru_uncap_en = true,
437 .vict_prio = true,
438 }, {
439 .usecase_id = LLCC_MDMHPGRW,
440 .slice_id = 25,
441 .max_cap = 1024,
442 .priority = 5,
443 .bonus_ways = 0xffffffff,
444 .mru_uncap_en = true,
445 .vict_prio = true,
446 }, {
447 .usecase_id = LLCC_CMPT,
448 .slice_id = 34,
449 .max_cap = 4096,
450 .priority = 1,
451 .fixed_size = true,
452 .bonus_ways = 0xffffffff,
453 .mru_uncap_en = true,
454 .vict_prio = true,
455 }, {
456 .usecase_id = LLCC_GPUHTW,
457 .slice_id = 11,
458 .max_cap = 512,
459 .priority = 1,
460 .fixed_size = true,
461 .bonus_ways = 0xffffffff,
462 .mru_uncap_en = true,
463 .vict_prio = true,
464 }, {
465 .usecase_id = LLCC_GPU,
466 .slice_id = 9,
467 .max_cap = 5632,
468 .priority = 1,
469 .fixed_size = true,
470 .bonus_ways = 0xffffffff,
471 .write_scid_cacheable_en = true,
472 .mru_uncap_en = true,
473 .vict_prio = true,
474 }, {
475 .usecase_id = LLCC_MMUHWT,
476 .slice_id = 18,
477 .max_cap = 768,
478 .priority = 1,
479 .fixed_size = true,
480 .bonus_ways = 0xffffffff,
481 .activate_on_init = true,
482 .mru_uncap_en = true,
483 .vict_prio = true,
484 }, {
485 .usecase_id = LLCC_DISP,
486 .slice_id = 16,
487 .max_cap = 7168,
488 .priority = 1,
489 .fixed_size = true,
490 .bonus_ways = 0xffffffff,
491 .cache_mode = 2,
492 .stale_en = true,
493 .mru_uncap_en = true,
494 .vict_prio = true,
495 }, {
496 .usecase_id = LLCC_MDMHPFX,
497 .slice_id = 24,
498 .max_cap = 1024,
499 .priority = 5,
500 .fixed_size = true,
501 .bonus_ways = 0xffffffff,
502 .mru_uncap_en = true,
503 .vict_prio = true,
504 }, {
505 .usecase_id = LLCC_MDMPNG,
506 .slice_id = 27,
507 .max_cap = 256,
508 .priority = 5,
509 .bonus_ways = 0xfffff,
510 .mru_uncap_en = true,
511 .vict_prio = true,
512 }, {
513 .usecase_id = LLCC_CVP,
514 .slice_id = 8,
515 .max_cap = 800,
516 .priority = 5,
517 .fixed_size = true,
518 .bonus_ways = 0xffffffff,
519 .mru_uncap_en = true,
520 .ovcap_en = true,
521 .vict_prio = true,
522 .parent_slice_id = 33,
523 }, {
524 .usecase_id = LLCC_MODPE,
525 .slice_id = 29,
526 .max_cap = 256,
527 .priority = 1,
528 .fixed_size = true,
529 .bonus_ways = 0xf0000000,
530 .mru_uncap_en = true,
531 .alloc_oneway_en = true,
532 .vict_prio = true,
533 }, {
534 .usecase_id = LLCC_WRCACHE,
535 .slice_id = 31,
536 .max_cap = 512,
537 .priority = 1,
538 .fixed_size = true,
539 .bonus_ways = 0xffffffff,
540 .activate_on_init = true,
541 .mru_uncap_en = true,
542 .vict_prio = true,
543 }, {
544 .usecase_id = LLCC_CVPFW,
545 .slice_id = 19,
546 .max_cap = 512,
547 .priority = 5,
548 .fixed_size = true,
549 .bonus_ways = 0xffffffff,
550 .mru_uncap_en = true,
551 .vict_prio = true,
552 .parent_slice_id = 33,
553 }, {
554 .usecase_id = LLCC_CPUMTE,
555 .slice_id = 7,
556 .max_cap = 256,
557 .priority = 1,
558 .fixed_size = true,
559 .bonus_ways = 0xffffffff,
560 .mru_uncap_en = true,
561 .vict_prio = true,
562 }, {
563 .usecase_id = LLCC_CMPTHCP,
564 .slice_id = 15,
565 .max_cap = 256,
566 .priority = 4,
567 .fixed_size = true,
568 .bonus_ways = 0xffffffff,
569 .mru_uncap_en = true,
570 .vict_prio = true,
571 }, {
572 .usecase_id = LLCC_LCPDARE,
573 .slice_id = 30,
574 .max_cap = 128,
575 .priority = 5,
576 .fixed_size = true,
577 .bonus_ways = 0xffffffff,
578 .activate_on_init = true,
579 .mru_uncap_en = true,
580 .alloc_oneway_en = true,
581 .vict_prio = true,
582 }, {
583 .usecase_id = LLCC_AENPU,
584 .slice_id = 3,
585 .max_cap = 3072,
586 .priority = 1,
587 .fixed_size = true,
588 .bonus_ways = 0xffffffff,
589 .cache_mode = 2,
590 .mru_uncap_en = true,
591 .vict_prio = true,
592 }, {
593 .usecase_id = LLCC_ISLAND1,
594 .slice_id = 12,
595 .max_cap = 7936,
596 .priority = 7,
597 .fixed_size = true,
598 .bonus_ways = 0x7fffffff,
599 .mru_uncap_en = true,
600 .vict_prio = true,
601 }, {
602 .usecase_id = LLCC_DISP_WB,
603 .slice_id = 23,
604 .max_cap = 512,
605 .priority = 4,
606 .fixed_size = true,
607 .bonus_ways = 0xffffffff,
608 .mru_uncap_en = true,
609 .vict_prio = true,
610 }, {
611 .usecase_id = LLCC_VIDVSP,
612 .slice_id = 4,
613 .max_cap = 256,
614 .priority = 4,
615 .fixed_size = true,
616 .bonus_ways = 0xffffffff,
617 .mru_uncap_en = true,
618 .vict_prio = true,
619 }, {
620 .usecase_id = LLCC_VIDDEC,
621 .slice_id = 5,
622 .max_cap = 512,
623 .priority = 4,
624 .fixed_size = true,
625 .bonus_ways = 0xffffffff,
626 .cache_mode = 2,
627 .mru_uncap_en = true,
628 .ovcap_en = true,
629 .vict_prio = true,
630 .parent_slice_id = 33,
631 }, {
632 .usecase_id = LLCC_CAMOFE,
633 .slice_id = 33,
634 .max_cap = 6144,
635 .priority = 4,
636 .fixed_size = true,
637 .bonus_ways = 0xffffffff,
638 .stale_en = true,
639 .mru_uncap_en = true,
640 .ovcap_en = true,
641 .vict_prio = true,
642 .parent_slice_id = 33,
643 }, {
644 .usecase_id = LLCC_CAMRTIP,
645 .slice_id = 13,
646 .max_cap = 6144,
647 .priority = 4,
648 .fixed_size = true,
649 .bonus_ways = 0xffffffff,
650 .stale_en = true,
651 .mru_uncap_en = true,
652 .ovcap_en = true,
653 .vict_prio = true,
654 .parent_slice_id = 33,
655 }, {
656 .usecase_id = LLCC_CAMRTRF,
657 .slice_id = 10,
658 .max_cap = 3584,
659 .priority = 3,
660 .fixed_size = true,
661 .bonus_ways = 0xffffffff,
662 .stale_en = true,
663 .mru_uncap_en = true,
664 .ovcap_en = true,
665 .vict_prio = true,
666 .parent_slice_id = 33,
667 }, {
668 .usecase_id = LLCC_CAMSRTRF,
669 .slice_id = 21,
670 .max_cap = 6144,
671 .priority = 1,
672 .fixed_size = true,
673 .bonus_ways = 0xffffffff,
674 .stale_en = true,
675 .mru_uncap_en = true,
676 .ovcap_en = true,
677 .vict_prio = true,
678 .parent_slice_id = 33,
679 }, {
680 .usecase_id = LLCC_VIDEO_APV,
681 .slice_id = 6,
682 .max_cap = 768,
683 .priority = 4,
684 .fixed_size = true,
685 .bonus_ways = 0xffffffff,
686 .mru_uncap_en = true,
687 .vict_prio = true,
688 }, {
689 .usecase_id = LLCC_COMPUTE1,
690 .slice_id = 22,
691 .max_cap = 4096,
692 .priority = 1,
693 .fixed_size = true,
694 .bonus_ways = 0xffffffff,
695 .mru_uncap_en = true,
696 .vict_prio = true,
697 }, {
698 .usecase_id = LLCC_CPUSS_OPP,
699 .slice_id = 32,
700 .max_cap = 0,
701 .priority = 0,
702 .fixed_size = true,
703 .bonus_ways = 0,
704 .activate_on_init = true,
705 .write_scid_en = true,
706 .mru_uncap_en = true,
707 .vict_prio = true,
708 }, {
709 .usecase_id = LLCC_CPUSSMPAM,
710 .slice_id = 17,
711 .max_cap = 2048,
712 .priority = 1,
713 .fixed_size = true,
714 .bonus_ways = 0xffffffff,
715 .activate_on_init = true,
716 .write_scid_en = true,
717 .stale_en = true,
718 .mru_uncap_en = true,
719 .vict_prio = true,
720 }, {
721 .usecase_id = LLCC_CAM_IPE_STROV,
722 .slice_id = 14,
723 .max_cap = 400,
724 .priority = 5,
725 .fixed_size = true,
726 .bonus_ways = 0xffffffff,
727 .mru_uncap_en = true,
728 .ovcap_en = true,
729 .vict_prio = true,
730 .parent_slice_id = 33,
731 }, {
732 .usecase_id = LLCC_CAM_OFE_STROV,
733 .slice_id = 20,
734 .max_cap = 400,
735 .priority = 5,
736 .fixed_size = true,
737 .bonus_ways = 0xffffffff,
738 .mru_uncap_en = true,
739 .ovcap_en = true,
740 .vict_prio = true,
741 .parent_slice_id = 33,
742 }, {
743 .usecase_id = LLCC_CPUSS_HEU,
744 .slice_id = 28,
745 .max_cap = 0,
746 .priority = 0,
747 .fixed_size = true,
748 .bonus_ways = 0,
749 .mru_uncap_en = true,
750 .ovcap_en = true,
751 .vict_prio = true,
752 }, {
753 .usecase_id = LLCC_MDM_PNG_FIXED,
754 .slice_id = 26,
755 .max_cap = 256,
756 .priority = 5,
757 .fixed_size = true,
758 .bonus_ways = 0xff000000,
759 .activate_on_init = true,
760 .write_scid_en = true,
761 .mru_uncap_en = true,
762 .vict_prio = true,
763 },
764 };
765
766 static const struct llcc_slice_config sa8775p_data[] = {
767 {
768 .usecase_id = LLCC_CPUSS,
769 .slice_id = 1,
770 .max_cap = 2048,
771 .priority = 1,
772 .bonus_ways = 0xff,
773 .cache_mode = 0,
774 .retain_on_pc = true,
775 .activate_on_init = true,
776 }, {
777 .usecase_id = LLCC_VIDSC0,
778 .slice_id = 2,
779 .max_cap = 512,
780 .priority = 3,
781 .fixed_size = true,
782 .bonus_ways = 0xff,
783 .cache_mode = 0,
784 .retain_on_pc = true,
785 }, {
786 .usecase_id = LLCC_CPUSS1,
787 .slice_id = 3,
788 .max_cap = 1024,
789 .priority = 1,
790 .fixed_size = true,
791 .bonus_ways = 0xff,
792 .cache_mode = 0,
793 .retain_on_pc = true,
794 }, {
795 .usecase_id = LLCC_CPUHWT,
796 .slice_id = 5,
797 .max_cap = 512,
798 .priority = 1,
799 .fixed_size = true,
800 .bonus_ways = 0xff,
801 .cache_mode = 0,
802 .retain_on_pc = true,
803 }, {
804 .usecase_id = LLCC_AUDIO,
805 .slice_id = 6,
806 .max_cap = 1024,
807 .priority = 1,
808 .fixed_size = true,
809 .bonus_ways = 0xff,
810 .cache_mode = 0,
811 }, {
812 .usecase_id = LLCC_CMPT,
813 .slice_id = 10,
814 .max_cap = 4096,
815 .priority = 1,
816 .fixed_size = true,
817 .bonus_ways = 0xff,
818 .cache_mode = 0,
819 .retain_on_pc = true,
820 }, {
821 .usecase_id = LLCC_GPUHTW,
822 .slice_id = 11,
823 .max_cap = 1024,
824 .priority = 1,
825 .fixed_size = true,
826 .bonus_ways = 0xff,
827 .cache_mode = 0,
828 .retain_on_pc = true,
829 }, {
830 .usecase_id = LLCC_GPU,
831 .slice_id = 12,
832 .max_cap = 1024,
833 .priority = 1,
834 .fixed_size = true,
835 .bonus_ways = 0xff,
836 .cache_mode = 0,
837 .retain_on_pc = true,
838 .write_scid_en = true,
839 }, {
840 .usecase_id = LLCC_MMUHWT,
841 .slice_id = 13,
842 .max_cap = 1024,
843 .priority = 1,
844 .fixed_size = true,
845 .bonus_ways = 0xff,
846 .cache_mode = 0,
847 .activate_on_init = true,
848 }, {
849 .usecase_id = LLCC_CMPTDMA,
850 .slice_id = 15,
851 .max_cap = 1024,
852 .priority = 1,
853 .fixed_size = true,
854 .bonus_ways = 0xff,
855 .cache_mode = 0,
856 .retain_on_pc = true,
857 }, {
858 .usecase_id = LLCC_DISP,
859 .slice_id = 16,
860 .max_cap = 4096,
861 .priority = 2,
862 .fixed_size = true,
863 .bonus_ways = 0xff,
864 .cache_mode = 0,
865 .retain_on_pc = true,
866 }, {
867 .usecase_id = LLCC_VIDFW,
868 .slice_id = 17,
869 .max_cap = 3072,
870 .priority = 1,
871 .bonus_ways = 0xff,
872 .cache_mode = 0,
873 .retain_on_pc = true,
874 }, {
875 .usecase_id = LLCC_AUDHW,
876 .slice_id = 22,
877 .max_cap = 1024,
878 .priority = 1,
879 .fixed_size = true,
880 .bonus_ways = 0xff,
881 .cache_mode = 0,
882 }, {
883 .usecase_id = LLCC_CVP,
884 .slice_id = 28,
885 .max_cap = 256,
886 .priority = 3,
887 .fixed_size = true,
888 .bonus_ways = 0xff,
889 .cache_mode = 0,
890 .retain_on_pc = true,
891 }, {
892 .usecase_id = LLCC_APTCM,
893 .slice_id = 30,
894 .max_cap = 1024,
895 .priority = 3,
896 .fixed_size = true,
897 .res_ways = 0xf0,
898 .cache_mode = 1,
899 .retain_on_pc = true,
900 }, {
901 .usecase_id = LLCC_WRCACHE,
902 .slice_id = 31,
903 .max_cap = 512,
904 .priority = 1,
905 .fixed_size = true,
906 .bonus_ways = 0xff,
907 .cache_mode = 0,
908 .activate_on_init = true,
909 },
910 };
911
912 static const struct llcc_slice_config sar1130p_data[] = {
913 {
914 .usecase_id = LLCC_CPUSS,
915 .slice_id = 1,
916 .max_cap = 4096,
917 .priority = 1,
918 .bonus_ways = 0x1fff,
919 .res_ways = 0x0,
920 .cache_mode = 0,
921 .retain_on_pc = true,
922 .activate_on_init = true,
923 }, {
924 .usecase_id = LLCC_VIDSC0,
925 .slice_id = 2,
926 .max_cap = 512,
927 .priority = 3,
928 .fixed_size = true,
929 .bonus_ways = 0x1fff,
930 .res_ways = 0x0,
931 .cache_mode = 0,
932 .retain_on_pc = true,
933 }, {
934 .usecase_id = LLCC_AUDIO,
935 .slice_id = 6,
936 .max_cap = 1024,
937 .priority = 3,
938 .fixed_size = true,
939 .bonus_ways = 0x1fff,
940 .res_ways = 0x0,
941 .cache_mode = 0,
942 .retain_on_pc = true,
943 }, {
944 .usecase_id = LLCC_CMPT,
945 .slice_id = 10,
946 .max_cap = 1024,
947 .priority = 1,
948 .fixed_size = true,
949 .bonus_ways = 0x1fff,
950 .res_ways = 0x0,
951 .cache_mode = 0,
952 .retain_on_pc = true,
953 }, {
954 .usecase_id = LLCC_GPUHTW,
955 .slice_id = 11,
956 .max_cap = 0,
957 .priority = 1,
958 .fixed_size = true,
959 .bonus_ways = 0x1fff,
960 .res_ways = 0x0,
961 .cache_mode = 0,
962 .retain_on_pc = true,
963 }, {
964 .usecase_id = LLCC_GPU,
965 .slice_id = 12,
966 .max_cap = 3072,
967 .priority = 3,
968 .fixed_size = true,
969 .bonus_ways = 0x1fff,
970 .res_ways = 0x0,
971 .cache_mode = 0,
972 .retain_on_pc = true,
973 .write_scid_en = true,
974 }, {
975 .usecase_id = LLCC_MMUHWT,
976 .slice_id = 13,
977 .max_cap = 512,
978 .priority = 1,
979 .fixed_size = true,
980 .bonus_ways = 0x1fff,
981 .res_ways = 0x0,
982 .cache_mode = 0,
983 }, {
984 .usecase_id = LLCC_DISP,
985 .slice_id = 16,
986 .max_cap = 12800,
987 .priority = 1,
988 .fixed_size = true,
989 .bonus_ways = 0x1fff,
990 .res_ways = 0x0,
991 .cache_mode = 0,
992 .retain_on_pc = true,
993 }, {
994 .usecase_id = LLCC_CVP,
995 .slice_id = 28,
996 .max_cap = 256,
997 .priority = 3,
998 .fixed_size = true,
999 .bonus_ways = 0x1fff,
1000 .res_ways = 0x0,
1001 .cache_mode = 0,
1002 .retain_on_pc = true,
1003 }, {
1004 .usecase_id = LLCC_APTCM,
1005 .slice_id = 26,
1006 .max_cap = 2048,
1007 .priority = 3,
1008 .fixed_size = true,
1009 .bonus_ways = 0x0,
1010 .res_ways = 0x3,
1011 .cache_mode = true,
1012 .dis_cap_alloc = true,
1013 .retain_on_pc = true,
1014 }, {
1015 .usecase_id = LLCC_WRCACHE,
1016 .slice_id = 31,
1017 .max_cap = 256,
1018 .priority = 1,
1019 .fixed_size = true,
1020 .bonus_ways = 0x1fff,
1021 .res_ways = 0x0,
1022 .cache_mode = 0,
1023 .activate_on_init = true,
1024 }, {
1025 .usecase_id = LLCC_AENPU,
1026 .slice_id = 30,
1027 .max_cap = 3072,
1028 .priority = 3,
1029 .fixed_size = true,
1030 .bonus_ways = 0x1fff,
1031 .res_ways = 0x0,
1032 .cache_mode = 0,
1033 .retain_on_pc = true,
1034 }, {
1035 .usecase_id = LLCC_DISP_LEFT,
1036 .slice_id = 17,
1037 .max_cap = 0,
1038 .priority = 1,
1039 .fixed_size = true,
1040 .bonus_ways = 0x0,
1041 .res_ways = 0x0,
1042 .cache_mode = 0,
1043 .retain_on_pc = true,
1044 }, {
1045 .usecase_id = LLCC_DISP_RIGHT,
1046 .slice_id = 18,
1047 .max_cap = 0,
1048 .priority = 1,
1049 .fixed_size = true,
1050 .bonus_ways = 0x0,
1051 .res_ways = 0x0,
1052 .cache_mode = 0,
1053 .retain_on_pc = true,
1054 }, {
1055 .usecase_id = LLCC_EVCS_LEFT,
1056 .slice_id = 22,
1057 .max_cap = 0,
1058 .priority = 1,
1059 .fixed_size = true,
1060 .bonus_ways = 0x0,
1061 .res_ways = 0x0,
1062 .cache_mode = 0,
1063 .retain_on_pc = true,
1064 }, {
1065 .usecase_id = LLCC_EVCS_RIGHT,
1066 .slice_id = 23,
1067 .max_cap = 0,
1068 .priority = 1,
1069 .fixed_size = true,
1070 .bonus_ways = 0x0,
1071 .res_ways = 0x0,
1072 .cache_mode = 0,
1073 .retain_on_pc = true,
1074 },
1075 };
1076
1077 static const struct llcc_slice_config sar2130p_data[] = {
1078 {
1079 .usecase_id = LLCC_CPUSS,
1080 .slice_id = 1,
1081 .max_cap = 6144,
1082 .priority = 1,
1083 .fixed_size = 0,
1084 .bonus_ways = 0x3fffffff,
1085 .res_ways = 0x0,
1086 .cache_mode = 0,
1087 .retain_on_pc = true,
1088 .activate_on_init = true,
1089 }, {
1090 .usecase_id = LLCC_VIDSC0,
1091 .slice_id = 2,
1092 .max_cap = 128,
1093 .priority = 2,
1094 .fixed_size = true,
1095 .bonus_ways = 0x3fffffff,
1096 .res_ways = 0x0,
1097 .cache_mode = 0,
1098 .retain_on_pc = true,
1099 }, {
1100 .usecase_id = LLCC_AUDIO,
1101 .slice_id = 6,
1102 .max_cap = 1024,
1103 .priority = 3,
1104 .fixed_size = true,
1105 .bonus_ways = 0x3fffffff,
1106 .res_ways = 0x0,
1107 .cache_mode = 0,
1108 .retain_on_pc = true,
1109 }, {
1110 .usecase_id = LLCC_CMPT,
1111 .slice_id = 10,
1112 .max_cap = 1024,
1113 .priority = 1,
1114 .fixed_size = true,
1115 .bonus_ways = 0x3fffffff,
1116 .res_ways = 0x0,
1117 .cache_mode = 0,
1118 .retain_on_pc = true,
1119 }, {
1120 .usecase_id = LLCC_GPUHTW,
1121 .slice_id = 11,
1122 .max_cap = 0,
1123 .priority = 1,
1124 .fixed_size = true,
1125 .bonus_ways = 0x3fffffff,
1126 .res_ways = 0x0,
1127 .cache_mode = 0,
1128 .retain_on_pc = true,
1129 }, {
1130 .usecase_id = LLCC_GPU,
1131 .slice_id = 12,
1132 .max_cap = 1536,
1133 .priority = 2,
1134 .fixed_size = true,
1135 .bonus_ways = 0x3fffffff,
1136 .res_ways = 0x0,
1137 .cache_mode = 0,
1138 .retain_on_pc = true,
1139 .write_scid_en = true,
1140 }, {
1141 .usecase_id = LLCC_MMUHWT,
1142 .slice_id = 13,
1143 .max_cap = 1024,
1144 .priority = 1,
1145 .fixed_size = true,
1146 .bonus_ways = 0x3fffffff,
1147 .res_ways = 0x0,
1148 .cache_mode = 0,
1149 .activate_on_init = true,
1150 }, {
1151 .usecase_id = LLCC_DISP,
1152 .slice_id = 16,
1153 .max_cap = 0,
1154 .priority = 1,
1155 .fixed_size = true,
1156 .bonus_ways = 0x3fffffff,
1157 .res_ways = 0x0,
1158 .cache_mode = 0,
1159 .retain_on_pc = true,
1160 }, {
1161 .usecase_id = LLCC_APTCM,
1162 .slice_id = 26,
1163 .max_cap = 2048,
1164 .priority = 3,
1165 .fixed_size = true,
1166 .bonus_ways = 0x0,
1167 .res_ways = 0x3,
1168 .cache_mode = true,
1169 .dis_cap_alloc = true,
1170 .retain_on_pc = true,
1171 }, {
1172 .usecase_id = LLCC_WRCACHE,
1173 .slice_id = 31,
1174 .max_cap = 256,
1175 .priority = 1,
1176 .fixed_size = true,
1177 .bonus_ways = 0x3fffffff,
1178 .res_ways = 0x0,
1179 .cache_mode = 0,
1180 .activate_on_init = true,
1181 }, {
1182 .usecase_id = LLCC_VIEYE,
1183 .slice_id = 7,
1184 .max_cap = 7168,
1185 .priority = 4,
1186 .fixed_size = true,
1187 .bonus_ways = 0x3fffffff,
1188 .res_ways = 0x0,
1189 .cache_mode = 0,
1190 .retain_on_pc = true,
1191 }, {
1192 .usecase_id = LLCC_VIDPTH,
1193 .slice_id = 8,
1194 .max_cap = 7168,
1195 .priority = 4,
1196 .fixed_size = true,
1197 .bonus_ways = 0x3fffffff,
1198 .res_ways = 0x0,
1199 .cache_mode = 0,
1200 .retain_on_pc = true,
1201 }, {
1202 .usecase_id = LLCC_GPUMV,
1203 .slice_id = 9,
1204 .max_cap = 2048,
1205 .priority = 2,
1206 .fixed_size = true,
1207 .bonus_ways = 0x3fffffff,
1208 .res_ways = 0x0,
1209 .cache_mode = 0,
1210 .retain_on_pc = true,
1211 }, {
1212 .usecase_id = LLCC_EVA_LEFT,
1213 .slice_id = 20,
1214 .max_cap = 7168,
1215 .priority = 5,
1216 .fixed_size = true,
1217 .bonus_ways = 0x3ffffffc,
1218 .res_ways = 0x0,
1219 .cache_mode = 0,
1220 .retain_on_pc = true,
1221 }, {
1222 .usecase_id = LLCC_EVA_RIGHT,
1223 .slice_id = 21,
1224 .max_cap = 7168,
1225 .priority = 5,
1226 .fixed_size = true,
1227 .bonus_ways = 0x3ffffffc,
1228 .res_ways = 0x0,
1229 .cache_mode = 0,
1230 .retain_on_pc = true,
1231 }, {
1232 .usecase_id = LLCC_EVAGAIN,
1233 .slice_id = 25,
1234 .max_cap = 1024,
1235 .priority = 2,
1236 .fixed_size = true,
1237 .bonus_ways = 0x3fffffff,
1238 .res_ways = 0x0,
1239 .cache_mode = 0,
1240 .retain_on_pc = true,
1241 }, {
1242 .usecase_id = LLCC_AENPU,
1243 .slice_id = 30,
1244 .max_cap = 3072,
1245 .priority = 3,
1246 .fixed_size = true,
1247 .bonus_ways = 0x3fffffff,
1248 .res_ways = 0x0,
1249 .cache_mode = 0,
1250 .retain_on_pc = true,
1251 }, {
1252 .usecase_id = LLCC_VIPTH,
1253 .slice_id = 29,
1254 .max_cap = 1024,
1255 .priority = 4,
1256 .fixed_size = true,
1257 .bonus_ways = 0x3fffffff,
1258 .res_ways = 0x0,
1259 .cache_mode = 0,
1260 .retain_on_pc = true,
1261 }, {
1262 .usecase_id = LLCC_DISP_LEFT,
1263 .slice_id = 17,
1264 .max_cap = 0,
1265 .priority = 1,
1266 .fixed_size = true,
1267 .bonus_ways = 0x0,
1268 .res_ways = 0x0,
1269 .cache_mode = 0,
1270 .retain_on_pc = true,
1271 }, {
1272 .usecase_id = LLCC_DISP_RIGHT,
1273 .slice_id = 18,
1274 .max_cap = 0,
1275 .priority = 1,
1276 .fixed_size = true,
1277 .bonus_ways = 0x0,
1278 .res_ways = 0x0,
1279 .cache_mode = 0,
1280 .retain_on_pc = true,
1281 }, {
1282 .usecase_id = LLCC_EVCS_LEFT,
1283 .slice_id = 22,
1284 .max_cap = 0,
1285 .priority = 1,
1286 .fixed_size = true,
1287 .bonus_ways = 0x0,
1288 .res_ways = 0x0,
1289 .cache_mode = 0,
1290 .retain_on_pc = true,
1291 }, {
1292 .usecase_id = LLCC_EVCS_RIGHT,
1293 .slice_id = 23,
1294 .max_cap = 0,
1295 .priority = 1,
1296 .fixed_size = true,
1297 .bonus_ways = 0x0,
1298 .res_ways = 0x0,
1299 .cache_mode = 0,
1300 .retain_on_pc = true,
1301 }, {
1302 .usecase_id = LLCC_SPAD,
1303 .slice_id = 24,
1304 .max_cap = 7168,
1305 .priority = 1,
1306 .fixed_size = true,
1307 .bonus_ways = 0x0,
1308 .res_ways = 0x0,
1309 .cache_mode = 0,
1310 .retain_on_pc = true,
1311 },
1312 };
1313
1314 static const struct llcc_slice_config sc7180_data[] = {
1315 {
1316 .usecase_id = LLCC_CPUSS,
1317 .slice_id = 1,
1318 .max_cap = 256,
1319 .priority = 1,
1320 .bonus_ways = 0xf,
1321 .cache_mode = 0,
1322 .retain_on_pc = true,
1323 .activate_on_init = true,
1324 }, {
1325 .usecase_id = LLCC_MDM,
1326 .slice_id = 8,
1327 .max_cap = 128,
1328 .priority = 1,
1329 .bonus_ways = 0xf,
1330 .cache_mode = 0,
1331 .retain_on_pc = true,
1332 }, {
1333 .usecase_id = LLCC_GPUHTW,
1334 .slice_id = 11,
1335 .max_cap = 128,
1336 .priority = 1,
1337 .bonus_ways = 0xf,
1338 .cache_mode = 0,
1339 .retain_on_pc = true,
1340 }, {
1341 .usecase_id = LLCC_GPU,
1342 .slice_id = 12,
1343 .max_cap = 128,
1344 .priority = 1,
1345 .bonus_ways = 0xf,
1346 .cache_mode = 0,
1347 .retain_on_pc = true,
1348 },
1349 };
1350
1351 static const struct llcc_slice_config sc7280_data[] = {
1352 {
1353 .usecase_id = LLCC_CPUSS,
1354 .slice_id = 1,
1355 .max_cap = 768,
1356 .priority = 1,
1357 .bonus_ways = 0x3f,
1358 .cache_mode = 0,
1359 .retain_on_pc = true,
1360 .activate_on_init = true,
1361 }, {
1362 .usecase_id = LLCC_MDMHPGRW,
1363 .slice_id = 7,
1364 .max_cap = 512,
1365 .priority = 2,
1366 .fixed_size = true,
1367 .bonus_ways = 0x3f,
1368 .cache_mode = 0,
1369 .retain_on_pc = true,
1370 }, {
1371 .usecase_id = LLCC_CMPT,
1372 .slice_id = 10,
1373 .max_cap = 768,
1374 .priority = 1,
1375 .fixed_size = true,
1376 .bonus_ways = 0x3f,
1377 .cache_mode = 0,
1378 .retain_on_pc = true,
1379 }, {
1380 .usecase_id = LLCC_GPUHTW,
1381 .slice_id = 11,
1382 .max_cap = 256,
1383 .priority = 1,
1384 .fixed_size = true,
1385 .bonus_ways = 0x3f,
1386 .cache_mode = 0,
1387 .retain_on_pc = true,
1388 }, {
1389 .usecase_id = LLCC_GPU,
1390 .slice_id = 12,
1391 .max_cap = 512,
1392 .priority = 1,
1393 .bonus_ways = 0x3f,
1394 .cache_mode = 0,
1395 .retain_on_pc = true,
1396 }, {
1397 .usecase_id = LLCC_MMUHWT,
1398 .slice_id = 13,
1399 .max_cap = 256,
1400 .priority = 1,
1401 .fixed_size = true,
1402 .bonus_ways = 0x3f,
1403 .cache_mode = 0,
1404 .activate_on_init = true,
1405 }, {
1406 .usecase_id = LLCC_MDMPNG,
1407 .slice_id = 21,
1408 .max_cap = 768,
1409 .priority = 0,
1410 .fixed_size = true,
1411 .bonus_ways = 0x3f,
1412 .cache_mode = 0,
1413 .retain_on_pc = true,
1414 }, {
1415 .usecase_id = LLCC_WLHW,
1416 .slice_id = 24,
1417 .max_cap = 256,
1418 .priority = 1,
1419 .fixed_size = true,
1420 .bonus_ways = 0x3f,
1421 .cache_mode = 0,
1422 .retain_on_pc = true,
1423 }, {
1424 .usecase_id = LLCC_MODPE,
1425 .slice_id = 29,
1426 .max_cap = 64,
1427 .priority = 1,
1428 .fixed_size = true,
1429 .bonus_ways = 0x3f,
1430 .cache_mode = 0,
1431 .retain_on_pc = true,
1432 },
1433 };
1434
1435 static const struct llcc_slice_config sc8180x_data[] = {
1436 {
1437 .usecase_id = LLCC_CPUSS,
1438 .slice_id = 1,
1439 .max_cap = 6144,
1440 .priority = 1,
1441 .fixed_size = true,
1442 .bonus_ways = 0xfff,
1443 .cache_mode = 0,
1444 .retain_on_pc = true,
1445 .activate_on_init = true,
1446 }, {
1447 .usecase_id = LLCC_VIDSC0,
1448 .slice_id = 2,
1449 .max_cap = 512,
1450 .priority = 2,
1451 .fixed_size = true,
1452 .bonus_ways = 0xfff,
1453 .cache_mode = 0,
1454 .retain_on_pc = true,
1455 }, {
1456 .usecase_id = LLCC_VIDSC1,
1457 .slice_id = 3,
1458 .max_cap = 512,
1459 .priority = 2,
1460 .fixed_size = true,
1461 .bonus_ways = 0xfff,
1462 .cache_mode = 0,
1463 .retain_on_pc = true,
1464 }, {
1465 .usecase_id = LLCC_AUDIO,
1466 .slice_id = 6,
1467 .max_cap = 1024,
1468 .priority = 1,
1469 .fixed_size = true,
1470 .bonus_ways = 0xfff,
1471 .cache_mode = 0,
1472 .retain_on_pc = true,
1473 }, {
1474 .usecase_id = LLCC_MDMHPGRW,
1475 .slice_id = 7,
1476 .max_cap = 3072,
1477 .priority = 1,
1478 .fixed_size = true,
1479 .bonus_ways = 0x3ff,
1480 .res_ways = 0xc00,
1481 .cache_mode = 0,
1482 .retain_on_pc = true,
1483 }, {
1484 .usecase_id = LLCC_MDM,
1485 .slice_id = 8,
1486 .max_cap = 3072,
1487 .priority = 1,
1488 .fixed_size = true,
1489 .bonus_ways = 0xfff,
1490 .cache_mode = 0,
1491 .retain_on_pc = true,
1492 }, {
1493 .usecase_id = LLCC_MODHW,
1494 .slice_id = 9,
1495 .max_cap = 1024,
1496 .priority = 1,
1497 .fixed_size = true,
1498 .bonus_ways = 0xfff,
1499 .cache_mode = 0,
1500 .retain_on_pc = true,
1501 }, {
1502 .usecase_id = LLCC_CMPT,
1503 .slice_id = 10,
1504 .max_cap = 6144,
1505 .priority = 1,
1506 .fixed_size = true,
1507 .bonus_ways = 0xfff,
1508 .cache_mode = 0,
1509 .retain_on_pc = true,
1510 }, {
1511 .usecase_id = LLCC_GPUHTW,
1512 .slice_id = 11,
1513 .max_cap = 1024,
1514 .priority = 1,
1515 .fixed_size = true,
1516 .bonus_ways = 0xfff,
1517 .cache_mode = 0,
1518 .retain_on_pc = true,
1519 }, {
1520 .usecase_id = LLCC_GPU,
1521 .slice_id = 12,
1522 .max_cap = 5120,
1523 .priority = 1,
1524 .fixed_size = true,
1525 .bonus_ways = 0xfff,
1526 .cache_mode = 0,
1527 .retain_on_pc = true,
1528 }, {
1529 .usecase_id = LLCC_MMUHWT,
1530 .slice_id = 13,
1531 .max_cap = 1024,
1532 .priority = 1,
1533 .fixed_size = true,
1534 .bonus_ways = 0xfff,
1535 .cache_mode = 0,
1536 .activate_on_init = true,
1537 }, {
1538 .usecase_id = LLCC_CMPTDMA,
1539 .slice_id = 15,
1540 .max_cap = 6144,
1541 .priority = 1,
1542 .fixed_size = true,
1543 .bonus_ways = 0xfff,
1544 .cache_mode = 0,
1545 .retain_on_pc = true,
1546 }, {
1547 .usecase_id = LLCC_DISP,
1548 .slice_id = 16,
1549 .max_cap = 6144,
1550 .priority = 1,
1551 .fixed_size = true,
1552 .bonus_ways = 0xfff,
1553 .cache_mode = 0,
1554 .retain_on_pc = true,
1555 }, {
1556 .usecase_id = LLCC_VIDFW,
1557 .slice_id = 17,
1558 .max_cap = 1024,
1559 .priority = 1,
1560 .fixed_size = true,
1561 .bonus_ways = 0xfff,
1562 .cache_mode = 0,
1563 .retain_on_pc = true,
1564 }, {
1565 .usecase_id = LLCC_MDMHPFX,
1566 .slice_id = 20,
1567 .max_cap = 1024,
1568 .priority = 2,
1569 .fixed_size = true,
1570 .bonus_ways = 0xfff,
1571 .cache_mode = 0,
1572 .retain_on_pc = true,
1573 }, {
1574 .usecase_id = LLCC_MDMPNG,
1575 .slice_id = 21,
1576 .max_cap = 1024,
1577 .priority = 0,
1578 .fixed_size = true,
1579 .bonus_ways = 0xc,
1580 .cache_mode = 0,
1581 .retain_on_pc = true,
1582 }, {
1583 .usecase_id = LLCC_AUDHW,
1584 .slice_id = 22,
1585 .max_cap = 1024,
1586 .priority = 1,
1587 .fixed_size = true,
1588 .bonus_ways = 0xfff,
1589 .cache_mode = 0,
1590 .retain_on_pc = true,
1591 }, {
1592 .usecase_id = LLCC_NPU,
1593 .slice_id = 23,
1594 .max_cap = 6144,
1595 .priority = 1,
1596 .fixed_size = true,
1597 .bonus_ways = 0xfff,
1598 .cache_mode = 0,
1599 .retain_on_pc = true,
1600 }, {
1601 .usecase_id = LLCC_WLHW,
1602 .slice_id = 24,
1603 .max_cap = 6144,
1604 .priority = 1,
1605 .fixed_size = true,
1606 .bonus_ways = 0xfff,
1607 .cache_mode = 0,
1608 .retain_on_pc = true,
1609 }, {
1610 .usecase_id = LLCC_MODPE,
1611 .slice_id = 29,
1612 .max_cap = 512,
1613 .priority = 1,
1614 .fixed_size = true,
1615 .bonus_ways = 0xc,
1616 .cache_mode = 0,
1617 .retain_on_pc = true,
1618 }, {
1619 .usecase_id = LLCC_APTCM,
1620 .slice_id = 30,
1621 .max_cap = 512,
1622 .priority = 3,
1623 .fixed_size = true,
1624 .res_ways = 0x1,
1625 .cache_mode = 1,
1626 .retain_on_pc = true,
1627 }, {
1628 .usecase_id = LLCC_WRCACHE,
1629 .slice_id = 31,
1630 .max_cap = 128,
1631 .priority = 1,
1632 .fixed_size = true,
1633 .bonus_ways = 0xfff,
1634 .cache_mode = 0,
1635 },
1636 };
1637
1638 static const struct llcc_slice_config sc8280xp_data[] = {
1639 {
1640 .usecase_id = LLCC_CPUSS,
1641 .slice_id = 1,
1642 .max_cap = 6144,
1643 .priority = 1,
1644 .fixed_size = true,
1645 .bonus_ways = 0xfff,
1646 .cache_mode = 0,
1647 .retain_on_pc = true,
1648 .activate_on_init = true,
1649 }, {
1650 .usecase_id = LLCC_VIDSC0,
1651 .slice_id = 2,
1652 .max_cap = 512,
1653 .priority = 3,
1654 .fixed_size = true,
1655 .bonus_ways = 0xfff,
1656 .cache_mode = 0,
1657 .retain_on_pc = true,
1658 }, {
1659 .usecase_id = LLCC_AUDIO,
1660 .slice_id = 6,
1661 .max_cap = 1024,
1662 .priority = 1,
1663 .fixed_size = true,
1664 .bonus_ways = 0xfff,
1665 .cache_mode = 0,
1666 }, {
1667 .usecase_id = LLCC_CMPT,
1668 .slice_id = 10,
1669 .max_cap = 6144,
1670 .priority = 1,
1671 .fixed_size = true,
1672 .bonus_ways = 0xfff,
1673 .cache_mode = 0,
1674 }, {
1675 .usecase_id = LLCC_GPUHTW,
1676 .slice_id = 11,
1677 .max_cap = 1024,
1678 .priority = 1,
1679 .fixed_size = true,
1680 .bonus_ways = 0xfff,
1681 .cache_mode = 0,
1682 .retain_on_pc = true,
1683 }, {
1684 .usecase_id = LLCC_GPU,
1685 .slice_id = 12,
1686 .max_cap = 4096,
1687 .priority = 1,
1688 .fixed_size = true,
1689 .bonus_ways = 0xfff,
1690 .cache_mode = 0,
1691 .retain_on_pc = true,
1692 .write_scid_en = true,
1693 }, {
1694 .usecase_id = LLCC_MMUHWT,
1695 .slice_id = 13,
1696 .max_cap = 1024,
1697 .priority = 1,
1698 .fixed_size = true,
1699 .bonus_ways = 0xfff,
1700 .cache_mode = 0,
1701 .activate_on_init = true,
1702 }, {
1703 .usecase_id = LLCC_DISP,
1704 .slice_id = 16,
1705 .max_cap = 6144,
1706 .priority = 1,
1707 .fixed_size = true,
1708 .bonus_ways = 0xfff,
1709 .cache_mode = 0,
1710 .retain_on_pc = true,
1711 }, {
1712 .usecase_id = LLCC_AUDHW,
1713 .slice_id = 22,
1714 .max_cap = 2048,
1715 .priority = 1,
1716 .fixed_size = true,
1717 .bonus_ways = 0xfff,
1718 .cache_mode = 0,
1719 .retain_on_pc = true,
1720 }, {
1721 .usecase_id = LLCC_ECC,
1722 .slice_id = 26,
1723 .max_cap = 1024,
1724 .priority = 1,
1725 .fixed_size = true,
1726 .bonus_ways = 0xfff,
1727 .cache_mode = 0,
1728 .retain_on_pc = true,
1729 }, {
1730 .usecase_id = LLCC_CVP,
1731 .slice_id = 28,
1732 .max_cap = 512,
1733 .priority = 3,
1734 .fixed_size = true,
1735 .bonus_ways = 0xfff,
1736 .cache_mode = 0,
1737 .retain_on_pc = true,
1738 }, {
1739 .usecase_id = LLCC_APTCM,
1740 .slice_id = 30,
1741 .max_cap = 1024,
1742 .priority = 3,
1743 .fixed_size = true,
1744 .res_ways = 0x1,
1745 .cache_mode = 1,
1746 .retain_on_pc = true,
1747 }, {
1748 .usecase_id = LLCC_WRCACHE,
1749 .slice_id = 31,
1750 .max_cap = 1024,
1751 .priority = 1,
1752 .fixed_size = true,
1753 .bonus_ways = 0xfff,
1754 .cache_mode = 0,
1755 .activate_on_init = true,
1756 }, {
1757 .usecase_id = LLCC_CVPFW,
1758 .slice_id = 17,
1759 .max_cap = 512,
1760 .priority = 1,
1761 .bonus_ways = 0xfff,
1762 .cache_mode = 0,
1763 .retain_on_pc = true,
1764 }, {
1765 .usecase_id = LLCC_CPUSS1,
1766 .slice_id = 3,
1767 .max_cap = 2048,
1768 .priority = 1,
1769 .fixed_size = true,
1770 .bonus_ways = 0xfff,
1771 .cache_mode = 0,
1772 .retain_on_pc = true,
1773 }, {
1774 .usecase_id = LLCC_CPUHWT,
1775 .slice_id = 5,
1776 .max_cap = 512,
1777 .priority = 1,
1778 .fixed_size = true,
1779 .bonus_ways = 0xfff,
1780 .cache_mode = 0,
1781 .activate_on_init = true,
1782 },
1783 };
1784
1785 static const struct llcc_slice_config sdm845_data[] = {{
1786 .usecase_id = LLCC_CPUSS,
1787 .slice_id = 1,
1788 .max_cap = 2816,
1789 .priority = 1,
1790 .bonus_ways = 0xffc,
1791 .res_ways = 0x2,
1792 .cache_mode = 0,
1793 .dis_cap_alloc = true,
1794 .retain_on_pc = true,
1795 .activate_on_init = true,
1796 }, {
1797 .usecase_id = LLCC_VIDSC0,
1798 .slice_id = 2,
1799 .max_cap = 512,
1800 .priority = 2,
1801 .fixed_size = true,
1802 .res_ways = 0xf0,
1803 .cache_mode = 0,
1804 .dis_cap_alloc = true,
1805 .retain_on_pc = true,
1806 }, {
1807 .usecase_id = LLCC_VIDSC1,
1808 .slice_id = 3,
1809 .max_cap = 512,
1810 .priority = 2,
1811 .fixed_size = true,
1812 .res_ways = 0xf0,
1813 .cache_mode = 0,
1814 .dis_cap_alloc = true,
1815 .retain_on_pc = true,
1816 }, {
1817 .usecase_id = LLCC_ROTATOR,
1818 .slice_id = 4,
1819 .max_cap = 563,
1820 .priority = 2,
1821 .fixed_size = true,
1822 .res_ways = 0xe,
1823 .cache_mode = 2,
1824 .dis_cap_alloc = true,
1825 .retain_on_pc = true,
1826 }, {
1827 .usecase_id = LLCC_VOICE,
1828 .slice_id = 5,
1829 .max_cap = 2816,
1830 .priority = 1,
1831 .bonus_ways = 0xffc,
1832 .res_ways = 0x2,
1833 .cache_mode = 0,
1834 .dis_cap_alloc = true,
1835 .retain_on_pc = true,
1836 }, {
1837 .usecase_id = LLCC_AUDIO,
1838 .slice_id = 6,
1839 .max_cap = 2816,
1840 .priority = 1,
1841 .bonus_ways = 0xffc,
1842 .res_ways = 0x2,
1843 .cache_mode = 0,
1844 .dis_cap_alloc = true,
1845 .retain_on_pc = true,
1846 }, {
1847 .usecase_id = LLCC_MDMHPGRW,
1848 .slice_id = 7,
1849 .max_cap = 1024,
1850 .priority = 2,
1851 .bonus_ways = 0xfc,
1852 .res_ways = 0xf00,
1853 .cache_mode = 0,
1854 .dis_cap_alloc = true,
1855 .retain_on_pc = true,
1856 }, {
1857 .usecase_id = LLCC_MDM,
1858 .slice_id = 8,
1859 .max_cap = 2816,
1860 .priority = 1,
1861 .bonus_ways = 0xffc,
1862 .res_ways = 0x2,
1863 .cache_mode = 0,
1864 .dis_cap_alloc = true,
1865 .retain_on_pc = true,
1866 }, {
1867 .usecase_id = LLCC_CMPT,
1868 .slice_id = 10,
1869 .max_cap = 2816,
1870 .priority = 1,
1871 .bonus_ways = 0xffc,
1872 .res_ways = 0x2,
1873 .cache_mode = 0,
1874 .dis_cap_alloc = true,
1875 .retain_on_pc = true,
1876 }, {
1877 .usecase_id = LLCC_GPUHTW,
1878 .slice_id = 11,
1879 .max_cap = 512,
1880 .priority = 1,
1881 .fixed_size = true,
1882 .bonus_ways = 0xc,
1883 .cache_mode = 0,
1884 .dis_cap_alloc = true,
1885 .retain_on_pc = true,
1886 }, {
1887 .usecase_id = LLCC_GPU,
1888 .slice_id = 12,
1889 .max_cap = 2304,
1890 .priority = 1,
1891 .bonus_ways = 0xff0,
1892 .res_ways = 0x2,
1893 .cache_mode = 0,
1894 .dis_cap_alloc = true,
1895 .retain_on_pc = true,
1896 }, {
1897 .usecase_id = LLCC_MMUHWT,
1898 .slice_id = 13,
1899 .max_cap = 256,
1900 .priority = 2,
1901 .res_ways = 0x1,
1902 .cache_mode = 0,
1903 .dis_cap_alloc = true,
1904 .activate_on_init = true,
1905 }, {
1906 .usecase_id = LLCC_CMPTDMA,
1907 .slice_id = 15,
1908 .max_cap = 2816,
1909 .priority = 1,
1910 .bonus_ways = 0xffc,
1911 .res_ways = 0x2,
1912 .cache_mode = 0,
1913 .dis_cap_alloc = true,
1914 .retain_on_pc = true,
1915 }, {
1916 .usecase_id = LLCC_DISP,
1917 .slice_id = 16,
1918 .max_cap = 2816,
1919 .priority = 1,
1920 .bonus_ways = 0xffc,
1921 .res_ways = 0x2,
1922 .cache_mode = 0,
1923 .dis_cap_alloc = true,
1924 .retain_on_pc = true,
1925 }, {
1926 .usecase_id = LLCC_VIDFW,
1927 .slice_id = 17,
1928 .max_cap = 2816,
1929 .priority = 1,
1930 .bonus_ways = 0xffc,
1931 .res_ways = 0x2,
1932 .cache_mode = 0,
1933 .dis_cap_alloc = true,
1934 .retain_on_pc = true,
1935 }, {
1936 .usecase_id = LLCC_MDMHPFX,
1937 .slice_id = 20,
1938 .max_cap = 1024,
1939 .priority = 2,
1940 .fixed_size = true,
1941 .res_ways = 0xf00,
1942 .cache_mode = 0,
1943 .dis_cap_alloc = true,
1944 .retain_on_pc = true,
1945 }, {
1946 .usecase_id = LLCC_MDMPNG,
1947 .slice_id = 21,
1948 .max_cap = 1024,
1949 .priority = 0,
1950 .fixed_size = true,
1951 .bonus_ways = 0x1e,
1952 .cache_mode = 0,
1953 .dis_cap_alloc = true,
1954 .retain_on_pc = true,
1955 }, {
1956 .usecase_id = LLCC_AUDHW,
1957 .slice_id = 22,
1958 .max_cap = 1024,
1959 .priority = 1,
1960 .fixed_size = true,
1961 .bonus_ways = 0xffc,
1962 .res_ways = 0x2,
1963 .cache_mode = 0,
1964 .dis_cap_alloc = true,
1965 .retain_on_pc = true,
1966 },
1967 };
1968
1969 static const struct llcc_slice_config sm6350_data[] = {
1970 {
1971 .usecase_id = LLCC_CPUSS,
1972 .slice_id = 1,
1973 .max_cap = 768,
1974 .priority = 1,
1975 .bonus_ways = 0xfff,
1976 .cache_mode = 0,
1977 .activate_on_init = true,
1978 .write_scid_en = true,
1979 }, {
1980 .usecase_id = LLCC_MDM,
1981 .slice_id = 8,
1982 .max_cap = 512,
1983 .priority = 2,
1984 .bonus_ways = 0xfff,
1985 .cache_mode = 0,
1986 .activate_on_init = true,
1987 }, {
1988 .usecase_id = LLCC_GPUHTW,
1989 .slice_id = 11,
1990 .max_cap = 256,
1991 .priority = 1,
1992 .bonus_ways = 0xfff,
1993 .cache_mode = 0,
1994 .activate_on_init = true,
1995 }, {
1996 .usecase_id = LLCC_GPU,
1997 .slice_id = 12,
1998 .max_cap = 512,
1999 .priority = 1,
2000 .bonus_ways = 0xfff,
2001 .cache_mode = 0,
2002 .activate_on_init = true,
2003 }, {
2004 .usecase_id = LLCC_MDMPNG,
2005 .slice_id = 21,
2006 .max_cap = 768,
2007 .priority = 0,
2008 .fixed_size = true,
2009 .bonus_ways = 0xfff,
2010 .cache_mode = 0,
2011 .activate_on_init = true,
2012 }, {
2013 .usecase_id = LLCC_NPU,
2014 .slice_id = 23,
2015 .max_cap = 768,
2016 .priority = 1,
2017 .bonus_ways = 0xfff,
2018 .cache_mode = 0,
2019 .activate_on_init = true,
2020 }, {
2021 .usecase_id = LLCC_MODPE,
2022 .slice_id = 29,
2023 .max_cap = 64,
2024 .priority = 1,
2025 .fixed_size = true,
2026 .bonus_ways = 0xfff,
2027 .cache_mode = 0,
2028 .activate_on_init = true,
2029 },
2030 };
2031
2032 static const struct llcc_slice_config sm7150_data[] = {
2033 {
2034 .usecase_id = LLCC_CPUSS,
2035 .slice_id = 1,
2036 .max_cap = 512,
2037 .priority = 1,
2038 .bonus_ways = 0xf,
2039 .cache_mode = 0,
2040 .retain_on_pc = true,
2041 .activate_on_init = true,
2042 }, {
2043 .usecase_id = LLCC_MDM,
2044 .slice_id = 8,
2045 .max_cap = 128,
2046 .priority = 2,
2047 .bonus_ways = 0xf,
2048 .cache_mode = 0,
2049 .retain_on_pc = true,
2050 }, {
2051 .usecase_id = LLCC_GPUHTW,
2052 .slice_id = 11,
2053 .max_cap = 256,
2054 .priority = 1,
2055 .fixed_size = true,
2056 .bonus_ways = 0xf,
2057 .cache_mode = 0,
2058 .retain_on_pc = true,
2059 }, {
2060 .usecase_id = LLCC_GPU,
2061 .slice_id = 12,
2062 .max_cap = 256,
2063 .priority = 1,
2064 .fixed_size = true,
2065 .bonus_ways = 0xf,
2066 .cache_mode = 0,
2067 .retain_on_pc = true,
2068 }, {
2069 .usecase_id = LLCC_NPU,
2070 .slice_id = 23,
2071 .max_cap = 512,
2072 .priority = 1,
2073 .bonus_ways = 0xf,
2074 .cache_mode = 0,
2075 .retain_on_pc = true,
2076 },
2077 };
2078
2079 static const struct llcc_slice_config sm8150_data[] = {
2080 {
2081 .usecase_id = LLCC_CPUSS,
2082 .slice_id = 1,
2083 .max_cap = 3072,
2084 .priority = 1,
2085 .fixed_size = true,
2086 .bonus_ways = 0xfff,
2087 .cache_mode = 0,
2088 .retain_on_pc = true,
2089 .activate_on_init = true,
2090 }, {
2091 .usecase_id = LLCC_VIDSC0,
2092 .slice_id = 2,
2093 .max_cap = 512,
2094 .priority = 2,
2095 .fixed_size = true,
2096 .bonus_ways = 0xfff,
2097 .cache_mode = 0,
2098 .retain_on_pc = true,
2099 }, {
2100 .usecase_id = LLCC_VIDSC1,
2101 .slice_id = 3,
2102 .max_cap = 512,
2103 .priority = 2,
2104 .fixed_size = true,
2105 .bonus_ways = 0xfff,
2106 .cache_mode = 0,
2107 .retain_on_pc = true,
2108 }, {
2109 .usecase_id = LLCC_AUDIO,
2110 .slice_id = 6,
2111 .max_cap = 1024,
2112 .priority = 1,
2113 .fixed_size = true,
2114 .bonus_ways = 0xfff,
2115 .cache_mode = 0,
2116 .retain_on_pc = true,
2117 }, {
2118 .usecase_id = LLCC_MDMHPGRW,
2119 .slice_id = 7,
2120 .max_cap = 3072,
2121 .priority = 1,
2122 .bonus_ways = 0xff,
2123 .res_ways = 0xf00,
2124 .cache_mode = 0,
2125 .retain_on_pc = true,
2126 }, {
2127 .usecase_id = LLCC_MDM,
2128 .slice_id = 8,
2129 .max_cap = 3072,
2130 .priority = 1,
2131 .fixed_size = true,
2132 .bonus_ways = 0xfff,
2133 .cache_mode = 0,
2134 .retain_on_pc = true,
2135 }, {
2136 .usecase_id = LLCC_MODHW,
2137 .slice_id = 9,
2138 .max_cap = 1024,
2139 .priority = 1,
2140 .fixed_size = true,
2141 .bonus_ways = 0xfff,
2142 .cache_mode = 0,
2143 .retain_on_pc = true,
2144 }, {
2145 .usecase_id = LLCC_CMPT,
2146 .slice_id = 10,
2147 .max_cap = 3072,
2148 .priority = 1,
2149 .fixed_size = true,
2150 .bonus_ways = 0xfff,
2151 .cache_mode = 0,
2152 .retain_on_pc = true,
2153 }, {
2154 .usecase_id = LLCC_GPUHTW,
2155 .slice_id = 11,
2156 .max_cap = 512,
2157 .priority = 1,
2158 .fixed_size = true,
2159 .bonus_ways = 0xfff,
2160 .cache_mode = 0,
2161 .retain_on_pc = true,
2162 }, {
2163 .usecase_id = LLCC_GPU,
2164 .slice_id = 12,
2165 .max_cap = 2560,
2166 .priority = 1,
2167 .fixed_size = true,
2168 .bonus_ways = 0xfff,
2169 .cache_mode = 0,
2170 .retain_on_pc = true,
2171 }, {
2172 .usecase_id = LLCC_MMUHWT,
2173 .slice_id = 13,
2174 .max_cap = 1024,
2175 .priority = 1,
2176 .fixed_size = true,
2177 .bonus_ways = 0xfff,
2178 .cache_mode = 0,
2179 .activate_on_init = true,
2180 }, {
2181 .usecase_id = LLCC_CMPTDMA,
2182 .slice_id = 15,
2183 .max_cap = 3072,
2184 .priority = 1,
2185 .fixed_size = true,
2186 .bonus_ways = 0xfff,
2187 .cache_mode = 0,
2188 .retain_on_pc = true,
2189 }, {
2190 .usecase_id = LLCC_DISP,
2191 .slice_id = 16,
2192 .max_cap = 3072,
2193 .priority = 1,
2194 .fixed_size = true,
2195 .bonus_ways = 0xfff,
2196 .cache_mode = 0,
2197 .retain_on_pc = true,
2198 }, {
2199 .usecase_id = LLCC_MDMHPFX,
2200 .slice_id = 20,
2201 .max_cap = 1024,
2202 .priority = 2,
2203 .fixed_size = true,
2204 .bonus_ways = 0xfff,
2205 .cache_mode = 0,
2206 .retain_on_pc = true,
2207 }, {
2208 .usecase_id = LLCC_MDMHPFX,
2209 .slice_id = 21,
2210 .max_cap = 1024,
2211 .priority = 0,
2212 .fixed_size = true,
2213 .bonus_ways = 0xf,
2214 .cache_mode = 0,
2215 .retain_on_pc = true,
2216 }, {
2217 .usecase_id = LLCC_AUDHW,
2218 .slice_id = 22,
2219 .max_cap = 1024,
2220 .priority = 1,
2221 .fixed_size = true,
2222 .bonus_ways = 0xfff,
2223 .cache_mode = 0,
2224 .retain_on_pc = true,
2225 }, {
2226 .usecase_id = LLCC_NPU,
2227 .slice_id = 23,
2228 .max_cap = 3072,
2229 .priority = 1,
2230 .fixed_size = true,
2231 .bonus_ways = 0xfff,
2232 .cache_mode = 0,
2233 .retain_on_pc = true,
2234 }, {
2235 .usecase_id = LLCC_WLHW,
2236 .slice_id = 24,
2237 .max_cap = 3072,
2238 .priority = 1,
2239 .fixed_size = true,
2240 .bonus_ways = 0xfff,
2241 .cache_mode = 0,
2242 .retain_on_pc = true,
2243 }, {
2244 .usecase_id = LLCC_MODPE,
2245 .slice_id = 29,
2246 .max_cap = 256,
2247 .priority = 1,
2248 .fixed_size = true,
2249 .bonus_ways = 0xf,
2250 .cache_mode = 0,
2251 .retain_on_pc = true,
2252 }, {
2253 .usecase_id = LLCC_APTCM,
2254 .slice_id = 30,
2255 .max_cap = 256,
2256 .priority = 3,
2257 .fixed_size = true,
2258 .res_ways = 0x1,
2259 .cache_mode = 1,
2260 .retain_on_pc = true,
2261 }, {
2262 .usecase_id = LLCC_WRCACHE,
2263 .slice_id = 31,
2264 .max_cap = 128,
2265 .priority = 1,
2266 .fixed_size = true,
2267 .bonus_ways = 0xfff,
2268 .cache_mode = 0,
2269 },
2270 };
2271
2272 static const struct llcc_slice_config sm8250_data[] = {
2273 {
2274 .usecase_id = LLCC_CPUSS,
2275 .slice_id = 1,
2276 .max_cap = 3072,
2277 .priority = 1,
2278 .fixed_size = true,
2279 .bonus_ways = 0xfff,
2280 .cache_mode = 0,
2281 .retain_on_pc = true,
2282 .activate_on_init = true,
2283 }, {
2284 .usecase_id = LLCC_VIDSC0,
2285 .slice_id = 2,
2286 .max_cap = 512,
2287 .priority = 3,
2288 .fixed_size = true,
2289 .bonus_ways = 0xfff,
2290 .cache_mode = 0,
2291 .retain_on_pc = true,
2292 }, {
2293 .usecase_id = LLCC_AUDIO,
2294 .slice_id = 6,
2295 .max_cap = 1024,
2296 .priority = 1,
2297 .bonus_ways = 0xfff,
2298 .cache_mode = 0,
2299 }, {
2300 .usecase_id = LLCC_CMPT,
2301 .slice_id = 10,
2302 .max_cap = 1024,
2303 .priority = 1,
2304 .bonus_ways = 0xfff,
2305 .cache_mode = 0,
2306 }, {
2307 .usecase_id = LLCC_GPUHTW,
2308 .slice_id = 11,
2309 .max_cap = 1024,
2310 .priority = 1,
2311 .fixed_size = true,
2312 .bonus_ways = 0xfff,
2313 .cache_mode = 0,
2314 .retain_on_pc = true,
2315 }, {
2316 .usecase_id = LLCC_GPU,
2317 .slice_id = 12,
2318 .max_cap = 1024,
2319 .priority = 1,
2320 .bonus_ways = 0xfff,
2321 .cache_mode = 0,
2322 .retain_on_pc = true,
2323 .write_scid_en = true,
2324 }, {
2325 .usecase_id = LLCC_MMUHWT,
2326 .slice_id = 13,
2327 .max_cap = 1024,
2328 .priority = 1,
2329 .fixed_size = true,
2330 .bonus_ways = 0xfff,
2331 .cache_mode = 0,
2332 .activate_on_init = true,
2333 }, {
2334 .usecase_id = LLCC_CMPTDMA,
2335 .slice_id = 15,
2336 .max_cap = 1024,
2337 .priority = 1,
2338 .bonus_ways = 0xfff,
2339 .cache_mode = 0,
2340 .retain_on_pc = true,
2341 }, {
2342 .usecase_id = LLCC_DISP,
2343 .slice_id = 16,
2344 .max_cap = 3072,
2345 .priority = 1,
2346 .fixed_size = true,
2347 .bonus_ways = 0xfff,
2348 .cache_mode = 0,
2349 .retain_on_pc = true,
2350 }, {
2351 .usecase_id = LLCC_VIDFW,
2352 .slice_id = 17,
2353 .max_cap = 512,
2354 .priority = 1,
2355 .bonus_ways = 0xfff,
2356 .cache_mode = 0,
2357 .retain_on_pc = true,
2358 }, {
2359 .usecase_id = LLCC_AUDHW,
2360 .slice_id = 22,
2361 .max_cap = 1024,
2362 .priority = 1,
2363 .fixed_size = true,
2364 .bonus_ways = 0xfff,
2365 .cache_mode = 0,
2366 .retain_on_pc = true,
2367 }, {
2368 .usecase_id = LLCC_NPU,
2369 .slice_id = 23,
2370 .max_cap = 3072,
2371 .priority = 1,
2372 .fixed_size = true,
2373 .bonus_ways = 0xfff,
2374 .cache_mode = 0,
2375 .retain_on_pc = true,
2376 }, {
2377 .usecase_id = LLCC_WLHW,
2378 .slice_id = 24,
2379 .max_cap = 1024,
2380 .priority = 1,
2381 .bonus_ways = 0xfff,
2382 .cache_mode = 0,
2383 .retain_on_pc = true,
2384 }, {
2385 .usecase_id = LLCC_CVP,
2386 .slice_id = 28,
2387 .max_cap = 256,
2388 .priority = 3,
2389 .fixed_size = true,
2390 .bonus_ways = 0xfff,
2391 .cache_mode = 0,
2392 .retain_on_pc = true,
2393 }, {
2394 .usecase_id = LLCC_APTCM,
2395 .slice_id = 30,
2396 .max_cap = 128,
2397 .priority = 3,
2398 .res_ways = 0x3,
2399 .cache_mode = 1,
2400 .retain_on_pc = true,
2401 }, {
2402 .usecase_id = LLCC_WRCACHE,
2403 .slice_id = 31,
2404 .max_cap = 256,
2405 .priority = 1,
2406 .fixed_size = true,
2407 .bonus_ways = 0xfff,
2408 .cache_mode = 0,
2409 .activate_on_init = true,
2410 },
2411 };
2412
2413 static const struct llcc_slice_config sm8350_data[] = {
2414 {
2415 .usecase_id = LLCC_CPUSS,
2416 .slice_id = 1,
2417 .max_cap = 3072,
2418 .priority = 1,
2419 .fixed_size = true,
2420 .bonus_ways = 0xfff,
2421 .cache_mode = 0,
2422 .activate_on_init = true,
2423 .write_scid_en = true,
2424 }, {
2425 .usecase_id = LLCC_VIDSC0,
2426 .slice_id = 2,
2427 .max_cap = 512,
2428 .priority = 3,
2429 .fixed_size = true,
2430 .bonus_ways = 0xfff,
2431 .cache_mode = 0,
2432 .activate_on_init = true,
2433 }, {
2434 .usecase_id = LLCC_AUDIO,
2435 .slice_id = 6,
2436 .max_cap = 1024,
2437 .priority = 1,
2438 .fixed_size = true,
2439 .bonus_ways = 0xfff,
2440 .cache_mode = 0,
2441 }, {
2442 .usecase_id = LLCC_MDMHPGRW,
2443 .slice_id = 7,
2444 .max_cap = 1024,
2445 .priority = 3,
2446 .bonus_ways = 0xfff,
2447 .cache_mode = 0,
2448 .activate_on_init = true,
2449 }, {
2450 .usecase_id = LLCC_MODHW,
2451 .slice_id = 9,
2452 .max_cap = 1024,
2453 .priority = 1,
2454 .fixed_size = true,
2455 .bonus_ways = 0xfff,
2456 .cache_mode = 0,
2457 .activate_on_init = true,
2458 }, {
2459 .usecase_id = LLCC_CMPT,
2460 .slice_id = 10,
2461 .max_cap = 3072,
2462 .priority = 1,
2463 .fixed_size = true,
2464 .bonus_ways = 0xfff,
2465 .cache_mode = 0,
2466 .activate_on_init = true,
2467 }, {
2468 .usecase_id = LLCC_GPUHTW,
2469 .slice_id = 11,
2470 .max_cap = 1024,
2471 .priority = 1,
2472 .fixed_size = true,
2473 .bonus_ways = 0xfff,
2474 .cache_mode = 0,
2475 .activate_on_init = true,
2476 }, {
2477 .usecase_id = LLCC_GPU,
2478 .slice_id = 12,
2479 .max_cap = 1024,
2480 .priority = 1,
2481 .bonus_ways = 0xfff,
2482 .cache_mode = 0,
2483 .retain_on_pc = true,
2484 .activate_on_init = true,
2485 }, {
2486 .usecase_id = LLCC_MMUHWT,
2487 .slice_id = 13,
2488 .max_cap = 1024,
2489 .priority = 1,
2490 .fixed_size = true,
2491 .bonus_ways = 0xfff,
2492 .cache_mode = 0,
2493 .write_scid_en = true,
2494 }, {
2495 .usecase_id = LLCC_DISP,
2496 .slice_id = 16,
2497 .max_cap = 3072,
2498 .priority = 2,
2499 .fixed_size = true,
2500 .bonus_ways = 0xfff,
2501 .cache_mode = 0,
2502 .activate_on_init = true,
2503 }, {
2504 .usecase_id = LLCC_MDMPNG,
2505 .slice_id = 21,
2506 .max_cap = 1024,
2507 .priority = 0,
2508 .fixed_size = true,
2509 .bonus_ways = 0xf,
2510 .cache_mode = 0,
2511 .activate_on_init = true,
2512 }, {
2513 .usecase_id = LLCC_AUDHW,
2514 .slice_id = 22,
2515 .max_cap = 1024,
2516 .priority = 1,
2517 .fixed_size = true,
2518 .bonus_ways = 0xfff,
2519 .cache_mode = 0,
2520 .activate_on_init = true,
2521 }, {
2522 .usecase_id = LLCC_CVP,
2523 .slice_id = 28,
2524 .max_cap = 512,
2525 .priority = 3,
2526 .fixed_size = true,
2527 .bonus_ways = 0xfff,
2528 .cache_mode = 0,
2529 .activate_on_init = true,
2530 }, {
2531 .usecase_id = LLCC_MODPE,
2532 .slice_id = 29,
2533 .max_cap = 256,
2534 .priority = 1,
2535 .fixed_size = true,
2536 .bonus_ways = 0xf,
2537 .cache_mode = 0,
2538 .activate_on_init = true,
2539 }, {
2540 .usecase_id = LLCC_APTCM,
2541 .slice_id = 30,
2542 .max_cap = 1024,
2543 .priority = 3,
2544 .fixed_size = true,
2545 .res_ways = 0x1,
2546 .cache_mode = 1,
2547 .activate_on_init = true,
2548 }, {
2549 .usecase_id = LLCC_WRCACHE,
2550 .slice_id = 31,
2551 .max_cap = 512,
2552 .priority = 1,
2553 .fixed_size = true,
2554 .bonus_ways = 0xfff,
2555 .cache_mode = 0,
2556 .write_scid_en = true,
2557 }, {
2558 .usecase_id = LLCC_CVPFW,
2559 .slice_id = 17,
2560 .max_cap = 512,
2561 .priority = 1,
2562 .bonus_ways = 0xfff,
2563 .cache_mode = 0,
2564 .activate_on_init = true,
2565 }, {
2566 .usecase_id = LLCC_CPUSS1,
2567 .slice_id = 3,
2568 .max_cap = 1024,
2569 .priority = 1,
2570 .fixed_size = true,
2571 .bonus_ways = 0xfff,
2572 .cache_mode = 0,
2573 .activate_on_init = true,
2574 }, {
2575 .usecase_id = LLCC_CPUHWT,
2576 .slice_id = 5,
2577 .max_cap = 512,
2578 .priority = 1,
2579 .fixed_size = true,
2580 .bonus_ways = 0xfff,
2581 .cache_mode = 0,
2582 .write_scid_en = true,
2583 },
2584 };
2585
2586 static const struct llcc_slice_config sm8450_data[] = {
2587 {
2588 .usecase_id = LLCC_CPUSS,
2589 .slice_id = 1,
2590 .max_cap = 3072,
2591 .priority = 1,
2592 .bonus_ways = 0xffff,
2593 .cache_mode = 0,
2594 .retain_on_pc = true,
2595 .activate_on_init = true,
2596 }, {
2597 .usecase_id = LLCC_VIDSC0,
2598 .slice_id = 2,
2599 .max_cap = 512,
2600 .priority = 3,
2601 .fixed_size = true,
2602 .bonus_ways = 0xffff,
2603 .cache_mode = 0,
2604 .retain_on_pc = true,
2605 }, {
2606 .usecase_id = LLCC_AUDIO,
2607 .slice_id = 6,
2608 .max_cap = 1024,
2609 .priority = 1,
2610 .fixed_size = true,
2611 .bonus_ways = 0xffff,
2612 .cache_mode = 0,
2613 }, {
2614 .usecase_id = LLCC_MDMHPGRW,
2615 .slice_id = 7,
2616 .max_cap = 1024,
2617 .priority = 3,
2618 .bonus_ways = 0xffff,
2619 .cache_mode = 0,
2620 .retain_on_pc = true,
2621 }, {
2622 .usecase_id = LLCC_MODHW,
2623 .slice_id = 9,
2624 .max_cap = 1024,
2625 .priority = 1,
2626 .fixed_size = true,
2627 .bonus_ways = 0xffff,
2628 .cache_mode = 0,
2629 .retain_on_pc = true,
2630 }, {
2631 .usecase_id = LLCC_CMPT,
2632 .slice_id = 10,
2633 .max_cap = 4096,
2634 .priority = 1,
2635 .fixed_size = true,
2636 .bonus_ways = 0xffff,
2637 .cache_mode = 0,
2638 .retain_on_pc = true,
2639 }, {
2640 .usecase_id = LLCC_GPUHTW,
2641 .slice_id = 11,
2642 .max_cap = 512,
2643 .priority = 1,
2644 .fixed_size = true,
2645 .bonus_ways = 0xffff,
2646 .cache_mode = 0,
2647 .retain_on_pc = true,
2648 }, {
2649 .usecase_id = LLCC_GPU,
2650 .slice_id = 12,
2651 .max_cap = 2048,
2652 .priority = 1,
2653 .fixed_size = true,
2654 .bonus_ways = 0xffff,
2655 .cache_mode = 0,
2656 .retain_on_pc = true,
2657 .write_scid_en = true,
2658 }, {
2659 .usecase_id = LLCC_MMUHWT,
2660 .slice_id = 13,
2661 .max_cap = 768,
2662 .priority = 1,
2663 .fixed_size = true,
2664 .bonus_ways = 0xffff,
2665 .cache_mode = 0,
2666 .activate_on_init = true,
2667 }, {
2668 .usecase_id = LLCC_DISP,
2669 .slice_id = 16,
2670 .max_cap = 4096,
2671 .priority = 2,
2672 .fixed_size = true,
2673 .bonus_ways = 0xffff,
2674 .cache_mode = 0,
2675 .retain_on_pc = true,
2676 }, {
2677 .usecase_id = LLCC_MDMPNG,
2678 .slice_id = 21,
2679 .max_cap = 1024,
2680 .priority = 1,
2681 .fixed_size = true,
2682 .bonus_ways = 0xf000,
2683 .cache_mode = 0,
2684 .retain_on_pc = true,
2685 }, {
2686 .usecase_id = LLCC_AUDHW,
2687 .slice_id = 22,
2688 .max_cap = 1024,
2689 .priority = 1,
2690 .fixed_size = true,
2691 .bonus_ways = 0xffff,
2692 .cache_mode = 0,
2693 }, {
2694 .usecase_id = LLCC_CVP,
2695 .slice_id = 28,
2696 .max_cap = 256,
2697 .priority = 3,
2698 .fixed_size = true,
2699 .bonus_ways = 0xffff,
2700 .cache_mode = 0,
2701 .retain_on_pc = true,
2702 }, {
2703 .usecase_id = LLCC_MODPE,
2704 .slice_id = 29,
2705 .max_cap = 64,
2706 .priority = 1,
2707 .fixed_size = true,
2708 .bonus_ways = 0xf000,
2709 .cache_mode = 0,
2710 .retain_on_pc = true,
2711 }, {
2712 .usecase_id = LLCC_APTCM,
2713 .slice_id = 30,
2714 .max_cap = 1024,
2715 .priority = 3,
2716 .fixed_size = true,
2717 .res_ways = 0xf0,
2718 .cache_mode = 1,
2719 .retain_on_pc = true,
2720 }, {
2721 .usecase_id = LLCC_WRCACHE,
2722 .slice_id = 31,
2723 .max_cap = 512,
2724 .priority = 1,
2725 .fixed_size = true,
2726 .bonus_ways = 0xffff,
2727 .cache_mode = 0,
2728 .activate_on_init = true,
2729 }, {
2730 .usecase_id = LLCC_CVPFW,
2731 .slice_id = 17,
2732 .max_cap = 512,
2733 .priority = 1,
2734 .fixed_size = true,
2735 .bonus_ways = 0xffff,
2736 .cache_mode = 0,
2737 .retain_on_pc = true,
2738 }, {
2739 .usecase_id = LLCC_CPUSS1,
2740 .slice_id = 3,
2741 .max_cap = 1024,
2742 .priority = 1,
2743 .fixed_size = true,
2744 .bonus_ways = 0xffff,
2745 .cache_mode = 0,
2746 .retain_on_pc = true,
2747 }, {
2748 .usecase_id = LLCC_CAMEXP0,
2749 .slice_id = 4,
2750 .max_cap = 256,
2751 .priority = 3,
2752 .fixed_size = true,
2753 .bonus_ways = 0xffff,
2754 .cache_mode = 0,
2755 .retain_on_pc = true,
2756 }, {
2757 .usecase_id = LLCC_CPUMTE,
2758 .slice_id = 23,
2759 .max_cap = 256,
2760 .priority = 1,
2761 .fixed_size = true,
2762 .bonus_ways = 0xfff,
2763 .cache_mode = 0,
2764 .activate_on_init = true,
2765 }, {
2766 .usecase_id = LLCC_CPUHWT,
2767 .slice_id = 5,
2768 .max_cap = 512,
2769 .priority = 1,
2770 .fixed_size = true,
2771 .bonus_ways = 0xffff,
2772 .cache_mode = 0,
2773 .retain_on_pc = true,
2774 .activate_on_init = true,
2775 }, {
2776 .usecase_id = LLCC_CAMEXP1,
2777 .slice_id = 27,
2778 .max_cap = 256,
2779 .priority = 3,
2780 .fixed_size = true,
2781 .bonus_ways = 0xffff,
2782 .cache_mode = 0,
2783 .retain_on_pc = true,
2784 }, {
2785 .usecase_id = LLCC_AENPU,
2786 .slice_id = 8,
2787 .max_cap = 2048,
2788 .priority = 1,
2789 .fixed_size = true,
2790 .bonus_ways = 0xffff,
2791 .cache_mode = 0,
2792 },
2793 };
2794
2795 static const struct llcc_slice_config sm8550_data[] = {
2796 {
2797 .usecase_id = LLCC_CPUSS,
2798 .slice_id = 1,
2799 .max_cap = 5120,
2800 .priority = 1,
2801 .bonus_ways = 0xffffff,
2802 .cache_mode = 0,
2803 .activate_on_init = true,
2804 .write_scid_en = true,
2805 }, {
2806 .usecase_id = LLCC_VIDSC0,
2807 .slice_id = 2,
2808 .max_cap = 512,
2809 .priority = 4,
2810 .fixed_size = true,
2811 .bonus_ways = 0xffffff,
2812 .cache_mode = 0,
2813 }, {
2814 .usecase_id = LLCC_AUDIO,
2815 .slice_id = 6,
2816 .max_cap = 1024,
2817 .priority = 1,
2818 .fixed_size = true,
2819 .bonus_ways = 0xffffff,
2820 .cache_mode = 0,
2821 }, {
2822 .usecase_id = LLCC_MDMHPGRW,
2823 .slice_id = 25,
2824 .max_cap = 1024,
2825 .priority = 4,
2826 .bonus_ways = 0xffffff,
2827 .cache_mode = 0,
2828 }, {
2829 .usecase_id = LLCC_MODHW,
2830 .slice_id = 26,
2831 .max_cap = 1024,
2832 .priority = 1,
2833 .fixed_size = true,
2834 .bonus_ways = 0xffffff,
2835 .cache_mode = 0,
2836 }, {
2837 .usecase_id = LLCC_CMPT,
2838 .slice_id = 10,
2839 .max_cap = 4096,
2840 .priority = 1,
2841 .fixed_size = true,
2842 .bonus_ways = 0xffffff,
2843 .cache_mode = 0,
2844 }, {
2845 .usecase_id = LLCC_GPUHTW,
2846 .slice_id = 11,
2847 .max_cap = 512,
2848 .priority = 1,
2849 .fixed_size = true,
2850 .bonus_ways = 0xffffff,
2851 .cache_mode = 0,
2852 }, {
2853 .usecase_id = LLCC_GPU,
2854 .slice_id = 9,
2855 .max_cap = 3096,
2856 .priority = 1,
2857 .bonus_ways = 0xffffff,
2858 .cache_mode = 0,
2859 .write_scid_en = true,
2860 .write_scid_cacheable_en = true,
2861 }, {
2862 .usecase_id = LLCC_MMUHWT,
2863 .slice_id = 18,
2864 .max_cap = 768,
2865 .priority = 1,
2866 .fixed_size = true,
2867 .bonus_ways = 0xffffff,
2868 .cache_mode = 0,
2869 .activate_on_init = true,
2870 }, {
2871 .usecase_id = LLCC_DISP,
2872 .slice_id = 16,
2873 .max_cap = 6144,
2874 .priority = 1,
2875 .fixed_size = true,
2876 .bonus_ways = 0xffffff,
2877 .cache_mode = 2,
2878 }, {
2879 .usecase_id = LLCC_MDMPNG,
2880 .slice_id = 27,
2881 .max_cap = 1024,
2882 .priority = 0,
2883 .fixed_size = true,
2884 .bonus_ways = 0xf00000,
2885 .cache_mode = 0,
2886 }, {
2887 .usecase_id = LLCC_AUDHW,
2888 .slice_id = 22,
2889 .max_cap = 1024,
2890 .priority = 1,
2891 .fixed_size = true,
2892 .bonus_ways = 0xffffff,
2893 .cache_mode = 0,
2894 }, {
2895 .usecase_id = LLCC_CVP,
2896 .slice_id = 8,
2897 .max_cap = 256,
2898 .priority = 4,
2899 .fixed_size = true,
2900 .bonus_ways = 0xffffff,
2901 .cache_mode = 0,
2902 }, {
2903 .usecase_id = LLCC_MODPE,
2904 .slice_id = 29,
2905 .max_cap = 64,
2906 .priority = 1,
2907 .fixed_size = true,
2908 .bonus_ways = 0xf00000,
2909 .cache_mode = 0,
2910 .alloc_oneway_en = true,
2911 .vict_prio = true,
2912 }, {
2913 .usecase_id = LLCC_WRCACHE,
2914 .slice_id = 31,
2915 .max_cap = 512,
2916 .priority = 1,
2917 .fixed_size = true,
2918 .bonus_ways = 0xffffff,
2919 .cache_mode = 0,
2920 .activate_on_init = true,
2921 }, {
2922 .usecase_id = LLCC_CAMEXP0,
2923 .slice_id = 4,
2924 .max_cap = 256,
2925 .priority = 4,
2926 .fixed_size = true,
2927 .bonus_ways = 0xf,
2928 .cache_mode = 0,
2929 }, {
2930 .usecase_id = LLCC_CPUHWT,
2931 .slice_id = 5,
2932 .max_cap = 512,
2933 .priority = 1,
2934 .fixed_size = true,
2935 .bonus_ways = 0xffffff,
2936 .cache_mode = 0,
2937 .activate_on_init = true,
2938 }, {
2939 .usecase_id = LLCC_CAMEXP1,
2940 .slice_id = 7,
2941 .max_cap = 3200,
2942 .priority = 3,
2943 .fixed_size = true,
2944 .bonus_ways = 0xfffff0,
2945 .cache_mode = 2,
2946 }, {
2947 .usecase_id = LLCC_CMPTHCP,
2948 .slice_id = 17,
2949 .max_cap = 256,
2950 .priority = 4,
2951 .fixed_size = true,
2952 .bonus_ways = 0xffffff,
2953 .cache_mode = 0,
2954 }, {
2955 .usecase_id = LLCC_LCPDARE,
2956 .slice_id = 30,
2957 .max_cap = 128,
2958 .priority = 4,
2959 .fixed_size = true,
2960 .bonus_ways = 0xffffff,
2961 .cache_mode = 0,
2962 .activate_on_init = true,
2963 .alloc_oneway_en = true,
2964 .vict_prio = true,
2965 }, {
2966 .usecase_id = LLCC_AENPU,
2967 .slice_id = 3,
2968 .max_cap = 3072,
2969 .priority = 1,
2970 .fixed_size = true,
2971 .bonus_ways = 0xfe01ff,
2972 .cache_mode = 2,
2973 }, {
2974 .usecase_id = LLCC_ISLAND1,
2975 .slice_id = 12,
2976 .max_cap = 1792,
2977 .priority = 7,
2978 .fixed_size = true,
2979 .bonus_ways = 0xfe00,
2980 .cache_mode = 0,
2981 }, {
2982 .usecase_id = LLCC_ISLAND4,
2983 .slice_id = 15,
2984 .max_cap = 256,
2985 .priority = 7,
2986 .fixed_size = true,
2987 .bonus_ways = 0x10000,
2988 .cache_mode = 0,
2989 }, {
2990 .usecase_id = LLCC_CAMEXP2,
2991 .slice_id = 19,
2992 .max_cap = 3200,
2993 .priority = 3,
2994 .fixed_size = true,
2995 .bonus_ways = 0xfffff0,
2996 .cache_mode = 2,
2997 }, {
2998 .usecase_id = LLCC_CAMEXP3,
2999 .slice_id = 20,
3000 .max_cap = 3200,
3001 .priority = 2,
3002 .fixed_size = true,
3003 .bonus_ways = 0xfffff0,
3004 .cache_mode = 2,
3005 }, {
3006 .usecase_id = LLCC_CAMEXP4,
3007 .slice_id = 21,
3008 .max_cap = 3200,
3009 .priority = 2,
3010 .fixed_size = true,
3011 .bonus_ways = 0xfffff0,
3012 .cache_mode = 2,
3013 }, {
3014 .usecase_id = LLCC_DISP_WB,
3015 .slice_id = 23,
3016 .max_cap = 1024,
3017 .priority = 4,
3018 .fixed_size = true,
3019 .bonus_ways = 0xffffff,
3020 .cache_mode = 0,
3021 }, {
3022 .usecase_id = LLCC_DISP_1,
3023 .slice_id = 24,
3024 .max_cap = 6144,
3025 .priority = 1,
3026 .fixed_size = true,
3027 .bonus_ways = 0xffffff,
3028 .cache_mode = 2,
3029 }, {
3030 .usecase_id = LLCC_VIDVSP,
3031 .slice_id = 28,
3032 .max_cap = 256,
3033 .priority = 4,
3034 .fixed_size = true,
3035 .bonus_ways = 0xffffff,
3036 .cache_mode = 0,
3037 },
3038 };
3039
3040 static const struct llcc_slice_config sm8650_data[] = {
3041 {
3042 .usecase_id = LLCC_CPUSS,
3043 .slice_id = 1,
3044 .max_cap = 5120,
3045 .priority = 1,
3046 .bonus_ways = 0xffffff,
3047 .cache_mode = 0,
3048 .activate_on_init = true,
3049 .stale_en = true,
3050 }, {
3051 .usecase_id = LLCC_VIDSC0,
3052 .slice_id = 2,
3053 .max_cap = 512,
3054 .priority = 3,
3055 .fixed_size = true,
3056 .bonus_ways = 0xffffff,
3057 .cache_mode = 0,
3058 }, {
3059 .usecase_id = LLCC_AUDIO,
3060 .slice_id = 6,
3061 .max_cap = 512,
3062 .priority = 1,
3063 .fixed_size = true,
3064 .bonus_ways = 0xffffff,
3065 .cache_mode = 0,
3066 }, {
3067 .usecase_id = LLCC_MDMHPGRW,
3068 .slice_id = 25,
3069 .max_cap = 1024,
3070 .priority = 3,
3071 .bonus_ways = 0xffffff,
3072 .cache_mode = 0,
3073 }, {
3074 .usecase_id = LLCC_MODHW,
3075 .slice_id = 26,
3076 .max_cap = 1024,
3077 .priority = 1,
3078 .fixed_size = true,
3079 .bonus_ways = 0xffffff,
3080 .cache_mode = 0,
3081 }, {
3082 .usecase_id = LLCC_CMPT,
3083 .slice_id = 10,
3084 .max_cap = 4096,
3085 .priority = 1,
3086 .fixed_size = true,
3087 .bonus_ways = 0xffffff,
3088 .cache_mode = 0,
3089 }, {
3090 .usecase_id = LLCC_GPUHTW,
3091 .slice_id = 11,
3092 .max_cap = 512,
3093 .priority = 1,
3094 .fixed_size = true,
3095 .bonus_ways = 0xffffff,
3096 .cache_mode = 0,
3097 }, {
3098 .usecase_id = LLCC_GPU,
3099 .slice_id = 9,
3100 .max_cap = 3096,
3101 .priority = 1,
3102 .bonus_ways = 0xffffff,
3103 .cache_mode = 0,
3104 .write_scid_en = true,
3105 .write_scid_cacheable_en = true,
3106 }, {
3107 .usecase_id = LLCC_MMUHWT,
3108 .slice_id = 18,
3109 .max_cap = 768,
3110 .priority = 1,
3111 .fixed_size = true,
3112 .bonus_ways = 0xffffff,
3113 .cache_mode = 0,
3114 .activate_on_init = true,
3115 }, {
3116 .usecase_id = LLCC_DISP,
3117 .slice_id = 16,
3118 .max_cap = 6144,
3119 .priority = 1,
3120 .fixed_size = true,
3121 .bonus_ways = 0xffffff,
3122 .cache_mode = 2,
3123 }, {
3124 .usecase_id = LLCC_MDMHPFX,
3125 .slice_id = 24,
3126 .max_cap = 1024,
3127 .priority = 3,
3128 .fixed_size = true,
3129 .bonus_ways = 0xffffff,
3130 .cache_mode = 0,
3131 }, {
3132 .usecase_id = LLCC_MDMPNG,
3133 .slice_id = 27,
3134 .max_cap = 1024,
3135 .priority = 0,
3136 .fixed_size = true,
3137 .cache_mode = 0,
3138 }, {
3139 .usecase_id = LLCC_AUDHW,
3140 .slice_id = 22,
3141 .max_cap = 1024,
3142 .priority = 1,
3143 .fixed_size = true,
3144 .bonus_ways = 0xffffff,
3145 .cache_mode = 0,
3146 }, {
3147 .usecase_id = LLCC_CVP,
3148 .slice_id = 8,
3149 .max_cap = 256,
3150 .priority = 3,
3151 .fixed_size = true,
3152 .bonus_ways = 0xffffff,
3153 .cache_mode = 0,
3154 }, {
3155 .usecase_id = LLCC_MODPE,
3156 .slice_id = 29,
3157 .max_cap = 128,
3158 .priority = 1,
3159 .fixed_size = true,
3160 .bonus_ways = 0xf00000,
3161 .cache_mode = 0,
3162 .alloc_oneway_en = true,
3163 }, {
3164 .usecase_id = LLCC_WRCACHE,
3165 .slice_id = 31,
3166 .max_cap = 512,
3167 .priority = 1,
3168 .fixed_size = true,
3169 .bonus_ways = 0xffffff,
3170 .cache_mode = 0,
3171 .activate_on_init = true,
3172 }, {
3173 .usecase_id = LLCC_CAMEXP0,
3174 .slice_id = 4,
3175 .max_cap = 256,
3176 .priority = 3,
3177 .fixed_size = true,
3178 .bonus_ways = 0xf,
3179 .cache_mode = 0,
3180 }, {
3181 .usecase_id = LLCC_CAMEXP1,
3182 .slice_id = 7,
3183 .max_cap = 3200,
3184 .priority = 3,
3185 .fixed_size = true,
3186 .bonus_ways = 0xfffff0,
3187 .cache_mode = 2,
3188 }, {
3189 .usecase_id = LLCC_CMPTHCP,
3190 .slice_id = 17,
3191 .max_cap = 256,
3192 .priority = 3,
3193 .fixed_size = true,
3194 .bonus_ways = 0xffffff,
3195 .cache_mode = 0,
3196 }, {
3197 .usecase_id = LLCC_LCPDARE,
3198 .slice_id = 30,
3199 .max_cap = 128,
3200 .priority = 3,
3201 .fixed_size = true,
3202 .bonus_ways = 0xffffff,
3203 .cache_mode = 0,
3204 .activate_on_init = true,
3205 .alloc_oneway_en = true,
3206 }, {
3207 .usecase_id = LLCC_AENPU,
3208 .slice_id = 3,
3209 .max_cap = 3072,
3210 .priority = 1,
3211 .fixed_size = true,
3212 .bonus_ways = 0xffffff,
3213 .cache_mode = 2,
3214 }, {
3215 .usecase_id = LLCC_ISLAND1,
3216 .slice_id = 12,
3217 .max_cap = 5888,
3218 .priority = 7,
3219 .fixed_size = true,
3220 .res_ways = 0x7fffff,
3221 .cache_mode = 0,
3222 }, {
3223 .usecase_id = LLCC_DISP_WB,
3224 .slice_id = 23,
3225 .max_cap = 1024,
3226 .priority = 3,
3227 .fixed_size = true,
3228 .bonus_ways = 0xffffff,
3229 .cache_mode = 0,
3230 }, {
3231 .usecase_id = LLCC_VIDVSP,
3232 .slice_id = 28,
3233 .max_cap = 256,
3234 .priority = 3,
3235 .fixed_size = true,
3236 .bonus_ways = 0xffffff,
3237 .cache_mode = 0,
3238 },
3239 };
3240
3241 static const struct llcc_slice_config sm8750_data[] = {
3242 {
3243 .usecase_id = LLCC_CPUSS,
3244 .slice_id = 1,
3245 .max_cap = 5120,
3246 .priority = 1,
3247 .bonus_ways = 0xffffffff,
3248 .activate_on_init = true,
3249 .write_scid_en = true,
3250 }, {
3251 .usecase_id = LLCC_MDMHPFX,
3252 .slice_id = 24,
3253 .max_cap = 1024,
3254 .priority = 5,
3255 .fixed_size = true,
3256 .bonus_ways = 0xffffffff,
3257 }, {
3258 .usecase_id = LLCC_VIDSC0,
3259 .slice_id = 2,
3260 .max_cap = 512,
3261 .priority = 4,
3262 .fixed_size = true,
3263 .bonus_ways = 0xffffffff,
3264 }, {
3265 .usecase_id = LLCC_AUDIO,
3266 .slice_id = 35,
3267 .max_cap = 512,
3268 .priority = 1,
3269 .fixed_size = true,
3270 .bonus_ways = 0xffffffff,
3271 }, {
3272 .usecase_id = LLCC_MDMHPGRW,
3273 .slice_id = 25,
3274 .max_cap = 1024,
3275 .priority = 5,
3276 .bonus_ways = 0xffffffff,
3277 }, {
3278 .usecase_id = LLCC_MODHW,
3279 .slice_id = 26,
3280 .max_cap = 1024,
3281 .priority = 1,
3282 .fixed_size = true,
3283 .bonus_ways = 0xffffffff,
3284 }, {
3285 .usecase_id = LLCC_CMPT,
3286 .slice_id = 34,
3287 .max_cap = 4096,
3288 .priority = 1,
3289 .fixed_size = true,
3290 .bonus_ways = 0xffffffff,
3291 }, {
3292 .usecase_id = LLCC_GPUHTW,
3293 .slice_id = 11,
3294 .max_cap = 512,
3295 .priority = 1,
3296 .fixed_size = true,
3297 .bonus_ways = 0xffffffff,
3298 }, {
3299 .usecase_id = LLCC_GPU,
3300 .slice_id = 9,
3301 .max_cap = 5632,
3302 .priority = 1,
3303 .fixed_size = true,
3304 .bonus_ways = 0xffffffff,
3305 .write_scid_en = true,
3306 .write_scid_cacheable_en = true
3307 }, {
3308 .usecase_id = LLCC_MMUHWT,
3309 .slice_id = 18,
3310 .max_cap = 768,
3311 .priority = 1,
3312 .fixed_size = true,
3313 .bonus_ways = 0xffffffff,
3314 .activate_on_init = true,
3315 }, {
3316 .usecase_id = LLCC_DISP,
3317 .slice_id = 16,
3318 .max_cap = 7168,
3319 .priority = 1,
3320 .fixed_size = true,
3321 .bonus_ways = 0xffffffff,
3322 .cache_mode = 2,
3323 .stale_en = true,
3324 }, {
3325 .usecase_id = LLCC_VIDFW,
3326 .slice_id = 17,
3327 .priority = 4,
3328 .fixed_size = true,
3329 .bonus_ways = 0xffffffff,
3330 }, {
3331 .usecase_id = LLCC_CAMFW,
3332 .slice_id = 20,
3333 .priority = 4,
3334 .fixed_size = true,
3335 .bonus_ways = 0xffffffff,
3336 }, {
3337 .usecase_id = LLCC_MDMPNG,
3338 .slice_id = 27,
3339 .max_cap = 256,
3340 .priority = 5,
3341 .fixed_size = true,
3342 .bonus_ways = 0xf0000000,
3343 }, {
3344 .usecase_id = LLCC_AUDHW,
3345 .slice_id = 22,
3346 .max_cap = 512,
3347 .priority = 1,
3348 .fixed_size = true,
3349 .bonus_ways = 0xffffffff,
3350 }, {
3351 .usecase_id = LLCC_CVP,
3352 .slice_id = 8,
3353 .max_cap = 800,
3354 .priority = 5,
3355 .fixed_size = true,
3356 .bonus_ways = 0xffffffff,
3357 .vict_prio = true,
3358 }, {
3359 .usecase_id = LLCC_MODPE,
3360 .slice_id = 29,
3361 .max_cap = 256,
3362 .priority = 1,
3363 .fixed_size = true,
3364 .bonus_ways = 0xf0000000,
3365 .alloc_oneway_en = true,
3366 }, {
3367 .usecase_id = LLCC_WRCACHE,
3368 .slice_id = 31,
3369 .max_cap = 512,
3370 .priority = 1,
3371 .fixed_size = true,
3372 .bonus_ways = 0xffffffff,
3373 .activate_on_init = true,
3374 }, {
3375 .usecase_id = LLCC_CVPFW,
3376 .slice_id = 19,
3377 .max_cap = 64,
3378 .priority = 4,
3379 .fixed_size = true,
3380 .bonus_ways = 0xffffffff,
3381 }, {
3382 .usecase_id = LLCC_CMPTHCP,
3383 .slice_id = 15,
3384 .max_cap = 256,
3385 .priority = 4,
3386 .fixed_size = true,
3387 .bonus_ways = 0xffffffff,
3388 }, {
3389 .usecase_id = LLCC_LCPDARE,
3390 .slice_id = 30,
3391 .max_cap = 128,
3392 .priority = 5,
3393 .fixed_size = true,
3394 .bonus_ways = 0xffffffff,
3395 .activate_on_init = true,
3396 .alloc_oneway_en = true,
3397 }, {
3398 .usecase_id = LLCC_AENPU,
3399 .slice_id = 3,
3400 .max_cap = 3072,
3401 .priority = 1,
3402 .fixed_size = true,
3403 .bonus_ways = 0xffffffff,
3404 .cache_mode = 2,
3405 }, {
3406 .usecase_id = LLCC_ISLAND1,
3407 .slice_id = 12,
3408 .max_cap = 7936,
3409 .priority = 7,
3410 .fixed_size = true,
3411 .bonus_ways = 0x7fffffff,
3412 }, {
3413 .usecase_id = LLCC_DISP_WB,
3414 .slice_id = 23,
3415 .max_cap = 512,
3416 .priority = 4,
3417 .fixed_size = true,
3418 .bonus_ways = 0xffffffff,
3419 }, {
3420 .usecase_id = LLCC_VIDVSP,
3421 .slice_id = 4,
3422 .max_cap = 256,
3423 .priority = 4,
3424 .fixed_size = true,
3425 .bonus_ways = 0xffffffff,
3426 }, {
3427 .usecase_id = LLCC_VIDDEC,
3428 .slice_id = 5,
3429 .max_cap = 6144,
3430 .priority = 4,
3431 .fixed_size = true,
3432 .bonus_ways = 0xffffffff,
3433 .cache_mode = 2,
3434 .ovcap_prio = true,
3435 .parent_slice_id = 33,
3436 }, {
3437 .usecase_id = LLCC_CAMOFE,
3438 .slice_id = 33,
3439 .max_cap = 6144,
3440 .priority = 4,
3441 .fixed_size = true,
3442 .bonus_ways = 0xffffffff,
3443 .stale_en = true,
3444 .ovcap_prio = true,
3445 .parent_slice_id = 33,
3446 }, {
3447 .usecase_id = LLCC_CAMRTIP,
3448 .slice_id = 13,
3449 .max_cap = 1024,
3450 .priority = 4,
3451 .fixed_size = true,
3452 .bonus_ways = 0xffffffff,
3453 .stale_en = true,
3454 .ovcap_prio = true,
3455 .parent_slice_id = 33,
3456 }, {
3457 .usecase_id = LLCC_CAMSRTIP,
3458 .slice_id = 14,
3459 .max_cap = 6144,
3460 .priority = 4,
3461 .fixed_size = true,
3462 .bonus_ways = 0xffffffff,
3463 .stale_en = true,
3464 .ovcap_prio = true,
3465 .parent_slice_id = 33,
3466 }, {
3467 .usecase_id = LLCC_CAMRTRF,
3468 .slice_id = 7,
3469 .max_cap = 3584,
3470 .priority = 1,
3471 .fixed_size = true,
3472 .bonus_ways = 0xffffffff,
3473 .stale_en = true,
3474 .ovcap_prio = true,
3475 .parent_slice_id = 33,
3476 }, {
3477 .usecase_id = LLCC_CAMSRTRF,
3478 .slice_id = 21,
3479 .max_cap = 6144,
3480 .priority = 1,
3481 .fixed_size = true,
3482 .bonus_ways = 0xffffffff,
3483 .stale_en = true,
3484 .ovcap_prio = true,
3485 .parent_slice_id = 33,
3486 }, {
3487 .usecase_id = LLCC_CPUSSMPAM,
3488 .slice_id = 6,
3489 .max_cap = 2048,
3490 .priority = 1,
3491 .fixed_size = true,
3492 .bonus_ways = 0xffffffff,
3493 .activate_on_init = true,
3494 .write_scid_en = true,
3495 },
3496 };
3497
3498 static const struct llcc_slice_config qcs615_data[] = {
3499 {
3500 .usecase_id = LLCC_CPUSS,
3501 .slice_id = 1,
3502 .max_cap = 128,
3503 .priority = 1,
3504 .bonus_ways = 0xf,
3505 .cache_mode = 0,
3506 .activate_on_init = true,
3507 .write_scid_en = true,
3508 }, {
3509 .usecase_id = LLCC_MDM,
3510 .slice_id = 8,
3511 .max_cap = 256,
3512 .priority = 0,
3513 .fixed_size = true,
3514 .bonus_ways = 0xf,
3515 .cache_mode = 0,
3516 .activate_on_init = true,
3517 }, {
3518 .usecase_id = LLCC_GPUHTW,
3519 .slice_id = 11,
3520 .max_cap = 128,
3521 .priority = 1,
3522 .fixed_size = true,
3523 .bonus_ways = 0xf,
3524 .cache_mode = 0,
3525 .activate_on_init = true,
3526 }, {
3527 .usecase_id = LLCC_GPU,
3528 .slice_id = 12,
3529 .max_cap = 128,
3530 .priority = 1,
3531 .bonus_ways = 0xf,
3532 .cache_mode = 0,
3533 .activate_on_init = true,
3534 },
3535 };
3536
3537 static const struct llcc_slice_config qcs8300_data[] = {
3538 {
3539 .usecase_id = LLCC_GPUHTW,
3540 .slice_id = 11,
3541 .max_cap = 128,
3542 .priority = 1,
3543 .fixed_size = true,
3544 .bonus_ways = 0xf,
3545 .cache_mode = 0,
3546 .retain_on_pc = true,
3547 }, {
3548 .usecase_id = LLCC_GPU,
3549 .slice_id = 12,
3550 .max_cap = 512,
3551 .priority = 1,
3552 .fixed_size = true,
3553 .bonus_ways = 0xf,
3554 .cache_mode = 0,
3555 .retain_on_pc = true,
3556 .write_scid_en = true,
3557 }, {
3558 .usecase_id = LLCC_MMUHWT,
3559 .slice_id = 13,
3560 .max_cap = 128,
3561 .priority = 1,
3562 .fixed_size = true,
3563 .bonus_ways = 0xf,
3564 .cache_mode = 0,
3565 .activate_on_init = true,
3566 }, {
3567 .usecase_id = LLCC_ECC,
3568 .slice_id = 26,
3569 .max_cap = 256,
3570 .priority = 3,
3571 .fixed_size = true,
3572 .bonus_ways = 0xf,
3573 .cache_mode = 0,
3574 .activate_on_init = true,
3575 }, {
3576 .usecase_id = LLCC_WRCACHE,
3577 .slice_id = 31,
3578 .max_cap = 128,
3579 .priority = 1,
3580 .fixed_size = true,
3581 .bonus_ways = 0xf,
3582 .cache_mode = 0,
3583 .activate_on_init = true,
3584 },
3585 };
3586
3587 static const struct llcc_slice_config qdu1000_data_2ch[] = {
3588 {
3589 .usecase_id = LLCC_MDMHPGRW,
3590 .slice_id = 7,
3591 .max_cap = 512,
3592 .priority = 1,
3593 .fixed_size = true,
3594 .bonus_ways = 0xfff,
3595 .cache_mode = 0,
3596 .retain_on_pc = true,
3597 }, {
3598 .usecase_id = LLCC_MODHW,
3599 .slice_id = 9,
3600 .max_cap = 256,
3601 .priority = 1,
3602 .fixed_size = true,
3603 .bonus_ways = 0xfff,
3604 .cache_mode = 0,
3605 .retain_on_pc = true,
3606 }, {
3607 .usecase_id = LLCC_MDMPNG,
3608 .slice_id = 21,
3609 .max_cap = 256,
3610 .priority = 0,
3611 .fixed_size = true,
3612 .bonus_ways = 0x3,
3613 .cache_mode = 0,
3614 .retain_on_pc = true,
3615 }, {
3616 .usecase_id = LLCC_ECC,
3617 .slice_id = 26,
3618 .max_cap = 512,
3619 .priority = 3,
3620 .fixed_size = true,
3621 .bonus_ways = 0xffc,
3622 .cache_mode = 0,
3623 .activate_on_init = true,
3624 }, {
3625 .usecase_id = LLCC_MODPE,
3626 .slice_id = 29,
3627 .max_cap = 256,
3628 .priority = 1,
3629 .fixed_size = true,
3630 .bonus_ways = 0xfff,
3631 .cache_mode = 0,
3632 .retain_on_pc = true,
3633 }, {
3634 .usecase_id = LLCC_APTCM,
3635 .slice_id = 30,
3636 .max_cap = 256,
3637 .priority = 3,
3638 .fixed_size = true,
3639 .res_ways = 0xc,
3640 .cache_mode = 1,
3641 .retain_on_pc = true,
3642 }, {
3643 .usecase_id = LLCC_WRCACHE,
3644 .slice_id = 31,
3645 .max_cap = 128,
3646 .priority = 1,
3647 .fixed_size = true,
3648 .bonus_ways = 0x3,
3649 .cache_mode = 0,
3650 .activate_on_init = true,
3651 },
3652 };
3653
3654 static const struct llcc_slice_config qdu1000_data_4ch[] = {
3655 {
3656 .usecase_id = LLCC_MDMHPGRW,
3657 .slice_id = 7,
3658 .max_cap = 1024,
3659 .priority = 1,
3660 .fixed_size = true,
3661 .bonus_ways = 0xfff,
3662 .cache_mode = 0,
3663 .retain_on_pc = true,
3664 }, {
3665 .usecase_id = LLCC_MODHW,
3666 .slice_id = 9,
3667 .max_cap = 512,
3668 .priority = 1,
3669 .fixed_size = true,
3670 .bonus_ways = 0xfff,
3671 .cache_mode = 0,
3672 .retain_on_pc = true,
3673 }, {
3674 .usecase_id = LLCC_MDMPNG,
3675 .slice_id = 21,
3676 .max_cap = 512,
3677 .priority = 0,
3678 .fixed_size = true,
3679 .bonus_ways = 0x3,
3680 .cache_mode = 0,
3681 .retain_on_pc = true,
3682 }, {
3683 .usecase_id = LLCC_ECC,
3684 .slice_id = 26,
3685 .max_cap = 1024,
3686 .priority = 3,
3687 .fixed_size = true,
3688 .bonus_ways = 0xffc,
3689 .cache_mode = 0,
3690 .activate_on_init = true,
3691 }, {
3692 .usecase_id = LLCC_MODPE,
3693 .slice_id = 29,
3694 .max_cap = 512,
3695 .priority = 1,
3696 .fixed_size = true,
3697 .bonus_ways = 0xfff,
3698 .cache_mode = 0,
3699 .retain_on_pc = true,
3700 }, {
3701 .usecase_id = LLCC_APTCM,
3702 .slice_id = 30,
3703 .max_cap = 512,
3704 .priority = 3,
3705 .fixed_size = true,
3706 .res_ways = 0xc,
3707 .cache_mode = 1,
3708 .retain_on_pc = true,
3709 }, {
3710 .usecase_id = LLCC_WRCACHE,
3711 .slice_id = 31,
3712 .max_cap = 256,
3713 .priority = 1,
3714 .fixed_size = true,
3715 .bonus_ways = 0x3,
3716 .cache_mode = 0,
3717 .activate_on_init = true,
3718 },
3719 };
3720
3721 static const struct llcc_slice_config qdu1000_data_8ch[] = {
3722 {
3723 .usecase_id = LLCC_MDMHPGRW,
3724 .slice_id = 7,
3725 .max_cap = 2048,
3726 .priority = 1,
3727 .fixed_size = true,
3728 .bonus_ways = 0xfff,
3729 .cache_mode = 0,
3730 .retain_on_pc = true,
3731 }, {
3732 .usecase_id = LLCC_MODHW,
3733 .slice_id = 9,
3734 .max_cap = 1024,
3735 .priority = 1,
3736 .fixed_size = true,
3737 .bonus_ways = 0xfff,
3738 .cache_mode = 0,
3739 .retain_on_pc = true,
3740 }, {
3741 .usecase_id = LLCC_MDMPNG,
3742 .slice_id = 21,
3743 .max_cap = 1024,
3744 .priority = 0,
3745 .fixed_size = true,
3746 .bonus_ways = 0x3,
3747 .cache_mode = 0,
3748 .retain_on_pc = true,
3749 }, {
3750 .usecase_id = LLCC_ECC,
3751 .slice_id = 26,
3752 .max_cap = 2048,
3753 .priority = 3,
3754 .fixed_size = true,
3755 .bonus_ways = 0xffc,
3756 .cache_mode = 0,
3757 .activate_on_init = true,
3758 }, {
3759 .usecase_id = LLCC_MODPE,
3760 .slice_id = 29,
3761 .max_cap = 1024,
3762 .priority = 1,
3763 .fixed_size = true,
3764 .bonus_ways = 0xfff,
3765 .cache_mode = 0,
3766 .retain_on_pc = true,
3767 }, {
3768 .usecase_id = LLCC_APTCM,
3769 .slice_id = 30,
3770 .max_cap = 1024,
3771 .priority = 3,
3772 .fixed_size = true,
3773 .res_ways = 0xc,
3774 .cache_mode = 1,
3775 .retain_on_pc = true,
3776 }, {
3777 .usecase_id = LLCC_WRCACHE,
3778 .slice_id = 31,
3779 .max_cap = 512,
3780 .priority = 1,
3781 .fixed_size = true,
3782 .bonus_ways = 0x3,
3783 .cache_mode = 0,
3784 .activate_on_init = true,
3785 },
3786 };
3787
3788 static const struct llcc_slice_config x1e80100_data[] = {
3789 {
3790 .usecase_id = LLCC_CPUSS,
3791 .slice_id = 1,
3792 .max_cap = 6144,
3793 .priority = 1,
3794 .fixed_size = true,
3795 .bonus_ways = 0xfff,
3796 .cache_mode = 0,
3797 .activate_on_init = true,
3798 }, {
3799 .usecase_id = LLCC_VIDSC0,
3800 .slice_id = 2,
3801 .max_cap = 512,
3802 .priority = 4,
3803 .fixed_size = true,
3804 .bonus_ways = 0xfff,
3805 .cache_mode = 0,
3806 }, {
3807 .usecase_id = LLCC_AUDIO,
3808 .slice_id = 6,
3809 .max_cap = 1024,
3810 .priority = 1,
3811 .fixed_size = true,
3812 .bonus_ways = 0xfff,
3813 .cache_mode = 0,
3814 }, {
3815 .usecase_id = LLCC_CMPT,
3816 .slice_id = 10,
3817 .max_cap = 6144,
3818 .priority = 1,
3819 .fixed_size = true,
3820 .bonus_ways = 0xfff,
3821 .cache_mode = 0,
3822 }, {
3823 .usecase_id = LLCC_GPUHTW,
3824 .slice_id = 11,
3825 .max_cap = 512,
3826 .priority = 1,
3827 .fixed_size = true,
3828 .bonus_ways = 0xfff,
3829 .cache_mode = 0,
3830 }, {
3831 .usecase_id = LLCC_GPU,
3832 .slice_id = 9,
3833 .max_cap = 4608,
3834 .priority = 1,
3835 .bonus_ways = 0xfff,
3836 .cache_mode = 0,
3837 .write_scid_en = true,
3838 .write_scid_cacheable_en = true,
3839 .stale_en = true,
3840 }, {
3841 .usecase_id = LLCC_MMUHWT,
3842 .slice_id = 18,
3843 .max_cap = 512,
3844 .priority = 1,
3845 .fixed_size = true,
3846 .bonus_ways = 0xfff,
3847 .cache_mode = 0,
3848 .activate_on_init = true,
3849 }, {
3850 .usecase_id = LLCC_AUDHW,
3851 .slice_id = 22,
3852 .max_cap = 1024,
3853 .priority = 1,
3854 .fixed_size = true,
3855 .bonus_ways = 0xfff,
3856 .cache_mode = 0,
3857 }, {
3858 .usecase_id = LLCC_CVP,
3859 .slice_id = 8,
3860 .max_cap = 512,
3861 .priority = 4,
3862 .fixed_size = true,
3863 .bonus_ways = 0xfff,
3864 .cache_mode = 0,
3865 }, {
3866 .usecase_id = LLCC_WRCACHE,
3867 .slice_id = 31,
3868 .max_cap = 1024,
3869 .priority = 1,
3870 .fixed_size = true,
3871 .bonus_ways = 0xfff,
3872 .cache_mode = 0,
3873 .activate_on_init = true,
3874 }, {
3875 .usecase_id = LLCC_CAMEXP0,
3876 .slice_id = 4,
3877 .max_cap = 256,
3878 .priority = 4,
3879 .fixed_size = true,
3880 .bonus_ways = 0x3,
3881 .cache_mode = 0,
3882 }, {
3883 .usecase_id = LLCC_CAMEXP1,
3884 .slice_id = 7,
3885 .max_cap = 3072,
3886 .priority = 3,
3887 .fixed_size = true,
3888 .bonus_ways = 0xffc,
3889 .cache_mode = 2,
3890 }, {
3891 .usecase_id = LLCC_LCPDARE,
3892 .slice_id = 30,
3893 .max_cap = 512,
3894 .priority = 3,
3895 .fixed_size = true,
3896 .bonus_ways = 0xfff,
3897 .cache_mode = 0,
3898 .activate_on_init = true,
3899 .alloc_oneway_en = true,
3900 }, {
3901 .usecase_id = LLCC_AENPU,
3902 .slice_id = 3,
3903 .max_cap = 3072,
3904 .priority = 1,
3905 .fixed_size = true,
3906 .bonus_ways = 0xfff,
3907 .cache_mode = 2,
3908 }, {
3909 .usecase_id = LLCC_ISLAND1,
3910 .slice_id = 12,
3911 .max_cap = 2048,
3912 .priority = 7,
3913 .fixed_size = true,
3914 .res_ways = 0xf,
3915 .cache_mode = 0,
3916 }, {
3917 .usecase_id = LLCC_CAMEXP2,
3918 .slice_id = 19,
3919 .max_cap = 3072,
3920 .priority = 3,
3921 .fixed_size = true,
3922 .bonus_ways = 0xffc,
3923 .cache_mode = 2,
3924 }, {
3925 .usecase_id = LLCC_CAMEXP3,
3926 .slice_id = 20,
3927 .max_cap = 3072,
3928 .priority = 2,
3929 .fixed_size = true,
3930 .bonus_ways = 0xffc,
3931 .cache_mode = 2,
3932 }, {
3933 .usecase_id = LLCC_CAMEXP4,
3934 .slice_id = 21,
3935 .max_cap = 3072,
3936 .priority = 2,
3937 .fixed_size = true,
3938 .bonus_ways = 0xffc,
3939 .cache_mode = 2,
3940 },
3941 };
3942
3943 static const struct llcc_edac_reg_offset llcc_v1_edac_reg_offset = {
3944 .trp_ecc_error_status0 = 0x20344,
3945 .trp_ecc_error_status1 = 0x20348,
3946 .trp_ecc_sb_err_syn0 = 0x2304c,
3947 .trp_ecc_db_err_syn0 = 0x20370,
3948 .trp_ecc_error_cntr_clear = 0x20440,
3949 .trp_interrupt_0_status = 0x20480,
3950 .trp_interrupt_0_clear = 0x20484,
3951 .trp_interrupt_0_enable = 0x20488,
3952
3953 /* LLCC Common registers */
3954 .cmn_status0 = 0x3000c,
3955 .cmn_interrupt_0_enable = 0x3001c,
3956 .cmn_interrupt_2_enable = 0x3003c,
3957
3958 /* LLCC DRP registers */
3959 .drp_ecc_error_cfg = 0x40000,
3960 .drp_ecc_error_cntr_clear = 0x40004,
3961 .drp_interrupt_status = 0x41000,
3962 .drp_interrupt_clear = 0x41008,
3963 .drp_interrupt_enable = 0x4100c,
3964 .drp_ecc_error_status0 = 0x42044,
3965 .drp_ecc_error_status1 = 0x42048,
3966 .drp_ecc_sb_err_syn0 = 0x4204c,
3967 .drp_ecc_db_err_syn0 = 0x42070,
3968 };
3969
3970 static const struct llcc_edac_reg_offset llcc_v2_1_edac_reg_offset = {
3971 .trp_ecc_error_status0 = 0x20344,
3972 .trp_ecc_error_status1 = 0x20348,
3973 .trp_ecc_sb_err_syn0 = 0x2034c,
3974 .trp_ecc_db_err_syn0 = 0x20370,
3975 .trp_ecc_error_cntr_clear = 0x20440,
3976 .trp_interrupt_0_status = 0x20480,
3977 .trp_interrupt_0_clear = 0x20484,
3978 .trp_interrupt_0_enable = 0x20488,
3979
3980 /* LLCC Common registers */
3981 .cmn_status0 = 0x3400c,
3982 .cmn_interrupt_0_enable = 0x3401c,
3983 .cmn_interrupt_2_enable = 0x3403c,
3984
3985 /* LLCC DRP registers */
3986 .drp_ecc_error_cfg = 0x50000,
3987 .drp_ecc_error_cntr_clear = 0x50004,
3988 .drp_interrupt_status = 0x50020,
3989 .drp_interrupt_clear = 0x50028,
3990 .drp_interrupt_enable = 0x5002c,
3991 .drp_ecc_error_status0 = 0x520f4,
3992 .drp_ecc_error_status1 = 0x520f8,
3993 .drp_ecc_sb_err_syn0 = 0x520fc,
3994 .drp_ecc_db_err_syn0 = 0x52120,
3995 };
3996
3997 static const struct llcc_edac_reg_offset llcc_v6_edac_reg_offset = {
3998 .trp_ecc_error_status0 = 0x47448,
3999 .trp_ecc_error_status1 = 0x47450,
4000 .trp_ecc_sb_err_syn0 = 0x47490,
4001 .trp_ecc_db_err_syn0 = 0x474d0,
4002 .trp_ecc_error_cntr_clear = 0x47444,
4003 .trp_interrupt_0_status = 0x47600,
4004 .trp_interrupt_0_clear = 0x47604,
4005 .trp_interrupt_0_enable = 0x47608,
4006
4007 /* LLCC Common registers */
4008 .cmn_status0 = 0x6400c,
4009 .cmn_interrupt_0_enable = 0x6401c,
4010 .cmn_interrupt_2_enable = 0x6403c,
4011
4012 /* LLCC DRP registers */
4013 .drp_ecc_error_cfg = 0x80000,
4014 .drp_ecc_error_cntr_clear = 0x80004,
4015 .drp_interrupt_status = 0x80020,
4016 .drp_interrupt_clear = 0x80028,
4017 .drp_interrupt_enable = 0x8002c,
4018 .drp_ecc_error_status0 = 0x820f4,
4019 .drp_ecc_error_status1 = 0x820f8,
4020 .drp_ecc_sb_err_syn0 = 0x820fc,
4021 .drp_ecc_db_err_syn0 = 0x82120,
4022 };
4023
4024 /* LLCC register offset starting from v1.0.0 */
4025 static const u32 llcc_v1_reg_offset[] = {
4026 [LLCC_COMMON_HW_INFO] = 0x00030000,
4027 [LLCC_COMMON_STATUS0] = 0x0003000c,
4028 };
4029
4030 /* LLCC register offset starting from v2.0.1 */
4031 static const u32 llcc_v2_1_reg_offset[] = {
4032 [LLCC_COMMON_HW_INFO] = 0x00034000,
4033 [LLCC_COMMON_STATUS0] = 0x0003400c,
4034 };
4035
4036 /* LLCC register offset starting from v6.0.0 */
4037 static const u32 llcc_v6_reg_offset[] = {
4038 [LLCC_COMMON_HW_INFO] = 0x00064000,
4039 [LLCC_COMMON_STATUS0] = 0x0006400c,
4040 [LLCC_TRP_ATTR0_CFG] = 0x00041000,
4041 [LLCC_TRP_ATTR1_CFG] = 0x00041008,
4042 [LLCC_TRP_ATTR2_CFG] = 0x00041010,
4043 [LLCC_TRP_ATTR3_CFG] = 0x00041014,
4044 [LLCC_TRP_SID_DIS_CAP_ALLOC] = 0x00042000,
4045 [LLCC_TRP_ALGO_STALE_EN] = 0x00042008,
4046 [LLCC_TRP_ALGO_STALE_CAP_EN] = 0x00042010,
4047 [LLCC_TRP_ALGO_MRU0] = 0x00042018,
4048 [LLCC_TRP_ALGO_MRU1] = 0x00042020,
4049 [LLCC_TRP_ALGO_ALLOC0] = 0x00042028,
4050 [LLCC_TRP_ALGO_ALLOC1] = 0x00042030,
4051 [LLCC_TRP_ALGO_ALLOC2] = 0x00042038,
4052 [LLCC_TRP_ALGO_ALLOC3] = 0x00042040,
4053 [LLCC_TRP_WRS_EN] = 0x00042080,
4054 [LLCC_TRP_WRS_CACHEABLE_EN] = 0x00042088,
4055 };
4056
4057 static const struct qcom_llcc_config kaanapali_cfg[] = {
4058 {
4059 .sct_data = kaanapali_data,
4060 .size = ARRAY_SIZE(kaanapali_data),
4061 .reg_offset = llcc_v6_reg_offset,
4062 .edac_reg_offset = &llcc_v6_edac_reg_offset,
4063 },
4064 };
4065
4066 static const struct qcom_llcc_config glymur_cfg[] = {
4067 {
4068 .sct_data = glymur_data,
4069 .size = ARRAY_SIZE(glymur_data),
4070 .reg_offset = llcc_v6_reg_offset,
4071 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4072 .no_edac = true,
4073 },
4074 };
4075
4076 static const struct qcom_llcc_config qcs615_cfg[] = {
4077 {
4078 .sct_data = qcs615_data,
4079 .size = ARRAY_SIZE(qcs615_data),
4080 .reg_offset = llcc_v1_reg_offset,
4081 .edac_reg_offset = &llcc_v1_edac_reg_offset,
4082 },
4083 };
4084
4085 static const struct qcom_llcc_config qcs8300_cfg[] = {
4086 {
4087 .sct_data = qcs8300_data,
4088 .size = ARRAY_SIZE(qcs8300_data),
4089 .reg_offset = llcc_v2_1_reg_offset,
4090 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4091 .num_banks = 4,
4092 },
4093 };
4094
4095 static const struct qcom_llcc_config qdu1000_cfg[] = {
4096 {
4097 .sct_data = qdu1000_data_8ch,
4098 .size = ARRAY_SIZE(qdu1000_data_8ch),
4099 .reg_offset = llcc_v2_1_reg_offset,
4100 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4101 },
4102 {
4103 .sct_data = qdu1000_data_4ch,
4104 .size = ARRAY_SIZE(qdu1000_data_4ch),
4105 .reg_offset = llcc_v2_1_reg_offset,
4106 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4107 },
4108 {
4109 .sct_data = qdu1000_data_4ch,
4110 .size = ARRAY_SIZE(qdu1000_data_4ch),
4111 .reg_offset = llcc_v2_1_reg_offset,
4112 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4113 },
4114 {
4115 .sct_data = qdu1000_data_2ch,
4116 .size = ARRAY_SIZE(qdu1000_data_2ch),
4117 .reg_offset = llcc_v2_1_reg_offset,
4118 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4119 },
4120 };
4121
4122 static const struct qcom_llcc_config ipq5424_cfg[] = {
4123 {
4124 .sct_data = ipq5424_data,
4125 .size = ARRAY_SIZE(ipq5424_data),
4126 .reg_offset = llcc_v2_1_reg_offset,
4127 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4128 .no_broadcast_register = true,
4129 },
4130 };
4131
4132 static const struct qcom_llcc_config sa8775p_cfg[] = {
4133 {
4134 .sct_data = sa8775p_data,
4135 .size = ARRAY_SIZE(sa8775p_data),
4136 .reg_offset = llcc_v2_1_reg_offset,
4137 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4138 },
4139 };
4140
4141 static const struct qcom_llcc_config sar1130p_cfg[] = {
4142 {
4143 .sct_data = sar1130p_data,
4144 .size = ARRAY_SIZE(sar1130p_data),
4145 .reg_offset = llcc_v2_1_reg_offset,
4146 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4147 .max_cap_shift = 14,
4148 .num_banks = 2,
4149 },
4150 };
4151
4152 static const struct qcom_llcc_config sar2130p_cfg[] = {
4153 {
4154 .sct_data = sar2130p_data,
4155 .size = ARRAY_SIZE(sar2130p_data),
4156 .reg_offset = llcc_v2_1_reg_offset,
4157 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4158 .max_cap_shift = 14,
4159 .num_banks = 2,
4160 },
4161 };
4162
4163 static const struct qcom_llcc_config sc7180_cfg[] = {
4164 {
4165 .sct_data = sc7180_data,
4166 .size = ARRAY_SIZE(sc7180_data),
4167 .reg_offset = llcc_v1_reg_offset,
4168 .edac_reg_offset = &llcc_v1_edac_reg_offset,
4169 },
4170 };
4171
4172 static const struct qcom_llcc_config sc7280_cfg[] = {
4173 {
4174 .sct_data = sc7280_data,
4175 .size = ARRAY_SIZE(sc7280_data),
4176 .reg_offset = llcc_v1_reg_offset,
4177 .edac_reg_offset = &llcc_v1_edac_reg_offset,
4178 },
4179 };
4180
4181 static const struct qcom_llcc_config sc8180x_cfg[] = {
4182 {
4183 .sct_data = sc8180x_data,
4184 .size = ARRAY_SIZE(sc8180x_data),
4185 .reg_offset = llcc_v1_reg_offset,
4186 .edac_reg_offset = &llcc_v1_edac_reg_offset,
4187 },
4188 };
4189
4190 static const struct qcom_llcc_config sc8280xp_cfg[] = {
4191 {
4192 .sct_data = sc8280xp_data,
4193 .size = ARRAY_SIZE(sc8280xp_data),
4194 .reg_offset = llcc_v1_reg_offset,
4195 .edac_reg_offset = &llcc_v1_edac_reg_offset,
4196 },
4197 };
4198
4199 static const struct qcom_llcc_config sdm845_cfg[] = {
4200 {
4201 .sct_data = sdm845_data,
4202 .size = ARRAY_SIZE(sdm845_data),
4203 .skip_llcc_cfg = true,
4204 .reg_offset = llcc_v1_reg_offset,
4205 .edac_reg_offset = &llcc_v1_edac_reg_offset,
4206 .no_edac = true,
4207 },
4208 };
4209
4210 static const struct qcom_llcc_config sm6350_cfg[] = {
4211 {
4212 .sct_data = sm6350_data,
4213 .size = ARRAY_SIZE(sm6350_data),
4214 .reg_offset = llcc_v1_reg_offset,
4215 .edac_reg_offset = &llcc_v1_edac_reg_offset,
4216 },
4217 };
4218
4219 static const struct qcom_llcc_config sm7150_cfg[] = {
4220 {
4221 .sct_data = sm7150_data,
4222 .size = ARRAY_SIZE(sm7150_data),
4223 .reg_offset = llcc_v1_reg_offset,
4224 .edac_reg_offset = &llcc_v1_edac_reg_offset,
4225 },
4226 };
4227
4228 static const struct qcom_llcc_config sm8150_cfg[] = {
4229 {
4230 .sct_data = sm8150_data,
4231 .size = ARRAY_SIZE(sm8150_data),
4232 .reg_offset = llcc_v1_reg_offset,
4233 .edac_reg_offset = &llcc_v1_edac_reg_offset,
4234 },
4235 };
4236
4237 static const struct qcom_llcc_config sm8250_cfg[] = {
4238 {
4239 .sct_data = sm8250_data,
4240 .size = ARRAY_SIZE(sm8250_data),
4241 .reg_offset = llcc_v1_reg_offset,
4242 .edac_reg_offset = &llcc_v1_edac_reg_offset,
4243 },
4244 };
4245
4246 static const struct qcom_llcc_config sm8350_cfg[] = {
4247 {
4248 .sct_data = sm8350_data,
4249 .size = ARRAY_SIZE(sm8350_data),
4250 .reg_offset = llcc_v1_reg_offset,
4251 .edac_reg_offset = &llcc_v1_edac_reg_offset,
4252 },
4253 };
4254
4255 static const struct qcom_llcc_config sm8450_cfg[] = {
4256 {
4257 .sct_data = sm8450_data,
4258 .size = ARRAY_SIZE(sm8450_data),
4259 .reg_offset = llcc_v2_1_reg_offset,
4260 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4261 },
4262 };
4263
4264 static const struct qcom_llcc_config sm8550_cfg[] = {
4265 {
4266 .sct_data = sm8550_data,
4267 .size = ARRAY_SIZE(sm8550_data),
4268 .reg_offset = llcc_v2_1_reg_offset,
4269 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4270 },
4271 };
4272
4273 static const struct qcom_llcc_config sm8650_cfg[] = {
4274 {
4275 .sct_data = sm8650_data,
4276 .size = ARRAY_SIZE(sm8650_data),
4277 .reg_offset = llcc_v2_1_reg_offset,
4278 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4279 },
4280 };
4281
4282 static const struct qcom_llcc_config sm8750_cfg[] = {
4283 {
4284 .sct_data = sm8750_data,
4285 .size = ARRAY_SIZE(sm8750_data),
4286 .skip_llcc_cfg = false,
4287 .reg_offset = llcc_v6_reg_offset,
4288 .edac_reg_offset = &llcc_v6_edac_reg_offset,
4289 },
4290 };
4291
4292 static const struct qcom_llcc_config x1e80100_cfg[] = {
4293 {
4294 .sct_data = x1e80100_data,
4295 .size = ARRAY_SIZE(x1e80100_data),
4296 .reg_offset = llcc_v2_1_reg_offset,
4297 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4298 .irq_configured = true,
4299 },
4300 };
4301
4302 static const struct qcom_sct_config kaanapali_cfgs = {
4303 .llcc_config = kaanapali_cfg,
4304 .num_config = ARRAY_SIZE(kaanapali_cfg),
4305 };
4306
4307 static const struct qcom_sct_config glymur_cfgs = {
4308 .llcc_config = glymur_cfg,
4309 .num_config = ARRAY_SIZE(glymur_cfg),
4310 };
4311
4312 static const struct qcom_sct_config qcs615_cfgs = {
4313 .llcc_config = qcs615_cfg,
4314 .num_config = ARRAY_SIZE(qcs615_cfg),
4315 };
4316
4317 static const struct qcom_sct_config qcs8300_cfgs = {
4318 .llcc_config = qcs8300_cfg,
4319 .num_config = ARRAY_SIZE(qcs8300_cfg),
4320 };
4321
4322 static const struct qcom_sct_config qdu1000_cfgs = {
4323 .llcc_config = qdu1000_cfg,
4324 .num_config = ARRAY_SIZE(qdu1000_cfg),
4325 };
4326
4327 static const struct qcom_sct_config ipq5424_cfgs = {
4328 .llcc_config = ipq5424_cfg,
4329 .num_config = ARRAY_SIZE(ipq5424_cfg),
4330 };
4331
4332 static const struct qcom_sct_config sa8775p_cfgs = {
4333 .llcc_config = sa8775p_cfg,
4334 .num_config = ARRAY_SIZE(sa8775p_cfg),
4335 };
4336
4337 static const struct qcom_sct_config sar1130p_cfgs = {
4338 .llcc_config = sar1130p_cfg,
4339 .num_config = ARRAY_SIZE(sar1130p_cfg),
4340 };
4341
4342 static const struct qcom_sct_config sar2130p_cfgs = {
4343 .llcc_config = sar2130p_cfg,
4344 .num_config = ARRAY_SIZE(sar2130p_cfg),
4345 };
4346
4347 static const struct qcom_sct_config sc7180_cfgs = {
4348 .llcc_config = sc7180_cfg,
4349 .num_config = ARRAY_SIZE(sc7180_cfg),
4350 };
4351
4352 static const struct qcom_sct_config sc7280_cfgs = {
4353 .llcc_config = sc7280_cfg,
4354 .num_config = ARRAY_SIZE(sc7280_cfg),
4355 };
4356
4357 static const struct qcom_sct_config sc8180x_cfgs = {
4358 .llcc_config = sc8180x_cfg,
4359 .num_config = ARRAY_SIZE(sc8180x_cfg),
4360 };
4361
4362 static const struct qcom_sct_config sc8280xp_cfgs = {
4363 .llcc_config = sc8280xp_cfg,
4364 .num_config = ARRAY_SIZE(sc8280xp_cfg),
4365 };
4366
4367 static const struct qcom_sct_config sdm845_cfgs = {
4368 .llcc_config = sdm845_cfg,
4369 .num_config = ARRAY_SIZE(sdm845_cfg),
4370 };
4371
4372 static const struct qcom_sct_config sm6350_cfgs = {
4373 .llcc_config = sm6350_cfg,
4374 .num_config = ARRAY_SIZE(sm6350_cfg),
4375 };
4376
4377 static const struct qcom_sct_config sm7150_cfgs = {
4378 .llcc_config = sm7150_cfg,
4379 .num_config = ARRAY_SIZE(sm7150_cfg),
4380 };
4381
4382 static const struct qcom_sct_config sm8150_cfgs = {
4383 .llcc_config = sm8150_cfg,
4384 .num_config = ARRAY_SIZE(sm8150_cfg),
4385 };
4386
4387 static const struct qcom_sct_config sm8250_cfgs = {
4388 .llcc_config = sm8250_cfg,
4389 .num_config = ARRAY_SIZE(sm8250_cfg),
4390 };
4391
4392 static const struct qcom_sct_config sm8350_cfgs = {
4393 .llcc_config = sm8350_cfg,
4394 .num_config = ARRAY_SIZE(sm8350_cfg),
4395 };
4396
4397 static const struct qcom_sct_config sm8450_cfgs = {
4398 .llcc_config = sm8450_cfg,
4399 .num_config = ARRAY_SIZE(sm8450_cfg),
4400 };
4401
4402 static const struct qcom_sct_config sm8550_cfgs = {
4403 .llcc_config = sm8550_cfg,
4404 .num_config = ARRAY_SIZE(sm8550_cfg),
4405 };
4406
4407 static const struct qcom_sct_config sm8650_cfgs = {
4408 .llcc_config = sm8650_cfg,
4409 .num_config = ARRAY_SIZE(sm8650_cfg),
4410 };
4411
4412 static const struct qcom_sct_config sm8750_cfgs = {
4413 .llcc_config = sm8750_cfg,
4414 .num_config = ARRAY_SIZE(sm8750_cfg),
4415 };
4416
4417 static const struct qcom_sct_config x1e80100_cfgs = {
4418 .llcc_config = x1e80100_cfg,
4419 .num_config = ARRAY_SIZE(x1e80100_cfg),
4420 };
4421
4422 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
4423
4424 /**
4425 * llcc_slice_getd - get llcc slice descriptor
4426 * @uid: usecase_id for the client
4427 *
4428 * A pointer to llcc slice descriptor will be returned on success
4429 * and error pointer is returned on failure
4430 */
llcc_slice_getd(u32 uid)4431 struct llcc_slice_desc *llcc_slice_getd(u32 uid)
4432 {
4433 const struct llcc_slice_config *cfg;
4434 struct llcc_slice_desc *desc;
4435 u32 sz, count;
4436
4437 if (IS_ERR(drv_data))
4438 return ERR_CAST(drv_data);
4439
4440 cfg = drv_data->cfg;
4441 sz = drv_data->cfg_size;
4442
4443 for (count = 0; cfg && count < sz; count++, cfg++)
4444 if (cfg->usecase_id == uid)
4445 break;
4446
4447 if (count == sz || !cfg)
4448 return ERR_PTR(-ENODEV);
4449
4450 desc = kzalloc_obj(*desc);
4451 if (!desc)
4452 return ERR_PTR(-ENOMEM);
4453
4454 desc->slice_id = cfg->slice_id;
4455 desc->slice_size = cfg->max_cap;
4456
4457 return desc;
4458 }
4459 EXPORT_SYMBOL_GPL(llcc_slice_getd);
4460
4461 /**
4462 * llcc_slice_putd - llcc slice descriptor
4463 * @desc: Pointer to llcc slice descriptor
4464 */
llcc_slice_putd(struct llcc_slice_desc * desc)4465 void llcc_slice_putd(struct llcc_slice_desc *desc)
4466 {
4467 if (!IS_ERR_OR_NULL(desc))
4468 kfree(desc);
4469 }
4470 EXPORT_SYMBOL_GPL(llcc_slice_putd);
4471
llcc_update_act_ctrl(u32 sid,u32 act_ctrl_reg_val,u32 status)4472 static int llcc_update_act_ctrl(u32 sid,
4473 u32 act_ctrl_reg_val, u32 status)
4474 {
4475 struct regmap *regmap;
4476 u32 act_ctrl_reg;
4477 u32 act_clear_reg;
4478 u32 status_reg;
4479 u32 slice_status;
4480 int ret;
4481
4482 if (IS_ERR(drv_data))
4483 return PTR_ERR(drv_data);
4484
4485 act_ctrl_reg = LLCC_TRP_ACT_CTRLn(sid);
4486 act_clear_reg = LLCC_TRP_ACT_CLEARn(sid);
4487 status_reg = LLCC_TRP_STATUSn(sid);
4488
4489 /* Set the ACTIVE trigger */
4490 act_ctrl_reg_val |= ACT_CTRL_ACT_TRIG;
4491 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg,
4492 act_ctrl_reg_val);
4493 if (ret)
4494 return ret;
4495
4496 /* Clear the ACTIVE trigger */
4497 act_ctrl_reg_val &= ~ACT_CTRL_ACT_TRIG;
4498 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg,
4499 act_ctrl_reg_val);
4500 if (ret)
4501 return ret;
4502
4503 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4504 regmap = drv_data->bcast_and_regmap ?: drv_data->bcast_regmap;
4505 ret = regmap_read_poll_timeout(regmap, status_reg,
4506 slice_status, (slice_status & ACT_COMPLETE),
4507 0, LLCC_STATUS_READ_DELAY);
4508 if (ret)
4509 return ret;
4510 }
4511
4512 ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg,
4513 slice_status, !(slice_status & status),
4514 0, LLCC_STATUS_READ_DELAY);
4515 if (ret)
4516 return ret;
4517
4518 if (drv_data->version >= LLCC_VERSION_4_1_0_0)
4519 ret = regmap_write(drv_data->bcast_regmap, act_clear_reg,
4520 ACT_CLEAR);
4521
4522 return ret;
4523 }
4524
4525 /**
4526 * llcc_slice_activate - Activate the llcc slice
4527 * @desc: Pointer to llcc slice descriptor
4528 *
4529 * A value of zero will be returned on success and a negative errno will
4530 * be returned in error cases
4531 */
llcc_slice_activate(struct llcc_slice_desc * desc)4532 int llcc_slice_activate(struct llcc_slice_desc *desc)
4533 {
4534 int ret;
4535 u32 act_ctrl_val;
4536
4537 if (IS_ERR(drv_data))
4538 return PTR_ERR(drv_data);
4539
4540 if (IS_ERR_OR_NULL(desc))
4541 return -EINVAL;
4542
4543 mutex_lock(&drv_data->lock);
4544 if (test_bit(desc->slice_id, drv_data->bitmap)) {
4545 mutex_unlock(&drv_data->lock);
4546 return 0;
4547 }
4548
4549 act_ctrl_val = ACT_CTRL_OPCODE_ACTIVATE << ACT_CTRL_OPCODE_SHIFT;
4550
4551 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val,
4552 DEACTIVATE);
4553 if (ret) {
4554 mutex_unlock(&drv_data->lock);
4555 return ret;
4556 }
4557
4558 __set_bit(desc->slice_id, drv_data->bitmap);
4559 mutex_unlock(&drv_data->lock);
4560
4561 return ret;
4562 }
4563 EXPORT_SYMBOL_GPL(llcc_slice_activate);
4564
4565 /**
4566 * llcc_slice_deactivate - Deactivate the llcc slice
4567 * @desc: Pointer to llcc slice descriptor
4568 *
4569 * A value of zero will be returned on success and a negative errno will
4570 * be returned in error cases
4571 */
llcc_slice_deactivate(struct llcc_slice_desc * desc)4572 int llcc_slice_deactivate(struct llcc_slice_desc *desc)
4573 {
4574 u32 act_ctrl_val;
4575 int ret;
4576
4577 if (IS_ERR(drv_data))
4578 return PTR_ERR(drv_data);
4579
4580 if (IS_ERR_OR_NULL(desc))
4581 return -EINVAL;
4582
4583 mutex_lock(&drv_data->lock);
4584 if (!test_bit(desc->slice_id, drv_data->bitmap)) {
4585 mutex_unlock(&drv_data->lock);
4586 return 0;
4587 }
4588 act_ctrl_val = ACT_CTRL_OPCODE_DEACTIVATE << ACT_CTRL_OPCODE_SHIFT;
4589
4590 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val,
4591 ACTIVATE);
4592 if (ret) {
4593 mutex_unlock(&drv_data->lock);
4594 return ret;
4595 }
4596
4597 __clear_bit(desc->slice_id, drv_data->bitmap);
4598 mutex_unlock(&drv_data->lock);
4599
4600 return ret;
4601 }
4602 EXPORT_SYMBOL_GPL(llcc_slice_deactivate);
4603
4604 /**
4605 * llcc_get_slice_id - return the slice id
4606 * @desc: Pointer to llcc slice descriptor
4607 */
llcc_get_slice_id(struct llcc_slice_desc * desc)4608 int llcc_get_slice_id(struct llcc_slice_desc *desc)
4609 {
4610 if (IS_ERR_OR_NULL(desc))
4611 return -EINVAL;
4612
4613 return desc->slice_id;
4614 }
4615 EXPORT_SYMBOL_GPL(llcc_get_slice_id);
4616
4617 /**
4618 * llcc_get_slice_size - return the slice id
4619 * @desc: Pointer to llcc slice descriptor
4620 */
llcc_get_slice_size(struct llcc_slice_desc * desc)4621 size_t llcc_get_slice_size(struct llcc_slice_desc *desc)
4622 {
4623 if (IS_ERR_OR_NULL(desc))
4624 return 0;
4625
4626 return desc->slice_size;
4627 }
4628 EXPORT_SYMBOL_GPL(llcc_get_slice_size);
4629
_qcom_llcc_cfg_program(const struct llcc_slice_config * config,const struct qcom_llcc_config * cfg)4630 static int _qcom_llcc_cfg_program(const struct llcc_slice_config *config,
4631 const struct qcom_llcc_config *cfg)
4632 {
4633 int ret;
4634 u32 attr2_cfg;
4635 u32 attr1_cfg;
4636 u32 attr0_cfg;
4637 u32 attr2_val;
4638 u32 attr1_val;
4639 u32 attr0_val;
4640 u32 max_cap_cacheline;
4641 struct llcc_slice_desc desc;
4642
4643 attr1_val = config->cache_mode;
4644 attr1_val |= config->probe_target_ways << ATTR1_PROBE_TARGET_WAYS_SHIFT;
4645 attr1_val |= config->fixed_size << ATTR1_FIXED_SIZE_SHIFT;
4646 attr1_val |= config->priority << ATTR1_PRIORITY_SHIFT;
4647
4648 max_cap_cacheline = MAX_CAP_TO_BYTES(config->max_cap);
4649
4650 /*
4651 * LLCC instances can vary for each target.
4652 * The SW writes to broadcast register which gets propagated
4653 * to each llcc instance (llcc0,.. llccN).
4654 * Since the size of the memory is divided equally amongst the
4655 * llcc instances, we need to configure the max cap accordingly.
4656 */
4657 max_cap_cacheline = max_cap_cacheline / drv_data->num_banks;
4658 max_cap_cacheline >>= CACHE_LINE_SIZE_SHIFT;
4659 if (cfg->max_cap_shift)
4660 attr1_val |= max_cap_cacheline << cfg->max_cap_shift;
4661 else
4662 attr1_val |= max_cap_cacheline << ATTR1_MAX_CAP_SHIFT;
4663
4664 attr1_cfg = LLCC_TRP_ATTR1_CFGn(config->slice_id);
4665
4666 ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val);
4667 if (ret)
4668 return ret;
4669
4670 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4671 attr2_cfg = LLCC_TRP_ATTR2_CFGn(config->slice_id);
4672 attr0_val = config->res_ways;
4673 attr2_val = config->bonus_ways;
4674 } else {
4675 attr0_val = config->res_ways & ATTR0_RES_WAYS_MASK;
4676 attr0_val |= config->bonus_ways << ATTR0_BONUS_WAYS_SHIFT;
4677 }
4678
4679 attr0_cfg = LLCC_TRP_ATTR0_CFGn(config->slice_id);
4680
4681 ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val);
4682 if (ret)
4683 return ret;
4684
4685 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4686 ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val);
4687 if (ret)
4688 return ret;
4689 }
4690
4691 /* At least SDM845 disallows non-secure writes to these registers */
4692 if (!cfg->skip_llcc_cfg) {
4693 u32 disable_cap_alloc, retain_pc;
4694
4695 disable_cap_alloc = config->dis_cap_alloc << config->slice_id;
4696 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC,
4697 BIT(config->slice_id), disable_cap_alloc);
4698 if (ret)
4699 return ret;
4700
4701 if (drv_data->version < LLCC_VERSION_4_1_0_0) {
4702 retain_pc = config->retain_on_pc << config->slice_id;
4703 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT,
4704 BIT(config->slice_id), retain_pc);
4705 if (ret)
4706 return ret;
4707 }
4708 }
4709
4710 if (drv_data->version >= LLCC_VERSION_2_0_0_0) {
4711 u32 wren;
4712
4713 wren = config->write_scid_en << config->slice_id;
4714 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_EN,
4715 BIT(config->slice_id), wren);
4716 if (ret)
4717 return ret;
4718 }
4719
4720 if (drv_data->version >= LLCC_VERSION_2_1_0_0) {
4721 u32 wr_cache_en;
4722
4723 wr_cache_en = config->write_scid_cacheable_en << config->slice_id;
4724 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_CACHEABLE_EN,
4725 BIT(config->slice_id), wr_cache_en);
4726 if (ret)
4727 return ret;
4728 }
4729
4730 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4731 u32 stale_en;
4732 u32 stale_cap_en;
4733 u32 mru_uncap_en;
4734 u32 mru_rollover;
4735 u32 alloc_oneway_en;
4736 u32 ovcap_en;
4737 u32 ovcap_prio;
4738 u32 vict_prio;
4739
4740 stale_en = config->stale_en << config->slice_id;
4741 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG1,
4742 BIT(config->slice_id), stale_en);
4743 if (ret)
4744 return ret;
4745
4746 stale_cap_en = config->stale_cap_en << config->slice_id;
4747 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG2,
4748 BIT(config->slice_id), stale_cap_en);
4749 if (ret)
4750 return ret;
4751
4752 mru_uncap_en = config->mru_uncap_en << config->slice_id;
4753 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG3,
4754 BIT(config->slice_id), mru_uncap_en);
4755 if (ret)
4756 return ret;
4757
4758 mru_rollover = config->mru_rollover << config->slice_id;
4759 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG4,
4760 BIT(config->slice_id), mru_rollover);
4761 if (ret)
4762 return ret;
4763
4764 alloc_oneway_en = config->alloc_oneway_en << config->slice_id;
4765 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG5,
4766 BIT(config->slice_id), alloc_oneway_en);
4767 if (ret)
4768 return ret;
4769
4770 ovcap_en = config->ovcap_en << config->slice_id;
4771 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG6,
4772 BIT(config->slice_id), ovcap_en);
4773 if (ret)
4774 return ret;
4775
4776 ovcap_prio = config->ovcap_prio << config->slice_id;
4777 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG7,
4778 BIT(config->slice_id), ovcap_prio);
4779 if (ret)
4780 return ret;
4781
4782 vict_prio = config->vict_prio << config->slice_id;
4783 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG8,
4784 BIT(config->slice_id), vict_prio);
4785 if (ret)
4786 return ret;
4787 }
4788
4789 if (config->activate_on_init) {
4790 desc.slice_id = config->slice_id;
4791 ret = llcc_slice_activate(&desc);
4792 }
4793
4794 return ret;
4795 }
4796
_qcom_llcc_cfg_program_v6(const struct llcc_slice_config * config,const struct qcom_llcc_config * cfg)4797 static int _qcom_llcc_cfg_program_v6(const struct llcc_slice_config *config,
4798 const struct qcom_llcc_config *cfg)
4799 {
4800 u32 stale_en, stale_cap_en, mru_uncap_en, mru_rollover;
4801 u32 alloc_oneway_en, ovcap_en, ovcap_prio, vict_prio;
4802 u32 attr0_cfg, attr1_cfg, attr2_cfg, attr3_cfg;
4803 u32 attr0_val, attr1_val, attr2_val, attr3_val;
4804 u32 slice_offset, reg_offset;
4805 struct llcc_slice_desc *desc;
4806 u32 wren, wr_cache_en;
4807 int ret;
4808
4809 attr0_cfg = LLCC_V6_TRP_ATTR0_CFGn(config->slice_id);
4810 attr1_cfg = LLCC_V6_TRP_ATTR1_CFGn(config->slice_id);
4811 attr2_cfg = LLCC_V6_TRP_ATTR2_CFGn(config->slice_id);
4812 attr3_cfg = LLCC_V6_TRP_ATTR3_CFGn(config->slice_id);
4813
4814 attr0_val = config->res_ways;
4815 attr1_val = config->bonus_ways;
4816 attr2_val = config->cache_mode;
4817 attr2_val |= FIELD_PREP(ATTR2_PROBE_TARGET_WAYS_MASK, config->probe_target_ways);
4818 attr2_val |= FIELD_PREP(ATTR2_FIXED_SIZE_MASK, config->fixed_size);
4819 attr2_val |= FIELD_PREP(ATTR2_PRIORITY_MASK, config->priority);
4820
4821 if (config->parent_slice_id && config->fixed_size) {
4822 attr2_val |= FIELD_PREP(ATTR2_PARENT_SCID_MASK, config->parent_slice_id);
4823 attr2_val |= ATTR2_IN_A_GROUP_MASK;
4824 }
4825
4826 attr3_val = MAX_CAP_TO_BYTES(config->max_cap);
4827 attr3_val /= drv_data->num_banks;
4828 attr3_val >>= CACHE_LINE_SIZE_SHIFT;
4829
4830 ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val);
4831 if (ret)
4832 return ret;
4833
4834 ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val);
4835 if (ret)
4836 return ret;
4837
4838 ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val);
4839 if (ret)
4840 return ret;
4841
4842 ret = regmap_write(drv_data->bcast_regmap, attr3_cfg, attr3_val);
4843 if (ret)
4844 return ret;
4845
4846 slice_offset = config->slice_id % 32;
4847 reg_offset = (config->slice_id / 32) * 4;
4848
4849 wren = config->write_scid_en << slice_offset;
4850 ret = regmap_update_bits(drv_data->bcast_regmap,
4851 cfg->reg_offset[LLCC_TRP_WRS_EN] + reg_offset,
4852 BIT(slice_offset), wren);
4853 if (ret)
4854 return ret;
4855
4856 wr_cache_en = config->write_scid_cacheable_en << slice_offset;
4857 ret = regmap_update_bits(drv_data->bcast_regmap,
4858 cfg->reg_offset[LLCC_TRP_WRS_CACHEABLE_EN] + reg_offset,
4859 BIT(slice_offset), wr_cache_en);
4860 if (ret)
4861 return ret;
4862
4863 stale_en = config->stale_en << slice_offset;
4864 ret = regmap_update_bits(drv_data->bcast_regmap,
4865 cfg->reg_offset[LLCC_TRP_ALGO_STALE_EN] + reg_offset,
4866 BIT(slice_offset), stale_en);
4867 if (ret)
4868 return ret;
4869
4870 stale_cap_en = config->stale_cap_en << slice_offset;
4871 ret = regmap_update_bits(drv_data->bcast_regmap,
4872 cfg->reg_offset[LLCC_TRP_ALGO_STALE_CAP_EN] + reg_offset,
4873 BIT(slice_offset), stale_cap_en);
4874 if (ret)
4875 return ret;
4876
4877 mru_uncap_en = config->mru_uncap_en << slice_offset;
4878 ret = regmap_update_bits(drv_data->bcast_regmap,
4879 cfg->reg_offset[LLCC_TRP_ALGO_MRU0] + reg_offset,
4880 BIT(slice_offset), mru_uncap_en);
4881 if (ret)
4882 return ret;
4883
4884 mru_rollover = config->mru_rollover << slice_offset;
4885 ret = regmap_update_bits(drv_data->bcast_regmap,
4886 cfg->reg_offset[LLCC_TRP_ALGO_MRU1] + reg_offset,
4887 BIT(slice_offset), mru_rollover);
4888 if (ret)
4889 return ret;
4890
4891 alloc_oneway_en = config->alloc_oneway_en << slice_offset;
4892 ret = regmap_update_bits(drv_data->bcast_regmap,
4893 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC0] + reg_offset,
4894 BIT(slice_offset), alloc_oneway_en);
4895 if (ret)
4896 return ret;
4897
4898 ovcap_en = config->ovcap_en << slice_offset;
4899 ret = regmap_update_bits(drv_data->bcast_regmap,
4900 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC1] + reg_offset,
4901 BIT(slice_offset), ovcap_en);
4902 if (ret)
4903 return ret;
4904
4905 ovcap_prio = config->ovcap_prio << slice_offset;
4906 ret = regmap_update_bits(drv_data->bcast_regmap,
4907 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC2] + reg_offset,
4908 BIT(slice_offset), ovcap_prio);
4909 if (ret)
4910 return ret;
4911
4912 vict_prio = config->vict_prio << slice_offset;
4913 ret = regmap_update_bits(drv_data->bcast_regmap,
4914 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC3] + reg_offset,
4915 BIT(slice_offset), vict_prio);
4916 if (ret)
4917 return ret;
4918
4919 if (config->activate_on_init) {
4920 desc = llcc_slice_getd(config->usecase_id);
4921 if (PTR_ERR_OR_ZERO(desc))
4922 return -EINVAL;
4923
4924 ret = llcc_slice_activate(desc);
4925 }
4926
4927 return ret;
4928 }
4929
qcom_llcc_cfg_program(struct platform_device * pdev,const struct qcom_llcc_config * cfg)4930 static int qcom_llcc_cfg_program(struct platform_device *pdev,
4931 const struct qcom_llcc_config *cfg)
4932 {
4933 int i;
4934 u32 sz;
4935 int ret = 0;
4936 const struct llcc_slice_config *llcc_table;
4937
4938 sz = drv_data->cfg_size;
4939 llcc_table = drv_data->cfg;
4940
4941 if (drv_data->version >= LLCC_VERSION_6_0_0_0) {
4942 for (i = 0; i < sz; i++) {
4943 ret = _qcom_llcc_cfg_program_v6(&llcc_table[i], cfg);
4944 if (ret)
4945 return ret;
4946 }
4947 } else {
4948 for (i = 0; i < sz; i++) {
4949 ret = _qcom_llcc_cfg_program(&llcc_table[i], cfg);
4950 if (ret)
4951 return ret;
4952 }
4953 }
4954
4955 return ret;
4956 }
4957
qcom_llcc_get_cfg_index(struct platform_device * pdev,u8 * cfg_index,int num_config)4958 static int qcom_llcc_get_cfg_index(struct platform_device *pdev, u8 *cfg_index, int num_config)
4959 {
4960 int ret;
4961
4962 ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index);
4963 if (ret == -ENOENT || ret == -EOPNOTSUPP) {
4964 if (num_config > 1)
4965 return -EINVAL;
4966 *cfg_index = 0;
4967 return 0;
4968 }
4969
4970 if (!ret && *cfg_index >= num_config)
4971 ret = -EINVAL;
4972
4973 return ret;
4974 }
4975
qcom_llcc_remove(struct platform_device * pdev)4976 static void qcom_llcc_remove(struct platform_device *pdev)
4977 {
4978 /* Set the global pointer to a error code to avoid referencing it */
4979 drv_data = ERR_PTR(-ENODEV);
4980 }
4981
qcom_llcc_init_mmio(struct platform_device * pdev,u8 index,const char * name)4982 static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, u8 index,
4983 const char *name)
4984 {
4985 void __iomem *base;
4986 struct regmap_config llcc_regmap_config = {
4987 .reg_bits = 32,
4988 .reg_stride = 4,
4989 .val_bits = 32,
4990 };
4991
4992 base = devm_platform_ioremap_resource(pdev, index);
4993 if (IS_ERR(base))
4994 return ERR_CAST(base);
4995
4996 llcc_regmap_config.name = name;
4997 return devm_regmap_init_mmio(&pdev->dev, base, &llcc_regmap_config);
4998 }
4999
qcom_llcc_probe(struct platform_device * pdev)5000 static int qcom_llcc_probe(struct platform_device *pdev)
5001 {
5002 u32 num_banks;
5003 struct device *dev = &pdev->dev;
5004 int ret, i;
5005 struct platform_device *llcc_edac;
5006 const struct qcom_sct_config *cfgs;
5007 const struct qcom_llcc_config *cfg;
5008 const struct llcc_slice_config *llcc_cfg;
5009 u32 sz;
5010 u8 cfg_index;
5011 u32 version;
5012 struct regmap *regmap;
5013
5014 if (!IS_ERR(drv_data))
5015 return -EBUSY;
5016
5017 drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL);
5018 if (!drv_data) {
5019 ret = -ENOMEM;
5020 goto err;
5021 }
5022
5023 /* Initialize the first LLCC bank regmap */
5024 regmap = qcom_llcc_init_mmio(pdev, 0, "llcc0_base");
5025 if (IS_ERR(regmap)) {
5026 ret = PTR_ERR(regmap);
5027 goto err;
5028 }
5029
5030 cfgs = of_device_get_match_data(&pdev->dev);
5031 if (!cfgs) {
5032 ret = -EINVAL;
5033 goto err;
5034 }
5035 ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config);
5036 if (ret)
5037 goto err;
5038 cfg = &cfgs->llcc_config[cfg_index];
5039
5040 if (cfg->num_banks) {
5041 num_banks = cfg->num_banks;
5042 } else {
5043 ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks);
5044 if (ret)
5045 goto err;
5046
5047 num_banks &= LLCC_LB_CNT_MASK;
5048 num_banks >>= LLCC_LB_CNT_SHIFT;
5049 }
5050
5051 drv_data->num_banks = num_banks;
5052
5053 drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL);
5054 if (!drv_data->regmaps) {
5055 ret = -ENOMEM;
5056 goto err;
5057 }
5058
5059 drv_data->regmaps[0] = regmap;
5060
5061 /* Initialize rest of LLCC bank regmaps */
5062 for (i = 1; i < num_banks; i++) {
5063 char *base __free(kfree) = kasprintf(GFP_KERNEL, "llcc%d_base", i);
5064
5065 drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base);
5066 if (IS_ERR(drv_data->regmaps[i])) {
5067 ret = PTR_ERR(drv_data->regmaps[i]);
5068 goto err;
5069 }
5070 }
5071
5072 drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base");
5073 if (IS_ERR(drv_data->bcast_regmap)) {
5074 if (cfg->no_broadcast_register) {
5075 drv_data->bcast_regmap = regmap;
5076 } else {
5077 ret = PTR_ERR(drv_data->bcast_regmap);
5078 goto err;
5079 }
5080 }
5081
5082 /* Extract version of the IP */
5083 ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO],
5084 &version);
5085 if (ret)
5086 goto err;
5087
5088 drv_data->version = version;
5089
5090 /* Applicable only when drv_data->version >= 4.1 */
5091 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
5092 drv_data->bcast_and_regmap = qcom_llcc_init_mmio(pdev, i + 1, "llcc_broadcast_and_base");
5093 if (IS_ERR(drv_data->bcast_and_regmap)) {
5094 ret = PTR_ERR(drv_data->bcast_and_regmap);
5095 if (ret == -EINVAL)
5096 drv_data->bcast_and_regmap = NULL;
5097 else
5098 goto err;
5099 }
5100 }
5101
5102 llcc_cfg = cfg->sct_data;
5103 sz = cfg->size;
5104
5105 for (i = 0; i < sz; i++)
5106 if (llcc_cfg[i].slice_id > drv_data->max_slices)
5107 drv_data->max_slices = llcc_cfg[i].slice_id;
5108
5109 drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices,
5110 GFP_KERNEL);
5111 if (!drv_data->bitmap) {
5112 ret = -ENOMEM;
5113 goto err;
5114 }
5115
5116 drv_data->cfg = llcc_cfg;
5117 drv_data->cfg_size = sz;
5118 drv_data->edac_reg_offset = cfg->edac_reg_offset;
5119 drv_data->ecc_irq_configured = cfg->irq_configured;
5120 mutex_init(&drv_data->lock);
5121 platform_set_drvdata(pdev, drv_data);
5122
5123 ret = qcom_llcc_cfg_program(pdev, cfg);
5124 if (ret)
5125 goto err;
5126
5127 drv_data->ecc_irq = platform_get_irq_optional(pdev, 0);
5128
5129 /*
5130 * On some platforms, the access to EDAC registers will be locked by
5131 * the bootloader. So probing the EDAC driver will result in a crash.
5132 * Hence, disable the creation of EDAC platform device for the
5133 * problematic platforms.
5134 */
5135 if (!cfg->no_edac) {
5136 llcc_edac = platform_device_register_data(&pdev->dev,
5137 "qcom_llcc_edac", -1, drv_data,
5138 sizeof(*drv_data));
5139 if (IS_ERR(llcc_edac))
5140 dev_err(dev, "Failed to register llcc edac driver\n");
5141 }
5142
5143 return 0;
5144 err:
5145 drv_data = ERR_PTR(-ENODEV);
5146 return ret;
5147 }
5148
5149 static const struct of_device_id qcom_llcc_of_match[] = {
5150 { .compatible = "qcom,glymur-llcc", .data = &glymur_cfgs },
5151 { .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs},
5152 { .compatible = "qcom,kaanapali-llcc", .data = &kaanapali_cfgs},
5153 { .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs},
5154 { .compatible = "qcom,qcs8300-llcc", .data = &qcs8300_cfgs},
5155 { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs},
5156 { .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs },
5157 { .compatible = "qcom,sar1130p-llcc", .data = &sar1130p_cfgs },
5158 { .compatible = "qcom,sar2130p-llcc", .data = &sar2130p_cfgs },
5159 { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs },
5160 { .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs },
5161 { .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs },
5162 { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfgs },
5163 { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfgs },
5164 { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfgs },
5165 { .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfgs },
5166 { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfgs },
5167 { .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfgs },
5168 { .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfgs },
5169 { .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfgs },
5170 { .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfgs },
5171 { .compatible = "qcom,sm8650-llcc", .data = &sm8650_cfgs },
5172 { .compatible = "qcom,sm8750-llcc", .data = &sm8750_cfgs },
5173 { .compatible = "qcom,x1e80100-llcc", .data = &x1e80100_cfgs },
5174 { }
5175 };
5176 MODULE_DEVICE_TABLE(of, qcom_llcc_of_match);
5177
5178 static struct platform_driver qcom_llcc_driver = {
5179 .driver = {
5180 .name = "qcom-llcc",
5181 .of_match_table = qcom_llcc_of_match,
5182 },
5183 .probe = qcom_llcc_probe,
5184 .remove = qcom_llcc_remove,
5185 };
5186 module_platform_driver(qcom_llcc_driver);
5187
5188 MODULE_DESCRIPTION("Qualcomm Last Level Cache Controller");
5189 MODULE_LICENSE("GPL v2");
5190