1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * linux/arch/x86_64/mm/init.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz> 7 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de> 8 */ 9 10 #include <linux/signal.h> 11 #include <linux/sched.h> 12 #include <linux/kernel.h> 13 #include <linux/errno.h> 14 #include <linux/string.h> 15 #include <linux/types.h> 16 #include <linux/ptrace.h> 17 #include <linux/mman.h> 18 #include <linux/mm.h> 19 #include <linux/swap.h> 20 #include <linux/smp.h> 21 #include <linux/init.h> 22 #include <linux/initrd.h> 23 #include <linux/pagemap.h> 24 #include <linux/memblock.h> 25 #include <linux/proc_fs.h> 26 #include <linux/pci.h> 27 #include <linux/pfn.h> 28 #include <linux/poison.h> 29 #include <linux/dma-mapping.h> 30 #include <linux/memory.h> 31 #include <linux/memory_hotplug.h> 32 #include <linux/memremap.h> 33 #include <linux/nmi.h> 34 #include <linux/gfp.h> 35 #include <linux/kcore.h> 36 37 #include <asm/processor.h> 38 #include <asm/bios_ebda.h> 39 #include <linux/uaccess.h> 40 #include <asm/pgalloc.h> 41 #include <asm/dma.h> 42 #include <asm/fixmap.h> 43 #include <asm/e820/api.h> 44 #include <asm/apic.h> 45 #include <asm/tlb.h> 46 #include <asm/mmu_context.h> 47 #include <asm/proto.h> 48 #include <asm/smp.h> 49 #include <asm/sections.h> 50 #include <asm/kdebug.h> 51 #include <asm/numa.h> 52 #include <asm/set_memory.h> 53 #include <asm/init.h> 54 #include <asm/uv/uv.h> 55 #include <asm/setup.h> 56 #include <asm/ftrace.h> 57 58 #include "mm_internal.h" 59 60 #include "ident_map.c" 61 62 #define DEFINE_POPULATE(fname, type1, type2, init) \ 63 static inline void fname##_init(struct mm_struct *mm, \ 64 type1##_t *arg1, type2##_t *arg2, bool init) \ 65 { \ 66 if (init) \ 67 fname##_safe(mm, arg1, arg2); \ 68 else \ 69 fname(mm, arg1, arg2); \ 70 } 71 72 DEFINE_POPULATE(p4d_populate, p4d, pud, init) 73 DEFINE_POPULATE(pgd_populate, pgd, p4d, init) 74 DEFINE_POPULATE(pud_populate, pud, pmd, init) 75 DEFINE_POPULATE(pmd_populate_kernel, pmd, pte, init) 76 77 #define DEFINE_ENTRY(type1, type2, init) \ 78 static inline void set_##type1##_init(type1##_t *arg1, \ 79 type2##_t arg2, bool init) \ 80 { \ 81 if (init) \ 82 set_##type1##_safe(arg1, arg2); \ 83 else \ 84 set_##type1(arg1, arg2); \ 85 } 86 87 DEFINE_ENTRY(p4d, p4d, init) 88 DEFINE_ENTRY(pud, pud, init) 89 DEFINE_ENTRY(pmd, pmd, init) 90 DEFINE_ENTRY(pte, pte, init) 91 92 static inline pgprot_t prot_sethuge(pgprot_t prot) 93 { 94 WARN_ON_ONCE(pgprot_val(prot) & _PAGE_PAT); 95 96 return __pgprot(pgprot_val(prot) | _PAGE_PSE); 97 } 98 99 /* 100 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the 101 * physical space so we can cache the place of the first one and move 102 * around without checking the pgd every time. 103 */ 104 105 /* Bits supported by the hardware: */ 106 pteval_t __supported_pte_mask __read_mostly = ~0; 107 /* Bits allowed in normal kernel mappings: */ 108 pteval_t __default_kernel_pte_mask __read_mostly = ~0; 109 EXPORT_SYMBOL_GPL(__supported_pte_mask); 110 /* Used in PAGE_KERNEL_* macros which are reasonably used out-of-tree: */ 111 EXPORT_SYMBOL(__default_kernel_pte_mask); 112 113 int force_personality32; 114 115 /* 116 * noexec32=on|off 117 * Control non executable heap for 32bit processes. 118 * 119 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default) 120 * off PROT_READ implies PROT_EXEC 121 */ 122 static int __init nonx32_setup(char *str) 123 { 124 if (!strcmp(str, "on")) 125 force_personality32 &= ~READ_IMPLIES_EXEC; 126 else if (!strcmp(str, "off")) 127 force_personality32 |= READ_IMPLIES_EXEC; 128 return 1; 129 } 130 __setup("noexec32=", nonx32_setup); 131 132 static void sync_global_pgds_l5(unsigned long start, unsigned long end) 133 { 134 unsigned long addr; 135 136 for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 137 const pgd_t *pgd_ref = pgd_offset_k(addr); 138 struct ptdesc *ptdesc; 139 140 /* Check for overflow */ 141 if (addr < start) 142 break; 143 144 if (pgd_none(*pgd_ref)) 145 continue; 146 147 spin_lock(&pgd_lock); 148 list_for_each_entry(ptdesc, &pgd_list, pt_list) { 149 pgd_t *pgd; 150 spinlock_t *pgt_lock; 151 152 pgd = (pgd_t *)ptdesc_address(ptdesc) + pgd_index(addr); 153 /* the pgt_lock only for Xen */ 154 pgt_lock = &pgd_page_get_mm(ptdesc)->page_table_lock; 155 spin_lock(pgt_lock); 156 157 if (!pgd_none(*pgd_ref) && !pgd_none(*pgd)) 158 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); 159 160 if (pgd_none(*pgd)) 161 set_pgd(pgd, *pgd_ref); 162 163 spin_unlock(pgt_lock); 164 } 165 spin_unlock(&pgd_lock); 166 } 167 } 168 169 static void sync_global_pgds_l4(unsigned long start, unsigned long end) 170 { 171 unsigned long addr; 172 173 for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 174 pgd_t *pgd_ref = pgd_offset_k(addr); 175 const p4d_t *p4d_ref; 176 struct ptdesc *ptdesc; 177 178 /* 179 * With folded p4d, pgd_none() is always false, we need to 180 * handle synchronization on p4d level. 181 */ 182 MAYBE_BUILD_BUG_ON(pgd_none(*pgd_ref)); 183 p4d_ref = p4d_offset(pgd_ref, addr); 184 185 if (p4d_none(*p4d_ref)) 186 continue; 187 188 spin_lock(&pgd_lock); 189 list_for_each_entry(ptdesc, &pgd_list, pt_list) { 190 pgd_t *pgd; 191 p4d_t *p4d; 192 spinlock_t *pgt_lock; 193 194 pgd = (pgd_t *)ptdesc_address(ptdesc) + pgd_index(addr); 195 p4d = p4d_offset(pgd, addr); 196 /* the pgt_lock only for Xen */ 197 pgt_lock = &pgd_page_get_mm(ptdesc)->page_table_lock; 198 spin_lock(pgt_lock); 199 200 if (!p4d_none(*p4d_ref) && !p4d_none(*p4d)) 201 BUG_ON(p4d_pgtable(*p4d) 202 != p4d_pgtable(*p4d_ref)); 203 204 if (p4d_none(*p4d)) 205 set_p4d(p4d, *p4d_ref); 206 207 spin_unlock(pgt_lock); 208 } 209 spin_unlock(&pgd_lock); 210 } 211 } 212 213 /* 214 * When memory was added make sure all the processes MM have 215 * suitable PGD entries in the local PGD level page. 216 */ 217 static void sync_global_pgds(unsigned long start, unsigned long end) 218 { 219 if (pgtable_l5_enabled()) 220 sync_global_pgds_l5(start, end); 221 else 222 sync_global_pgds_l4(start, end); 223 } 224 225 /* 226 * Make kernel mappings visible in all page tables in the system. 227 * This is necessary except when the init task populates kernel mappings 228 * during the boot process. In that case, all processes originating from 229 * the init task copies the kernel mappings, so there is no issue. 230 * Otherwise, missing synchronization could lead to kernel crashes due 231 * to missing page table entries for certain kernel mappings. 232 * 233 * Synchronization is performed at the top level, which is the PGD in 234 * 5-level paging systems. But in 4-level paging systems, however, 235 * pgd_populate() is a no-op, so synchronization is done at the P4D level. 236 * sync_global_pgds() handles this difference between paging levels. 237 */ 238 void arch_sync_kernel_mappings(unsigned long start, unsigned long end) 239 { 240 sync_global_pgds(start, end); 241 } 242 243 /* 244 * NOTE: This function is marked __ref because it calls __init function 245 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0. 246 */ 247 static __ref void *spp_getpage(void) 248 { 249 void *ptr; 250 251 if (after_bootmem) 252 ptr = (void *) get_zeroed_page(GFP_ATOMIC); 253 else 254 ptr = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 255 256 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) { 257 panic("set_pte_phys: cannot allocate page data %s\n", 258 after_bootmem ? "after bootmem" : ""); 259 } 260 261 pr_debug("spp_getpage %p\n", ptr); 262 263 return ptr; 264 } 265 266 static p4d_t *fill_p4d(pgd_t *pgd, unsigned long vaddr) 267 { 268 if (pgd_none(*pgd)) { 269 p4d_t *p4d = (p4d_t *)spp_getpage(); 270 pgd_populate(&init_mm, pgd, p4d); 271 if (p4d != p4d_offset(pgd, 0)) 272 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n", 273 p4d, p4d_offset(pgd, 0)); 274 } 275 return p4d_offset(pgd, vaddr); 276 } 277 278 static pud_t *fill_pud(p4d_t *p4d, unsigned long vaddr) 279 { 280 if (p4d_none(*p4d)) { 281 pud_t *pud = (pud_t *)spp_getpage(); 282 p4d_populate(&init_mm, p4d, pud); 283 if (pud != pud_offset(p4d, 0)) 284 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n", 285 pud, pud_offset(p4d, 0)); 286 } 287 return pud_offset(p4d, vaddr); 288 } 289 290 static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr) 291 { 292 if (pud_none(*pud)) { 293 pmd_t *pmd = (pmd_t *) spp_getpage(); 294 pud_populate(&init_mm, pud, pmd); 295 if (pmd != pmd_offset(pud, 0)) 296 printk(KERN_ERR "PAGETABLE BUG #02! %p <-> %p\n", 297 pmd, pmd_offset(pud, 0)); 298 } 299 return pmd_offset(pud, vaddr); 300 } 301 302 static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr) 303 { 304 if (pmd_none(*pmd)) { 305 pte_t *pte = (pte_t *) spp_getpage(); 306 pmd_populate_kernel(&init_mm, pmd, pte); 307 if (pte != pte_offset_kernel(pmd, 0)) 308 printk(KERN_ERR "PAGETABLE BUG #03!\n"); 309 } 310 return pte_offset_kernel(pmd, vaddr); 311 } 312 313 static void __set_pte_vaddr(pud_t *pud, unsigned long vaddr, pte_t new_pte) 314 { 315 pmd_t *pmd = fill_pmd(pud, vaddr); 316 pte_t *pte = fill_pte(pmd, vaddr); 317 318 set_pte(pte, new_pte); 319 320 /* 321 * It's enough to flush this one mapping. 322 * (PGE mappings get flushed as well) 323 */ 324 flush_tlb_one_kernel(vaddr); 325 } 326 327 void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte) 328 { 329 p4d_t *p4d = p4d_page + p4d_index(vaddr); 330 pud_t *pud = fill_pud(p4d, vaddr); 331 332 __set_pte_vaddr(pud, vaddr, new_pte); 333 } 334 335 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte) 336 { 337 pud_t *pud = pud_page + pud_index(vaddr); 338 339 __set_pte_vaddr(pud, vaddr, new_pte); 340 } 341 342 void set_pte_vaddr(unsigned long vaddr, pte_t pteval) 343 { 344 pgd_t *pgd; 345 p4d_t *p4d_page; 346 347 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval)); 348 349 pgd = pgd_offset_k(vaddr); 350 if (pgd_none(*pgd)) { 351 printk(KERN_ERR 352 "PGD FIXMAP MISSING, it should be setup in head.S!\n"); 353 return; 354 } 355 356 p4d_page = p4d_offset(pgd, 0); 357 set_pte_vaddr_p4d(p4d_page, vaddr, pteval); 358 } 359 360 pmd_t * __init populate_extra_pmd(unsigned long vaddr) 361 { 362 pgd_t *pgd; 363 p4d_t *p4d; 364 pud_t *pud; 365 366 pgd = pgd_offset_k(vaddr); 367 p4d = fill_p4d(pgd, vaddr); 368 pud = fill_pud(p4d, vaddr); 369 return fill_pmd(pud, vaddr); 370 } 371 372 pte_t * __init populate_extra_pte(unsigned long vaddr) 373 { 374 pmd_t *pmd; 375 376 pmd = populate_extra_pmd(vaddr); 377 return fill_pte(pmd, vaddr); 378 } 379 380 /* 381 * Create large page table mappings for a range of physical addresses. 382 */ 383 static void __init __init_extra_mapping(unsigned long phys, unsigned long size, 384 enum page_cache_mode cache) 385 { 386 pgd_t *pgd; 387 p4d_t *p4d; 388 pud_t *pud; 389 pmd_t *pmd; 390 pgprot_t prot; 391 392 pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) | 393 protval_4k_2_large(cachemode2protval(cache)); 394 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK)); 395 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) { 396 pgd = pgd_offset_k((unsigned long)__va(phys)); 397 if (pgd_none(*pgd)) { 398 p4d = (p4d_t *) spp_getpage(); 399 set_pgd(pgd, __pgd(__pa(p4d) | _KERNPG_TABLE | 400 _PAGE_USER)); 401 } 402 p4d = p4d_offset(pgd, (unsigned long)__va(phys)); 403 if (p4d_none(*p4d)) { 404 pud = (pud_t *) spp_getpage(); 405 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE | 406 _PAGE_USER)); 407 } 408 pud = pud_offset(p4d, (unsigned long)__va(phys)); 409 if (pud_none(*pud)) { 410 pmd = (pmd_t *) spp_getpage(); 411 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE | 412 _PAGE_USER)); 413 } 414 pmd = pmd_offset(pud, phys); 415 BUG_ON(!pmd_none(*pmd)); 416 set_pmd(pmd, __pmd(phys | pgprot_val(prot))); 417 } 418 } 419 420 void __init init_extra_mapping_wb(unsigned long phys, unsigned long size) 421 { 422 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB); 423 } 424 425 void __init init_extra_mapping_uc(unsigned long phys, unsigned long size) 426 { 427 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC); 428 } 429 430 /* 431 * The head.S code sets up the kernel high mapping: 432 * 433 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text) 434 * 435 * phys_base holds the negative offset to the kernel, which is added 436 * to the compile time generated pmds. This results in invalid pmds up 437 * to the point where we hit the physaddr 0 mapping. 438 * 439 * We limit the mappings to the region from _text to _brk_end. _brk_end 440 * is rounded up to the 2MB boundary. This catches the invalid pmds as 441 * well, as they are located before _text: 442 */ 443 void __init cleanup_highmap(void) 444 { 445 unsigned long vaddr = __START_KERNEL_map; 446 unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE; 447 unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1; 448 pmd_t *pmd = level2_kernel_pgt; 449 450 /* 451 * Native path, max_pfn_mapped is not set yet. 452 * Xen has valid max_pfn_mapped set in 453 * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable(). 454 */ 455 if (max_pfn_mapped) 456 vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT); 457 458 for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) { 459 if (pmd_none(*pmd)) 460 continue; 461 if (vaddr < (unsigned long) _text || vaddr > end) 462 set_pmd(pmd, __pmd(0)); 463 } 464 } 465 466 /* 467 * Create PTE level page table mapping for physical addresses. 468 * It returns the last physical address mapped. 469 */ 470 static unsigned long __meminit 471 phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end, 472 pgprot_t prot, bool init) 473 { 474 unsigned long pages = 0, paddr_next; 475 unsigned long paddr_last = paddr_end; 476 pte_t *pte; 477 int i; 478 479 pte = pte_page + pte_index(paddr); 480 i = pte_index(paddr); 481 482 for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) { 483 paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE; 484 if (paddr >= paddr_end) { 485 if (!after_bootmem && 486 !e820__mapped_any(paddr & PAGE_MASK, paddr_next, 487 E820_TYPE_RAM) && 488 !e820__mapped_any(paddr & PAGE_MASK, paddr_next, 489 E820_TYPE_ACPI)) 490 set_pte_init(pte, __pte(0), init); 491 continue; 492 } 493 494 /* 495 * We will re-use the existing mapping. 496 * Xen for example has some special requirements, like mapping 497 * pagetable pages as RO. So assume someone who pre-setup 498 * these mappings are more intelligent. 499 */ 500 if (!pte_none(*pte)) { 501 if (!after_bootmem) 502 pages++; 503 continue; 504 } 505 506 pages++; 507 set_pte_init(pte, pfn_pte(paddr >> PAGE_SHIFT, prot), init); 508 paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE; 509 } 510 511 update_page_count(PG_LEVEL_4K, pages); 512 513 return paddr_last; 514 } 515 516 /* 517 * Create PMD level page table mapping for physical addresses. The virtual 518 * and physical address have to be aligned at this level. 519 * It returns the last physical address mapped. 520 */ 521 static unsigned long __meminit 522 phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end, 523 unsigned long page_size_mask, pgprot_t prot, bool init) 524 { 525 unsigned long pages = 0, paddr_next; 526 unsigned long paddr_last = paddr_end; 527 528 int i = pmd_index(paddr); 529 530 for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) { 531 pmd_t *pmd = pmd_page + pmd_index(paddr); 532 pte_t *pte; 533 pgprot_t new_prot = prot; 534 535 paddr_next = (paddr & PMD_MASK) + PMD_SIZE; 536 if (paddr >= paddr_end) { 537 if (!after_bootmem && 538 !e820__mapped_any(paddr & PMD_MASK, paddr_next, 539 E820_TYPE_RAM) && 540 !e820__mapped_any(paddr & PMD_MASK, paddr_next, 541 E820_TYPE_ACPI)) 542 set_pmd_init(pmd, __pmd(0), init); 543 continue; 544 } 545 546 if (!pmd_none(*pmd)) { 547 if (!pmd_leaf(*pmd)) { 548 spin_lock(&init_mm.page_table_lock); 549 pte = (pte_t *)pmd_page_vaddr(*pmd); 550 paddr_last = phys_pte_init(pte, paddr, 551 paddr_end, prot, 552 init); 553 spin_unlock(&init_mm.page_table_lock); 554 continue; 555 } 556 /* 557 * If we are ok with PG_LEVEL_2M mapping, then we will 558 * use the existing mapping, 559 * 560 * Otherwise, we will split the large page mapping but 561 * use the same existing protection bits except for 562 * large page, so that we don't violate Intel's TLB 563 * Application note (317080) which says, while changing 564 * the page sizes, new and old translations should 565 * not differ with respect to page frame and 566 * attributes. 567 */ 568 if (page_size_mask & (1 << PG_LEVEL_2M)) { 569 if (!after_bootmem) 570 pages++; 571 paddr_last = paddr_next; 572 continue; 573 } 574 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd)); 575 } 576 577 if (page_size_mask & (1<<PG_LEVEL_2M)) { 578 pages++; 579 spin_lock(&init_mm.page_table_lock); 580 set_pmd_init(pmd, 581 pfn_pmd(paddr >> PAGE_SHIFT, prot_sethuge(prot)), 582 init); 583 spin_unlock(&init_mm.page_table_lock); 584 paddr_last = paddr_next; 585 continue; 586 } 587 588 pte = alloc_low_page(); 589 paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot, init); 590 591 spin_lock(&init_mm.page_table_lock); 592 pmd_populate_kernel_init(&init_mm, pmd, pte, init); 593 spin_unlock(&init_mm.page_table_lock); 594 } 595 update_page_count(PG_LEVEL_2M, pages); 596 return paddr_last; 597 } 598 599 /* 600 * Create PUD level page table mapping for physical addresses. The virtual 601 * and physical address do not have to be aligned at this level. KASLR can 602 * randomize virtual addresses up to this level. 603 * It returns the last physical address mapped. 604 */ 605 static unsigned long __meminit 606 phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end, 607 unsigned long page_size_mask, pgprot_t _prot, bool init) 608 { 609 unsigned long pages = 0, paddr_next; 610 unsigned long paddr_last = paddr_end; 611 unsigned long vaddr = (unsigned long)__va(paddr); 612 int i = pud_index(vaddr); 613 614 for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) { 615 pud_t *pud; 616 pmd_t *pmd; 617 pgprot_t prot = _prot; 618 619 vaddr = (unsigned long)__va(paddr); 620 pud = pud_page + pud_index(vaddr); 621 paddr_next = (paddr & PUD_MASK) + PUD_SIZE; 622 623 if (paddr >= paddr_end) { 624 if (!after_bootmem && 625 !e820__mapped_any(paddr & PUD_MASK, paddr_next, 626 E820_TYPE_RAM) && 627 !e820__mapped_any(paddr & PUD_MASK, paddr_next, 628 E820_TYPE_ACPI)) 629 set_pud_init(pud, __pud(0), init); 630 continue; 631 } 632 633 if (!pud_none(*pud)) { 634 if (!pud_leaf(*pud)) { 635 pmd = pmd_offset(pud, 0); 636 paddr_last = phys_pmd_init(pmd, paddr, 637 paddr_end, 638 page_size_mask, 639 prot, init); 640 continue; 641 } 642 /* 643 * If we are ok with PG_LEVEL_1G mapping, then we will 644 * use the existing mapping. 645 * 646 * Otherwise, we will split the gbpage mapping but use 647 * the same existing protection bits except for large 648 * page, so that we don't violate Intel's TLB 649 * Application note (317080) which says, while changing 650 * the page sizes, new and old translations should 651 * not differ with respect to page frame and 652 * attributes. 653 */ 654 if (page_size_mask & (1 << PG_LEVEL_1G)) { 655 if (!after_bootmem) 656 pages++; 657 paddr_last = paddr_next; 658 continue; 659 } 660 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud)); 661 } 662 663 if (page_size_mask & (1<<PG_LEVEL_1G)) { 664 pages++; 665 spin_lock(&init_mm.page_table_lock); 666 set_pud_init(pud, 667 pfn_pud(paddr >> PAGE_SHIFT, prot_sethuge(prot)), 668 init); 669 spin_unlock(&init_mm.page_table_lock); 670 paddr_last = paddr_next; 671 continue; 672 } 673 674 pmd = alloc_low_page(); 675 paddr_last = phys_pmd_init(pmd, paddr, paddr_end, 676 page_size_mask, prot, init); 677 678 spin_lock(&init_mm.page_table_lock); 679 pud_populate_init(&init_mm, pud, pmd, init); 680 spin_unlock(&init_mm.page_table_lock); 681 } 682 683 update_page_count(PG_LEVEL_1G, pages); 684 685 return paddr_last; 686 } 687 688 static unsigned long __meminit 689 phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end, 690 unsigned long page_size_mask, pgprot_t prot, bool init) 691 { 692 unsigned long vaddr, vaddr_end, vaddr_next, paddr_next, paddr_last; 693 694 paddr_last = paddr_end; 695 vaddr = (unsigned long)__va(paddr); 696 vaddr_end = (unsigned long)__va(paddr_end); 697 698 if (!pgtable_l5_enabled()) 699 return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, 700 page_size_mask, prot, init); 701 702 for (; vaddr < vaddr_end; vaddr = vaddr_next) { 703 p4d_t *p4d = p4d_page + p4d_index(vaddr); 704 pud_t *pud; 705 706 vaddr_next = (vaddr & P4D_MASK) + P4D_SIZE; 707 paddr = __pa(vaddr); 708 709 if (paddr >= paddr_end) { 710 paddr_next = __pa(vaddr_next); 711 if (!after_bootmem && 712 !e820__mapped_any(paddr & P4D_MASK, paddr_next, 713 E820_TYPE_RAM) && 714 !e820__mapped_any(paddr & P4D_MASK, paddr_next, 715 E820_TYPE_ACPI)) 716 set_p4d_init(p4d, __p4d(0), init); 717 continue; 718 } 719 720 if (!p4d_none(*p4d)) { 721 pud = pud_offset(p4d, 0); 722 paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end), 723 page_size_mask, prot, init); 724 continue; 725 } 726 727 pud = alloc_low_page(); 728 paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end), 729 page_size_mask, prot, init); 730 731 spin_lock(&init_mm.page_table_lock); 732 p4d_populate_init(&init_mm, p4d, pud, init); 733 spin_unlock(&init_mm.page_table_lock); 734 } 735 736 return paddr_last; 737 } 738 739 static unsigned long __meminit 740 __kernel_physical_mapping_init(unsigned long paddr_start, 741 unsigned long paddr_end, 742 unsigned long page_size_mask, 743 pgprot_t prot, bool init) 744 { 745 bool pgd_changed = false; 746 unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last; 747 748 paddr_last = paddr_end; 749 vaddr = (unsigned long)__va(paddr_start); 750 vaddr_end = (unsigned long)__va(paddr_end); 751 vaddr_start = vaddr; 752 753 for (; vaddr < vaddr_end; vaddr = vaddr_next) { 754 pgd_t *pgd = pgd_offset_k(vaddr); 755 p4d_t *p4d; 756 757 vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE; 758 759 if (pgd_val(*pgd)) { 760 p4d = (p4d_t *)pgd_page_vaddr(*pgd); 761 paddr_last = phys_p4d_init(p4d, __pa(vaddr), 762 __pa(vaddr_end), 763 page_size_mask, 764 prot, init); 765 continue; 766 } 767 768 p4d = alloc_low_page(); 769 paddr_last = phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), 770 page_size_mask, prot, init); 771 772 spin_lock(&init_mm.page_table_lock); 773 if (pgtable_l5_enabled()) 774 pgd_populate_init(&init_mm, pgd, p4d, init); 775 else 776 p4d_populate_init(&init_mm, p4d_offset(pgd, vaddr), 777 (pud_t *) p4d, init); 778 779 spin_unlock(&init_mm.page_table_lock); 780 pgd_changed = true; 781 } 782 783 if (pgd_changed) 784 sync_global_pgds(vaddr_start, vaddr_end - 1); 785 786 return paddr_last; 787 } 788 789 790 /* 791 * Create page table mapping for the physical memory for specific physical 792 * addresses. Note that it can only be used to populate non-present entries. 793 * The virtual and physical addresses have to be aligned on PMD level 794 * down. It returns the last physical address mapped. 795 */ 796 unsigned long __meminit 797 kernel_physical_mapping_init(unsigned long paddr_start, 798 unsigned long paddr_end, 799 unsigned long page_size_mask, pgprot_t prot) 800 { 801 return __kernel_physical_mapping_init(paddr_start, paddr_end, 802 page_size_mask, prot, true); 803 } 804 805 /* 806 * This function is similar to kernel_physical_mapping_init() above with the 807 * exception that it uses set_{pud,pmd}() instead of the set_{pud,pte}_safe() 808 * when updating the mapping. The caller is responsible to flush the TLBs after 809 * the function returns. 810 */ 811 unsigned long __meminit 812 kernel_physical_mapping_change(unsigned long paddr_start, 813 unsigned long paddr_end, 814 unsigned long page_size_mask) 815 { 816 return __kernel_physical_mapping_init(paddr_start, paddr_end, 817 page_size_mask, PAGE_KERNEL, 818 false); 819 } 820 821 #ifndef CONFIG_NUMA 822 static __always_inline void x86_numa_init(void) 823 { 824 memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0); 825 } 826 #endif 827 828 void __init initmem_init(void) 829 { 830 x86_numa_init(); 831 } 832 833 void __init paging_init(void) 834 { 835 /* 836 * clear the default setting with node 0 837 * note: don't use nodes_clear here, that is really clearing when 838 * numa support is not compiled in, and later node_set_state 839 * will not set it back. 840 */ 841 node_clear_state(0, N_MEMORY); 842 node_clear_state(0, N_NORMAL_MEMORY); 843 } 844 845 #define PAGE_UNUSED 0xFD 846 847 /* 848 * The unused vmemmap range, which was not yet memset(PAGE_UNUSED), ranges 849 * from unused_pmd_start to next PMD_SIZE boundary. 850 */ 851 static unsigned long unused_pmd_start __meminitdata; 852 853 static void __meminit vmemmap_flush_unused_pmd(void) 854 { 855 if (!unused_pmd_start) 856 return; 857 /* 858 * Clears (unused_pmd_start, PMD_END] 859 */ 860 memset((void *)unused_pmd_start, PAGE_UNUSED, 861 ALIGN(unused_pmd_start, PMD_SIZE) - unused_pmd_start); 862 unused_pmd_start = 0; 863 } 864 865 #ifdef CONFIG_MEMORY_HOTPLUG 866 /* Returns true if the PMD is completely unused and thus it can be freed */ 867 static bool __meminit vmemmap_pmd_is_unused(unsigned long addr, unsigned long end) 868 { 869 unsigned long start = ALIGN_DOWN(addr, PMD_SIZE); 870 871 /* 872 * Flush the unused range cache to ensure that memchr_inv() will work 873 * for the whole range. 874 */ 875 vmemmap_flush_unused_pmd(); 876 memset((void *)addr, PAGE_UNUSED, end - addr); 877 878 return !memchr_inv((void *)start, PAGE_UNUSED, PMD_SIZE); 879 } 880 #endif 881 882 static void __meminit __vmemmap_use_sub_pmd(unsigned long start) 883 { 884 /* 885 * As we expect to add in the same granularity as we remove, it's 886 * sufficient to mark only some piece used to block the memmap page from 887 * getting removed when removing some other adjacent memmap (just in 888 * case the first memmap never gets initialized e.g., because the memory 889 * block never gets onlined). 890 */ 891 memset((void *)start, 0, sizeof(struct page)); 892 } 893 894 static void __meminit vmemmap_use_sub_pmd(unsigned long start, unsigned long end) 895 { 896 /* 897 * We only optimize if the new used range directly follows the 898 * previously unused range (esp., when populating consecutive sections). 899 */ 900 if (unused_pmd_start == start) { 901 if (likely(IS_ALIGNED(end, PMD_SIZE))) 902 unused_pmd_start = 0; 903 else 904 unused_pmd_start = end; 905 return; 906 } 907 908 /* 909 * If the range does not contiguously follows previous one, make sure 910 * to mark the unused range of the previous one so it can be removed. 911 */ 912 vmemmap_flush_unused_pmd(); 913 __vmemmap_use_sub_pmd(start); 914 } 915 916 917 static void __meminit vmemmap_use_new_sub_pmd(unsigned long start, unsigned long end) 918 { 919 const unsigned long page = ALIGN_DOWN(start, PMD_SIZE); 920 921 vmemmap_flush_unused_pmd(); 922 923 /* 924 * Could be our memmap page is filled with PAGE_UNUSED already from a 925 * previous remove. Make sure to reset it. 926 */ 927 __vmemmap_use_sub_pmd(start); 928 929 /* 930 * Mark with PAGE_UNUSED the unused parts of the new memmap range 931 */ 932 if (!IS_ALIGNED(start, PMD_SIZE)) 933 memset((void *)page, PAGE_UNUSED, start - page); 934 935 /* 936 * We want to avoid memset(PAGE_UNUSED) when populating the vmemmap of 937 * consecutive sections. Remember for the last added PMD where the 938 * unused range begins. 939 */ 940 if (!IS_ALIGNED(end, PMD_SIZE)) 941 unused_pmd_start = end; 942 } 943 944 /* 945 * Memory hotplug specific functions 946 */ 947 #ifdef CONFIG_MEMORY_HOTPLUG 948 /* 949 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need 950 * updating. 951 */ 952 static void update_end_of_memory_vars(u64 start, u64 size) 953 { 954 unsigned long end_pfn = PFN_UP(start + size); 955 956 if (end_pfn > max_pfn) { 957 max_pfn = end_pfn; 958 max_low_pfn = end_pfn; 959 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1; 960 } 961 } 962 963 int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages, 964 struct mhp_params *params) 965 { 966 unsigned long end = ((start_pfn + nr_pages) << PAGE_SHIFT) - 1; 967 int ret; 968 969 if (WARN_ON_ONCE(end > DIRECT_MAP_PHYSMEM_END)) 970 return -ERANGE; 971 972 ret = __add_pages(nid, start_pfn, nr_pages, params); 973 WARN_ON_ONCE(ret); 974 975 /* 976 * Special case: add_pages() is called by memremap_pages() for adding device 977 * private pages. Do not bump up max_pfn in the device private path, 978 * because max_pfn changes affect dma_addressing_limited(). 979 * 980 * dma_addressing_limited() returning true when max_pfn is the device's 981 * addressable memory can force device drivers to use bounce buffers 982 * and impact their performance negatively: 983 */ 984 if (!params->pgmap) 985 /* update max_pfn, max_low_pfn and high_memory */ 986 update_end_of_memory_vars(start_pfn << PAGE_SHIFT, nr_pages << PAGE_SHIFT); 987 988 return ret; 989 } 990 991 int arch_add_memory(int nid, u64 start, u64 size, 992 struct mhp_params *params) 993 { 994 unsigned long start_pfn = start >> PAGE_SHIFT; 995 unsigned long nr_pages = size >> PAGE_SHIFT; 996 997 init_memory_mapping(start, start + size, params->pgprot); 998 999 return add_pages(nid, start_pfn, nr_pages, params); 1000 } 1001 1002 static void __meminit free_pagetable(struct page *page) 1003 { 1004 if (PageReserved(page)) 1005 free_reserved_page(page); 1006 else 1007 pagetable_free(page_ptdesc(page)); 1008 } 1009 1010 static void __meminit free_vmemmap_pages(struct page *page, unsigned int order, 1011 struct vmem_altmap *altmap) 1012 { 1013 unsigned long nr_pages = 1u << order; 1014 1015 if (altmap) 1016 vmem_altmap_free(altmap, nr_pages); 1017 else if (PageReserved(page)) 1018 free_reserved_pages(page, order); 1019 else 1020 __free_pages(page, order); 1021 } 1022 1023 static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd) 1024 { 1025 pte_t *pte; 1026 int i; 1027 1028 for (i = 0; i < PTRS_PER_PTE; i++) { 1029 pte = pte_start + i; 1030 if (!pte_none(*pte)) 1031 return; 1032 } 1033 1034 /* free a pte table */ 1035 free_pagetable(pmd_page(*pmd)); 1036 spin_lock(&init_mm.page_table_lock); 1037 pmd_clear(pmd); 1038 spin_unlock(&init_mm.page_table_lock); 1039 } 1040 1041 static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud) 1042 { 1043 pmd_t *pmd; 1044 int i; 1045 1046 for (i = 0; i < PTRS_PER_PMD; i++) { 1047 pmd = pmd_start + i; 1048 if (!pmd_none(*pmd)) 1049 return; 1050 } 1051 1052 /* free a pmd table */ 1053 free_pagetable(pud_page(*pud)); 1054 spin_lock(&init_mm.page_table_lock); 1055 pud_clear(pud); 1056 spin_unlock(&init_mm.page_table_lock); 1057 } 1058 1059 static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d) 1060 { 1061 pud_t *pud; 1062 int i; 1063 1064 for (i = 0; i < PTRS_PER_PUD; i++) { 1065 pud = pud_start + i; 1066 if (!pud_none(*pud)) 1067 return; 1068 } 1069 1070 /* free a pud table */ 1071 free_pagetable(p4d_page(*p4d)); 1072 spin_lock(&init_mm.page_table_lock); 1073 p4d_clear(p4d); 1074 spin_unlock(&init_mm.page_table_lock); 1075 } 1076 1077 static void __meminit 1078 remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end, 1079 bool direct) 1080 { 1081 unsigned long next, pages = 0; 1082 pte_t *pte; 1083 phys_addr_t phys_addr; 1084 1085 pte = pte_start + pte_index(addr); 1086 for (; addr < end; addr = next, pte++) { 1087 next = (addr + PAGE_SIZE) & PAGE_MASK; 1088 if (next > end) 1089 next = end; 1090 1091 if (!pte_present(*pte)) 1092 continue; 1093 1094 /* 1095 * We mapped [0,1G) memory as identity mapping when 1096 * initializing, in arch/x86/kernel/head_64.S. These 1097 * pagetables cannot be removed. 1098 */ 1099 phys_addr = pte_val(*pte) + (addr & PAGE_MASK); 1100 if (phys_addr < (phys_addr_t)0x40000000) 1101 return; 1102 1103 if (!direct) 1104 /* We never populate base pages from the altmap. */ 1105 free_vmemmap_pages(pte_page(*pte), 0, NULL); 1106 1107 spin_lock(&init_mm.page_table_lock); 1108 pte_clear(&init_mm, addr, pte); 1109 spin_unlock(&init_mm.page_table_lock); 1110 1111 /* For non-direct mapping, pages means nothing. */ 1112 pages++; 1113 } 1114 1115 /* Call free_pte_table() in remove_pmd_table(). */ 1116 flush_tlb_all(); 1117 if (direct) 1118 update_page_count(PG_LEVEL_4K, -pages); 1119 } 1120 1121 static void __meminit 1122 remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end, 1123 bool direct, struct vmem_altmap *altmap) 1124 { 1125 unsigned long next, pages = 0; 1126 pte_t *pte_base; 1127 pmd_t *pmd; 1128 1129 pmd = pmd_start + pmd_index(addr); 1130 for (; addr < end; addr = next, pmd++) { 1131 next = pmd_addr_end(addr, end); 1132 1133 if (!pmd_present(*pmd)) 1134 continue; 1135 1136 if (pmd_leaf(*pmd)) { 1137 if (IS_ALIGNED(addr, PMD_SIZE) && 1138 IS_ALIGNED(next, PMD_SIZE)) { 1139 if (!direct) 1140 free_vmemmap_pages(pmd_page(*pmd), 1141 PMD_ORDER, altmap); 1142 1143 spin_lock(&init_mm.page_table_lock); 1144 pmd_clear(pmd); 1145 spin_unlock(&init_mm.page_table_lock); 1146 pages++; 1147 } else if (vmemmap_pmd_is_unused(addr, next)) { 1148 free_vmemmap_pages(pmd_page(*pmd), PMD_ORDER, 1149 altmap); 1150 spin_lock(&init_mm.page_table_lock); 1151 pmd_clear(pmd); 1152 spin_unlock(&init_mm.page_table_lock); 1153 } 1154 continue; 1155 } 1156 1157 pte_base = (pte_t *)pmd_page_vaddr(*pmd); 1158 remove_pte_table(pte_base, addr, next, direct); 1159 free_pte_table(pte_base, pmd); 1160 } 1161 1162 /* Call free_pmd_table() in remove_pud_table(). */ 1163 if (direct) 1164 update_page_count(PG_LEVEL_2M, -pages); 1165 } 1166 1167 static void __meminit 1168 remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end, 1169 struct vmem_altmap *altmap, bool direct) 1170 { 1171 unsigned long next, pages = 0; 1172 pmd_t *pmd_base; 1173 pud_t *pud; 1174 1175 pud = pud_start + pud_index(addr); 1176 for (; addr < end; addr = next, pud++) { 1177 next = pud_addr_end(addr, end); 1178 1179 if (!pud_present(*pud)) 1180 continue; 1181 1182 if (pud_leaf(*pud) && 1183 IS_ALIGNED(addr, PUD_SIZE) && 1184 IS_ALIGNED(next, PUD_SIZE)) { 1185 spin_lock(&init_mm.page_table_lock); 1186 pud_clear(pud); 1187 spin_unlock(&init_mm.page_table_lock); 1188 pages++; 1189 continue; 1190 } 1191 1192 pmd_base = pmd_offset(pud, 0); 1193 remove_pmd_table(pmd_base, addr, next, direct, altmap); 1194 free_pmd_table(pmd_base, pud); 1195 } 1196 1197 if (direct) 1198 update_page_count(PG_LEVEL_1G, -pages); 1199 } 1200 1201 static void __meminit 1202 remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end, 1203 struct vmem_altmap *altmap, bool direct) 1204 { 1205 unsigned long next, pages = 0; 1206 pud_t *pud_base; 1207 p4d_t *p4d; 1208 1209 p4d = p4d_start + p4d_index(addr); 1210 for (; addr < end; addr = next, p4d++) { 1211 next = p4d_addr_end(addr, end); 1212 1213 if (!p4d_present(*p4d)) 1214 continue; 1215 1216 BUILD_BUG_ON(p4d_leaf(*p4d)); 1217 1218 pud_base = pud_offset(p4d, 0); 1219 remove_pud_table(pud_base, addr, next, altmap, direct); 1220 /* 1221 * For 4-level page tables we do not want to free PUDs, but in the 1222 * 5-level case we should free them. This code will have to change 1223 * to adapt for boot-time switching between 4 and 5 level page tables. 1224 */ 1225 if (pgtable_l5_enabled()) 1226 free_pud_table(pud_base, p4d); 1227 } 1228 1229 if (direct) 1230 update_page_count(PG_LEVEL_512G, -pages); 1231 } 1232 1233 /* start and end are both virtual address. */ 1234 static void __meminit 1235 remove_pagetable(unsigned long start, unsigned long end, bool direct, 1236 struct vmem_altmap *altmap) 1237 { 1238 unsigned long next; 1239 unsigned long addr; 1240 pgd_t *pgd; 1241 p4d_t *p4d; 1242 1243 for (addr = start; addr < end; addr = next) { 1244 next = pgd_addr_end(addr, end); 1245 1246 pgd = pgd_offset_k(addr); 1247 if (!pgd_present(*pgd)) 1248 continue; 1249 1250 p4d = p4d_offset(pgd, 0); 1251 remove_p4d_table(p4d, addr, next, altmap, direct); 1252 } 1253 1254 flush_tlb_all(); 1255 } 1256 1257 void __ref vmemmap_free(unsigned long start, unsigned long end, 1258 struct vmem_altmap *altmap) 1259 { 1260 VM_BUG_ON(!PAGE_ALIGNED(start)); 1261 VM_BUG_ON(!PAGE_ALIGNED(end)); 1262 1263 remove_pagetable(start, end, false, altmap); 1264 } 1265 1266 static void __meminit 1267 kernel_physical_mapping_remove(unsigned long start, unsigned long end) 1268 { 1269 start = (unsigned long)__va(start); 1270 end = (unsigned long)__va(end); 1271 1272 remove_pagetable(start, end, true, NULL); 1273 } 1274 1275 void __ref arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap, 1276 struct dev_pagemap *pgmap) 1277 { 1278 unsigned long start_pfn = start >> PAGE_SHIFT; 1279 unsigned long nr_pages = size >> PAGE_SHIFT; 1280 1281 __remove_pages(start_pfn, nr_pages, altmap, pgmap); 1282 kernel_physical_mapping_remove(start, start + size); 1283 } 1284 #endif /* CONFIG_MEMORY_HOTPLUG */ 1285 1286 static struct kcore_list kcore_vsyscall; 1287 1288 /* 1289 * Pre-allocates page-table pages for the vmalloc area in the kernel page-table. 1290 * Only the level which needs to be synchronized between all page-tables is 1291 * allocated because the synchronization can be expensive. 1292 */ 1293 static void __init preallocate_vmalloc_pages(void) 1294 { 1295 unsigned long addr; 1296 const char *lvl; 1297 1298 for (addr = VMALLOC_START; addr <= VMEMORY_END; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 1299 pgd_t *pgd = pgd_offset_k(addr); 1300 p4d_t *p4d; 1301 pud_t *pud; 1302 1303 lvl = "p4d"; 1304 p4d = p4d_alloc(&init_mm, pgd, addr); 1305 if (!p4d) 1306 goto failed; 1307 1308 if (pgtable_l5_enabled()) 1309 continue; 1310 1311 /* 1312 * The goal here is to allocate all possibly required 1313 * hardware page tables pointed to by the top hardware 1314 * level. 1315 * 1316 * On 4-level systems, the P4D layer is folded away and 1317 * the above code does no preallocation. Below, go down 1318 * to the pud _software_ level to ensure the second 1319 * hardware level is allocated on 4-level systems too. 1320 */ 1321 lvl = "pud"; 1322 pud = pud_alloc(&init_mm, p4d, addr); 1323 if (!pud) 1324 goto failed; 1325 } 1326 1327 return; 1328 1329 failed: 1330 1331 /* 1332 * The pages have to be there now or they will be missing in 1333 * process page-tables later. 1334 */ 1335 panic("Failed to pre-allocate %s pages for vmalloc area\n", lvl); 1336 } 1337 1338 void __init arch_mm_preinit(void) 1339 { 1340 pci_iommu_alloc(); 1341 } 1342 1343 void __init mem_init(void) 1344 { 1345 /* clear_bss() already clear the empty_zero_page */ 1346 1347 after_bootmem = 1; 1348 x86_init.hyper.init_after_bootmem(); 1349 1350 /* Register memory areas for /proc/kcore */ 1351 if (get_gate_vma(&init_mm)) 1352 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR, PAGE_SIZE, KCORE_USER); 1353 1354 preallocate_vmalloc_pages(); 1355 } 1356 1357 int kernel_set_to_readonly; 1358 1359 void mark_rodata_ro(void) 1360 { 1361 unsigned long start = PFN_ALIGN(_text); 1362 unsigned long rodata_start = PFN_ALIGN(__start_rodata); 1363 unsigned long end = (unsigned long)__end_rodata_hpage_align; 1364 unsigned long text_end = PFN_ALIGN(_etext); 1365 unsigned long rodata_end = PFN_ALIGN(__end_rodata); 1366 unsigned long all_end; 1367 1368 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n", 1369 (end - start) >> 10); 1370 set_memory_ro(start, (end - start) >> PAGE_SHIFT); 1371 1372 kernel_set_to_readonly = 1; 1373 1374 /* 1375 * The rodata/data/bss/brk section (but not the kernel text!) 1376 * should also be not-executable. 1377 * 1378 * We align all_end to PMD_SIZE because the existing mapping 1379 * is a full PMD. If we would align _brk_end to PAGE_SIZE we 1380 * split the PMD and the reminder between _brk_end and the end 1381 * of the PMD will remain mapped executable. 1382 * 1383 * Any PMD which was setup after the one which covers _brk_end 1384 * has been zapped already via cleanup_highmem(). 1385 */ 1386 all_end = roundup((unsigned long)_brk_end, PMD_SIZE); 1387 set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT); 1388 1389 set_ftrace_ops_ro(); 1390 1391 #ifdef CONFIG_CPA_DEBUG 1392 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end); 1393 set_memory_rw(start, (end-start) >> PAGE_SHIFT); 1394 1395 printk(KERN_INFO "Testing CPA: again\n"); 1396 set_memory_ro(start, (end-start) >> PAGE_SHIFT); 1397 #endif 1398 1399 free_kernel_image_pages("unused kernel image (text/rodata gap)", 1400 (void *)text_end, (void *)rodata_start); 1401 free_kernel_image_pages("unused kernel image (rodata/data gap)", 1402 (void *)rodata_end, (void *)_sdata); 1403 } 1404 1405 /* 1406 * Block size is the minimum amount of memory which can be hotplugged or 1407 * hotremoved. It must be power of two and must be equal or larger than 1408 * MIN_MEMORY_BLOCK_SIZE. 1409 */ 1410 #define MAX_BLOCK_SIZE (2UL << 30) 1411 1412 /* Amount of ram needed to start using large blocks */ 1413 #define MEM_SIZE_FOR_LARGE_BLOCK (64UL << 30) 1414 1415 /* Adjustable memory block size */ 1416 static unsigned long set_memory_block_size; 1417 int __init set_memory_block_size_order(unsigned int order) 1418 { 1419 unsigned long size = 1UL << order; 1420 1421 if (size > MEM_SIZE_FOR_LARGE_BLOCK || size < MIN_MEMORY_BLOCK_SIZE) 1422 return -EINVAL; 1423 1424 set_memory_block_size = size; 1425 return 0; 1426 } 1427 1428 static unsigned long probe_memory_block_size(void) 1429 { 1430 unsigned long boot_mem_end = max_pfn << PAGE_SHIFT; 1431 unsigned long bz; 1432 1433 /* If memory block size has been set, then use it */ 1434 bz = set_memory_block_size; 1435 if (bz) 1436 goto done; 1437 1438 /* Use regular block if RAM is smaller than MEM_SIZE_FOR_LARGE_BLOCK */ 1439 if (boot_mem_end < MEM_SIZE_FOR_LARGE_BLOCK) { 1440 bz = MIN_MEMORY_BLOCK_SIZE; 1441 goto done; 1442 } 1443 1444 /* 1445 * When hotplug alignment is not a concern, maximize blocksize 1446 * to minimize overhead. Otherwise, align to the lesser of advice 1447 * alignment and end of memory alignment. 1448 */ 1449 bz = memory_block_advised_max_size(); 1450 if (!bz) { 1451 bz = MAX_BLOCK_SIZE; 1452 if (!cpu_feature_enabled(X86_FEATURE_HYPERVISOR)) 1453 goto done; 1454 } else { 1455 bz = max(min(bz, MAX_BLOCK_SIZE), MIN_MEMORY_BLOCK_SIZE); 1456 } 1457 1458 /* Find the largest allowed block size that aligns to memory end */ 1459 for (; bz > MIN_MEMORY_BLOCK_SIZE; bz >>= 1) { 1460 if (IS_ALIGNED(boot_mem_end, bz)) 1461 break; 1462 } 1463 done: 1464 pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20); 1465 1466 return bz; 1467 } 1468 1469 static unsigned long memory_block_size_probed; 1470 unsigned long memory_block_size_bytes(void) 1471 { 1472 if (!memory_block_size_probed) 1473 memory_block_size_probed = probe_memory_block_size(); 1474 1475 return memory_block_size_probed; 1476 } 1477 1478 /* 1479 * Initialise the sparsemem vmemmap using huge-pages at the PMD level. 1480 */ 1481 static long __meminitdata addr_start, addr_end; 1482 static void __meminitdata *p_start, *p_end; 1483 static int __meminitdata node_start; 1484 1485 void __meminit vmemmap_set_pmd(pmd_t *pmd, void *p, int node, 1486 unsigned long addr, unsigned long next) 1487 { 1488 pte_t entry; 1489 1490 entry = pfn_pte(__pa(p) >> PAGE_SHIFT, 1491 PAGE_KERNEL_LARGE); 1492 set_pmd(pmd, __pmd(pte_val(entry))); 1493 1494 /* check to see if we have contiguous blocks */ 1495 if (p_end != p || node_start != node) { 1496 if (p_start) 1497 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", 1498 addr_start, addr_end-1, p_start, p_end-1, node_start); 1499 addr_start = addr; 1500 node_start = node; 1501 p_start = p; 1502 } 1503 1504 addr_end = addr + PMD_SIZE; 1505 p_end = p + PMD_SIZE; 1506 1507 if (!IS_ALIGNED(addr, PMD_SIZE) || 1508 !IS_ALIGNED(next, PMD_SIZE)) 1509 vmemmap_use_new_sub_pmd(addr, next); 1510 } 1511 1512 int __meminit vmemmap_check_pmd(pmd_t *pmd, int node, 1513 unsigned long addr, unsigned long next) 1514 { 1515 int large = pmd_leaf(*pmd); 1516 1517 if (pmd_leaf(*pmd)) { 1518 vmemmap_verify((pte_t *)pmd, node, addr, next); 1519 vmemmap_use_sub_pmd(addr, next); 1520 } 1521 1522 return large; 1523 } 1524 1525 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 1526 struct vmem_altmap *altmap) 1527 { 1528 int err; 1529 1530 VM_BUG_ON(!PAGE_ALIGNED(start)); 1531 VM_BUG_ON(!PAGE_ALIGNED(end)); 1532 1533 if (end - start < PAGES_PER_SECTION * sizeof(struct page)) 1534 err = vmemmap_populate_basepages(start, end, node, NULL); 1535 else if (boot_cpu_has(X86_FEATURE_PSE)) 1536 err = vmemmap_populate_hugepages(start, end, node, altmap); 1537 else if (altmap) { 1538 pr_err_once("%s: no cpu support for altmap allocations\n", 1539 __func__); 1540 err = -ENOMEM; 1541 } else 1542 err = vmemmap_populate_basepages(start, end, node, NULL); 1543 if (!err) 1544 sync_global_pgds(start, end - 1); 1545 return err; 1546 } 1547 1548 void __meminit vmemmap_populate_print_last(void) 1549 { 1550 if (p_start) { 1551 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", 1552 addr_start, addr_end-1, p_start, p_end-1, node_start); 1553 p_start = NULL; 1554 p_end = NULL; 1555 node_start = 0; 1556 } 1557 } 1558