1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Kandou KB9002 PCIe 5.0 retimer hwmon driver. 4 * 5 * The retimer exposes a system management bus (SMBus 3.0 with PEC) 6 * target for firmware-managed status registers. This driver assumes 7 * the chip is strapped to SMBus mode and exports the aggregated 8 * maximum die temperature as hwmon temp1_input (millidegrees Celsius) 9 * plus the firmware version and boot status under debugfs. 10 * 11 * The raw-I2C path (kb9002_i2c_read/write, used only at probe to switch 12 * the host interface) carries the 32-bit register address and data 13 * big-endian. The SMBus path (kb9002_fw_read/kb9002_smbus_hw_read) 14 * carries the register address and returned data little-endian. 15 * 16 * Datasheet: Kandou KB9002 PCIe retimer (KA-015171-PD). 17 */ 18 19 #include <linux/bitfield.h> 20 #include <linux/bitops.h> 21 #include <linux/cleanup.h> 22 #include <linux/debugfs.h> 23 #include <linux/err.h> 24 #include <linux/hwmon.h> 25 #include <linux/i2c.h> 26 #include <linux/iopoll.h> 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/of.h> 30 #include <linux/seq_file.h> 31 #include <linux/types.h> 32 #include <linux/unaligned.h> 33 34 #define KB9002_DEV_NAME "kb9002" 35 36 /* 37 * SMBus read command codes. Each read is a two-phase PEC-protected 38 * transaction: prime writes the target address, data reads it back with 39 * the register contents. FW reads use a 16-bit address, HW reads 32-bit. 40 */ 41 #define KB9002_CC_FW_READ_PRIME 0x82 42 #define KB9002_CC_FW_READ_DATA 0x81 43 #define KB9002_CC_HW_READ_PRIME 0x8a 44 #define KB9002_CC_HW_READ_DATA 0x89 45 46 /* Firmware register offsets (16-bit). */ 47 #define KB9002_FW_REG_VID 0x0004 48 #define KB9002_FW_REG_FW_VERSION 0x0500 49 #define KB9002_FW_REG_TEMP_MAXIMUM 0x0550 50 51 #define KB9002_VID_MASK GENMASK(31, 16) 52 #define KB9002_VID_KANDOU 0x1e6f 53 54 /* Firmware boot status: 0xe8 in the top byte means init completed OK. */ 55 #define KB9002_HW_REG_FW_BOOT_STATUS 0xe0090008 56 #define KB9002_FW_BOOT_STATUS_OK_MSB 0xe8 57 58 /* 59 * Hardware registers reached over raw I2C (32-bit addressing). The 60 * host-interface bit selects SMBus (set) vs raw-I2C target; parts 61 * strapped to raw I2C need it set before SMBus access works. 62 */ 63 #define KB9002_HW_REG_REVID 0x00480004 64 #define KB9002_HW_REG_HOST_IF 0x00480008 65 #define KB9002_HOST_IF_SMBUS BIT(1) 66 67 #define KB9002_REVID_MASK GENMASK(7, 0) 68 #define KB9002_REVID_B0 0x10 69 #define KB9002_REVID_B1 0x11 70 71 /* Retries to drain a stray leading 0xff from the raw-I2C FIFO. */ 72 #define KB9002_REVID_READ_RETRIES 16 73 74 /* Temperature: 32-bit Q16.16 absolute Kelvin. */ 75 #define KB9002_TEMP_FRAC_BITS 16 76 #define KB9002_ABS_ZERO_MILLI_C (-273150) 77 78 /* Firmware takes up to ~2s to respond after a host-interface change. */ 79 #define KB9002_FW_READY_POLL_US (25 * USEC_PER_MSEC) 80 #define KB9002_FW_READY_TIMEOUT_US (2 * USEC_PER_SEC) 81 82 struct kb9002_data { 83 struct i2c_client *client; 84 struct device *hwmon_dev; 85 }; 86 87 /* Raw-I2C read: write the 32-bit BE address, then read 4 BE data bytes. */ 88 static int kb9002_i2c_read(struct i2c_client *client, u32 reg, u32 *val) 89 { 90 u8 addr[4]; 91 u8 rbuf[4]; 92 struct i2c_msg msgs[2] = { 93 { 94 .addr = client->addr, 95 .flags = 0, 96 .len = sizeof(addr), 97 .buf = addr, 98 }, 99 { 100 .addr = client->addr, 101 .flags = I2C_M_RD, 102 .len = sizeof(rbuf), 103 .buf = rbuf, 104 }, 105 }; 106 int ret; 107 108 put_unaligned_be32(reg, addr); 109 110 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 111 if (ret < 0) 112 return ret; 113 if (ret != ARRAY_SIZE(msgs)) 114 return -EIO; 115 116 *val = get_unaligned_be32(rbuf); 117 return 0; 118 } 119 120 /* Raw-I2C write: 4 BE address bytes followed by 4 BE data bytes. */ 121 static int kb9002_i2c_write(struct i2c_client *client, u32 reg, u32 val) 122 { 123 u8 buf[8]; 124 struct i2c_msg msg = { 125 .addr = client->addr, 126 .flags = 0, 127 .len = sizeof(buf), 128 .buf = buf, 129 }; 130 int ret; 131 132 put_unaligned_be32(reg, &buf[0]); 133 put_unaligned_be32(val, &buf[4]); 134 135 ret = i2c_transfer(client->adapter, &msg, 1); 136 if (ret < 0) 137 return ret; 138 if (ret != 1) 139 return -EIO; 140 141 return 0; 142 } 143 144 /* 145 * Read the silicon revision ID. A fresh FIFO may start with a stray 146 * 0xff that shifts the result, so drain one byte between retries until 147 * the top byte is no longer 0xff. 148 */ 149 static int kb9002_read_revid(struct i2c_client *client, u32 *revid) 150 { 151 u8 dummy; 152 int ret; 153 int i; 154 155 for (i = 0; i < KB9002_REVID_READ_RETRIES; i++) { 156 ret = kb9002_i2c_read(client, KB9002_HW_REG_REVID, revid); 157 if (ret) 158 return ret; 159 if ((*revid >> 24) != 0xff) 160 return 0; 161 /* Drain one byte from the chip to re-align the I2C FIFO. */ 162 i2c_master_recv(client, &dummy, 1); 163 } 164 165 return -EIO; 166 } 167 168 /* 169 * Read a 32-bit firmware register over SMBus: block-write the 16-bit LE 170 * address, then block-read the echoed address plus 4 LE data bytes. 171 */ 172 static int kb9002_fw_read(struct kb9002_data *data, u16 reg, u32 *val) 173 { 174 struct i2c_client *client = data->client; 175 u8 addr[2]; 176 u8 rbuf[I2C_SMBUS_BLOCK_MAX]; 177 int ret; 178 179 put_unaligned_le16(reg, addr); 180 181 ret = i2c_smbus_write_block_data(client, KB9002_CC_FW_READ_PRIME, 182 sizeof(addr), addr); 183 if (ret < 0) 184 return ret; 185 186 ret = i2c_smbus_read_block_data(client, KB9002_CC_FW_READ_DATA, rbuf); 187 if (ret < 0) 188 return ret; 189 if (ret < (int)(sizeof(addr) + sizeof(*val))) 190 return -EIO; 191 192 *val = get_unaligned_le32(&rbuf[sizeof(addr)]); 193 return 0; 194 } 195 196 /* Like kb9002_fw_read but for a hardware register (32-bit LE address). */ 197 static int kb9002_smbus_hw_read(struct kb9002_data *data, u32 reg, u32 *val) 198 { 199 struct i2c_client *client = data->client; 200 u8 addr[4]; 201 u8 rbuf[I2C_SMBUS_BLOCK_MAX]; 202 int ret; 203 204 put_unaligned_le32(reg, addr); 205 206 ret = i2c_smbus_write_block_data(client, KB9002_CC_HW_READ_PRIME, 207 sizeof(addr), addr); 208 if (ret < 0) 209 return ret; 210 211 ret = i2c_smbus_read_block_data(client, KB9002_CC_HW_READ_DATA, rbuf); 212 if (ret < 0) 213 return ret; 214 if (ret < (int)(sizeof(addr) + sizeof(*val))) 215 return -EIO; 216 217 *val = get_unaligned_le32(&rbuf[sizeof(addr)]); 218 return 0; 219 } 220 221 /* 222 * Switch the host interface from raw-I2C to SMBus and wait for firmware 223 * to come back up. Called only when SMBus access failed in probe, i.e. 224 * the chip is strapped to raw-I2C mode. Confirms the revision, sets the 225 * SMBus-mode bit, then polls until firmware responds again. 226 */ 227 static int kb9002_enable_smbus_target(struct kb9002_data *data) 228 { 229 struct i2c_client *client = data->client; 230 u32 revid; 231 u32 val; 232 int op_ret; 233 int ret; 234 235 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 236 return dev_err_probe(&client->dev, -ENODEV, 237 "raw I2C required to switch to SMBus mode\n"); 238 239 ret = kb9002_read_revid(client, &revid); 240 if (ret) 241 return dev_err_probe(&client->dev, ret, 242 "revision ID read failed\n"); 243 244 switch (FIELD_GET(KB9002_REVID_MASK, revid)) { 245 case KB9002_REVID_B0: 246 case KB9002_REVID_B1: 247 break; 248 default: 249 return dev_err_probe(&client->dev, -ENODEV, 250 "unsupported revision ID 0x%08x\n", revid); 251 } 252 253 ret = kb9002_i2c_read(client, KB9002_HW_REG_HOST_IF, &val); 254 if (ret) 255 return dev_err_probe(&client->dev, ret, 256 "host interface read failed\n"); 257 258 val |= KB9002_HOST_IF_SMBUS; 259 260 ret = kb9002_i2c_write(client, KB9002_HW_REG_HOST_IF, val); 261 if (ret) 262 return dev_err_probe(&client->dev, ret, 263 "host interface write failed\n"); 264 265 /* Wait until firmware re-initialisation completes. */ 266 ret = read_poll_timeout(kb9002_fw_read, op_ret, op_ret == 0, 267 KB9002_FW_READY_POLL_US, 268 KB9002_FW_READY_TIMEOUT_US, true, 269 data, KB9002_FW_REG_VID, &val); 270 if (ret) 271 return dev_err_probe(&client->dev, ret, 272 "firmware not responding over SMBus\n"); 273 274 return 0; 275 } 276 277 /* Convert Q16.16 absolute Kelvin to millidegrees Celsius. */ 278 static long kb9002_temp_to_milli_c(u32 raw) 279 { 280 s64 milli_k = ((s64)raw * 1000) >> KB9002_TEMP_FRAC_BITS; 281 282 return (long)milli_k + KB9002_ABS_ZERO_MILLI_C; 283 } 284 285 static int kb9002_read_temp(struct kb9002_data *data, long *val) 286 { 287 u32 raw; 288 int ret; 289 290 ret = kb9002_fw_read(data, KB9002_FW_REG_TEMP_MAXIMUM, &raw); 291 if (ret) 292 return ret; 293 294 *val = kb9002_temp_to_milli_c(raw); 295 return 0; 296 } 297 298 static umode_t kb9002_is_visible(const void *drvdata, 299 enum hwmon_sensor_types type, 300 u32 attr, int channel) 301 { 302 return 0444; 303 } 304 305 static int kb9002_read(struct device *dev, enum hwmon_sensor_types type, 306 u32 attr, int channel, long *val) 307 { 308 struct kb9002_data *data = dev_get_drvdata(dev); 309 310 if (type == hwmon_temp && attr == hwmon_temp_input) 311 return kb9002_read_temp(data, val); 312 313 return -EOPNOTSUPP; 314 } 315 316 static const struct hwmon_ops kb9002_hwmon_ops = { 317 .is_visible = kb9002_is_visible, 318 .read = kb9002_read, 319 }; 320 321 static const struct hwmon_channel_info * const kb9002_hwmon_info[] = { 322 HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT), 323 NULL, 324 }; 325 326 static const struct hwmon_chip_info kb9002_chip_info = { 327 .ops = &kb9002_hwmon_ops, 328 .info = kb9002_hwmon_info, 329 }; 330 331 static int kb9002_fw_version_show(struct seq_file *s, void *unused) 332 { 333 struct kb9002_data *data = s->private; 334 u32 ver; 335 int ret; 336 337 guard(hwmon_lock)(data->hwmon_dev); 338 339 ret = kb9002_fw_read(data, KB9002_FW_REG_FW_VERSION, &ver); 340 if (ret) 341 return ret; 342 343 seq_printf(s, "%u.%02u.%02u.%u\n", 344 (ver >> 24) & 0xff, (ver >> 16) & 0xff, 345 (ver >> 8) & 0xff, (ver >> 0) & 0xff); 346 return 0; 347 } 348 DEFINE_SHOW_ATTRIBUTE(kb9002_fw_version); 349 350 static int kb9002_fw_load_status_show(struct seq_file *s, void *unused) 351 { 352 struct kb9002_data *data = s->private; 353 u32 status; 354 int ret; 355 356 guard(hwmon_lock)(data->hwmon_dev); 357 358 ret = kb9002_smbus_hw_read(data, KB9002_HW_REG_FW_BOOT_STATUS, &status); 359 if (ret) 360 return ret; 361 362 seq_printf(s, "%s\n", 363 (status >> 24) == KB9002_FW_BOOT_STATUS_OK_MSB ? 364 "normal" : "abnormal"); 365 return 0; 366 } 367 DEFINE_SHOW_ATTRIBUTE(kb9002_fw_load_status); 368 369 static void kb9002_debugfs_init(struct kb9002_data *data) 370 { 371 struct dentry *dir = data->client->debugfs; 372 373 debugfs_create_file("fw_ver", 0444, dir, data, 374 &kb9002_fw_version_fops); 375 debugfs_create_file("fw_load_status", 0444, dir, data, 376 &kb9002_fw_load_status_fops); 377 } 378 379 static int kb9002_probe(struct i2c_client *client) 380 { 381 struct device *dev = &client->dev; 382 struct kb9002_data *data; 383 struct device *hwmon_dev; 384 u32 vid; 385 int ret; 386 387 if (!i2c_check_functionality(client->adapter, 388 I2C_FUNC_SMBUS_BLOCK_DATA | 389 I2C_FUNC_SMBUS_PEC)) 390 return -ENODEV; 391 392 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); 393 if (!data) 394 return -ENOMEM; 395 396 data->client = client; 397 398 /* All firmware register accesses are PEC-protected. */ 399 client->flags |= I2C_CLIENT_PEC; 400 401 i2c_set_clientdata(client, data); 402 403 /* 404 * Try SMBus first. If the chip is strapped to raw-I2C mode it 405 * will not respond to SMBus framing, so fall back to switching 406 * the host interface over raw I2C and retry. 407 */ 408 ret = kb9002_fw_read(data, KB9002_FW_REG_VID, &vid); 409 if (ret) { 410 dev_dbg(dev, "SMBus probe failed (%d), trying raw-I2C host-interface switch\n", 411 ret); 412 ret = kb9002_enable_smbus_target(data); 413 if (ret) 414 return ret; 415 ret = kb9002_fw_read(data, KB9002_FW_REG_VID, &vid); 416 if (ret) 417 return dev_err_probe(dev, ret, 418 "VID read failed after host-interface switch\n"); 419 } 420 if (FIELD_GET(KB9002_VID_MASK, vid) != KB9002_VID_KANDOU) 421 return dev_err_probe(dev, -ENODEV, 422 "unexpected VID 0x%08x\n", vid); 423 424 hwmon_dev = devm_hwmon_device_register_with_info(dev, KB9002_DEV_NAME, 425 data, 426 &kb9002_chip_info, 427 NULL); 428 if (IS_ERR(hwmon_dev)) 429 return PTR_ERR(hwmon_dev); 430 431 data->hwmon_dev = hwmon_dev; 432 kb9002_debugfs_init(data); 433 return 0; 434 } 435 436 static const struct i2c_device_id kb9002_id[] = { 437 { .name = KB9002_DEV_NAME }, 438 { } 439 }; 440 MODULE_DEVICE_TABLE(i2c, kb9002_id); 441 442 static const struct of_device_id kb9002_of_match[] = { 443 { .compatible = "kandou,kb9002" }, 444 { } 445 }; 446 MODULE_DEVICE_TABLE(of, kb9002_of_match); 447 448 static struct i2c_driver kb9002_driver = { 449 .driver = { 450 .name = KB9002_DEV_NAME, 451 .of_match_table = kb9002_of_match, 452 }, 453 .probe = kb9002_probe, 454 .id_table = kb9002_id, 455 }; 456 module_i2c_driver(kb9002_driver); 457 458 MODULE_AUTHOR("Andy Chung <andy.chung@amd.com>"); 459 MODULE_DESCRIPTION("Kandou KB9002 PCIe retimer hwmon driver"); 460 MODULE_LICENSE("GPL"); 461