1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * PCI <-> OF mapping helpers 4 * 5 * Copyright 2011 IBM Corp. 6 */ 7 #define pr_fmt(fmt) "PCI: OF: " fmt 8 9 #include <linux/cleanup.h> 10 #include <linux/gpio/consumer.h> 11 #include <linux/irqdomain.h> 12 #include <linux/kernel.h> 13 #include <linux/pci.h> 14 #include <linux/of.h> 15 #include <linux/of_irq.h> 16 #include <linux/of_address.h> 17 #include <linux/of_pci.h> 18 #include <linux/platform_device.h> 19 #include <linux/pm_wakeirq.h> 20 #include "pci.h" 21 22 #ifdef CONFIG_PCI 23 /** 24 * pci_set_of_node - Find and set device's DT device_node 25 * @dev: the PCI device structure to fill 26 * 27 * Returns 0 on success with of_node set or when no device is described in the 28 * DT. Returns -ENODEV if the device is present, but disabled in the DT. 29 */ 30 int pci_set_of_node(struct pci_dev *dev) 31 { 32 if (!dev->bus->dev.of_node) 33 return 0; 34 35 struct device_node *node __free(device_node) = 36 of_pci_find_child_device(dev->bus->dev.of_node, dev->devfn); 37 if (!node) 38 return 0; 39 40 struct device *pdev __free(put_device) = 41 bus_find_device_by_of_node(&platform_bus_type, node); 42 if (pdev) 43 dev_set_of_node_reused(&dev->bus->dev); 44 45 device_set_node(&dev->dev, of_fwnode_handle(no_free_ptr(node))); 46 return 0; 47 } 48 49 void pci_release_of_node(struct pci_dev *dev) 50 { 51 of_node_put(dev->dev.of_node); 52 device_set_node(&dev->dev, NULL); 53 } 54 55 void pci_set_bus_of_node(struct pci_bus *bus) 56 { 57 struct device_node *node; 58 59 if (bus->self == NULL) { 60 node = pcibios_get_phb_of_node(bus); 61 } else { 62 node = of_node_get(bus->self->dev.of_node); 63 if (node && of_property_read_bool(node, "external-facing")) 64 bus->self->external_facing = true; 65 } 66 67 device_set_node(&bus->dev, of_fwnode_handle(node)); 68 } 69 70 void pci_release_bus_of_node(struct pci_bus *bus) 71 { 72 of_node_put(bus->dev.of_node); 73 device_set_node(&bus->dev, NULL); 74 } 75 76 struct device_node * __weak pcibios_get_phb_of_node(struct pci_bus *bus) 77 { 78 /* This should only be called for PHBs */ 79 if (WARN_ON(bus->self || bus->parent)) 80 return NULL; 81 82 /* 83 * Look for a node pointer in either the intermediary device we 84 * create above the root bus or its own parent. Normally only 85 * the later is populated. 86 */ 87 if (bus->bridge->of_node) 88 return of_node_get(bus->bridge->of_node); 89 if (bus->bridge->parent && bus->bridge->parent->of_node) 90 return of_node_get(bus->bridge->parent->of_node); 91 return NULL; 92 } 93 94 struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus) 95 { 96 #ifdef CONFIG_IRQ_DOMAIN 97 struct irq_domain *d; 98 99 if (!bus->dev.of_node) 100 return NULL; 101 102 /* Start looking for a phandle to an MSI controller. */ 103 d = of_msi_get_domain(&bus->dev, bus->dev.of_node, DOMAIN_BUS_PCI_MSI); 104 if (d) 105 return d; 106 107 /* 108 * If we don't have an msi-parent property, look for a domain 109 * directly attached to the host bridge. 110 */ 111 d = irq_find_matching_host(bus->dev.of_node, DOMAIN_BUS_PCI_MSI); 112 if (d) 113 return d; 114 115 return irq_find_host(bus->dev.of_node); 116 #else 117 return NULL; 118 #endif 119 } 120 121 bool pci_host_of_has_msi_map(struct device *dev) 122 { 123 if (dev && dev->of_node) 124 return of_get_property(dev->of_node, "msi-map", NULL); 125 return false; 126 } 127 128 static inline int __of_pci_pci_compare(struct device_node *node, 129 unsigned int data) 130 { 131 int devfn; 132 133 devfn = of_pci_get_devfn(node); 134 if (devfn < 0) 135 return 0; 136 137 return devfn == data; 138 } 139 140 struct device_node *of_pci_find_child_device(struct device_node *parent, 141 unsigned int devfn) 142 { 143 struct device_node *node, *node2; 144 145 for_each_child_of_node(parent, node) { 146 if (__of_pci_pci_compare(node, devfn)) 147 return node; 148 /* 149 * Some OFs create a parent node "multifunc-device" as 150 * a fake root for all functions of a multi-function 151 * device we go down them as well. 152 */ 153 if (of_node_name_eq(node, "multifunc-device")) { 154 for_each_child_of_node(node, node2) { 155 if (__of_pci_pci_compare(node2, devfn)) { 156 of_node_put(node); 157 return node2; 158 } 159 } 160 } 161 } 162 return NULL; 163 } 164 EXPORT_SYMBOL_GPL(of_pci_find_child_device); 165 166 /** 167 * of_pci_get_devfn() - Get device and function numbers for a device node 168 * @np: device node 169 * 170 * Parses a standard 5-cell PCI resource and returns an 8-bit value that can 171 * be passed to the PCI_SLOT() and PCI_FUNC() macros to extract the device 172 * and function numbers respectively. On error a negative error code is 173 * returned. 174 */ 175 int of_pci_get_devfn(struct device_node *np) 176 { 177 u32 reg[5]; 178 int error; 179 180 error = of_property_read_u32_array(np, "reg", reg, ARRAY_SIZE(reg)); 181 if (error) 182 return error; 183 184 return (reg[0] >> 8) & 0xff; 185 } 186 EXPORT_SYMBOL_GPL(of_pci_get_devfn); 187 188 /** 189 * of_pci_parse_bus_range() - parse the bus-range property of a PCI device 190 * @node: device node 191 * @res: address to a struct resource to return the bus-range 192 * 193 * Returns 0 on success or a negative error-code on failure. 194 */ 195 static int of_pci_parse_bus_range(struct device_node *node, 196 struct resource *res) 197 { 198 u32 bus_range[2]; 199 int error; 200 201 error = of_property_read_u32_array(node, "bus-range", bus_range, 202 ARRAY_SIZE(bus_range)); 203 if (error) 204 return error; 205 206 res->name = node->name; 207 res->start = bus_range[0]; 208 res->end = bus_range[1]; 209 res->flags = IORESOURCE_BUS; 210 211 return 0; 212 } 213 214 /** 215 * of_get_pci_domain_nr - Find the host bridge domain number 216 * of the given device node. 217 * @node: Device tree node with the domain information. 218 * 219 * This function will try to obtain the host bridge domain number by finding 220 * a property called "linux,pci-domain" of the given device node. 221 * 222 * Return: 223 * * > 0 - On success, an associated domain number. 224 * * -EINVAL - The property "linux,pci-domain" does not exist. 225 * * -ENODATA - The linux,pci-domain" property does not have value. 226 * * -EOVERFLOW - Invalid "linux,pci-domain" property value. 227 * 228 * Returns the associated domain number from DT in the range [0-0xffff], or 229 * a negative value if the required property is not found. 230 */ 231 int of_get_pci_domain_nr(struct device_node *node) 232 { 233 u32 domain; 234 int error; 235 236 error = of_property_read_u32(node, "linux,pci-domain", &domain); 237 if (error) 238 return error; 239 240 return (u16)domain; 241 } 242 EXPORT_SYMBOL_GPL(of_get_pci_domain_nr); 243 244 /** 245 * of_pci_preserve_config - Return true if the boot configuration needs to 246 * be preserved 247 * @node: Device tree node. 248 * 249 * Look for "linux,pci-probe-only" property for a given PCI controller's 250 * node and return true if found. Also look in the chosen node if the 251 * property is not found in the given controller's node. Having this 252 * property ensures that the kernel doesn't reconfigure the BARs and bridge 253 * windows that are already done by the platform firmware. 254 * 255 * Return: true if the property exists; false otherwise. 256 */ 257 bool of_pci_preserve_config(struct device_node *node) 258 { 259 u32 val = 0; 260 int ret; 261 262 if (!node) { 263 pr_warn("device node is NULL, trying with of_chosen\n"); 264 node = of_chosen; 265 } 266 267 retry: 268 ret = of_property_read_u32(node, "linux,pci-probe-only", &val); 269 if (ret) { 270 if (ret == -ENODATA || ret == -EOVERFLOW) { 271 pr_warn("Incorrect value for linux,pci-probe-only in %pOF, ignoring\n", 272 node); 273 return false; 274 } 275 if (ret == -EINVAL) { 276 if (node == of_chosen) 277 return false; 278 279 node = of_chosen; 280 goto retry; 281 } 282 } 283 284 if (val) 285 return true; 286 else 287 return false; 288 } 289 290 /** 291 * of_pci_check_probe_only - Setup probe only mode if linux,pci-probe-only 292 * is present and valid 293 */ 294 void of_pci_check_probe_only(void) 295 { 296 if (of_pci_preserve_config(of_chosen)) 297 pci_add_flags(PCI_PROBE_ONLY); 298 else 299 pci_clear_flags(PCI_PROBE_ONLY); 300 } 301 EXPORT_SYMBOL_GPL(of_pci_check_probe_only); 302 303 /** 304 * devm_of_pci_get_host_bridge_resources() - Resource-managed parsing of PCI 305 * host bridge resources from DT 306 * @dev: host bridge device 307 * @resources: list where the range of resources will be added after DT parsing 308 * @ib_resources: list where the range of inbound resources (with addresses 309 * from 'dma-ranges') will be added after DT parsing 310 * @io_base: pointer to a variable that will contain on return the physical 311 * address for the start of the I/O range. Can be NULL if the caller doesn't 312 * expect I/O ranges to be present in the device tree. 313 * 314 * This function will parse the "ranges" property of a PCI host bridge device 315 * node and setup the resource mapping based on its content. It is expected 316 * that the property conforms with the Power ePAPR document. 317 * 318 * It returns zero if the range parsing has been successful or a standard error 319 * value if it failed. 320 */ 321 static int devm_of_pci_get_host_bridge_resources(struct device *dev, 322 struct list_head *resources, 323 struct list_head *ib_resources, 324 resource_size_t *io_base) 325 { 326 struct device_node *dev_node = dev->of_node; 327 struct resource *res, tmp_res; 328 struct resource *bus_range; 329 struct of_pci_range range; 330 struct of_pci_range_parser parser; 331 const char *range_type; 332 int err; 333 334 if (io_base) 335 *io_base = (resource_size_t)OF_BAD_ADDR; 336 337 bus_range = devm_kzalloc(dev, sizeof(*bus_range), GFP_KERNEL); 338 if (!bus_range) 339 return -ENOMEM; 340 341 dev_info(dev, "host bridge %pOF ranges:\n", dev_node); 342 343 err = of_pci_parse_bus_range(dev_node, bus_range); 344 if (err) { 345 bus_range->start = 0; 346 bus_range->end = 0xff; 347 bus_range->flags = IORESOURCE_BUS; 348 } else { 349 if (bus_range->end > 0xff) { 350 dev_warn(dev, " Invalid end bus number in %pR, defaulting to 0xff\n", 351 bus_range); 352 bus_range->end = 0xff; 353 } 354 } 355 pci_add_resource(resources, bus_range); 356 357 /* Check for ranges property */ 358 err = of_pci_range_parser_init(&parser, dev_node); 359 if (err) 360 return 0; 361 362 dev_dbg(dev, "Parsing ranges property...\n"); 363 for_each_of_pci_range(&parser, &range) { 364 /* Read next ranges element */ 365 if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO) 366 range_type = "IO"; 367 else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM) 368 range_type = "MEM"; 369 else 370 range_type = "err"; 371 dev_info(dev, " %6s %#012llx..%#012llx -> %#012llx\n", 372 range_type, range.cpu_addr, 373 range.cpu_addr + range.size - 1, range.pci_addr); 374 375 /* 376 * If we failed translation or got a zero-sized region 377 * then skip this range 378 */ 379 if (range.cpu_addr == OF_BAD_ADDR || range.size == 0) 380 continue; 381 382 err = of_pci_range_to_resource(&range, dev_node, &tmp_res); 383 if (err) 384 continue; 385 386 res = devm_kmemdup(dev, &tmp_res, sizeof(tmp_res), GFP_KERNEL); 387 if (!res) { 388 err = -ENOMEM; 389 goto failed; 390 } 391 392 if (resource_type(res) == IORESOURCE_IO) { 393 if (!io_base) { 394 dev_err(dev, "I/O range found for %pOF. Please provide an io_base pointer to save CPU base address\n", 395 dev_node); 396 err = -EINVAL; 397 goto failed; 398 } 399 if (*io_base != (resource_size_t)OF_BAD_ADDR) 400 dev_warn(dev, "More than one I/O resource converted for %pOF. CPU base address for old range lost!\n", 401 dev_node); 402 *io_base = range.cpu_addr; 403 } else if (resource_type(res) == IORESOURCE_MEM) { 404 res->flags &= ~IORESOURCE_MEM_64; 405 } 406 407 pci_add_resource_offset(resources, res, res->start - range.pci_addr); 408 } 409 410 /* Check for dma-ranges property */ 411 if (!ib_resources) 412 return 0; 413 err = of_pci_dma_range_parser_init(&parser, dev_node); 414 if (err) 415 return 0; 416 417 dev_dbg(dev, "Parsing dma-ranges property...\n"); 418 for_each_of_pci_range(&parser, &range) { 419 /* 420 * If we failed translation or got a zero-sized region 421 * then skip this range 422 */ 423 if (((range.flags & IORESOURCE_TYPE_BITS) != IORESOURCE_MEM) || 424 range.cpu_addr == OF_BAD_ADDR || range.size == 0) 425 continue; 426 427 dev_info(dev, " %6s %#012llx..%#012llx -> %#012llx\n", 428 "IB MEM", range.cpu_addr, 429 range.cpu_addr + range.size - 1, range.pci_addr); 430 431 432 err = of_pci_range_to_resource(&range, dev_node, &tmp_res); 433 if (err) 434 continue; 435 436 res = devm_kmemdup(dev, &tmp_res, sizeof(tmp_res), GFP_KERNEL); 437 if (!res) { 438 err = -ENOMEM; 439 goto failed; 440 } 441 442 pci_add_resource_offset(ib_resources, res, 443 res->start - range.pci_addr); 444 } 445 446 return 0; 447 448 failed: 449 pci_free_resource_list(resources); 450 return err; 451 } 452 453 #if IS_ENABLED(CONFIG_OF_IRQ) 454 /** 455 * of_irq_parse_pci - Resolve the interrupt for a PCI device 456 * @pdev: the device whose interrupt is to be resolved 457 * @out_irq: structure of_phandle_args filled by this function 458 * 459 * This function resolves the PCI interrupt for a given PCI device. If a 460 * device node exists for a given pci_dev, it will use normal OF tree 461 * walking. If not, it will implement standard swizzling and walk up the 462 * PCI tree until a device node is found, at which point it will finish 463 * resolving using the OF tree walking. 464 */ 465 static int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq) 466 { 467 struct device_node *dn, *ppnode = NULL; 468 struct pci_dev *ppdev; 469 __be32 laddr[3]; 470 u8 pin; 471 int rc; 472 473 /* 474 * Check if we have a device node, if yes, fallback to standard 475 * device tree parsing 476 */ 477 dn = pci_device_to_OF_node(pdev); 478 if (dn) { 479 rc = of_irq_parse_one(dn, 0, out_irq); 480 if (!rc) 481 return rc; 482 } 483 484 /* 485 * Ok, we don't, time to have fun. Let's start by building up an 486 * interrupt spec. we assume #interrupt-cells is 1, which is standard 487 * for PCI. If you do different, then don't use that routine. 488 */ 489 rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin); 490 if (rc != 0) 491 goto err; 492 /* No pin, exit with no error message. */ 493 if (pin == 0) 494 return -ENODEV; 495 496 /* Local interrupt-map in the device node? Use it! */ 497 if (of_property_present(dn, "interrupt-map")) { 498 pin = pci_swizzle_interrupt_pin(pdev, pin); 499 ppnode = dn; 500 } 501 502 /* Now we walk up the PCI tree */ 503 while (!ppnode) { 504 /* Get the pci_dev of our parent */ 505 ppdev = pdev->bus->self; 506 507 /* Ouch, it's a host bridge... */ 508 if (ppdev == NULL) { 509 ppnode = pci_bus_to_OF_node(pdev->bus); 510 511 /* No node for host bridge ? give up */ 512 if (ppnode == NULL) { 513 rc = -EINVAL; 514 goto err; 515 } 516 } else { 517 /* We found a P2P bridge, check if it has a node */ 518 ppnode = pci_device_to_OF_node(ppdev); 519 } 520 521 /* 522 * Ok, we have found a parent with a device node, hand over to 523 * the OF parsing code. 524 * 525 * We build a unit address from the linux device to be used for 526 * resolution. Note that we use the linux bus number which may 527 * not match your firmware bus numbering. 528 * 529 * Fortunately, in most cases, interrupt-map-mask doesn't 530 * include the bus number as part of the matching. 531 * 532 * You should still be careful about that though if you intend 533 * to rely on this function (you ship a firmware that doesn't 534 * create device nodes for all PCI devices). 535 */ 536 if (ppnode) 537 break; 538 539 /* 540 * We can only get here if we hit a P2P bridge with no node; 541 * let's do standard swizzling and try again 542 */ 543 pin = pci_swizzle_interrupt_pin(pdev, pin); 544 pdev = ppdev; 545 } 546 547 out_irq->np = ppnode; 548 out_irq->args_count = 1; 549 out_irq->args[0] = pin; 550 laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8)); 551 laddr[1] = laddr[2] = cpu_to_be32(0); 552 rc = of_irq_parse_raw(laddr, out_irq); 553 if (rc) 554 goto err; 555 return 0; 556 err: 557 if (rc == -ENOENT) { 558 dev_warn(&pdev->dev, 559 "%s: no interrupt-map found, INTx interrupts not available\n", 560 __func__); 561 pr_warn_once("%s: possibly some PCI slots don't have level triggered interrupts capability\n", 562 __func__); 563 } else { 564 dev_err(&pdev->dev, "%s: failed with rc=%d\n", __func__, rc); 565 } 566 return rc; 567 } 568 569 /** 570 * of_irq_parse_and_map_pci() - Decode a PCI IRQ from the device tree and map to a VIRQ 571 * @dev: The PCI device needing an IRQ 572 * @slot: PCI slot number; passed when used as map_irq callback. Unused 573 * @pin: PCI IRQ pin number; passed when used as map_irq callback. Unused 574 * 575 * @slot and @pin are unused, but included in the function so that this 576 * function can be used directly as the map_irq callback to 577 * pci_assign_irq() and struct pci_host_bridge.map_irq pointer 578 */ 579 int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin) 580 { 581 struct of_phandle_args oirq; 582 int ret; 583 584 ret = of_irq_parse_pci(dev, &oirq); 585 if (ret) 586 return 0; /* Proper return code 0 == NO_IRQ */ 587 588 return irq_create_of_mapping(&oirq); 589 } 590 EXPORT_SYMBOL_GPL(of_irq_parse_and_map_pci); 591 592 static void pci_configure_wake_irq(struct pci_dev *pdev, struct gpio_desc *wake) 593 { 594 int ret, wake_irq, irq_type; 595 596 wake_irq = gpiod_to_irq(wake); 597 if (wake_irq < 0) { 598 pci_err(pdev, "Failed to get wake IRQ: %d\n", wake_irq); 599 return; 600 } 601 602 /* 603 * dev_pm_set_dedicated_wake_irq() associates a wakeup IRQ with the 604 * device and requests it, but the PM core keeps it disabled by 605 * default. The IRQ is enabled only when the device is allowed to 606 * wake the system (during system suspend and after runtime 607 * suspend), and only if device wakeup is enabled. 608 * 609 * When the wake IRQ fires, the wakeirq handler invokes 610 * pm_runtime_resume() to bring the device back to an active power 611 * state (e.g. from D3cold to D0). Once the device is active and 612 * the link is usable, the endpoint may signal a PME, which is then 613 * handled by the PCI core (either via PME polling or the PCIe PME 614 * service driver) to wakeup the particular endpoint. 615 */ 616 ret = dev_pm_set_dedicated_wake_irq(&pdev->dev, wake_irq); 617 if (ret < 0) { 618 pci_err(pdev, "Failed to set WAKE# IRQ: %d\n", ret); 619 return; 620 } 621 622 irq_type = gpiod_is_active_low(wake) ? IRQ_TYPE_LEVEL_LOW : 623 IRQ_TYPE_LEVEL_HIGH; 624 ret = irq_set_irq_type(wake_irq, irq_type); 625 if (ret < 0) { 626 dev_pm_clear_wake_irq(&pdev->dev); 627 pci_err(pdev, "Failed to set irq_type: %d\n", ret); 628 return; 629 } 630 631 device_init_wakeup(&pdev->dev, true); 632 } 633 634 void pci_configure_of_wake_gpio(struct pci_dev *dev) 635 { 636 struct device_node *dn = pci_device_to_OF_node(dev); 637 struct gpio_desc *gpio; 638 639 if (!dn && !dev->wake) 640 return; 641 /* 642 * fwnode_gpiod_get() may fail with -EBUSY (e.g. shared WAKE#), but 643 * the actual WAKE# trigger from the device would still work and 644 * the host controller driver will enable power to the topology. 645 * 646 * -EPROBE_DEFER cannot be propagated here since pci_device_add() 647 * has no retry mechanism. 648 */ 649 gpio = fwnode_gpiod_get(of_fwnode_handle(dn), "wake", GPIOD_IN, NULL); 650 if (!IS_ERR(gpio)) { 651 dev->wake = gpio; 652 pci_configure_wake_irq(dev, gpio); 653 } 654 } 655 656 void pci_remove_of_wake_gpio(struct pci_dev *dev) 657 { 658 struct device_node *dn = pci_device_to_OF_node(dev); 659 660 if (!dn) 661 return; 662 663 device_init_wakeup(&dev->dev, false); 664 dev_pm_clear_wake_irq(&dev->dev); 665 gpiod_put(dev->wake); 666 dev->wake = NULL; 667 } 668 #endif /* CONFIG_OF_IRQ */ 669 670 static int pci_parse_request_of_pci_ranges(struct device *dev, 671 struct pci_host_bridge *bridge) 672 { 673 int err, res_valid = 0; 674 resource_size_t iobase; 675 struct resource_entry *win, *tmp; 676 677 INIT_LIST_HEAD(&bridge->windows); 678 INIT_LIST_HEAD(&bridge->dma_ranges); 679 680 err = devm_of_pci_get_host_bridge_resources(dev, &bridge->windows, 681 &bridge->dma_ranges, &iobase); 682 if (err) 683 return err; 684 685 err = devm_request_pci_bus_resources(dev, &bridge->windows); 686 if (err) 687 return err; 688 689 resource_list_for_each_entry_safe(win, tmp, &bridge->windows) { 690 struct resource *res = win->res; 691 692 switch (resource_type(res)) { 693 case IORESOURCE_IO: 694 err = devm_pci_remap_iospace(dev, res, iobase); 695 if (err) { 696 dev_warn(dev, "error %d: failed to map resource %pR\n", 697 err, res); 698 resource_list_destroy_entry(win); 699 } 700 break; 701 case IORESOURCE_MEM: 702 res_valid |= !(res->flags & IORESOURCE_PREFETCH); 703 704 if (!(res->flags & IORESOURCE_PREFETCH)) 705 if (upper_32_bits(resource_size(res))) 706 dev_warn(dev, "Memory resource size exceeds max for 32 bits\n"); 707 708 break; 709 } 710 } 711 712 if (!res_valid) 713 dev_warn(dev, "non-prefetchable memory resource required\n"); 714 715 return 0; 716 } 717 718 int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *bridge) 719 { 720 if (!dev->of_node) 721 return 0; 722 723 bridge->swizzle_irq = pci_common_swizzle; 724 bridge->map_irq = of_irq_parse_and_map_pci; 725 726 return pci_parse_request_of_pci_ranges(dev, bridge); 727 } 728 729 #ifdef CONFIG_PCI_DYNAMIC_OF_NODES 730 731 void of_pci_remove_node(struct pci_dev *pdev) 732 { 733 struct device_node *np; 734 735 np = pci_device_to_OF_node(pdev); 736 if (!np || !of_node_check_flag(np, OF_DYNAMIC)) 737 return; 738 739 device_remove_of_node(&pdev->dev); 740 of_changeset_revert(np->data); 741 of_changeset_destroy(np->data); 742 of_node_put(np); 743 } 744 745 void of_pci_make_dev_node(struct pci_dev *pdev) 746 { 747 struct device_node *ppnode, *np = NULL; 748 const char *pci_type; 749 struct of_changeset *cset; 750 const char *name; 751 int ret; 752 753 /* 754 * If there is already a device tree node linked to this device, 755 * return immediately. 756 */ 757 if (pci_device_to_OF_node(pdev)) 758 return; 759 760 /* Check if there is device tree node for parent device */ 761 if (!pdev->bus->self) 762 ppnode = pdev->bus->dev.of_node; 763 else 764 ppnode = pdev->bus->self->dev.of_node; 765 if (!ppnode) 766 return; 767 768 if (pci_is_bridge(pdev)) 769 pci_type = "pci"; 770 else 771 pci_type = "dev"; 772 773 name = kasprintf(GFP_KERNEL, "%s@%x,%x", pci_type, 774 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); 775 if (!name) 776 return; 777 778 cset = kmalloc_obj(*cset); 779 if (!cset) 780 goto out_free_name; 781 of_changeset_init(cset); 782 783 np = of_changeset_create_node(cset, ppnode, name); 784 if (!np) 785 goto out_destroy_cset; 786 787 ret = of_pci_add_properties(pdev, cset, np); 788 if (ret) 789 goto out_free_node; 790 791 ret = of_changeset_apply(cset); 792 if (ret) 793 goto out_free_node; 794 795 np->data = cset; 796 797 ret = device_add_of_node(&pdev->dev, np); 798 if (ret) 799 goto out_revert_cset; 800 801 kfree(name); 802 803 return; 804 805 out_revert_cset: 806 np->data = NULL; 807 of_changeset_revert(cset); 808 out_free_node: 809 of_node_put(np); 810 out_destroy_cset: 811 of_changeset_destroy(cset); 812 kfree(cset); 813 out_free_name: 814 kfree(name); 815 } 816 817 void of_pci_remove_host_bridge_node(struct pci_host_bridge *bridge) 818 { 819 struct device_node *np; 820 821 np = pci_bus_to_OF_node(bridge->bus); 822 if (!np || !of_node_check_flag(np, OF_DYNAMIC)) 823 return; 824 825 device_remove_of_node(&bridge->bus->dev); 826 device_remove_of_node(&bridge->dev); 827 of_changeset_revert(np->data); 828 of_changeset_destroy(np->data); 829 of_node_put(np); 830 } 831 832 void of_pci_make_host_bridge_node(struct pci_host_bridge *bridge) 833 { 834 struct device_node *np = NULL; 835 struct of_changeset *cset; 836 const char *name; 837 int ret; 838 839 /* 840 * If there is already a device tree node linked to the PCI bus handled 841 * by this bridge (i.e. the PCI root bus), nothing to do. 842 */ 843 if (pci_bus_to_OF_node(bridge->bus)) 844 return; 845 846 /* 847 * The root bus has no node. Check that the host bridge has no node 848 * too 849 */ 850 if (bridge->dev.of_node) { 851 dev_err(&bridge->dev, "PCI host bridge of_node already set"); 852 return; 853 } 854 855 /* Check if there is a DT root node to attach the created node */ 856 if (!of_root) { 857 pr_debug("of_root node is NULL, cannot create PCI host bridge node\n"); 858 return; 859 } 860 861 name = kasprintf(GFP_KERNEL, "pci@%x,%x", pci_domain_nr(bridge->bus), 862 bridge->bus->number); 863 if (!name) 864 return; 865 866 cset = kmalloc_obj(*cset); 867 if (!cset) 868 goto out_free_name; 869 of_changeset_init(cset); 870 871 np = of_changeset_create_node(cset, of_root, name); 872 if (!np) 873 goto out_destroy_cset; 874 875 ret = of_pci_add_host_bridge_properties(bridge, cset, np); 876 if (ret) 877 goto out_free_node; 878 879 /* 880 * This of_node will be added to an existing device. The of_node parent 881 * is the root OF node and so this node will be handled by the platform 882 * bus. Avoid any new device creation. 883 */ 884 of_node_set_flag(np, OF_POPULATED); 885 np->fwnode.dev = &bridge->dev; 886 fwnode_dev_initialized(&np->fwnode, true); 887 888 ret = of_changeset_apply(cset); 889 if (ret) 890 goto out_free_node; 891 892 np->data = cset; 893 894 /* Add the of_node to host bridge and the root bus */ 895 ret = device_add_of_node(&bridge->dev, np); 896 if (ret) 897 goto out_revert_cset; 898 899 ret = device_add_of_node(&bridge->bus->dev, np); 900 if (ret) 901 goto out_remove_bridge_dev_of_node; 902 903 kfree(name); 904 905 return; 906 907 out_remove_bridge_dev_of_node: 908 device_remove_of_node(&bridge->dev); 909 out_revert_cset: 910 np->data = NULL; 911 of_changeset_revert(cset); 912 out_free_node: 913 of_node_put(np); 914 out_destroy_cset: 915 of_changeset_destroy(cset); 916 kfree(cset); 917 out_free_name: 918 kfree(name); 919 } 920 921 #endif /* CONFIG_PCI_DYNAMIC_OF_NODES */ 922 923 /** 924 * of_pci_supply_present() - Check if the power supply is present for the PCI 925 * device 926 * @np: Device tree node 927 * 928 * Check if the power supply for the PCI device is present in the device tree 929 * node or not. 930 * 931 * Return: true if at least one power supply exists; false otherwise. 932 */ 933 bool of_pci_supply_present(struct device_node *np) 934 { 935 struct property *prop; 936 char *supply; 937 938 if (!np) 939 return false; 940 941 for_each_property_of_node(np, prop) { 942 supply = strrchr(prop->name, '-'); 943 if (supply && !strcmp(supply, "-supply")) 944 return true; 945 } 946 947 return false; 948 } 949 EXPORT_SYMBOL_GPL(of_pci_supply_present); 950 951 #endif /* CONFIG_PCI */ 952 953 /** 954 * of_pci_get_max_link_speed - Find the maximum link speed of the given device node. 955 * @node: Device tree node with the maximum link speed information. 956 * 957 * This function will try to read the "max-link-speed" property of the given 958 * device tree node. It does NOT validate the value of the property. 959 * 960 * Return: Maximum link speed value on success, errno on failure. 961 */ 962 int of_pci_get_max_link_speed(struct device_node *node) 963 { 964 u32 max_link_speed; 965 int ret; 966 967 ret = of_property_read_u32(node, "max-link-speed", &max_link_speed); 968 if (ret) 969 return ret; 970 971 return max_link_speed; 972 } 973 EXPORT_SYMBOL_GPL(of_pci_get_max_link_speed); 974 975 /** 976 * of_pci_get_slot_power_limit - Parses the "slot-power-limit-milliwatt" 977 * property. 978 * 979 * @node: device tree node with the slot power limit information 980 * @slot_power_limit_value: pointer where the value should be stored in PCIe 981 * Slot Capabilities Register format 982 * @slot_power_limit_scale: pointer where the scale should be stored in PCIe 983 * Slot Capabilities Register format 984 * 985 * Returns the slot power limit in milliwatts and if @slot_power_limit_value 986 * and @slot_power_limit_scale pointers are non-NULL, fills in the value and 987 * scale in format used by PCIe Slot Capabilities Register. 988 * 989 * If the property is not found or is invalid, returns 0. 990 */ 991 u32 of_pci_get_slot_power_limit(struct device_node *node, 992 u8 *slot_power_limit_value, 993 u8 *slot_power_limit_scale) 994 { 995 u32 slot_power_limit_mw; 996 u8 value, scale; 997 998 if (of_property_read_u32(node, "slot-power-limit-milliwatt", 999 &slot_power_limit_mw)) 1000 slot_power_limit_mw = 0; 1001 1002 /* Calculate Slot Power Limit Value and Slot Power Limit Scale */ 1003 if (slot_power_limit_mw == 0) { 1004 value = 0x00; 1005 scale = 0; 1006 } else if (slot_power_limit_mw <= 255) { 1007 value = slot_power_limit_mw; 1008 scale = 3; 1009 } else if (slot_power_limit_mw <= 255*10) { 1010 value = slot_power_limit_mw / 10; 1011 scale = 2; 1012 slot_power_limit_mw = slot_power_limit_mw / 10 * 10; 1013 } else if (slot_power_limit_mw <= 255*100) { 1014 value = slot_power_limit_mw / 100; 1015 scale = 1; 1016 slot_power_limit_mw = slot_power_limit_mw / 100 * 100; 1017 } else if (slot_power_limit_mw <= 239*1000) { 1018 value = slot_power_limit_mw / 1000; 1019 scale = 0; 1020 slot_power_limit_mw = slot_power_limit_mw / 1000 * 1000; 1021 } else if (slot_power_limit_mw < 250*1000) { 1022 value = 0xEF; 1023 scale = 0; 1024 slot_power_limit_mw = 239*1000; 1025 } else if (slot_power_limit_mw <= 600*1000) { 1026 value = 0xF0 + (slot_power_limit_mw / 1000 - 250) / 25; 1027 scale = 0; 1028 slot_power_limit_mw = slot_power_limit_mw / (1000*25) * (1000*25); 1029 } else { 1030 value = 0xFE; 1031 scale = 0; 1032 slot_power_limit_mw = 600*1000; 1033 } 1034 1035 if (slot_power_limit_value) 1036 *slot_power_limit_value = value; 1037 1038 if (slot_power_limit_scale) 1039 *slot_power_limit_scale = scale; 1040 1041 return slot_power_limit_mw; 1042 } 1043 EXPORT_SYMBOL_GPL(of_pci_get_slot_power_limit); 1044 1045 /** 1046 * of_pci_get_equalization_presets - Parses the "eq-presets-Ngts" property. 1047 * 1048 * @dev: Device containing the properties. 1049 * @presets: Pointer to store the parsed data. 1050 * @num_lanes: Maximum number of lanes supported. 1051 * 1052 * If the property is present, read and store the data in the @presets structure. 1053 * Else, assign a default value of PCI_EQ_RESV. 1054 * 1055 * Return: 0 if the property is not available or successfully parsed else 1056 * errno otherwise. 1057 */ 1058 int of_pci_get_equalization_presets(struct device *dev, 1059 struct pci_eq_presets *presets, 1060 int num_lanes) 1061 { 1062 char name[20]; 1063 int ret; 1064 1065 presets->eq_presets_8gts[0] = PCI_EQ_RESV; 1066 ret = of_property_read_u16_array(dev->of_node, "eq-presets-8gts", 1067 presets->eq_presets_8gts, num_lanes); 1068 if (ret && ret != -EINVAL) { 1069 dev_err(dev, "Error reading eq-presets-8gts: %d\n", ret); 1070 return ret; 1071 } 1072 1073 for (int i = 0; i < EQ_PRESET_TYPE_MAX - 1; i++) { 1074 presets->eq_presets_Ngts[i][0] = PCI_EQ_RESV; 1075 snprintf(name, sizeof(name), "eq-presets-%dgts", 8 << (i + 1)); 1076 ret = of_property_read_u8_array(dev->of_node, name, 1077 presets->eq_presets_Ngts[i], 1078 num_lanes); 1079 if (ret && ret != -EINVAL) { 1080 dev_err(dev, "Error reading %s: %d\n", name, ret); 1081 return ret; 1082 } 1083 } 1084 1085 return 0; 1086 } 1087 EXPORT_SYMBOL_GPL(of_pci_get_equalization_presets); 1088