1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * APDS-9306/APDS-9306-065 Ambient Light Sensor 4 * I2C Address: 0x52 5 * Datasheet: https://docs.broadcom.com/doc/AV02-4755EN 6 * 7 * Copyright (C) 2024 Subhajit Ghosh <subhajit.ghosh@tweaklogic.com> 8 */ 9 10 #include <linux/bits.h> 11 #include <linux/cleanup.h> 12 #include <linux/delay.h> 13 #include <linux/err.h> 14 #include <linux/i2c.h> 15 #include <linux/interrupt.h> 16 #include <linux/minmax.h> 17 #include <linux/module.h> 18 #include <linux/mutex.h> 19 #include <linux/pm.h> 20 #include <linux/pm_runtime.h> 21 #include <linux/regmap.h> 22 #include <linux/regulator/consumer.h> 23 #include <linux/types.h> 24 #include <linux/units.h> 25 26 #include <linux/iio/iio.h> 27 #include <linux/iio/iio-gts-helper.h> 28 #include <linux/iio/events.h> 29 #include <linux/iio/sysfs.h> 30 31 #include <linux/unaligned.h> 32 33 #define APDS9306_MAIN_CTRL_REG 0x00 34 #define APDS9306_ALS_MEAS_RATE_REG 0x04 35 #define APDS9306_ALS_GAIN_REG 0x05 36 #define APDS9306_PART_ID_REG 0x06 37 #define APDS9306_MAIN_STATUS_REG 0x07 38 #define APDS9306_CLEAR_DATA_0_REG 0x0A 39 #define APDS9306_CLEAR_DATA_1_REG 0x0B 40 #define APDS9306_CLEAR_DATA_2_REG 0x0C 41 #define APDS9306_ALS_DATA_0_REG 0x0D 42 #define APDS9306_ALS_DATA_1_REG 0x0E 43 #define APDS9306_ALS_DATA_2_REG 0x0F 44 #define APDS9306_INT_CFG_REG 0x19 45 #define APDS9306_INT_PERSISTENCE_REG 0x1A 46 #define APDS9306_ALS_THRES_UP_0_REG 0x21 47 #define APDS9306_ALS_THRES_UP_1_REG 0x22 48 #define APDS9306_ALS_THRES_UP_2_REG 0x23 49 #define APDS9306_ALS_THRES_LOW_0_REG 0x24 50 #define APDS9306_ALS_THRES_LOW_1_REG 0x25 51 #define APDS9306_ALS_THRES_LOW_2_REG 0x26 52 #define APDS9306_ALS_THRES_VAR_REG 0x27 53 54 #define APDS9306_ALS_INT_STAT_MASK BIT(4) 55 #define APDS9306_ALS_DATA_STAT_MASK BIT(3) 56 57 #define APDS9306_ALS_THRES_VAL_MAX (BIT(20) - 1) 58 #define APDS9306_ALS_THRES_VAR_NUM_VALS 8 59 #define APDS9306_ALS_PERSIST_NUM_VALS 16 60 #define APDS9306_ALS_READ_DATA_DELAY_US (20 * USEC_PER_MSEC) 61 #define APDS9306_NUM_REPEAT_RATES 7 62 #define APDS9306_INT_SRC_CLEAR 0 63 #define APDS9306_INT_SRC_ALS 1 64 #define APDS9306_SAMP_FREQ_10HZ 0 65 66 /** 67 * struct part_id_gts_multiplier - Part no. and corresponding gts multiplier 68 * 69 * GTS (Gain Time Scale) are helper functions for Light sensors which along 70 * with hardware gains also has gains associated with Integration times. 71 * 72 * There are two variants of the device with slightly different characteristics, 73 * they have same ADC count for different Lux levels as mentioned in the 74 * datasheet. This multiplier array is used to store the derived Lux per count 75 * value for the two variants to be used by the GTS helper functions. 76 * 77 * @part_id: Part ID of the device 78 * @max_scale_int: Multiplier for iio_init_iio_gts() 79 * @max_scale_nano: Multiplier for iio_init_iio_gts() 80 */ 81 struct part_id_gts_multiplier { 82 int part_id; 83 int max_scale_int; 84 int max_scale_nano; 85 }; 86 87 /* 88 * As per the datasheet, at HW Gain = 3x, Integration time 100mS (32x), 89 * typical 2000 ADC counts are observed for 49.8 uW per sq cm (340.134 lux) 90 * for apds9306 and 43 uW per sq cm (293.69 lux) for apds9306-065. 91 * Assuming lux per count is linear across all integration time ranges. 92 * 93 * Lux = (raw + offset) * scale; offset can be any value by userspace. 94 * HG = Hardware Gain; ITG = Gain by changing integration time. 95 * Scale table by IIO GTS Helpers = (1 / HG) * (1 / ITG) * Multiplier. 96 * 97 * The Lux values provided in the datasheet are at ITG=32x and HG=3x, 98 * at typical 2000 count for both variants of the device. 99 * 100 * Lux per ADC count at 3x and 32x for apds9306 = 340.134 / 2000 101 * Lux per ADC count at 3x and 32x for apds9306-065 = 293.69 / 2000 102 * 103 * The Multiplier for the scale table provided to userspace: 104 * IIO GTS scale Multiplier for apds9306 = (340.134 / 2000) * 32 * 3 = 16.326432 105 * and for apds9306-065 = (293.69 / 2000) * 32 * 3 = 14.09712 106 */ 107 static const struct part_id_gts_multiplier apds9306_gts_mul[] = { 108 { 109 .part_id = 0xB1, 110 .max_scale_int = 16, 111 .max_scale_nano = 326432000, 112 }, { 113 .part_id = 0xB3, 114 .max_scale_int = 14, 115 .max_scale_nano = 97120000, 116 }, 117 }; 118 119 static const int apds9306_repeat_rate_freq[APDS9306_NUM_REPEAT_RATES][2] = { 120 { 40, 0 }, 121 { 20, 0 }, 122 { 10, 0 }, 123 { 5, 0 }, 124 { 2, 0 }, 125 { 1, 0 }, 126 { 0, 500000 }, 127 }; 128 129 static const int apds9306_repeat_rate_period[APDS9306_NUM_REPEAT_RATES] = { 130 25000, 50000, 100000, 200000, 500000, 1000000, 2000000, 131 }; 132 133 /** 134 * struct apds9306_regfields - apds9306 regmap fields definitions 135 * 136 * @sw_reset: Software reset regfield 137 * @en: Enable regfield 138 * @intg_time: Resolution regfield 139 * @repeat_rate: Measurement Rate regfield 140 * @gain: Hardware gain regfield 141 * @int_src: Interrupt channel regfield 142 * @int_thresh_var_en: Interrupt variance threshold regfield 143 * @int_en: Interrupt enable regfield 144 * @int_persist_val: Interrupt persistence regfield 145 * @int_thresh_var_val: Interrupt threshold variance value regfield 146 */ 147 struct apds9306_regfields { 148 struct regmap_field *sw_reset; 149 struct regmap_field *en; 150 struct regmap_field *intg_time; 151 struct regmap_field *repeat_rate; 152 struct regmap_field *gain; 153 struct regmap_field *int_src; 154 struct regmap_field *int_thresh_var_en; 155 struct regmap_field *int_en; 156 struct regmap_field *int_persist_val; 157 struct regmap_field *int_thresh_var_val; 158 }; 159 160 /** 161 * struct apds9306_data - apds9306 private data and registers definitions 162 * 163 * @dev: Pointer to the device structure 164 * @gts: IIO Gain Time Scale structure 165 * @mutex: Lock for protecting adc reads, device settings changes where 166 * some calculations are required before or after setting or 167 * getting the raw settings values from regmap writes or reads 168 * respectively. 169 * @regmap: Regmap structure pointer 170 * @rf: Regmap register fields structure 171 * @read_data_available: Flag set by IRQ handler for ADC data available 172 */ 173 struct apds9306_data { 174 struct device *dev; 175 struct iio_gts gts; 176 177 struct mutex mutex; 178 179 struct regmap *regmap; 180 struct apds9306_regfields rf; 181 182 int read_data_available; 183 }; 184 185 /* 186 * Available scales with gain 1x - 18x, timings 3.125, 25, 50, 100, 200, 400 ms 187 * Time impacts to gain: 1x, 8x, 16x, 32x, 64x, 128x 188 */ 189 #define APDS9306_GSEL_1X 0x00 190 #define APDS9306_GSEL_3X 0x01 191 #define APDS9306_GSEL_6X 0x02 192 #define APDS9306_GSEL_9X 0x03 193 #define APDS9306_GSEL_18X 0x04 194 195 static const struct iio_gain_sel_pair apds9306_gains[] = { 196 GAIN_SCALE_GAIN(1, APDS9306_GSEL_1X), 197 GAIN_SCALE_GAIN(3, APDS9306_GSEL_3X), 198 GAIN_SCALE_GAIN(6, APDS9306_GSEL_6X), 199 GAIN_SCALE_GAIN(9, APDS9306_GSEL_9X), 200 GAIN_SCALE_GAIN(18, APDS9306_GSEL_18X), 201 }; 202 203 #define APDS9306_MEAS_MODE_400MS 0x00 204 #define APDS9306_MEAS_MODE_200MS 0x01 205 #define APDS9306_MEAS_MODE_100MS 0x02 206 #define APDS9306_MEAS_MODE_50MS 0x03 207 #define APDS9306_MEAS_MODE_25MS 0x04 208 #define APDS9306_MEAS_MODE_3125US 0x05 209 210 static const struct iio_itime_sel_mul apds9306_itimes[] = { 211 GAIN_SCALE_ITIME_US(400000, APDS9306_MEAS_MODE_400MS, BIT(7)), 212 GAIN_SCALE_ITIME_US(200000, APDS9306_MEAS_MODE_200MS, BIT(6)), 213 GAIN_SCALE_ITIME_US(100000, APDS9306_MEAS_MODE_100MS, BIT(5)), 214 GAIN_SCALE_ITIME_US(50000, APDS9306_MEAS_MODE_50MS, BIT(4)), 215 GAIN_SCALE_ITIME_US(25000, APDS9306_MEAS_MODE_25MS, BIT(3)), 216 GAIN_SCALE_ITIME_US(3125, APDS9306_MEAS_MODE_3125US, BIT(0)), 217 }; 218 219 static const struct iio_event_spec apds9306_event_spec[] = { 220 { 221 .type = IIO_EV_TYPE_THRESH, 222 .dir = IIO_EV_DIR_RISING, 223 .mask_shared_by_all = BIT(IIO_EV_INFO_VALUE), 224 }, { 225 .type = IIO_EV_TYPE_THRESH, 226 .dir = IIO_EV_DIR_FALLING, 227 .mask_shared_by_all = BIT(IIO_EV_INFO_VALUE), 228 }, { 229 .type = IIO_EV_TYPE_THRESH, 230 .dir = IIO_EV_DIR_EITHER, 231 .mask_shared_by_all = BIT(IIO_EV_INFO_PERIOD), 232 .mask_separate = BIT(IIO_EV_INFO_ENABLE), 233 }, { 234 .type = IIO_EV_TYPE_THRESH_ADAPTIVE, 235 .mask_shared_by_all = BIT(IIO_EV_INFO_VALUE) | 236 BIT(IIO_EV_INFO_ENABLE), 237 }, 238 }; 239 240 static const struct iio_chan_spec apds9306_channels_with_events[] = { 241 { 242 .type = IIO_LIGHT, 243 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) | 244 BIT(IIO_CHAN_INFO_SAMP_FREQ), 245 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) | 246 BIT(IIO_CHAN_INFO_SAMP_FREQ), 247 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 248 BIT(IIO_CHAN_INFO_SCALE), 249 .info_mask_separate_available = BIT(IIO_CHAN_INFO_SCALE), 250 .event_spec = apds9306_event_spec, 251 .num_event_specs = ARRAY_SIZE(apds9306_event_spec), 252 }, { 253 .type = IIO_INTENSITY, 254 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) | 255 BIT(IIO_CHAN_INFO_SAMP_FREQ), 256 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) | 257 BIT(IIO_CHAN_INFO_SAMP_FREQ), 258 .channel2 = IIO_MOD_LIGHT_CLEAR, 259 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 260 .modified = 1, 261 .event_spec = apds9306_event_spec, 262 .num_event_specs = ARRAY_SIZE(apds9306_event_spec), 263 }, 264 }; 265 266 static const struct iio_chan_spec apds9306_channels_without_events[] = { 267 { 268 .type = IIO_LIGHT, 269 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) | 270 BIT(IIO_CHAN_INFO_SAMP_FREQ), 271 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) | 272 BIT(IIO_CHAN_INFO_SAMP_FREQ), 273 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 274 BIT(IIO_CHAN_INFO_SCALE), 275 .info_mask_separate_available = BIT(IIO_CHAN_INFO_SCALE), 276 }, { 277 .type = IIO_INTENSITY, 278 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) | 279 BIT(IIO_CHAN_INFO_SAMP_FREQ), 280 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) | 281 BIT(IIO_CHAN_INFO_SAMP_FREQ), 282 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 283 .modified = 1, 284 .channel2 = IIO_MOD_LIGHT_CLEAR, 285 }, 286 }; 287 288 /* INT_PERSISTENCE available */ 289 static IIO_CONST_ATTR(thresh_either_period_available, "[0 1 15]"); 290 291 /* ALS_THRESH_VAR available */ 292 static IIO_CONST_ATTR(thresh_adaptive_either_values_available, "[0 1 7]"); 293 294 static struct attribute *apds9306_event_attributes[] = { 295 &iio_const_attr_thresh_either_period_available.dev_attr.attr, 296 &iio_const_attr_thresh_adaptive_either_values_available.dev_attr.attr, 297 NULL 298 }; 299 300 static const struct attribute_group apds9306_event_attr_group = { 301 .attrs = apds9306_event_attributes, 302 }; 303 304 static const struct regmap_range apds9306_readable_ranges[] = { 305 regmap_reg_range(APDS9306_MAIN_CTRL_REG, APDS9306_ALS_THRES_VAR_REG) 306 }; 307 308 static const struct regmap_range apds9306_writable_ranges[] = { 309 regmap_reg_range(APDS9306_MAIN_CTRL_REG, APDS9306_ALS_GAIN_REG), 310 regmap_reg_range(APDS9306_INT_CFG_REG, APDS9306_ALS_THRES_VAR_REG) 311 }; 312 313 static const struct regmap_range apds9306_volatile_ranges[] = { 314 regmap_reg_range(APDS9306_MAIN_STATUS_REG, APDS9306_MAIN_STATUS_REG), 315 regmap_reg_range(APDS9306_CLEAR_DATA_0_REG, APDS9306_ALS_DATA_2_REG) 316 }; 317 318 static const struct regmap_range apds9306_precious_ranges[] = { 319 regmap_reg_range(APDS9306_MAIN_STATUS_REG, APDS9306_MAIN_STATUS_REG) 320 }; 321 322 static const struct regmap_access_table apds9306_readable_table = { 323 .yes_ranges = apds9306_readable_ranges, 324 .n_yes_ranges = ARRAY_SIZE(apds9306_readable_ranges) 325 }; 326 327 static const struct regmap_access_table apds9306_writable_table = { 328 .yes_ranges = apds9306_writable_ranges, 329 .n_yes_ranges = ARRAY_SIZE(apds9306_writable_ranges) 330 }; 331 332 static const struct regmap_access_table apds9306_volatile_table = { 333 .yes_ranges = apds9306_volatile_ranges, 334 .n_yes_ranges = ARRAY_SIZE(apds9306_volatile_ranges) 335 }; 336 337 static const struct regmap_access_table apds9306_precious_table = { 338 .yes_ranges = apds9306_precious_ranges, 339 .n_yes_ranges = ARRAY_SIZE(apds9306_precious_ranges) 340 }; 341 342 static const struct regmap_config apds9306_regmap = { 343 .name = "apds9306_regmap", 344 .reg_bits = 8, 345 .val_bits = 8, 346 .rd_table = &apds9306_readable_table, 347 .wr_table = &apds9306_writable_table, 348 .volatile_table = &apds9306_volatile_table, 349 .precious_table = &apds9306_precious_table, 350 .max_register = APDS9306_ALS_THRES_VAR_REG, 351 .cache_type = REGCACHE_MAPLE, 352 }; 353 354 static const struct reg_field apds9306_rf_sw_reset = 355 REG_FIELD(APDS9306_MAIN_CTRL_REG, 4, 4); 356 357 static const struct reg_field apds9306_rf_en = 358 REG_FIELD(APDS9306_MAIN_CTRL_REG, 1, 1); 359 360 static const struct reg_field apds9306_rf_intg_time = 361 REG_FIELD(APDS9306_ALS_MEAS_RATE_REG, 4, 6); 362 363 static const struct reg_field apds9306_rf_repeat_rate = 364 REG_FIELD(APDS9306_ALS_MEAS_RATE_REG, 0, 2); 365 366 static const struct reg_field apds9306_rf_gain = 367 REG_FIELD(APDS9306_ALS_GAIN_REG, 0, 2); 368 369 static const struct reg_field apds9306_rf_int_src = 370 REG_FIELD(APDS9306_INT_CFG_REG, 4, 5); 371 372 static const struct reg_field apds9306_rf_int_thresh_var_en = 373 REG_FIELD(APDS9306_INT_CFG_REG, 3, 3); 374 375 static const struct reg_field apds9306_rf_int_en = 376 REG_FIELD(APDS9306_INT_CFG_REG, 2, 2); 377 378 static const struct reg_field apds9306_rf_int_persist_val = 379 REG_FIELD(APDS9306_INT_PERSISTENCE_REG, 4, 7); 380 381 static const struct reg_field apds9306_rf_int_thresh_var_val = 382 REG_FIELD(APDS9306_ALS_THRES_VAR_REG, 0, 2); 383 384 static int apds9306_regfield_init(struct apds9306_data *data) 385 { 386 struct device *dev = data->dev; 387 struct regmap *regmap = data->regmap; 388 struct regmap_field *tmp; 389 struct apds9306_regfields *rf = &data->rf; 390 391 tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_sw_reset); 392 if (IS_ERR(tmp)) 393 return PTR_ERR(tmp); 394 rf->sw_reset = tmp; 395 396 tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_en); 397 if (IS_ERR(tmp)) 398 return PTR_ERR(tmp); 399 rf->en = tmp; 400 401 tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_intg_time); 402 if (IS_ERR(tmp)) 403 return PTR_ERR(tmp); 404 rf->intg_time = tmp; 405 406 tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_repeat_rate); 407 if (IS_ERR(tmp)) 408 return PTR_ERR(tmp); 409 rf->repeat_rate = tmp; 410 411 tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_gain); 412 if (IS_ERR(tmp)) 413 return PTR_ERR(tmp); 414 rf->gain = tmp; 415 416 tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_int_src); 417 if (IS_ERR(tmp)) 418 return PTR_ERR(tmp); 419 rf->int_src = tmp; 420 421 tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_int_thresh_var_en); 422 if (IS_ERR(tmp)) 423 return PTR_ERR(tmp); 424 rf->int_thresh_var_en = tmp; 425 426 tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_int_en); 427 if (IS_ERR(tmp)) 428 return PTR_ERR(tmp); 429 rf->int_en = tmp; 430 431 tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_int_persist_val); 432 if (IS_ERR(tmp)) 433 return PTR_ERR(tmp); 434 rf->int_persist_val = tmp; 435 436 tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_int_thresh_var_val); 437 if (IS_ERR(tmp)) 438 return PTR_ERR(tmp); 439 rf->int_thresh_var_val = tmp; 440 441 return 0; 442 } 443 444 static int apds9306_power_state(struct apds9306_data *data, bool state) 445 { 446 struct apds9306_regfields *rf = &data->rf; 447 int ret; 448 449 /* Reset not included as it causes ugly I2C bus error */ 450 if (state) { 451 ret = regmap_field_write(rf->en, 1); 452 if (ret) 453 return ret; 454 /* 5ms wake up time */ 455 fsleep(5000); 456 return 0; 457 } 458 459 return regmap_field_write(rf->en, 0); 460 } 461 462 static int apds9306_read_data(struct apds9306_data *data, int *val, int reg) 463 { 464 struct device *dev = data->dev; 465 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 466 struct apds9306_regfields *rf = &data->rf; 467 u64 ev_code; 468 int ret, delay, intg_time, intg_time_idx, repeat_rate_idx, int_src; 469 int status = 0; 470 u8 buff[3]; 471 472 PM_RUNTIME_ACQUIRE_AUTOSUSPEND(data->dev, pm); 473 if (PM_RUNTIME_ACQUIRE_ERR(&pm)) 474 return PM_RUNTIME_ACQUIRE_ERR(&pm); 475 476 ret = regmap_field_read(rf->intg_time, &intg_time_idx); 477 if (ret) 478 return ret; 479 480 ret = regmap_field_read(rf->repeat_rate, &repeat_rate_idx); 481 if (ret) 482 return ret; 483 484 ret = regmap_field_read(rf->int_src, &int_src); 485 if (ret) 486 return ret; 487 488 intg_time = iio_gts_find_int_time_by_sel(&data->gts, intg_time_idx); 489 if (intg_time < 0) 490 return intg_time; 491 492 /* Whichever is greater - integration time period or sampling period. */ 493 delay = max(intg_time, apds9306_repeat_rate_period[repeat_rate_idx]); 494 495 /* 496 * Clear stale data flag that might have been set by the interrupt 497 * handler if it got data available flag set in the status reg. 498 */ 499 data->read_data_available = 0; 500 501 /* 502 * If this function runs parallel with the interrupt handler, either 503 * this reads and clears the status registers or the interrupt handler 504 * does. The interrupt handler sets a flag for read data available 505 * in our private structure which we read here. 506 */ 507 ret = regmap_read_poll_timeout(data->regmap, APDS9306_MAIN_STATUS_REG, 508 status, data->read_data_available || 509 (status & (APDS9306_ALS_DATA_STAT_MASK | 510 APDS9306_ALS_INT_STAT_MASK)), 511 APDS9306_ALS_READ_DATA_DELAY_US, delay * 2); 512 if (ret) 513 return ret; 514 515 /* If we reach here before the interrupt handler we push an event */ 516 if ((status & APDS9306_ALS_INT_STAT_MASK)) { 517 if (int_src == APDS9306_INT_SRC_ALS) 518 ev_code = IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0, 519 IIO_EV_TYPE_THRESH, 520 IIO_EV_DIR_EITHER); 521 else 522 ev_code = IIO_MOD_EVENT_CODE(IIO_INTENSITY, 0, 523 IIO_MOD_LIGHT_CLEAR, 524 IIO_EV_TYPE_THRESH, 525 IIO_EV_DIR_EITHER); 526 527 iio_push_event(indio_dev, ev_code, iio_get_time_ns(indio_dev)); 528 } 529 530 ret = regmap_bulk_read(data->regmap, reg, buff, sizeof(buff)); 531 if (ret) { 532 dev_err_ratelimited(dev, "read data failed\n"); 533 return ret; 534 } 535 536 *val = get_unaligned_le24(&buff); 537 538 return 0; 539 } 540 541 static int apds9306_intg_time_get(struct apds9306_data *data, int *val2) 542 { 543 struct apds9306_regfields *rf = &data->rf; 544 int ret, intg_time_idx; 545 546 ret = regmap_field_read(rf->intg_time, &intg_time_idx); 547 if (ret) 548 return ret; 549 550 ret = iio_gts_find_int_time_by_sel(&data->gts, intg_time_idx); 551 if (ret < 0) 552 return ret; 553 554 *val2 = ret; 555 556 return 0; 557 } 558 559 static int apds9306_intg_time_set(struct apds9306_data *data, int val2) 560 { 561 struct device *dev = data->dev; 562 struct apds9306_regfields *rf = &data->rf; 563 int ret, intg_old, gain_old, gain_new, gain_new_closest, intg_time_idx; 564 int gain_idx; 565 bool ok; 566 567 if (!iio_gts_valid_time(&data->gts, val2)) { 568 dev_err_ratelimited(dev, "Unsupported integration time %u\n", val2); 569 return -EINVAL; 570 } 571 572 ret = regmap_field_read(rf->intg_time, &intg_time_idx); 573 if (ret) 574 return ret; 575 576 ret = regmap_field_read(rf->gain, &gain_idx); 577 if (ret) 578 return ret; 579 580 intg_old = iio_gts_find_int_time_by_sel(&data->gts, intg_time_idx); 581 if (intg_old < 0) 582 return intg_old; 583 584 if (intg_old == val2) 585 return 0; 586 587 gain_old = iio_gts_find_gain_by_sel(&data->gts, gain_idx); 588 if (gain_old < 0) 589 return gain_old; 590 591 iio_gts_find_new_gain_by_old_gain_time(&data->gts, gain_old, intg_old, 592 val2, &gain_new); 593 594 if (gain_new < 0) { 595 dev_err_ratelimited(dev, "Unsupported gain with time\n"); 596 return gain_new; 597 } 598 599 gain_new_closest = iio_find_closest_gain_low(&data->gts, gain_new, &ok); 600 if (gain_new_closest < 0) { 601 gain_new_closest = iio_gts_get_min_gain(&data->gts); 602 if (gain_new_closest < 0) 603 return gain_new_closest; 604 } 605 if (!ok) 606 dev_dbg(dev, "Unable to find optimum gain, setting minimum"); 607 608 ret = iio_gts_find_sel_by_int_time(&data->gts, val2); 609 if (ret < 0) 610 return ret; 611 612 ret = regmap_field_write(rf->intg_time, ret); 613 if (ret) 614 return ret; 615 616 ret = iio_gts_find_sel_by_gain(&data->gts, gain_new_closest); 617 if (ret < 0) 618 return ret; 619 620 return regmap_field_write(rf->gain, ret); 621 } 622 623 static int apds9306_sampling_freq_get(struct apds9306_data *data, int *val, 624 int *val2) 625 { 626 struct apds9306_regfields *rf = &data->rf; 627 int ret, repeat_rate_idx; 628 629 ret = regmap_field_read(rf->repeat_rate, &repeat_rate_idx); 630 if (ret) 631 return ret; 632 633 if (repeat_rate_idx >= ARRAY_SIZE(apds9306_repeat_rate_freq)) 634 return -EINVAL; 635 636 *val = apds9306_repeat_rate_freq[repeat_rate_idx][0]; 637 *val2 = apds9306_repeat_rate_freq[repeat_rate_idx][1]; 638 639 return 0; 640 } 641 642 static int apds9306_sampling_freq_set(struct apds9306_data *data, int val, 643 int val2) 644 { 645 struct apds9306_regfields *rf = &data->rf; 646 int i; 647 648 for (i = 0; i < ARRAY_SIZE(apds9306_repeat_rate_freq); i++) { 649 if (apds9306_repeat_rate_freq[i][0] == val && 650 apds9306_repeat_rate_freq[i][1] == val2) 651 return regmap_field_write(rf->repeat_rate, i); 652 } 653 654 return -EINVAL; 655 } 656 657 static int apds9306_scale_get(struct apds9306_data *data, int *val, int *val2) 658 { 659 struct apds9306_regfields *rf = &data->rf; 660 int gain, intg, ret, intg_time_idx, gain_idx; 661 662 ret = regmap_field_read(rf->gain, &gain_idx); 663 if (ret) 664 return ret; 665 666 ret = regmap_field_read(rf->intg_time, &intg_time_idx); 667 if (ret) 668 return ret; 669 670 gain = iio_gts_find_gain_by_sel(&data->gts, gain_idx); 671 if (gain < 0) 672 return gain; 673 674 intg = iio_gts_find_int_time_by_sel(&data->gts, intg_time_idx); 675 if (intg < 0) 676 return intg; 677 678 return iio_gts_get_scale(&data->gts, gain, intg, val, val2); 679 } 680 681 static int apds9306_scale_set(struct apds9306_data *data, int val, int val2) 682 { 683 struct apds9306_regfields *rf = &data->rf; 684 int i, ret, time_sel, gain_sel, intg_time_idx; 685 686 ret = regmap_field_read(rf->intg_time, &intg_time_idx); 687 if (ret) 688 return ret; 689 690 ret = iio_gts_find_gain_sel_for_scale_using_time(&data->gts, 691 intg_time_idx, val, val2, &gain_sel); 692 if (ret) { 693 for (i = 0; i < data->gts.num_itime; i++) { 694 time_sel = data->gts.itime_table[i].sel; 695 696 if (time_sel == intg_time_idx) 697 continue; 698 699 ret = iio_gts_find_gain_sel_for_scale_using_time(&data->gts, 700 time_sel, val, val2, &gain_sel); 701 if (!ret) 702 break; 703 } 704 if (ret) 705 return -EINVAL; 706 707 ret = regmap_field_write(rf->intg_time, time_sel); 708 if (ret) 709 return ret; 710 } 711 712 return regmap_field_write(rf->gain, gain_sel); 713 } 714 715 static int apds9306_event_period_get(struct apds9306_data *data, int *val) 716 { 717 struct apds9306_regfields *rf = &data->rf; 718 int period, ret; 719 720 ret = regmap_field_read(rf->int_persist_val, &period); 721 if (ret) 722 return ret; 723 724 if (!in_range(period, 0, APDS9306_ALS_PERSIST_NUM_VALS)) 725 return -EINVAL; 726 727 *val = period; 728 729 return ret; 730 } 731 732 static int apds9306_event_period_set(struct apds9306_data *data, int val) 733 { 734 struct apds9306_regfields *rf = &data->rf; 735 736 if (!in_range(val, 0, APDS9306_ALS_PERSIST_NUM_VALS)) 737 return -EINVAL; 738 739 return regmap_field_write(rf->int_persist_val, val); 740 } 741 742 static int apds9306_get_thresh_reg(int dir) 743 { 744 if (dir == IIO_EV_DIR_RISING) 745 return APDS9306_ALS_THRES_UP_0_REG; 746 else if (dir == IIO_EV_DIR_FALLING) 747 return APDS9306_ALS_THRES_LOW_0_REG; 748 else 749 return -EINVAL; 750 } 751 752 static int apds9306_event_thresh_get(struct apds9306_data *data, int dir, 753 int *val) 754 { 755 int reg, ret; 756 u8 buff[3]; 757 758 reg = apds9306_get_thresh_reg(dir); 759 if (reg < 0) 760 return reg; 761 762 ret = regmap_bulk_read(data->regmap, reg, buff, sizeof(buff)); 763 if (ret) 764 return ret; 765 766 *val = get_unaligned_le24(&buff); 767 768 return 0; 769 } 770 771 static int apds9306_event_thresh_set(struct apds9306_data *data, int dir, 772 int val) 773 { 774 int reg; 775 u8 buff[3]; 776 777 reg = apds9306_get_thresh_reg(dir); 778 if (reg < 0) 779 return reg; 780 781 if (!in_range(val, 0, APDS9306_ALS_THRES_VAL_MAX)) 782 return -EINVAL; 783 784 put_unaligned_le24(val, buff); 785 786 return regmap_bulk_write(data->regmap, reg, buff, sizeof(buff)); 787 } 788 789 static int apds9306_event_thresh_adaptive_get(struct apds9306_data *data, int *val) 790 { 791 struct apds9306_regfields *rf = &data->rf; 792 int thr_adpt, ret; 793 794 ret = regmap_field_read(rf->int_thresh_var_val, &thr_adpt); 795 if (ret) 796 return ret; 797 798 if (!in_range(thr_adpt, 0, APDS9306_ALS_THRES_VAR_NUM_VALS)) 799 return -EINVAL; 800 801 *val = thr_adpt; 802 803 return ret; 804 } 805 806 static int apds9306_event_thresh_adaptive_set(struct apds9306_data *data, int val) 807 { 808 struct apds9306_regfields *rf = &data->rf; 809 810 if (!in_range(val, 0, APDS9306_ALS_THRES_VAR_NUM_VALS)) 811 return -EINVAL; 812 813 return regmap_field_write(rf->int_thresh_var_val, val); 814 } 815 816 static int apds9306_read_raw(struct iio_dev *indio_dev, 817 struct iio_chan_spec const *chan, int *val, 818 int *val2, long mask) 819 { 820 struct apds9306_data *data = iio_priv(indio_dev); 821 int ret, reg; 822 823 switch (mask) { 824 case IIO_CHAN_INFO_RAW: 825 if (chan->channel2 == IIO_MOD_LIGHT_CLEAR) 826 reg = APDS9306_CLEAR_DATA_0_REG; 827 else 828 reg = APDS9306_ALS_DATA_0_REG; 829 /* 830 * Changing device parameters during adc operation, resets 831 * the ADC which has to avoided. 832 */ 833 if (!iio_device_claim_direct(indio_dev)) 834 return -EBUSY; 835 ret = apds9306_read_data(data, val, reg); 836 iio_device_release_direct(indio_dev); 837 if (ret) 838 return ret; 839 840 return IIO_VAL_INT; 841 case IIO_CHAN_INFO_INT_TIME: 842 ret = apds9306_intg_time_get(data, val2); 843 if (ret) 844 return ret; 845 *val = 0; 846 847 return IIO_VAL_INT_PLUS_MICRO; 848 case IIO_CHAN_INFO_SAMP_FREQ: 849 ret = apds9306_sampling_freq_get(data, val, val2); 850 if (ret) 851 return ret; 852 853 return IIO_VAL_INT_PLUS_MICRO; 854 case IIO_CHAN_INFO_SCALE: 855 ret = apds9306_scale_get(data, val, val2); 856 if (ret) 857 return ret; 858 859 return IIO_VAL_INT_PLUS_NANO; 860 default: 861 return -EINVAL; 862 } 863 }; 864 865 static int apds9306_read_avail(struct iio_dev *indio_dev, 866 struct iio_chan_spec const *chan, 867 const int **vals, int *type, int *length, 868 long mask) 869 { 870 struct apds9306_data *data = iio_priv(indio_dev); 871 872 switch (mask) { 873 case IIO_CHAN_INFO_INT_TIME: 874 return iio_gts_avail_times(&data->gts, vals, type, length); 875 case IIO_CHAN_INFO_SCALE: 876 return iio_gts_all_avail_scales(&data->gts, vals, type, length); 877 case IIO_CHAN_INFO_SAMP_FREQ: 878 *length = ARRAY_SIZE(apds9306_repeat_rate_freq) * 2; 879 *vals = (const int *)apds9306_repeat_rate_freq; 880 *type = IIO_VAL_INT_PLUS_MICRO; 881 882 return IIO_AVAIL_LIST; 883 default: 884 return -EINVAL; 885 } 886 } 887 888 static int apds9306_write_raw_get_fmt(struct iio_dev *indio_dev, 889 struct iio_chan_spec const *chan, 890 long mask) 891 { 892 switch (mask) { 893 case IIO_CHAN_INFO_SCALE: 894 return IIO_VAL_INT_PLUS_NANO; 895 case IIO_CHAN_INFO_INT_TIME: 896 return IIO_VAL_INT_PLUS_MICRO; 897 case IIO_CHAN_INFO_SAMP_FREQ: 898 return IIO_VAL_INT_PLUS_MICRO; 899 default: 900 return -EINVAL; 901 } 902 } 903 904 static int apds9306_write_raw(struct iio_dev *indio_dev, 905 struct iio_chan_spec const *chan, int val, 906 int val2, long mask) 907 { 908 struct apds9306_data *data = iio_priv(indio_dev); 909 910 guard(mutex)(&data->mutex); 911 912 switch (mask) { 913 case IIO_CHAN_INFO_INT_TIME: 914 if (val) 915 return -EINVAL; 916 return apds9306_intg_time_set(data, val2); 917 case IIO_CHAN_INFO_SCALE: 918 return apds9306_scale_set(data, val, val2); 919 case IIO_CHAN_INFO_SAMP_FREQ: 920 return apds9306_sampling_freq_set(data, val, val2); 921 default: 922 return -EINVAL; 923 } 924 } 925 926 static irqreturn_t apds9306_irq_handler(int irq, void *priv) 927 { 928 struct iio_dev *indio_dev = priv; 929 struct apds9306_data *data = iio_priv(indio_dev); 930 struct apds9306_regfields *rf = &data->rf; 931 u64 ev_code; 932 int ret, status, int_src; 933 934 /* 935 * The interrupt line is released and the interrupt flag is 936 * cleared as a result of reading the status register. All the 937 * status flags are cleared as a result of this read. 938 */ 939 ret = regmap_read(data->regmap, APDS9306_MAIN_STATUS_REG, &status); 940 if (ret < 0) { 941 dev_err_ratelimited(data->dev, "status reg read failed\n"); 942 return IRQ_HANDLED; 943 } 944 945 ret = regmap_field_read(rf->int_src, &int_src); 946 if (ret) 947 return ret; 948 949 if ((status & APDS9306_ALS_INT_STAT_MASK)) { 950 if (int_src == APDS9306_INT_SRC_ALS) 951 ev_code = IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0, 952 IIO_EV_TYPE_THRESH, 953 IIO_EV_DIR_EITHER); 954 else 955 ev_code = IIO_MOD_EVENT_CODE(IIO_INTENSITY, 0, 956 IIO_MOD_LIGHT_CLEAR, 957 IIO_EV_TYPE_THRESH, 958 IIO_EV_DIR_EITHER); 959 960 iio_push_event(indio_dev, ev_code, iio_get_time_ns(indio_dev)); 961 } 962 963 /* 964 * If a one-shot read through sysfs is underway at the same time 965 * as this interrupt handler is executing and a read data available 966 * flag was set, this flag is set to inform read_poll_timeout() 967 * to exit. 968 */ 969 if ((status & APDS9306_ALS_DATA_STAT_MASK)) 970 data->read_data_available = 1; 971 972 return IRQ_HANDLED; 973 } 974 975 static int apds9306_read_event(struct iio_dev *indio_dev, 976 const struct iio_chan_spec *chan, 977 enum iio_event_type type, 978 enum iio_event_direction dir, 979 enum iio_event_info info, 980 int *val, int *val2) 981 { 982 struct apds9306_data *data = iio_priv(indio_dev); 983 int ret; 984 985 switch (type) { 986 case IIO_EV_TYPE_THRESH: 987 if (dir == IIO_EV_DIR_EITHER && info == IIO_EV_INFO_PERIOD) 988 ret = apds9306_event_period_get(data, val); 989 else 990 ret = apds9306_event_thresh_get(data, dir, val); 991 if (ret) 992 return ret; 993 994 return IIO_VAL_INT; 995 case IIO_EV_TYPE_THRESH_ADAPTIVE: 996 ret = apds9306_event_thresh_adaptive_get(data, val); 997 if (ret) 998 return ret; 999 1000 return IIO_VAL_INT; 1001 default: 1002 return -EINVAL; 1003 } 1004 } 1005 1006 static int apds9306_write_event(struct iio_dev *indio_dev, 1007 const struct iio_chan_spec *chan, 1008 enum iio_event_type type, 1009 enum iio_event_direction dir, 1010 enum iio_event_info info, 1011 int val, int val2) 1012 { 1013 struct apds9306_data *data = iio_priv(indio_dev); 1014 1015 switch (type) { 1016 case IIO_EV_TYPE_THRESH: 1017 if (dir == IIO_EV_DIR_EITHER && info == IIO_EV_INFO_PERIOD) 1018 return apds9306_event_period_set(data, val); 1019 1020 return apds9306_event_thresh_set(data, dir, val); 1021 case IIO_EV_TYPE_THRESH_ADAPTIVE: 1022 return apds9306_event_thresh_adaptive_set(data, val); 1023 default: 1024 return -EINVAL; 1025 } 1026 } 1027 1028 static int apds9306_read_event_config(struct iio_dev *indio_dev, 1029 const struct iio_chan_spec *chan, 1030 enum iio_event_type type, 1031 enum iio_event_direction dir) 1032 { 1033 struct apds9306_data *data = iio_priv(indio_dev); 1034 struct apds9306_regfields *rf = &data->rf; 1035 int int_en, int_src, ret; 1036 1037 switch (type) { 1038 case IIO_EV_TYPE_THRESH: { 1039 guard(mutex)(&data->mutex); 1040 1041 ret = regmap_field_read(rf->int_src, &int_src); 1042 if (ret) 1043 return ret; 1044 1045 ret = regmap_field_read(rf->int_en, &int_en); 1046 if (ret) 1047 return ret; 1048 1049 if (chan->type == IIO_LIGHT) 1050 return int_en && (int_src == APDS9306_INT_SRC_ALS); 1051 1052 if (chan->type == IIO_INTENSITY) 1053 return int_en && (int_src == APDS9306_INT_SRC_CLEAR); 1054 1055 return -EINVAL; 1056 } 1057 case IIO_EV_TYPE_THRESH_ADAPTIVE: 1058 ret = regmap_field_read(rf->int_thresh_var_en, &int_en); 1059 if (ret) 1060 return ret; 1061 1062 return int_en; 1063 default: 1064 return -EINVAL; 1065 } 1066 } 1067 1068 static int apds9306_write_event_config(struct iio_dev *indio_dev, 1069 const struct iio_chan_spec *chan, 1070 enum iio_event_type type, 1071 enum iio_event_direction dir, 1072 bool state) 1073 { 1074 struct apds9306_data *data = iio_priv(indio_dev); 1075 struct apds9306_regfields *rf = &data->rf; 1076 int ret, enabled; 1077 1078 switch (type) { 1079 case IIO_EV_TYPE_THRESH: { 1080 guard(mutex)(&data->mutex); 1081 1082 ret = regmap_field_read(rf->int_en, &enabled); 1083 if (ret) 1084 return ret; 1085 1086 /* 1087 * If interrupt is enabled, the channel is set before enabling 1088 * the interrupt. In case of disable, no need to switch 1089 * channels. In case of different channel is selected while 1090 * interrupt in on, just change the channel. 1091 */ 1092 if (state) { 1093 if (chan->type == IIO_LIGHT) 1094 ret = regmap_field_write(rf->int_src, 1); 1095 else if (chan->type == IIO_INTENSITY) 1096 ret = regmap_field_write(rf->int_src, 0); 1097 else 1098 return -EINVAL; 1099 1100 if (ret) 1101 return ret; 1102 1103 if (enabled) 1104 return 0; 1105 1106 ret = regmap_field_write(rf->int_en, 1); 1107 if (ret) 1108 return ret; 1109 1110 return pm_runtime_resume_and_get(data->dev); 1111 } else { 1112 if (!enabled) 1113 return 0; 1114 1115 ret = regmap_field_write(rf->int_en, 0); 1116 if (ret) 1117 return ret; 1118 1119 pm_runtime_put_autosuspend(data->dev); 1120 1121 return 0; 1122 } 1123 } 1124 case IIO_EV_TYPE_THRESH_ADAPTIVE: 1125 return regmap_field_write(rf->int_thresh_var_en, state); 1126 default: 1127 return -EINVAL; 1128 } 1129 } 1130 1131 static const struct iio_info apds9306_info_no_events = { 1132 .read_avail = apds9306_read_avail, 1133 .read_raw = apds9306_read_raw, 1134 .write_raw = apds9306_write_raw, 1135 .write_raw_get_fmt = apds9306_write_raw_get_fmt, 1136 }; 1137 1138 static const struct iio_info apds9306_info = { 1139 .read_avail = apds9306_read_avail, 1140 .read_raw = apds9306_read_raw, 1141 .write_raw = apds9306_write_raw, 1142 .write_raw_get_fmt = apds9306_write_raw_get_fmt, 1143 .read_event_value = apds9306_read_event, 1144 .write_event_value = apds9306_write_event, 1145 .read_event_config = apds9306_read_event_config, 1146 .write_event_config = apds9306_write_event_config, 1147 .event_attrs = &apds9306_event_attr_group, 1148 }; 1149 1150 static int apds9306_init_iio_gts(struct apds9306_data *data) 1151 { 1152 int i, ret, part_id; 1153 1154 ret = regmap_read(data->regmap, APDS9306_PART_ID_REG, &part_id); 1155 if (ret) 1156 return ret; 1157 1158 for (i = 0; i < ARRAY_SIZE(apds9306_gts_mul); i++) 1159 if (part_id == apds9306_gts_mul[i].part_id) 1160 break; 1161 1162 if (i == ARRAY_SIZE(apds9306_gts_mul)) 1163 return -ENOENT; 1164 1165 return devm_iio_init_iio_gts(data->dev, 1166 apds9306_gts_mul[i].max_scale_int, 1167 apds9306_gts_mul[i].max_scale_nano, 1168 apds9306_gains, ARRAY_SIZE(apds9306_gains), 1169 apds9306_itimes, ARRAY_SIZE(apds9306_itimes), 1170 &data->gts); 1171 } 1172 1173 static void apds9306_powerdown(void *ptr) 1174 { 1175 struct apds9306_data *data = ptr; 1176 struct apds9306_regfields *rf = &data->rf; 1177 int ret; 1178 1179 ret = regmap_field_write(rf->int_thresh_var_en, 0); 1180 if (ret) 1181 return; 1182 1183 ret = regmap_field_write(rf->int_en, 0); 1184 if (ret) 1185 return; 1186 1187 apds9306_power_state(data, false); 1188 } 1189 1190 static int apds9306_device_init(struct apds9306_data *data) 1191 { 1192 struct apds9306_regfields *rf = &data->rf; 1193 int ret; 1194 1195 ret = apds9306_init_iio_gts(data); 1196 if (ret) 1197 return ret; 1198 1199 ret = regmap_field_write(rf->intg_time, APDS9306_MEAS_MODE_100MS); 1200 if (ret) 1201 return ret; 1202 1203 ret = regmap_field_write(rf->repeat_rate, APDS9306_SAMP_FREQ_10HZ); 1204 if (ret) 1205 return ret; 1206 1207 ret = regmap_field_write(rf->gain, APDS9306_GSEL_3X); 1208 if (ret) 1209 return ret; 1210 1211 ret = regmap_field_write(rf->int_src, APDS9306_INT_SRC_ALS); 1212 if (ret) 1213 return ret; 1214 1215 ret = regmap_field_write(rf->int_en, 0); 1216 if (ret) 1217 return ret; 1218 1219 return regmap_field_write(rf->int_thresh_var_en, 0); 1220 } 1221 1222 static int apds9306_pm_init(struct apds9306_data *data) 1223 { 1224 struct device *dev = data->dev; 1225 int ret; 1226 1227 ret = apds9306_power_state(data, true); 1228 if (ret) 1229 return ret; 1230 1231 ret = pm_runtime_set_active(dev); 1232 if (ret) 1233 return ret; 1234 1235 ret = devm_pm_runtime_enable(dev); 1236 if (ret) 1237 return ret; 1238 1239 pm_runtime_set_autosuspend_delay(dev, 5000); 1240 pm_runtime_use_autosuspend(dev); 1241 pm_runtime_get(dev); 1242 1243 return 0; 1244 } 1245 1246 static int apds9306_probe(struct i2c_client *client) 1247 { 1248 struct device *dev = &client->dev; 1249 struct apds9306_data *data; 1250 struct iio_dev *indio_dev; 1251 int ret; 1252 1253 indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 1254 if (!indio_dev) 1255 return -ENOMEM; 1256 1257 data = iio_priv(indio_dev); 1258 1259 mutex_init(&data->mutex); 1260 1261 data->regmap = devm_regmap_init_i2c(client, &apds9306_regmap); 1262 if (IS_ERR(data->regmap)) 1263 return dev_err_probe(dev, PTR_ERR(data->regmap), 1264 "regmap initialization failed\n"); 1265 1266 data->dev = dev; 1267 i2c_set_clientdata(client, indio_dev); 1268 1269 ret = apds9306_regfield_init(data); 1270 if (ret) 1271 return dev_err_probe(dev, ret, "regfield initialization failed\n"); 1272 1273 ret = devm_regulator_get_enable(dev, "vdd"); 1274 if (ret) 1275 return dev_err_probe(dev, ret, "Failed to enable regulator\n"); 1276 1277 indio_dev->name = "apds9306"; 1278 indio_dev->modes = INDIO_DIRECT_MODE; 1279 if (client->irq) { 1280 indio_dev->info = &apds9306_info; 1281 indio_dev->channels = apds9306_channels_with_events; 1282 indio_dev->num_channels = ARRAY_SIZE(apds9306_channels_with_events); 1283 ret = devm_request_threaded_irq(dev, client->irq, NULL, 1284 apds9306_irq_handler, IRQF_ONESHOT, 1285 "apds9306_event", indio_dev); 1286 if (ret) 1287 return ret; 1288 } else { 1289 indio_dev->info = &apds9306_info_no_events; 1290 indio_dev->channels = apds9306_channels_without_events; 1291 indio_dev->num_channels = 1292 ARRAY_SIZE(apds9306_channels_without_events); 1293 } 1294 1295 ret = apds9306_pm_init(data); 1296 if (ret) 1297 return dev_err_probe(dev, ret, "failed pm init\n"); 1298 1299 ret = apds9306_device_init(data); 1300 if (ret) 1301 return dev_err_probe(dev, ret, "failed to init device\n"); 1302 1303 ret = devm_add_action_or_reset(dev, apds9306_powerdown, data); 1304 if (ret) 1305 return ret; 1306 1307 ret = devm_iio_device_register(dev, indio_dev); 1308 if (ret) 1309 return dev_err_probe(dev, ret, "failed iio device registration\n"); 1310 1311 pm_runtime_put_autosuspend(dev); 1312 1313 return 0; 1314 } 1315 1316 static int apds9306_runtime_suspend(struct device *dev) 1317 { 1318 struct apds9306_data *data = iio_priv(dev_get_drvdata(dev)); 1319 1320 return apds9306_power_state(data, false); 1321 } 1322 1323 static int apds9306_runtime_resume(struct device *dev) 1324 { 1325 struct apds9306_data *data = iio_priv(dev_get_drvdata(dev)); 1326 1327 return apds9306_power_state(data, true); 1328 } 1329 1330 static DEFINE_RUNTIME_DEV_PM_OPS(apds9306_pm_ops, 1331 apds9306_runtime_suspend, 1332 apds9306_runtime_resume, 1333 NULL); 1334 1335 static const struct of_device_id apds9306_of_match[] = { 1336 { .compatible = "avago,apds9306" }, 1337 { } 1338 }; 1339 MODULE_DEVICE_TABLE(of, apds9306_of_match); 1340 1341 static struct i2c_driver apds9306_driver = { 1342 .driver = { 1343 .name = "apds9306", 1344 .pm = pm_ptr(&apds9306_pm_ops), 1345 .of_match_table = apds9306_of_match, 1346 }, 1347 .probe = apds9306_probe, 1348 }; 1349 module_i2c_driver(apds9306_driver); 1350 1351 MODULE_AUTHOR("Subhajit Ghosh <subhajit.ghosh@tweaklogic.com>"); 1352 MODULE_DESCRIPTION("APDS9306 Ambient Light Sensor driver"); 1353 MODULE_LICENSE("GPL"); 1354 MODULE_IMPORT_NS("IIO_GTS_HELPER"); 1355