1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Based on arch/arm/mm/mmu.c 4 * 5 * Copyright (C) 1995-2005 Russell King 6 * Copyright (C) 2012 ARM Ltd. 7 */ 8 9 #include <linux/cache.h> 10 #include <linux/export.h> 11 #include <linux/kernel.h> 12 #include <linux/errno.h> 13 #include <linux/init.h> 14 #include <linux/ioport.h> 15 #include <linux/kexec.h> 16 #include <linux/libfdt.h> 17 #include <linux/mman.h> 18 #include <linux/nodemask.h> 19 #include <linux/memblock.h> 20 #include <linux/memremap.h> 21 #include <linux/memory.h> 22 #include <linux/fs.h> 23 #include <linux/io.h> 24 #include <linux/mm.h> 25 #include <linux/vmalloc.h> 26 #include <linux/set_memory.h> 27 #include <linux/suspend.h> 28 #include <linux/kfence.h> 29 #include <linux/pkeys.h> 30 #include <linux/mm_inline.h> 31 #include <linux/pagewalk.h> 32 #include <linux/stop_machine.h> 33 34 #include <asm/barrier.h> 35 #include <asm/cputype.h> 36 #include <asm/fixmap.h> 37 #include <asm/kasan.h> 38 #include <asm/kernel-pgtable.h> 39 #include <asm/sections.h> 40 #include <asm/setup.h> 41 #include <linux/sizes.h> 42 #include <asm/tlb.h> 43 #include <asm/mmu_context.h> 44 #include <asm/ptdump.h> 45 #include <asm/tlbflush.h> 46 #include <asm/pgalloc.h> 47 #include <asm/kfence.h> 48 49 #define NO_BLOCK_MAPPINGS BIT(0) 50 #define NO_CONT_MAPPINGS BIT(1) 51 #define NO_EXEC_MAPPINGS BIT(2) /* assumes FEAT_HPDS is not used */ 52 53 u64 kimage_voffset __ro_after_init; 54 EXPORT_SYMBOL(kimage_voffset); 55 56 u32 __boot_cpu_mode[] = { BOOT_CPU_MODE_EL2, BOOT_CPU_MODE_EL1 }; 57 58 static bool rodata_is_rw __ro_after_init = true; 59 60 /* 61 * The booting CPU updates the failed status @__early_cpu_boot_status, 62 * with MMU turned off. 63 */ 64 long __section(".mmuoff.data.write") __early_cpu_boot_status; 65 66 static DEFINE_SPINLOCK(swapper_pgdir_lock); 67 static DEFINE_MUTEX(fixmap_lock); 68 69 void noinstr set_swapper_pgd(pgd_t *pgdp, pgd_t pgd) 70 { 71 pgd_t *fixmap_pgdp; 72 73 /* 74 * Don't bother with the fixmap if swapper_pg_dir is still mapped 75 * writable in the kernel mapping. 76 */ 77 if (rodata_is_rw) { 78 WRITE_ONCE(*pgdp, pgd); 79 dsb(ishst); 80 isb(); 81 return; 82 } 83 84 spin_lock(&swapper_pgdir_lock); 85 fixmap_pgdp = pgd_set_fixmap(__pa_symbol(pgdp)); 86 WRITE_ONCE(*fixmap_pgdp, pgd); 87 /* 88 * We need dsb(ishst) here to ensure the page-table-walker sees 89 * our new entry before set_p?d() returns. The fixmap's 90 * flush_tlb_kernel_range() via clear_fixmap() does this for us. 91 */ 92 pgd_clear_fixmap(); 93 spin_unlock(&swapper_pgdir_lock); 94 } 95 96 pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 97 unsigned long size, pgprot_t vma_prot) 98 { 99 if (!pfn_is_map_memory(pfn)) 100 return pgprot_noncached(vma_prot); 101 else if (file->f_flags & O_SYNC) 102 return pgprot_writecombine(vma_prot); 103 return vma_prot; 104 } 105 EXPORT_SYMBOL(phys_mem_access_prot); 106 107 static phys_addr_t __init early_pgtable_alloc(enum pgtable_level pgtable_level) 108 { 109 phys_addr_t phys; 110 111 phys = memblock_phys_alloc_range(PAGE_SIZE, PAGE_SIZE, 0, 112 MEMBLOCK_ALLOC_NOLEAKTRACE); 113 if (!phys) 114 panic("Failed to allocate page table page\n"); 115 116 return phys; 117 } 118 119 bool pgattr_change_is_safe(pteval_t old, pteval_t new) 120 { 121 /* 122 * The following mapping attributes may be updated in live 123 * kernel mappings without the need for break-before-make. 124 */ 125 pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE | PTE_NG | 126 PTE_SWBITS_MASK; 127 128 /* creating or taking down mappings is always safe */ 129 if (!pte_valid(__pte(old)) || !pte_valid(__pte(new))) 130 return true; 131 132 /* A live entry's pfn should not change */ 133 if (pte_pfn(__pte(old)) != pte_pfn(__pte(new))) 134 return false; 135 136 /* Transitioning from Non-Global to Global is unsafe */ 137 if (old & ~new & PTE_NG) 138 return false; 139 140 /* 141 * Changing the memory type between Normal and Normal-Tagged is safe 142 * since Tagged is considered a permission attribute from the 143 * mismatched attribute aliases perspective. 144 */ 145 if (((old & PTE_ATTRINDX_MASK) == PTE_ATTRINDX(MT_NORMAL) || 146 (old & PTE_ATTRINDX_MASK) == PTE_ATTRINDX(MT_NORMAL_TAGGED)) && 147 ((new & PTE_ATTRINDX_MASK) == PTE_ATTRINDX(MT_NORMAL) || 148 (new & PTE_ATTRINDX_MASK) == PTE_ATTRINDX(MT_NORMAL_TAGGED))) 149 mask |= PTE_ATTRINDX_MASK; 150 151 return ((old ^ new) & ~mask) == 0; 152 } 153 154 static void init_clear_pgtable(void *table) 155 { 156 clear_page(table); 157 158 /* Ensure the zeroing is observed by page table walks. */ 159 dsb(ishst); 160 } 161 162 static void init_pte(pte_t *ptep, unsigned long addr, unsigned long end, 163 phys_addr_t phys, pgprot_t prot) 164 { 165 do { 166 pte_t old_pte = __ptep_get(ptep); 167 168 /* 169 * Required barriers to make this visible to the table walker 170 * are deferred to the end of alloc_init_cont_pte(). 171 */ 172 __set_pte_nosync(ptep, pfn_pte(__phys_to_pfn(phys), prot)); 173 174 /* 175 * After the PTE entry has been populated once, we 176 * only allow updates to the permission attributes. 177 */ 178 BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), 179 pte_val(__ptep_get(ptep)))); 180 181 phys += PAGE_SIZE; 182 } while (ptep++, addr += PAGE_SIZE, addr != end); 183 } 184 185 static bool pte_range_has_valid_noncont(pte_t *ptep) 186 { 187 for (int i = 0; i < CONT_PTES; i++) { 188 pte_t pte = __ptep_get(&ptep[i]); 189 190 if (pte_valid(pte) && !pte_cont(pte)) 191 return true; 192 } 193 return false; 194 } 195 196 static int alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr, 197 unsigned long end, phys_addr_t phys, 198 pgprot_t prot, 199 phys_addr_t (*pgtable_alloc)(enum pgtable_level), 200 int flags) 201 { 202 unsigned long next; 203 pmd_t pmd = READ_ONCE(*pmdp); 204 pte_t *ptep; 205 206 BUG_ON(pmd_leaf(pmd)); 207 if (pmd_none(pmd)) { 208 pmdval_t pmdval = PMD_TYPE_TABLE | PMD_TABLE_UXN | PMD_TABLE_AF; 209 phys_addr_t pte_phys; 210 211 if (flags & NO_EXEC_MAPPINGS) 212 pmdval |= PMD_TABLE_PXN; 213 BUG_ON(!pgtable_alloc); 214 pte_phys = pgtable_alloc(PGTABLE_LEVEL_PTE); 215 if (pte_phys == INVALID_PHYS_ADDR) 216 return -ENOMEM; 217 ptep = pte_set_fixmap(pte_phys); 218 init_clear_pgtable(ptep); 219 ptep += pte_index(addr); 220 __pmd_populate(pmdp, pte_phys, pmdval); 221 } else { 222 BUG_ON(pmd_bad(pmd)); 223 ptep = pte_set_fixmap_offset(pmdp, addr); 224 } 225 226 do { 227 pgprot_t __prot = prot; 228 229 next = pte_cont_addr_end(addr, end); 230 231 /* use a contiguous mapping if the range is suitably aligned */ 232 if ((((addr | next | phys) & ~CONT_PTE_MASK) == 0) && 233 (flags & NO_CONT_MAPPINGS) == 0 && 234 !pte_range_has_valid_noncont(ptep)) 235 __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 236 237 init_pte(ptep, addr, next, phys, __prot); 238 239 ptep += pte_index(next) - pte_index(addr); 240 phys += next - addr; 241 } while (addr = next, addr != end); 242 243 /* 244 * Note: barriers and maintenance necessary to clear the fixmap slot 245 * ensure that all previous pgtable writes are visible to the table 246 * walker. 247 */ 248 pte_clear_fixmap(); 249 250 return 0; 251 } 252 253 static int init_pmd(pmd_t *pmdp, unsigned long addr, unsigned long end, 254 phys_addr_t phys, pgprot_t prot, 255 phys_addr_t (*pgtable_alloc)(enum pgtable_level), int flags) 256 { 257 unsigned long next; 258 259 do { 260 pmd_t old_pmd = READ_ONCE(*pmdp); 261 262 next = pmd_addr_end(addr, end); 263 264 /* try section mapping first */ 265 if (((addr | next | phys) & ~PMD_MASK) == 0 && 266 (flags & NO_BLOCK_MAPPINGS) == 0 && 267 !pmd_table(old_pmd)) { 268 WARN_ON(!pmd_set_huge(pmdp, phys, prot)); 269 270 /* 271 * After the PMD entry has been populated once, we 272 * only allow updates to the permission attributes. 273 */ 274 BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd), 275 READ_ONCE(pmd_val(*pmdp)))); 276 } else { 277 int ret; 278 279 ret = alloc_init_cont_pte(pmdp, addr, next, phys, prot, 280 pgtable_alloc, flags); 281 if (ret) 282 return ret; 283 284 VM_WARN_ON_ONCE(pmd_val(old_pmd) != 0 && 285 pmd_val(old_pmd) != READ_ONCE(pmd_val(*pmdp))); 286 } 287 phys += next - addr; 288 } while (pmdp++, addr = next, addr != end); 289 290 return 0; 291 } 292 293 static bool pmd_range_has_valid_noncont(pmd_t *pmdp) 294 { 295 for (int i = 0; i < CONT_PMDS; i++) { 296 pte_t pte = pmd_pte(READ_ONCE(pmdp[i])); 297 298 if (pte_valid(pte) && !pte_cont(pte)) 299 return true; 300 } 301 return false; 302 } 303 304 static int alloc_init_cont_pmd(pud_t *pudp, unsigned long addr, 305 unsigned long end, phys_addr_t phys, 306 pgprot_t prot, 307 phys_addr_t (*pgtable_alloc)(enum pgtable_level), 308 int flags) 309 { 310 int ret; 311 unsigned long next; 312 pud_t pud = READ_ONCE(*pudp); 313 pmd_t *pmdp; 314 315 /* 316 * Check for initial section mappings in the pgd/pud. 317 */ 318 BUG_ON(pud_leaf(pud)); 319 if (pud_none(pud)) { 320 pudval_t pudval = PUD_TYPE_TABLE | PUD_TABLE_UXN | PUD_TABLE_AF; 321 phys_addr_t pmd_phys; 322 323 if (flags & NO_EXEC_MAPPINGS) 324 pudval |= PUD_TABLE_PXN; 325 BUG_ON(!pgtable_alloc); 326 pmd_phys = pgtable_alloc(PGTABLE_LEVEL_PMD); 327 if (pmd_phys == INVALID_PHYS_ADDR) 328 return -ENOMEM; 329 pmdp = pmd_set_fixmap(pmd_phys); 330 init_clear_pgtable(pmdp); 331 pmdp += pmd_index(addr); 332 __pud_populate(pudp, pmd_phys, pudval); 333 } else { 334 BUG_ON(pud_bad(pud)); 335 pmdp = pmd_set_fixmap_offset(pudp, addr); 336 } 337 338 do { 339 pgprot_t __prot = prot; 340 341 next = pmd_cont_addr_end(addr, end); 342 343 /* use a contiguous mapping if the range is suitably aligned */ 344 if ((((addr | next | phys) & ~CONT_PMD_MASK) == 0) && 345 (flags & NO_CONT_MAPPINGS) == 0 && 346 !pmd_range_has_valid_noncont(pmdp)) 347 __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 348 349 ret = init_pmd(pmdp, addr, next, phys, __prot, pgtable_alloc, flags); 350 if (ret) 351 goto out; 352 353 pmdp += pmd_index(next) - pmd_index(addr); 354 phys += next - addr; 355 } while (addr = next, addr != end); 356 357 out: 358 pmd_clear_fixmap(); 359 360 return ret; 361 } 362 363 static int alloc_init_pud(p4d_t *p4dp, unsigned long addr, unsigned long end, 364 phys_addr_t phys, pgprot_t prot, 365 phys_addr_t (*pgtable_alloc)(enum pgtable_level), 366 int flags) 367 { 368 int ret = 0; 369 unsigned long next; 370 p4d_t p4d = READ_ONCE(*p4dp); 371 pud_t *pudp; 372 373 if (p4d_none(p4d)) { 374 p4dval_t p4dval = P4D_TYPE_TABLE | P4D_TABLE_UXN | P4D_TABLE_AF; 375 phys_addr_t pud_phys; 376 377 if (flags & NO_EXEC_MAPPINGS) 378 p4dval |= P4D_TABLE_PXN; 379 BUG_ON(!pgtable_alloc); 380 pud_phys = pgtable_alloc(PGTABLE_LEVEL_PUD); 381 if (pud_phys == INVALID_PHYS_ADDR) 382 return -ENOMEM; 383 pudp = pud_set_fixmap(pud_phys); 384 init_clear_pgtable(pudp); 385 pudp += pud_index(addr); 386 __p4d_populate(p4dp, pud_phys, p4dval); 387 } else { 388 BUG_ON(p4d_bad(p4d)); 389 pudp = pud_set_fixmap_offset(p4dp, addr); 390 } 391 392 do { 393 pud_t old_pud = READ_ONCE(*pudp); 394 395 next = pud_addr_end(addr, end); 396 397 /* 398 * For 4K granule only, attempt to put down a 1GB block 399 */ 400 if (pud_sect_supported() && 401 ((addr | next | phys) & ~PUD_MASK) == 0 && 402 (flags & NO_BLOCK_MAPPINGS) == 0 && 403 !pud_table(old_pud)) { 404 WARN_ON(!pud_set_huge(pudp, phys, prot)); 405 406 /* 407 * After the PUD entry has been populated once, we 408 * only allow updates to the permission attributes. 409 */ 410 BUG_ON(!pgattr_change_is_safe(pud_val(old_pud), 411 READ_ONCE(pud_val(*pudp)))); 412 } else { 413 ret = alloc_init_cont_pmd(pudp, addr, next, phys, prot, 414 pgtable_alloc, flags); 415 if (ret) 416 goto out; 417 418 VM_WARN_ON_ONCE(pud_val(old_pud) != 0 && 419 pud_val(old_pud) != READ_ONCE(pud_val(*pudp))); 420 } 421 phys += next - addr; 422 } while (pudp++, addr = next, addr != end); 423 424 out: 425 pud_clear_fixmap(); 426 427 return ret; 428 } 429 430 static int alloc_init_p4d(pgd_t *pgdp, unsigned long addr, unsigned long end, 431 phys_addr_t phys, pgprot_t prot, 432 phys_addr_t (*pgtable_alloc)(enum pgtable_level), 433 int flags) 434 { 435 int ret; 436 unsigned long next; 437 pgd_t pgd = READ_ONCE(*pgdp); 438 p4d_t *p4dp; 439 440 if (pgd_none(pgd)) { 441 pgdval_t pgdval = PGD_TYPE_TABLE | PGD_TABLE_UXN | PGD_TABLE_AF; 442 phys_addr_t p4d_phys; 443 444 if (flags & NO_EXEC_MAPPINGS) 445 pgdval |= PGD_TABLE_PXN; 446 BUG_ON(!pgtable_alloc); 447 p4d_phys = pgtable_alloc(PGTABLE_LEVEL_P4D); 448 if (p4d_phys == INVALID_PHYS_ADDR) 449 return -ENOMEM; 450 p4dp = p4d_set_fixmap(p4d_phys); 451 init_clear_pgtable(p4dp); 452 p4dp += p4d_index(addr); 453 __pgd_populate(pgdp, p4d_phys, pgdval); 454 } else { 455 BUG_ON(pgd_bad(pgd)); 456 p4dp = p4d_set_fixmap_offset(pgdp, addr); 457 } 458 459 do { 460 p4d_t old_p4d = READ_ONCE(*p4dp); 461 462 next = p4d_addr_end(addr, end); 463 464 ret = alloc_init_pud(p4dp, addr, next, phys, prot, 465 pgtable_alloc, flags); 466 if (ret) 467 goto out; 468 469 VM_WARN_ON_ONCE(p4d_val(old_p4d) != 0 && 470 p4d_val(old_p4d) != READ_ONCE(p4d_val(*p4dp))); 471 472 phys += next - addr; 473 } while (p4dp++, addr = next, addr != end); 474 475 out: 476 p4d_clear_fixmap(); 477 478 return ret; 479 } 480 481 static int __create_pgd_mapping_locked(pgd_t *pgdir, phys_addr_t phys, 482 unsigned long virt, phys_addr_t size, 483 pgprot_t prot, 484 phys_addr_t (*pgtable_alloc)(enum pgtable_level), 485 int flags) 486 { 487 int ret; 488 unsigned long addr, end, next; 489 pgd_t *pgdp = pgd_offset_pgd(pgdir, virt); 490 491 /* 492 * If the virtual and physical address don't have the same offset 493 * within a page, we cannot map the region as the caller expects. 494 */ 495 if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 496 return -EINVAL; 497 498 phys &= PAGE_MASK; 499 addr = virt & PAGE_MASK; 500 end = PAGE_ALIGN(virt + size); 501 502 do { 503 next = pgd_addr_end(addr, end); 504 ret = alloc_init_p4d(pgdp, addr, next, phys, prot, pgtable_alloc, 505 flags); 506 if (ret) 507 return ret; 508 phys += next - addr; 509 } while (pgdp++, addr = next, addr != end); 510 511 return 0; 512 } 513 514 static int __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 515 unsigned long virt, phys_addr_t size, 516 pgprot_t prot, 517 phys_addr_t (*pgtable_alloc)(enum pgtable_level), 518 int flags) 519 { 520 int ret; 521 522 mutex_lock(&fixmap_lock); 523 ret = __create_pgd_mapping_locked(pgdir, phys, virt, size, prot, 524 pgtable_alloc, flags); 525 mutex_unlock(&fixmap_lock); 526 527 return ret; 528 } 529 530 static void early_create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 531 unsigned long virt, phys_addr_t size, 532 pgprot_t prot, 533 phys_addr_t (*pgtable_alloc)(enum pgtable_level), 534 int flags) 535 { 536 int ret; 537 538 ret = __create_pgd_mapping(pgdir, phys, virt, size, prot, pgtable_alloc, 539 flags); 540 if (ret) 541 panic("Failed to create page tables\n"); 542 } 543 544 static phys_addr_t __pgd_pgtable_alloc(struct mm_struct *mm, gfp_t gfp, 545 enum pgtable_level pgtable_level) 546 { 547 /* Page is zeroed by init_clear_pgtable() so don't duplicate effort. */ 548 struct ptdesc *ptdesc = pagetable_alloc(gfp & ~__GFP_ZERO, 0); 549 phys_addr_t pa; 550 551 if (!ptdesc) 552 return INVALID_PHYS_ADDR; 553 554 pa = page_to_phys(ptdesc_page(ptdesc)); 555 556 switch (pgtable_level) { 557 case PGTABLE_LEVEL_PTE: 558 BUG_ON(!pagetable_pte_ctor(mm, ptdesc)); 559 break; 560 case PGTABLE_LEVEL_PMD: 561 BUG_ON(!pagetable_pmd_ctor(mm, ptdesc)); 562 break; 563 case PGTABLE_LEVEL_PUD: 564 pagetable_pud_ctor(ptdesc); 565 break; 566 case PGTABLE_LEVEL_P4D: 567 pagetable_p4d_ctor(ptdesc); 568 break; 569 case PGTABLE_LEVEL_PGD: 570 VM_WARN_ON(1); 571 break; 572 } 573 574 return pa; 575 } 576 577 static phys_addr_t 578 pgd_pgtable_alloc_init_mm_gfp(enum pgtable_level pgtable_level, gfp_t gfp) 579 { 580 return __pgd_pgtable_alloc(&init_mm, gfp, pgtable_level); 581 } 582 583 static phys_addr_t __maybe_unused 584 pgd_pgtable_alloc_init_mm(enum pgtable_level pgtable_level) 585 { 586 return pgd_pgtable_alloc_init_mm_gfp(pgtable_level, GFP_PGTABLE_KERNEL); 587 } 588 589 static phys_addr_t 590 pgd_pgtable_alloc_special_mm(enum pgtable_level pgtable_level) 591 { 592 return __pgd_pgtable_alloc(NULL, GFP_PGTABLE_KERNEL, pgtable_level); 593 } 594 595 static void split_contpte(pte_t *ptep) 596 { 597 int i; 598 599 ptep = PTR_ALIGN_DOWN(ptep, sizeof(*ptep) * CONT_PTES); 600 for (i = 0; i < CONT_PTES; i++, ptep++) 601 __set_pte(ptep, pte_mknoncont(__ptep_get(ptep))); 602 } 603 604 static int split_pmd(pmd_t *pmdp, pmd_t pmd, gfp_t gfp, bool to_cont) 605 { 606 pmdval_t tableprot = PMD_TYPE_TABLE | PMD_TABLE_UXN | PMD_TABLE_AF; 607 unsigned long pfn = pmd_pfn(pmd); 608 pgprot_t prot = pmd_pgprot(pmd); 609 phys_addr_t pte_phys; 610 pte_t *ptep; 611 int i; 612 613 pte_phys = pgd_pgtable_alloc_init_mm_gfp(PGTABLE_LEVEL_PTE, gfp); 614 if (pte_phys == INVALID_PHYS_ADDR) 615 return -ENOMEM; 616 ptep = (pte_t *)phys_to_virt(pte_phys); 617 618 if (pgprot_val(prot) & PMD_SECT_PXN) 619 tableprot |= PMD_TABLE_PXN; 620 621 prot = __pgprot((pgprot_val(prot) & ~PTE_TYPE_MASK) | PTE_TYPE_PAGE); 622 if (!pmd_valid(pmd)) 623 prot = pte_pgprot(pte_mkinvalid(pfn_pte(0, prot))); 624 prot = __pgprot(pgprot_val(prot) & ~PTE_CONT); 625 if (to_cont) 626 prot = __pgprot(pgprot_val(prot) | PTE_CONT); 627 628 for (i = 0; i < PTRS_PER_PTE; i++, ptep++, pfn++) 629 __set_pte(ptep, pfn_pte(pfn, prot)); 630 631 /* 632 * Ensure the pte entries are visible to the table walker by the time 633 * the pmd entry that points to the ptes is visible. 634 */ 635 dsb(ishst); 636 __pmd_populate(pmdp, pte_phys, tableprot); 637 638 return 0; 639 } 640 641 static void split_contpmd(pmd_t *pmdp) 642 { 643 int i; 644 645 pmdp = PTR_ALIGN_DOWN(pmdp, sizeof(*pmdp) * CONT_PMDS); 646 for (i = 0; i < CONT_PMDS; i++, pmdp++) 647 set_pmd(pmdp, pmd_mknoncont(pmdp_get(pmdp))); 648 } 649 650 static int split_pud(pud_t *pudp, pud_t pud, gfp_t gfp, bool to_cont) 651 { 652 pudval_t tableprot = PUD_TYPE_TABLE | PUD_TABLE_UXN | PUD_TABLE_AF; 653 unsigned int step = PMD_SIZE >> PAGE_SHIFT; 654 unsigned long pfn = pud_pfn(pud); 655 pgprot_t prot = pud_pgprot(pud); 656 phys_addr_t pmd_phys; 657 pmd_t *pmdp; 658 int i; 659 660 pmd_phys = pgd_pgtable_alloc_init_mm_gfp(PGTABLE_LEVEL_PMD, gfp); 661 if (pmd_phys == INVALID_PHYS_ADDR) 662 return -ENOMEM; 663 pmdp = (pmd_t *)phys_to_virt(pmd_phys); 664 665 if (pgprot_val(prot) & PMD_SECT_PXN) 666 tableprot |= PUD_TABLE_PXN; 667 668 prot = __pgprot((pgprot_val(prot) & ~PMD_TYPE_MASK) | PMD_TYPE_SECT); 669 if (!pud_valid(pud)) 670 prot = pmd_pgprot(pmd_mkinvalid(pfn_pmd(0, prot))); 671 prot = __pgprot(pgprot_val(prot) & ~PTE_CONT); 672 if (to_cont) 673 prot = __pgprot(pgprot_val(prot) | PTE_CONT); 674 675 for (i = 0; i < PTRS_PER_PMD; i++, pmdp++, pfn += step) 676 set_pmd(pmdp, pfn_pmd(pfn, prot)); 677 678 /* 679 * Ensure the pmd entries are visible to the table walker by the time 680 * the pud entry that points to the pmds is visible. 681 */ 682 dsb(ishst); 683 __pud_populate(pudp, pmd_phys, tableprot); 684 685 return 0; 686 } 687 688 static int split_kernel_leaf_mapping_locked(unsigned long addr) 689 { 690 pgd_t *pgdp, pgd; 691 p4d_t *p4dp, p4d; 692 pud_t *pudp, pud; 693 pmd_t *pmdp, pmd; 694 pte_t *ptep, pte; 695 int ret = 0; 696 697 /* 698 * PGD: If addr is PGD aligned then addr already describes a leaf 699 * boundary. If not present then there is nothing to split. 700 */ 701 if (ALIGN_DOWN(addr, PGDIR_SIZE) == addr) 702 goto out; 703 pgdp = pgd_offset_k(addr); 704 pgd = pgdp_get(pgdp); 705 if (!pgd_present(pgd)) 706 goto out; 707 708 /* 709 * P4D: If addr is P4D aligned then addr already describes a leaf 710 * boundary. If not present then there is nothing to split. 711 */ 712 if (ALIGN_DOWN(addr, P4D_SIZE) == addr) 713 goto out; 714 p4dp = p4d_offset(pgdp, addr); 715 p4d = p4dp_get(p4dp); 716 if (!p4d_present(p4d)) 717 goto out; 718 719 /* 720 * PUD: If addr is PUD aligned then addr already describes a leaf 721 * boundary. If not present then there is nothing to split. Otherwise, 722 * if we have a pud leaf, split to contpmd. 723 */ 724 if (ALIGN_DOWN(addr, PUD_SIZE) == addr) 725 goto out; 726 pudp = pud_offset(p4dp, addr); 727 pud = pudp_get(pudp); 728 if (!pud_present(pud)) 729 goto out; 730 if (pud_leaf(pud)) { 731 ret = split_pud(pudp, pud, GFP_PGTABLE_KERNEL, true); 732 if (ret) 733 goto out; 734 } 735 736 /* 737 * CONTPMD: If addr is CONTPMD aligned then addr already describes a 738 * leaf boundary. If not present then there is nothing to split. 739 * Otherwise, if we have a contpmd leaf, split to pmd. 740 */ 741 if (ALIGN_DOWN(addr, CONT_PMD_SIZE) == addr) 742 goto out; 743 pmdp = pmd_offset(pudp, addr); 744 pmd = pmdp_get(pmdp); 745 if (!pmd_present(pmd)) 746 goto out; 747 if (pmd_leaf(pmd)) { 748 if (pmd_cont(pmd)) 749 split_contpmd(pmdp); 750 /* 751 * PMD: If addr is PMD aligned then addr already describes a 752 * leaf boundary. Otherwise, split to contpte. 753 */ 754 if (ALIGN_DOWN(addr, PMD_SIZE) == addr) 755 goto out; 756 ret = split_pmd(pmdp, pmd, GFP_PGTABLE_KERNEL, true); 757 if (ret) 758 goto out; 759 } 760 761 /* 762 * CONTPTE: If addr is CONTPTE aligned then addr already describes a 763 * leaf boundary. If not present then there is nothing to split. 764 * Otherwise, if we have a contpte leaf, split to pte. 765 */ 766 if (ALIGN_DOWN(addr, CONT_PTE_SIZE) == addr) 767 goto out; 768 ptep = pte_offset_kernel(pmdp, addr); 769 pte = __ptep_get(ptep); 770 if (!pte_present(pte)) 771 goto out; 772 if (pte_cont(pte)) 773 split_contpte(ptep); 774 775 out: 776 return ret; 777 } 778 779 static inline bool force_pte_mapping(void) 780 { 781 const bool bbml3 = system_capabilities_finalized() ? 782 system_supports_bbml3() : cpu_supports_bbml3(); 783 784 if (debug_pagealloc_enabled()) 785 return true; 786 if (bbml3) 787 return false; 788 return rodata_full || arm64_kfence_can_set_direct_map() || is_realm_world(); 789 } 790 791 static DEFINE_MUTEX(pgtable_split_lock); 792 static bool linear_map_requires_bbml3; 793 794 int split_kernel_leaf_mapping(unsigned long start, unsigned long end) 795 { 796 int ret; 797 798 /* 799 * If the region is within a pte-mapped area, there is no need to try to 800 * split. Additionally, CONFIG_DEBUG_PAGEALLOC and CONFIG_KFENCE may 801 * change permissions from atomic context so for those cases (which are 802 * always pte-mapped), we must not go any further because taking the 803 * mutex below may sleep. Do not call force_pte_mapping() here because 804 * it could return a confusing result if called from a secondary cpu 805 * prior to finalizing caps. Instead, linear_map_requires_bbml3 gives us 806 * what we need. 807 */ 808 if (!linear_map_requires_bbml3 || is_kfence_address((void *)start)) 809 return 0; 810 811 if (!system_supports_bbml3()) { 812 /* 813 * BBML3 systems should not be trying to change 814 * permissions on anything that is not pte-mapped in the first 815 * place. Just return early and let the permission change code 816 * raise a warning if not already pte-mapped. 817 */ 818 if (system_capabilities_finalized()) 819 return 0; 820 821 /* 822 * Boot-time: split_kernel_leaf_mapping_locked() allocates from 823 * page allocator. Can't split until it's available. 824 */ 825 if (WARN_ON(!page_alloc_available)) 826 return -EBUSY; 827 828 /* 829 * Boot-time: Started secondary cpus but don't know if they 830 * support BBML3 yet. Can't allow splitting in this window 831 * in case they don't. 832 */ 833 if (WARN_ON(num_online_cpus() > 1)) 834 return -EBUSY; 835 } 836 837 /* 838 * Ensure start and end are at least page-aligned since this is the 839 * finest granularity we can split to. 840 */ 841 if (start != PAGE_ALIGN(start) || end != PAGE_ALIGN(end)) 842 return -EINVAL; 843 844 mutex_lock(&pgtable_split_lock); 845 lazy_mmu_mode_enable(); 846 847 /* 848 * The split_kernel_leaf_mapping_locked() may sleep, it is not a 849 * problem for ARM64 since ARM64's lazy MMU implementation allows 850 * sleeping. 851 * 852 * Optimize for the common case of splitting out a single page from a 853 * larger mapping. Here we can just split on the "least aligned" of 854 * start and end and this will guarantee that there must also be a split 855 * on the more aligned address since the both addresses must be in the 856 * same contpte block and it must have been split to ptes. 857 */ 858 if (end - start == PAGE_SIZE) { 859 start = __ffs(start) < __ffs(end) ? start : end; 860 ret = split_kernel_leaf_mapping_locked(start); 861 } else { 862 ret = split_kernel_leaf_mapping_locked(start); 863 if (!ret) 864 ret = split_kernel_leaf_mapping_locked(end); 865 } 866 867 lazy_mmu_mode_disable(); 868 mutex_unlock(&pgtable_split_lock); 869 return ret; 870 } 871 872 static int split_to_ptes_pud_entry(pud_t *pudp, unsigned long addr, 873 unsigned long next, struct mm_walk *walk) 874 { 875 gfp_t gfp = *(gfp_t *)walk->private; 876 pud_t pud = pudp_get(pudp); 877 int ret = 0; 878 879 if (pud_leaf(pud)) 880 ret = split_pud(pudp, pud, gfp, false); 881 882 return ret; 883 } 884 885 static int split_to_ptes_pmd_entry(pmd_t *pmdp, unsigned long addr, 886 unsigned long next, struct mm_walk *walk) 887 { 888 gfp_t gfp = *(gfp_t *)walk->private; 889 pmd_t pmd = pmdp_get(pmdp); 890 int ret = 0; 891 892 if (pmd_leaf(pmd)) { 893 if (pmd_cont(pmd)) 894 split_contpmd(pmdp); 895 ret = split_pmd(pmdp, pmd, gfp, false); 896 897 /* 898 * We have split the pmd directly to ptes so there is no need to 899 * visit each pte to check if they are contpte. 900 */ 901 walk->action = ACTION_CONTINUE; 902 } 903 904 return ret; 905 } 906 907 static int split_to_ptes_pte_entry(pte_t *ptep, unsigned long addr, 908 unsigned long next, struct mm_walk *walk) 909 { 910 pte_t pte = __ptep_get(ptep); 911 912 if (pte_cont(pte)) 913 split_contpte(ptep); 914 915 return 0; 916 } 917 918 static const struct mm_walk_ops split_to_ptes_ops = { 919 .pud_entry = split_to_ptes_pud_entry, 920 .pmd_entry = split_to_ptes_pmd_entry, 921 .pte_entry = split_to_ptes_pte_entry, 922 }; 923 924 static int range_split_to_ptes(unsigned long start, unsigned long end, gfp_t gfp) 925 { 926 int ret; 927 928 lazy_mmu_mode_enable(); 929 ret = walk_kernel_page_table_range_lockless(start, end, 930 &split_to_ptes_ops, NULL, &gfp); 931 lazy_mmu_mode_disable(); 932 933 return ret; 934 } 935 936 u32 idmap_kpti_bbml3_flag; 937 938 static void __init init_idmap_kpti_bbml3_flag(void) 939 { 940 WRITE_ONCE(idmap_kpti_bbml3_flag, 1); 941 /* Must be visible to other CPUs before stop_machine() is called. */ 942 smp_mb(); 943 } 944 945 static int __init linear_map_split_to_ptes(void *__unused) 946 { 947 /* 948 * Repainting the linear map must be done by CPU0 (the boot CPU) because 949 * that's the only CPU that we know supports BBML3. The other CPUs will 950 * be held in a waiting area with the idmap active. 951 */ 952 if (!smp_processor_id()) { 953 unsigned long lstart = _PAGE_OFFSET(vabits_actual); 954 unsigned long lend = PAGE_END; 955 unsigned long kstart = (unsigned long)lm_alias(_stext); 956 unsigned long kend = (unsigned long)lm_alias(__init_begin); 957 int ret; 958 959 /* 960 * Wait for all secondary CPUs to be put into the waiting area. 961 */ 962 smp_cond_load_acquire(&idmap_kpti_bbml3_flag, VAL == num_online_cpus()); 963 964 /* 965 * Walk all of the linear map [lstart, lend), except the kernel 966 * linear map alias [kstart, kend), and split all mappings to 967 * PTE. The kernel alias remains static throughout runtime so 968 * can continue to be safely mapped with large mappings. 969 */ 970 ret = range_split_to_ptes(lstart, kstart, GFP_ATOMIC); 971 if (!ret) 972 ret = range_split_to_ptes(kend, lend, GFP_ATOMIC); 973 if (ret) 974 panic("Failed to split linear map\n"); 975 flush_tlb_kernel_range(lstart, lend); 976 977 /* 978 * Relies on dsb in flush_tlb_kernel_range() to avoid reordering 979 * before any page table split operations. 980 */ 981 WRITE_ONCE(idmap_kpti_bbml3_flag, 0); 982 } else { 983 typedef void (wait_split_fn)(void); 984 extern wait_split_fn wait_linear_map_split_to_ptes; 985 wait_split_fn *wait_fn; 986 987 wait_fn = (void *)__pa_symbol(wait_linear_map_split_to_ptes); 988 989 /* 990 * At least one secondary CPU doesn't support BBML3 so cannot 991 * tolerate the size of the live mappings changing. So have the 992 * secondary CPUs wait for the boot CPU to make the changes 993 * with the idmap active and init_mm inactive. 994 */ 995 cpu_install_idmap(); 996 wait_fn(); 997 cpu_uninstall_idmap(); 998 } 999 1000 return 0; 1001 } 1002 1003 void __init linear_map_maybe_split_to_ptes(void) 1004 { 1005 if (linear_map_requires_bbml3 && !system_supports_bbml3()) { 1006 init_idmap_kpti_bbml3_flag(); 1007 stop_machine(linear_map_split_to_ptes, NULL, cpu_online_mask); 1008 } 1009 } 1010 1011 /* 1012 * This function can only be used to modify existing table entries, 1013 * without allocating new levels of table. Note that this permits the 1014 * creation of new section or page entries. 1015 */ 1016 void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt, 1017 phys_addr_t size, pgprot_t prot) 1018 { 1019 if (virt < PAGE_OFFSET) { 1020 pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 1021 &phys, virt); 1022 return; 1023 } 1024 early_create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, 0); 1025 } 1026 1027 void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 1028 unsigned long virt, phys_addr_t size, 1029 pgprot_t prot, bool page_mappings_only) 1030 { 1031 int flags = 0; 1032 1033 BUG_ON(mm == &init_mm); 1034 1035 if (page_mappings_only) 1036 flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 1037 1038 early_create_pgd_mapping(mm->pgd, phys, virt, size, prot, 1039 pgd_pgtable_alloc_special_mm, flags); 1040 } 1041 1042 static void update_mapping_prot(phys_addr_t phys, unsigned long virt, 1043 phys_addr_t size, pgprot_t prot) 1044 { 1045 if (virt < PAGE_OFFSET) { 1046 pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n", 1047 &phys, virt); 1048 return; 1049 } 1050 1051 early_create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, 0); 1052 1053 /* flush the TLBs after updating live kernel mappings */ 1054 flush_tlb_kernel_range(virt, virt + size); 1055 } 1056 1057 static void __init __map_memblock(phys_addr_t start, phys_addr_t end, 1058 pgprot_t prot, int flags) 1059 { 1060 early_create_pgd_mapping(swapper_pg_dir, start, __phys_to_virt(start), 1061 end - start, prot, early_pgtable_alloc, flags); 1062 } 1063 1064 static void mark_linear_data_alias_valid(bool valid) 1065 { 1066 set_memory_valid((unsigned long)lm_alias(__init_end), 1067 (unsigned long)(__bss_stop - __init_end) / PAGE_SIZE, 1068 valid); 1069 } 1070 1071 static int arm64_hibernate_pm_notify(struct notifier_block *nb, 1072 unsigned long mode, void *unused) 1073 { 1074 switch (mode) { 1075 default: 1076 break; 1077 case PM_POST_HIBERNATION: 1078 mark_linear_data_alias_valid(false); 1079 break; 1080 case PM_HIBERNATION_PREPARE: 1081 mark_linear_data_alias_valid(true); 1082 break; 1083 } 1084 return 0; 1085 } 1086 1087 void __init mark_linear_text_alias_ro(void) 1088 { 1089 /* 1090 * Remove the write permissions from the linear alias of .text/.rodata 1091 */ 1092 update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text), 1093 (unsigned long)__init_begin - (unsigned long)_text, 1094 PAGE_KERNEL_RO); 1095 1096 /* 1097 * Register a PM notifier to remap the linear alias of data/bss as 1098 * valid read/write before hibernation. This is needed because the 1099 * snapshot logic disregards PageReserved pages (such as the ones 1100 * covering the kernel image) unless they are mapped in the linear 1101 * map. 1102 */ 1103 if (IS_ENABLED(CONFIG_HIBERNATION) && rodata_enabled) { 1104 static struct notifier_block nb = { 1105 .notifier_call = arm64_hibernate_pm_notify 1106 }; 1107 1108 register_pm_notifier(&nb); 1109 } 1110 } 1111 1112 #ifdef CONFIG_KFENCE 1113 1114 bool __ro_after_init kfence_early_init = !!CONFIG_KFENCE_SAMPLE_INTERVAL; 1115 1116 /* early_param() will be parsed before map_mem() below. */ 1117 static int __init parse_kfence_early_init(char *arg) 1118 { 1119 int val; 1120 1121 if (get_option(&arg, &val)) 1122 kfence_early_init = !!val; 1123 return 0; 1124 } 1125 early_param("kfence.sample_interval", parse_kfence_early_init); 1126 1127 static void __init arm64_kfence_map_pool(void) 1128 { 1129 phys_addr_t kfence_pool; 1130 1131 if (!kfence_early_init) 1132 return; 1133 1134 kfence_pool = memblock_phys_alloc(KFENCE_POOL_SIZE, PAGE_SIZE); 1135 if (!kfence_pool) { 1136 pr_err("failed to allocate kfence pool\n"); 1137 kfence_early_init = false; 1138 return; 1139 } 1140 1141 /* KFENCE pool needs page-level mapping. */ 1142 __map_memblock(kfence_pool, kfence_pool + KFENCE_POOL_SIZE, 1143 pgprot_tagged(PAGE_KERNEL), 1144 NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS | NO_EXEC_MAPPINGS); 1145 __kfence_pool = phys_to_virt(kfence_pool); 1146 } 1147 1148 bool arch_kfence_init_pool(void) 1149 { 1150 unsigned long start = (unsigned long)__kfence_pool; 1151 unsigned long end = start + KFENCE_POOL_SIZE; 1152 int ret; 1153 1154 /* Exit early if we know the linear map is already pte-mapped. */ 1155 if (force_pte_mapping()) 1156 return true; 1157 1158 /* Kfence pool is already pte-mapped for the early init case. */ 1159 if (kfence_early_init) 1160 return true; 1161 1162 mutex_lock(&pgtable_split_lock); 1163 ret = range_split_to_ptes(start, end, GFP_PGTABLE_KERNEL); 1164 mutex_unlock(&pgtable_split_lock); 1165 1166 /* 1167 * Since the system supports bbml3, tlb invalidation is not 1168 * required here; the pgtable mappings have been split to pte but larger 1169 * entries may safely linger in the TLB. 1170 */ 1171 1172 return !ret; 1173 } 1174 #else /* CONFIG_KFENCE */ 1175 1176 static inline void arm64_kfence_map_pool(void) { } 1177 1178 #endif /* CONFIG_KFENCE */ 1179 1180 static void __init map_mem(void) 1181 { 1182 static const u64 direct_map_end = _PAGE_END(VA_BITS_MIN); 1183 phys_addr_t kernel_start = __pa_symbol(_text); 1184 phys_addr_t init_begin = __pa_symbol(__init_begin); 1185 phys_addr_t init_end = __pa_symbol(__init_end); 1186 phys_addr_t kernel_end = __pa_symbol(__bss_stop); 1187 phys_addr_t start, end; 1188 int flags = NO_EXEC_MAPPINGS; 1189 u64 i; 1190 1191 /* 1192 * Setting hierarchical PXNTable attributes on table entries covering 1193 * the linear region is only possible if it is guaranteed that no table 1194 * entries at any level are being shared between the linear region and 1195 * the vmalloc region. Check whether this is true for the PGD level, in 1196 * which case it is guaranteed to be true for all other levels as well. 1197 * (Unless we are running with support for LPA2, in which case the 1198 * entire reduced VA space is covered by a single pgd_t which will have 1199 * been populated without the PXNTable attribute by the time we get here.) 1200 */ 1201 BUILD_BUG_ON(pgd_index(direct_map_end - 1) == pgd_index(direct_map_end) && 1202 pgd_index(_PAGE_OFFSET(VA_BITS_MIN)) != PTRS_PER_PGD - 1); 1203 1204 arm64_kfence_map_pool(); 1205 1206 linear_map_requires_bbml3 = !force_pte_mapping() && can_set_direct_map(); 1207 1208 if (force_pte_mapping()) 1209 flags |= NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 1210 1211 /* 1212 * Map the linear alias of the [_text, __init_begin) interval first 1213 * so that its write permissions can be removed later without the need 1214 * to split any block mappings created by the loop below. 1215 * 1216 * Write permissions are needed for alternatives patching, and will be 1217 * removed later by mark_linear_text_alias_ro() above. This makes the 1218 * contents of the region accessible to subsystems such as hibernate, 1219 * but protects it from inadvertent modification or execution. 1220 */ 1221 __map_memblock(kernel_start, init_begin, pgprot_tagged(PAGE_KERNEL), 1222 flags); 1223 1224 /* Map the kernel data/bss so it can be remapped later */ 1225 __map_memblock(init_end, kernel_end, pgprot_tagged(PAGE_KERNEL), 1226 flags); 1227 1228 /* map all the memory banks */ 1229 for_each_mem_range(i, &start, &end) { 1230 /* 1231 * for_each_mem_range may return sub-page-aligned boundaries 1232 * after memblock_mark_nomap() splits regions at byte precision. 1233 * __create_pgd_mapping_locked aligns phys down to PAGE_MASK, 1234 * which could accidentally map no-map memory on the boundary. 1235 * Round the mappable range inward: start UP, end DOWN, so 1236 * that the mapped area never overlaps with adjacent no-map 1237 * regions. The cost is at most one page of unmapped gap at 1238 * each boundary. 1239 */ 1240 start = PAGE_ALIGN(start); 1241 end = end & PAGE_MASK; 1242 if (start >= end) 1243 continue; 1244 /* 1245 * The linear map must allow allocation tags reading/writing 1246 * if MTE is present. Otherwise, it has the same attributes as 1247 * PAGE_KERNEL. 1248 */ 1249 __map_memblock(start, end, pgprot_tagged(PAGE_KERNEL), 1250 flags); 1251 } 1252 } 1253 1254 void mark_rodata_ro(void) 1255 { 1256 unsigned long section_size; 1257 1258 /* 1259 * mark .rodata as read only. Use __init_begin rather than __end_rodata 1260 * to cover NOTES and EXCEPTION_TABLE. 1261 */ 1262 section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata; 1263 WRITE_ONCE(rodata_is_rw, false); 1264 update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata, 1265 section_size, PAGE_KERNEL_RO); 1266 /* mark the range between _text and _stext as read only. */ 1267 update_mapping_prot(__pa_symbol(_text), (unsigned long)_text, 1268 (unsigned long)_stext - (unsigned long)_text, 1269 PAGE_KERNEL_RO); 1270 1271 /* Map the kernel data/bss as invalid in the linear map */ 1272 mark_linear_data_alias_valid(false); 1273 } 1274 1275 static void __init declare_vma(struct vm_struct *vma, 1276 void *va_start, void *va_end, 1277 unsigned long vm_flags) 1278 { 1279 phys_addr_t pa_start = __pa_symbol(va_start); 1280 unsigned long size = va_end - va_start; 1281 1282 BUG_ON(!PAGE_ALIGNED(pa_start)); 1283 BUG_ON(!PAGE_ALIGNED(size)); 1284 1285 if (!(vm_flags & VM_NO_GUARD)) 1286 size += PAGE_SIZE; 1287 1288 vma->addr = va_start; 1289 vma->phys_addr = pa_start; 1290 vma->size = size; 1291 vma->flags = VM_MAP | vm_flags; 1292 vma->caller = __builtin_return_address(0); 1293 1294 vm_area_add_early(vma); 1295 } 1296 1297 #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 1298 #define KPTI_NG_TEMP_VA (-(1UL << PMD_SHIFT)) 1299 1300 static phys_addr_t kpti_ng_temp_alloc __initdata; 1301 1302 static phys_addr_t __init kpti_ng_pgd_alloc(enum pgtable_level pgtable_level) 1303 { 1304 kpti_ng_temp_alloc -= PAGE_SIZE; 1305 return kpti_ng_temp_alloc; 1306 } 1307 1308 static int __init __kpti_install_ng_mappings(void *__unused) 1309 { 1310 typedef void (kpti_remap_fn)(int, int, phys_addr_t, unsigned long); 1311 extern kpti_remap_fn idmap_kpti_install_ng_mappings; 1312 kpti_remap_fn *remap_fn; 1313 1314 int cpu = smp_processor_id(); 1315 int levels = CONFIG_PGTABLE_LEVELS; 1316 int order = order_base_2(levels); 1317 u64 kpti_ng_temp_pgd_pa = 0; 1318 pgd_t *kpti_ng_temp_pgd; 1319 u64 alloc = 0; 1320 1321 if (levels == 5 && !pgtable_l5_enabled()) 1322 levels = 4; 1323 else if (levels == 4 && !pgtable_l4_enabled()) 1324 levels = 3; 1325 1326 remap_fn = (void *)__pa_symbol(idmap_kpti_install_ng_mappings); 1327 1328 if (!cpu) { 1329 int ret; 1330 1331 alloc = __get_free_pages(GFP_ATOMIC | __GFP_ZERO, order); 1332 kpti_ng_temp_pgd = (pgd_t *)(alloc + (levels - 1) * PAGE_SIZE); 1333 kpti_ng_temp_alloc = kpti_ng_temp_pgd_pa = __pa(kpti_ng_temp_pgd); 1334 1335 // 1336 // Create a minimal page table hierarchy that permits us to map 1337 // the swapper page tables temporarily as we traverse them. 1338 // 1339 // The physical pages are laid out as follows: 1340 // 1341 // +--------+-/-------+-/------ +-/------ +-\\\--------+ 1342 // : PTE[] : | PMD[] : | PUD[] : | P4D[] : ||| PGD[] : 1343 // +--------+-\-------+-\------ +-\------ +-///--------+ 1344 // ^ 1345 // The first page is mapped into this hierarchy at a PMD_SHIFT 1346 // aligned virtual address, so that we can manipulate the PTE 1347 // level entries while the mapping is active. The first entry 1348 // covers the PTE[] page itself, the remaining entries are free 1349 // to be used as a ad-hoc fixmap. 1350 // 1351 ret = __create_pgd_mapping_locked(kpti_ng_temp_pgd, __pa(alloc), 1352 KPTI_NG_TEMP_VA, PAGE_SIZE, PAGE_KERNEL, 1353 kpti_ng_pgd_alloc, 0); 1354 if (ret) 1355 panic("Failed to create page tables\n"); 1356 } 1357 1358 cpu_install_idmap(); 1359 remap_fn(cpu, num_online_cpus(), kpti_ng_temp_pgd_pa, KPTI_NG_TEMP_VA); 1360 cpu_uninstall_idmap(); 1361 1362 if (!cpu) { 1363 free_pages(alloc, order); 1364 arm64_use_ng_mappings = true; 1365 } 1366 1367 return 0; 1368 } 1369 1370 void __init kpti_install_ng_mappings(void) 1371 { 1372 /* Check whether KPTI is going to be used */ 1373 if (!arm64_kernel_unmapped_at_el0()) 1374 return; 1375 1376 /* 1377 * We don't need to rewrite the page-tables if either we've done 1378 * it already or we have KASLR enabled and therefore have not 1379 * created any global mappings at all. 1380 */ 1381 if (arm64_use_ng_mappings) 1382 return; 1383 1384 init_idmap_kpti_bbml3_flag(); 1385 stop_machine(__kpti_install_ng_mappings, NULL, cpu_online_mask); 1386 } 1387 1388 static pgprot_t __init kernel_exec_prot(void) 1389 { 1390 return rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; 1391 } 1392 1393 static int __init map_entry_trampoline(void) 1394 { 1395 int i; 1396 1397 if (!arm64_kernel_unmapped_at_el0()) 1398 return 0; 1399 1400 pgprot_t prot = kernel_exec_prot(); 1401 phys_addr_t pa_start = __pa_symbol(__entry_tramp_text_start); 1402 1403 /* The trampoline is always mapped and can therefore be global */ 1404 pgprot_val(prot) &= ~PTE_NG; 1405 1406 /* Map only the text into the trampoline page table */ 1407 memset(tramp_pg_dir, 0, PGD_SIZE); 1408 early_create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, 1409 entry_tramp_text_size(), prot, 1410 pgd_pgtable_alloc_init_mm, NO_BLOCK_MAPPINGS); 1411 1412 /* Map both the text and data into the kernel page table */ 1413 for (i = 0; i < DIV_ROUND_UP(entry_tramp_text_size(), PAGE_SIZE); i++) 1414 __set_fixmap(FIX_ENTRY_TRAMP_TEXT1 - i, 1415 pa_start + i * PAGE_SIZE, prot); 1416 1417 if (IS_ENABLED(CONFIG_RELOCATABLE)) 1418 __set_fixmap(FIX_ENTRY_TRAMP_TEXT1 - i, 1419 pa_start + i * PAGE_SIZE, PAGE_KERNEL_RO); 1420 1421 return 0; 1422 } 1423 core_initcall(map_entry_trampoline); 1424 #endif 1425 1426 /* 1427 * Declare the VMA areas for the kernel 1428 */ 1429 static void __init declare_kernel_vmas(void) 1430 { 1431 static struct vm_struct vmlinux_seg[KERNEL_SEGMENT_COUNT]; 1432 1433 declare_vma(&vmlinux_seg[0], _text, _etext, VM_NO_GUARD); 1434 declare_vma(&vmlinux_seg[1], __start_rodata, __inittext_begin, VM_NO_GUARD); 1435 declare_vma(&vmlinux_seg[2], __inittext_begin, __inittext_end, VM_NO_GUARD); 1436 declare_vma(&vmlinux_seg[3], __initdata_begin, __initdata_end, VM_NO_GUARD); 1437 declare_vma(&vmlinux_seg[4], _data, _end, 0); 1438 } 1439 1440 void __pi_map_range(phys_addr_t *pte, u64 start, u64 end, phys_addr_t pa, 1441 pgprot_t prot, int level, pte_t *tbl, bool may_use_cont, 1442 u64 va_offset); 1443 1444 static u8 idmap_ptes[IDMAP_LEVELS - 1][PAGE_SIZE] __aligned(PAGE_SIZE) __ro_after_init, 1445 kpti_bbml3_ptes[IDMAP_LEVELS - 1][PAGE_SIZE] __aligned(PAGE_SIZE) __ro_after_init; 1446 1447 static void __init create_idmap(void) 1448 { 1449 phys_addr_t start = __pa_symbol(__idmap_text_start); 1450 phys_addr_t end = __pa_symbol(__idmap_text_end); 1451 phys_addr_t ptep = __pa_symbol(idmap_ptes); 1452 1453 __pi_map_range(&ptep, start, end, start, PAGE_KERNEL_ROX, 1454 IDMAP_ROOT_LEVEL, (pte_t *)idmap_pg_dir, false, 1455 __phys_to_virt(ptep) - ptep); 1456 1457 if (linear_map_requires_bbml3 || 1458 (IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0) && !arm64_use_ng_mappings)) { 1459 phys_addr_t pa = __pa_symbol(&idmap_kpti_bbml3_flag); 1460 1461 /* 1462 * The KPTI G-to-nG conversion code needs a read-write mapping 1463 * of its synchronization flag in the ID map. This is also used 1464 * when splitting the linear map to ptes if a secondary CPU 1465 * doesn't support bbml3. 1466 */ 1467 ptep = __pa_symbol(kpti_bbml3_ptes); 1468 __pi_map_range(&ptep, pa, pa + sizeof(u32), pa, PAGE_KERNEL, 1469 IDMAP_ROOT_LEVEL, (pte_t *)idmap_pg_dir, false, 1470 __phys_to_virt(ptep) - ptep); 1471 } 1472 } 1473 1474 void __init paging_init(void) 1475 { 1476 map_mem(); 1477 1478 memblock_allow_resize(); 1479 1480 create_idmap(); 1481 declare_kernel_vmas(); 1482 } 1483 1484 #ifdef CONFIG_MEMORY_HOTPLUG 1485 static void free_hotplug_page_range(struct page *page, size_t size, 1486 struct vmem_altmap *altmap) 1487 { 1488 if (altmap) { 1489 vmem_altmap_free(altmap, size >> PAGE_SHIFT); 1490 } else { 1491 WARN_ON(PageReserved(page)); 1492 __free_pages(page, get_order(size)); 1493 } 1494 } 1495 1496 static void free_hotplug_pgtable_page(struct page *page) 1497 { 1498 pagetable_dtor(page_ptdesc(page)); 1499 free_hotplug_page_range(page, PAGE_SIZE, NULL); 1500 } 1501 1502 static bool pgtable_range_aligned(unsigned long start, unsigned long end, 1503 unsigned long floor, unsigned long ceiling, 1504 unsigned long mask) 1505 { 1506 start &= mask; 1507 if (start < floor) 1508 return false; 1509 1510 if (ceiling) { 1511 ceiling &= mask; 1512 if (!ceiling) 1513 return false; 1514 } 1515 1516 if (end - 1 > ceiling - 1) 1517 return false; 1518 return true; 1519 } 1520 1521 static void unmap_hotplug_pte_range(pmd_t *pmdp, unsigned long addr, 1522 unsigned long end, bool free_mapped, 1523 struct vmem_altmap *altmap) 1524 { 1525 pte_t *ptep, pte; 1526 1527 do { 1528 ptep = pte_offset_kernel(pmdp, addr); 1529 pte = __ptep_get(ptep); 1530 if (pte_none(pte)) 1531 continue; 1532 1533 WARN_ON(!pte_present(pte)); 1534 __pte_clear(&init_mm, addr, ptep); 1535 if (free_mapped) { 1536 /* CONT blocks are not supported in the vmemmap */ 1537 WARN_ON(pte_cont(pte)); 1538 flush_tlb_kernel_range(addr, addr + PAGE_SIZE); 1539 free_hotplug_page_range(pte_page(pte), 1540 PAGE_SIZE, altmap); 1541 } 1542 /* unmap_hotplug_range() flushes TLB for !free_mapped */ 1543 } while (addr += PAGE_SIZE, addr < end); 1544 } 1545 1546 static void unmap_hotplug_pmd_range(pud_t *pudp, unsigned long addr, 1547 unsigned long end, bool free_mapped, 1548 struct vmem_altmap *altmap) 1549 { 1550 unsigned long next; 1551 pmd_t *pmdp, pmd; 1552 1553 do { 1554 next = pmd_addr_end(addr, end); 1555 pmdp = pmd_offset(pudp, addr); 1556 pmd = READ_ONCE(*pmdp); 1557 if (pmd_none(pmd)) 1558 continue; 1559 1560 WARN_ON(!pmd_present(pmd)); 1561 if (pmd_leaf(pmd)) { 1562 pmd_clear(pmdp); 1563 if (free_mapped) { 1564 /* CONT blocks are not supported in the vmemmap */ 1565 WARN_ON(pmd_cont(pmd)); 1566 /* 1567 * Invalidating a block entry requires just 1568 * a single overlapping TLB invalidation, 1569 * so limit the range of the flush to a single 1570 * page. 1571 */ 1572 flush_tlb_kernel_range(addr, addr + PAGE_SIZE); 1573 free_hotplug_page_range(pmd_page(pmd), 1574 PMD_SIZE, altmap); 1575 } 1576 /* unmap_hotplug_range() flushes TLB for !free_mapped */ 1577 continue; 1578 } 1579 WARN_ON(!pmd_table(pmd)); 1580 unmap_hotplug_pte_range(pmdp, addr, next, free_mapped, altmap); 1581 } while (addr = next, addr < end); 1582 } 1583 1584 static void unmap_hotplug_pud_range(p4d_t *p4dp, unsigned long addr, 1585 unsigned long end, bool free_mapped, 1586 struct vmem_altmap *altmap) 1587 { 1588 unsigned long next; 1589 pud_t *pudp, pud; 1590 1591 do { 1592 next = pud_addr_end(addr, end); 1593 pudp = pud_offset(p4dp, addr); 1594 pud = READ_ONCE(*pudp); 1595 if (pud_none(pud)) 1596 continue; 1597 1598 WARN_ON(!pud_present(pud)); 1599 if (pud_leaf(pud)) { 1600 pud_clear(pudp); 1601 if (free_mapped) { 1602 /* See comment in unmap_hotplug_pmd_range(). */ 1603 flush_tlb_kernel_range(addr, addr + PAGE_SIZE); 1604 free_hotplug_page_range(pud_page(pud), 1605 PUD_SIZE, altmap); 1606 } 1607 /* unmap_hotplug_range() flushes TLB for !free_mapped */ 1608 continue; 1609 } 1610 WARN_ON(!pud_table(pud)); 1611 unmap_hotplug_pmd_range(pudp, addr, next, free_mapped, altmap); 1612 } while (addr = next, addr < end); 1613 } 1614 1615 static void unmap_hotplug_p4d_range(pgd_t *pgdp, unsigned long addr, 1616 unsigned long end, bool free_mapped, 1617 struct vmem_altmap *altmap) 1618 { 1619 unsigned long next; 1620 p4d_t *p4dp, p4d; 1621 1622 do { 1623 next = p4d_addr_end(addr, end); 1624 p4dp = p4d_offset(pgdp, addr); 1625 p4d = READ_ONCE(*p4dp); 1626 if (p4d_none(p4d)) 1627 continue; 1628 1629 WARN_ON(!p4d_present(p4d)); 1630 unmap_hotplug_pud_range(p4dp, addr, next, free_mapped, altmap); 1631 } while (addr = next, addr < end); 1632 } 1633 1634 static void unmap_hotplug_range(unsigned long addr, unsigned long end, 1635 bool free_mapped, struct vmem_altmap *altmap) 1636 { 1637 unsigned long start = addr; 1638 unsigned long next; 1639 pgd_t *pgdp, pgd; 1640 1641 /* 1642 * altmap can only be used as vmemmap mapping backing memory. 1643 * In case the backing memory itself is not being freed, then 1644 * altmap is irrelevant. Warn about this inconsistency when 1645 * encountered. 1646 */ 1647 WARN_ON(!free_mapped && altmap); 1648 1649 do { 1650 next = pgd_addr_end(addr, end); 1651 pgdp = pgd_offset_k(addr); 1652 pgd = READ_ONCE(*pgdp); 1653 if (pgd_none(pgd)) 1654 continue; 1655 1656 WARN_ON(!pgd_present(pgd)); 1657 unmap_hotplug_p4d_range(pgdp, addr, next, free_mapped, altmap); 1658 } while (addr = next, addr < end); 1659 1660 if (!free_mapped) 1661 flush_tlb_kernel_range(start, end); 1662 } 1663 1664 static void free_empty_pte_table(pmd_t *pmdp, unsigned long addr, 1665 unsigned long end, unsigned long floor, 1666 unsigned long ceiling) 1667 { 1668 pte_t *ptep, pte; 1669 unsigned long i, start = addr; 1670 1671 do { 1672 ptep = pte_offset_kernel(pmdp, addr); 1673 pte = __ptep_get(ptep); 1674 1675 /* 1676 * This is just a sanity check here which verifies that 1677 * pte clearing has been done by earlier unmap loops. 1678 */ 1679 WARN_ON(!pte_none(pte)); 1680 } while (addr += PAGE_SIZE, addr < end); 1681 1682 if (!pgtable_range_aligned(start, end, floor, ceiling, PMD_MASK)) 1683 return; 1684 1685 /* 1686 * Check whether we can free the pte page if the rest of the 1687 * entries are empty. Overlap with other regions have been 1688 * handled by the floor/ceiling check. 1689 */ 1690 ptep = pte_offset_kernel(pmdp, 0UL); 1691 for (i = 0; i < PTRS_PER_PTE; i++) { 1692 if (!pte_none(__ptep_get(&ptep[i]))) 1693 return; 1694 } 1695 1696 pmd_clear(pmdp); 1697 __flush_tlb_kernel_pgtable(start); 1698 free_hotplug_pgtable_page(virt_to_page(ptep)); 1699 } 1700 1701 static void free_empty_pmd_table(pud_t *pudp, unsigned long addr, 1702 unsigned long end, unsigned long floor, 1703 unsigned long ceiling) 1704 { 1705 pmd_t *pmdp, pmd; 1706 unsigned long i, next, start = addr; 1707 1708 do { 1709 next = pmd_addr_end(addr, end); 1710 pmdp = pmd_offset(pudp, addr); 1711 pmd = READ_ONCE(*pmdp); 1712 if (pmd_none(pmd)) 1713 continue; 1714 1715 WARN_ON(!pmd_present(pmd) || !pmd_table(pmd)); 1716 free_empty_pte_table(pmdp, addr, next, floor, ceiling); 1717 } while (addr = next, addr < end); 1718 1719 if (CONFIG_PGTABLE_LEVELS <= 2) 1720 return; 1721 1722 if (!pgtable_range_aligned(start, end, floor, ceiling, PUD_MASK)) 1723 return; 1724 1725 /* 1726 * Check whether we can free the pmd page if the rest of the 1727 * entries are empty. Overlap with other regions have been 1728 * handled by the floor/ceiling check. 1729 */ 1730 pmdp = pmd_offset(pudp, 0UL); 1731 for (i = 0; i < PTRS_PER_PMD; i++) { 1732 if (!pmd_none(READ_ONCE(pmdp[i]))) 1733 return; 1734 } 1735 1736 pud_clear(pudp); 1737 __flush_tlb_kernel_pgtable(start); 1738 free_hotplug_pgtable_page(virt_to_page(pmdp)); 1739 } 1740 1741 static void free_empty_pud_table(p4d_t *p4dp, unsigned long addr, 1742 unsigned long end, unsigned long floor, 1743 unsigned long ceiling) 1744 { 1745 pud_t *pudp, pud; 1746 unsigned long i, next, start = addr; 1747 1748 do { 1749 next = pud_addr_end(addr, end); 1750 pudp = pud_offset(p4dp, addr); 1751 pud = READ_ONCE(*pudp); 1752 if (pud_none(pud)) 1753 continue; 1754 1755 WARN_ON(!pud_present(pud) || !pud_table(pud)); 1756 free_empty_pmd_table(pudp, addr, next, floor, ceiling); 1757 } while (addr = next, addr < end); 1758 1759 if (!pgtable_l4_enabled()) 1760 return; 1761 1762 if (!pgtable_range_aligned(start, end, floor, ceiling, P4D_MASK)) 1763 return; 1764 1765 /* 1766 * Check whether we can free the pud page if the rest of the 1767 * entries are empty. Overlap with other regions have been 1768 * handled by the floor/ceiling check. 1769 */ 1770 pudp = pud_offset(p4dp, 0UL); 1771 for (i = 0; i < PTRS_PER_PUD; i++) { 1772 if (!pud_none(READ_ONCE(pudp[i]))) 1773 return; 1774 } 1775 1776 p4d_clear(p4dp); 1777 __flush_tlb_kernel_pgtable(start); 1778 free_hotplug_pgtable_page(virt_to_page(pudp)); 1779 } 1780 1781 static void free_empty_p4d_table(pgd_t *pgdp, unsigned long addr, 1782 unsigned long end, unsigned long floor, 1783 unsigned long ceiling) 1784 { 1785 p4d_t *p4dp, p4d; 1786 unsigned long i, next, start = addr; 1787 1788 do { 1789 next = p4d_addr_end(addr, end); 1790 p4dp = p4d_offset(pgdp, addr); 1791 p4d = READ_ONCE(*p4dp); 1792 if (p4d_none(p4d)) 1793 continue; 1794 1795 WARN_ON(!p4d_present(p4d)); 1796 free_empty_pud_table(p4dp, addr, next, floor, ceiling); 1797 } while (addr = next, addr < end); 1798 1799 if (!pgtable_l5_enabled()) 1800 return; 1801 1802 if (!pgtable_range_aligned(start, end, floor, ceiling, PGDIR_MASK)) 1803 return; 1804 1805 /* 1806 * Check whether we can free the p4d page if the rest of the 1807 * entries are empty. Overlap with other regions have been 1808 * handled by the floor/ceiling check. 1809 */ 1810 p4dp = p4d_offset(pgdp, 0UL); 1811 for (i = 0; i < PTRS_PER_P4D; i++) { 1812 if (!p4d_none(READ_ONCE(p4dp[i]))) 1813 return; 1814 } 1815 1816 pgd_clear(pgdp); 1817 __flush_tlb_kernel_pgtable(start); 1818 free_hotplug_pgtable_page(virt_to_page(p4dp)); 1819 } 1820 1821 static void free_empty_tables(unsigned long addr, unsigned long end, 1822 unsigned long floor, unsigned long ceiling) 1823 { 1824 unsigned long next; 1825 pgd_t *pgdp, pgd; 1826 1827 do { 1828 next = pgd_addr_end(addr, end); 1829 pgdp = pgd_offset_k(addr); 1830 pgd = READ_ONCE(*pgdp); 1831 if (pgd_none(pgd)) 1832 continue; 1833 1834 WARN_ON(!pgd_present(pgd)); 1835 free_empty_p4d_table(pgdp, addr, next, floor, ceiling); 1836 } while (addr = next, addr < end); 1837 } 1838 #endif 1839 1840 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 1841 struct vmem_altmap *altmap) 1842 { 1843 WARN_ON((start < VMEMMAP_START) || (end > VMEMMAP_END)); 1844 /* [start, end] should be within one section */ 1845 WARN_ON_ONCE(end - start > PAGES_PER_SECTION * sizeof(struct page)); 1846 1847 if (!IS_ENABLED(CONFIG_ARM64_4K_PAGES) || 1848 (end - start < PAGES_PER_SECTION * sizeof(struct page))) 1849 return vmemmap_populate_basepages(start, end, node, altmap); 1850 else 1851 return vmemmap_populate_hugepages(start, end, node, altmap); 1852 } 1853 1854 #ifdef CONFIG_MEMORY_HOTPLUG 1855 void vmemmap_free(unsigned long start, unsigned long end, 1856 struct vmem_altmap *altmap) 1857 { 1858 WARN_ON((start < VMEMMAP_START) || (end > VMEMMAP_END)); 1859 1860 unmap_hotplug_range(start, end, true, altmap); 1861 free_empty_tables(start, end, VMEMMAP_START, VMEMMAP_END); 1862 } 1863 #endif /* CONFIG_MEMORY_HOTPLUG */ 1864 1865 int pud_set_huge(pud_t *pudp, phys_addr_t phys, pgprot_t prot) 1866 { 1867 pud_t new_pud = pfn_pud(__phys_to_pfn(phys), mk_pud_sect_prot(prot)); 1868 1869 /* Only allow permission changes for now */ 1870 if (!pgattr_change_is_safe(READ_ONCE(pud_val(*pudp)), 1871 pud_val(new_pud))) 1872 return 0; 1873 1874 VM_BUG_ON(phys & ~PUD_MASK); 1875 set_pud(pudp, new_pud); 1876 return 1; 1877 } 1878 1879 int pmd_set_huge(pmd_t *pmdp, phys_addr_t phys, pgprot_t prot) 1880 { 1881 pmd_t new_pmd = pfn_pmd(__phys_to_pfn(phys), mk_pmd_sect_prot(prot)); 1882 1883 /* Only allow permission changes for now */ 1884 if (!pgattr_change_is_safe(READ_ONCE(pmd_val(*pmdp)), 1885 pmd_val(new_pmd))) 1886 return 0; 1887 1888 VM_BUG_ON(phys & ~PMD_MASK); 1889 set_pmd(pmdp, new_pmd); 1890 return 1; 1891 } 1892 1893 #ifndef __PAGETABLE_P4D_FOLDED 1894 void p4d_clear_huge(p4d_t *p4dp) 1895 { 1896 } 1897 #endif 1898 1899 int pud_clear_huge(pud_t *pudp) 1900 { 1901 if (!pud_leaf(READ_ONCE(*pudp))) 1902 return 0; 1903 pud_clear(pudp); 1904 return 1; 1905 } 1906 1907 int pmd_clear_huge(pmd_t *pmdp) 1908 { 1909 if (!pmd_leaf(READ_ONCE(*pmdp))) 1910 return 0; 1911 pmd_clear(pmdp); 1912 return 1; 1913 } 1914 1915 int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr) 1916 { 1917 pte_t *table; 1918 pmd_t pmd; 1919 1920 pmd = READ_ONCE(*pmdp); 1921 1922 if (!pmd_table(pmd)) { 1923 VM_WARN_ON(1); 1924 return 1; 1925 } 1926 1927 table = pte_offset_kernel(pmdp, addr); 1928 pmd_clear(pmdp); 1929 __flush_tlb_kernel_pgtable(addr); 1930 pte_free_kernel(NULL, table); 1931 return 1; 1932 } 1933 1934 int pud_free_pmd_page(pud_t *pudp, unsigned long addr) 1935 { 1936 pmd_t *table; 1937 pmd_t *pmdp; 1938 pud_t pud; 1939 unsigned long next, end; 1940 1941 pud = READ_ONCE(*pudp); 1942 1943 if (!pud_table(pud)) { 1944 VM_WARN_ON(1); 1945 return 1; 1946 } 1947 1948 table = pmd_offset(pudp, addr); 1949 pmdp = table; 1950 next = addr; 1951 end = addr + PUD_SIZE; 1952 do { 1953 if (pmd_present(pmdp_get(pmdp))) 1954 pmd_free_pte_page(pmdp, next); 1955 } while (pmdp++, next += PMD_SIZE, next != end); 1956 1957 pud_clear(pudp); 1958 __flush_tlb_kernel_pgtable(addr); 1959 pmd_free(NULL, table); 1960 return 1; 1961 } 1962 1963 #ifdef CONFIG_MEMORY_HOTPLUG 1964 static void __remove_pgd_mapping(pgd_t *pgdir, unsigned long start, u64 size) 1965 { 1966 unsigned long end = start + size; 1967 1968 WARN_ON(pgdir != init_mm.pgd); 1969 WARN_ON((start < PAGE_OFFSET) || (end > PAGE_END)); 1970 1971 unmap_hotplug_range(start, end, false, NULL); 1972 free_empty_tables(start, end, PAGE_OFFSET, PAGE_END); 1973 } 1974 1975 struct range arch_get_mappable_range(void) 1976 { 1977 struct range mhp_range; 1978 phys_addr_t start_linear_pa = __pa(_PAGE_OFFSET(vabits_actual)); 1979 phys_addr_t end_linear_pa = __pa(PAGE_END - 1); 1980 1981 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) { 1982 /* 1983 * Check for a wrap, it is possible because of randomized linear 1984 * mapping the start physical address is actually bigger than 1985 * the end physical address. In this case set start to zero 1986 * because [0, end_linear_pa] range must still be able to cover 1987 * all addressable physical addresses. 1988 */ 1989 if (start_linear_pa > end_linear_pa) 1990 start_linear_pa = 0; 1991 } 1992 1993 WARN_ON(start_linear_pa > end_linear_pa); 1994 1995 /* 1996 * Linear mapping region is the range [PAGE_OFFSET..(PAGE_END - 1)] 1997 * accommodating both its ends but excluding PAGE_END. Max physical 1998 * range which can be mapped inside this linear mapping range, must 1999 * also be derived from its end points. 2000 */ 2001 mhp_range.start = start_linear_pa; 2002 mhp_range.end = end_linear_pa; 2003 2004 return mhp_range; 2005 } 2006 2007 int arch_add_memory(int nid, u64 start, u64 size, 2008 struct mhp_params *params) 2009 { 2010 int ret, flags = NO_EXEC_MAPPINGS; 2011 2012 VM_BUG_ON(!mhp_range_allowed(start, size, true)); 2013 2014 if (force_pte_mapping()) 2015 flags |= NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 2016 2017 ret = __create_pgd_mapping(swapper_pg_dir, start, __phys_to_virt(start), 2018 size, params->pgprot, pgd_pgtable_alloc_init_mm, 2019 flags); 2020 if (ret) 2021 goto err; 2022 2023 memblock_clear_nomap(start, size); 2024 2025 ret = __add_pages(nid, start >> PAGE_SHIFT, size >> PAGE_SHIFT, 2026 params); 2027 if (ret) 2028 goto err; 2029 2030 /* Address of hotplugged memory can be smaller */ 2031 max_pfn = max(max_pfn, PFN_UP(start + size)); 2032 max_low_pfn = max_pfn; 2033 2034 return 0; 2035 2036 err: 2037 __remove_pgd_mapping(swapper_pg_dir, 2038 __phys_to_virt(start), size); 2039 return ret; 2040 } 2041 2042 void arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap, 2043 struct dev_pagemap *pgmap) 2044 { 2045 unsigned long start_pfn = start >> PAGE_SHIFT; 2046 unsigned long nr_pages = size >> PAGE_SHIFT; 2047 2048 __remove_pages(start_pfn, nr_pages, altmap, pgmap); 2049 __remove_pgd_mapping(swapper_pg_dir, __phys_to_virt(start), size); 2050 } 2051 2052 2053 static bool addr_splits_kernel_leaf(unsigned long addr) 2054 { 2055 pgd_t *pgdp, pgd; 2056 p4d_t *p4dp, p4d; 2057 pud_t *pudp, pud; 2058 pmd_t *pmdp, pmd; 2059 pte_t *ptep, pte; 2060 2061 /* 2062 * If the given address points at a the start address of 2063 * a possible leaf, we certainly won't split. Otherwise, 2064 * check if we would actually split a leaf by traversing 2065 * the page tables further. 2066 */ 2067 if (IS_ALIGNED(addr, PGDIR_SIZE)) 2068 return false; 2069 2070 pgdp = pgd_offset_k(addr); 2071 pgd = pgdp_get(pgdp); 2072 if (!pgd_present(pgd)) 2073 return false; 2074 2075 if (IS_ALIGNED(addr, P4D_SIZE)) 2076 return false; 2077 2078 p4dp = p4d_offset(pgdp, addr); 2079 p4d = p4dp_get(p4dp); 2080 if (!p4d_present(p4d)) 2081 return false; 2082 2083 if (IS_ALIGNED(addr, PUD_SIZE)) 2084 return false; 2085 2086 pudp = pud_offset(p4dp, addr); 2087 pud = pudp_get(pudp); 2088 if (!pud_present(pud)) 2089 return false; 2090 2091 if (pud_leaf(pud)) 2092 return true; 2093 2094 if (IS_ALIGNED(addr, CONT_PMD_SIZE)) 2095 return false; 2096 2097 pmdp = pmd_offset(pudp, addr); 2098 pmd = pmdp_get(pmdp); 2099 if (!pmd_present(pmd)) 2100 return false; 2101 2102 if (pmd_cont(pmd)) 2103 return true; 2104 2105 if (IS_ALIGNED(addr, PMD_SIZE)) 2106 return false; 2107 2108 if (pmd_leaf(pmd)) 2109 return true; 2110 2111 if (IS_ALIGNED(addr, CONT_PTE_SIZE)) 2112 return false; 2113 2114 ptep = pte_offset_kernel(pmdp, addr); 2115 pte = __ptep_get(ptep); 2116 if (!pte_present(pte)) 2117 return false; 2118 2119 if (pte_cont(pte)) 2120 return true; 2121 2122 return !IS_ALIGNED(addr, PAGE_SIZE); 2123 } 2124 2125 static bool can_unmap_without_split(unsigned long pfn, unsigned long nr_pages) 2126 { 2127 unsigned long phys_start, phys_end, start, end; 2128 2129 phys_start = PFN_PHYS(pfn); 2130 phys_end = phys_start + nr_pages * PAGE_SIZE; 2131 2132 /* PFN range's linear map edges are leaf entry aligned */ 2133 start = __phys_to_virt(phys_start); 2134 end = __phys_to_virt(phys_end); 2135 if (addr_splits_kernel_leaf(start) || addr_splits_kernel_leaf(end)) { 2136 pr_warn("[%lx %lx] splits a leaf entry in linear map\n", 2137 phys_start, phys_end); 2138 return false; 2139 } 2140 2141 /* PFN range's vmemmap edges are leaf entry aligned */ 2142 BUILD_BUG_ON(!IS_ENABLED(CONFIG_SPARSEMEM_VMEMMAP)); 2143 start = (unsigned long)pfn_to_page(pfn); 2144 end = (unsigned long)pfn_to_page(pfn + nr_pages); 2145 if (addr_splits_kernel_leaf(start) || addr_splits_kernel_leaf(end)) { 2146 pr_warn("[%lx %lx] splits a leaf entry in vmemmap\n", 2147 phys_start, phys_end); 2148 return false; 2149 } 2150 return true; 2151 } 2152 2153 /* 2154 * This memory hotplug notifier helps prevent boot memory from being 2155 * inadvertently removed as it blocks pfn range offlining process in 2156 * __offline_pages(). Hence this prevents both offlining as well as 2157 * removal process for boot memory which is initially always online. 2158 * In future if and when boot memory could be removed, this notifier 2159 * should be dropped and free_hotplug_page_range() should handle any 2160 * reserved pages allocated during boot. 2161 * 2162 * This also blocks any memory remove that would have caused a split 2163 * in leaf entry in kernel linear or vmemmap mapping. 2164 */ 2165 static int prevent_memory_remove_notifier(struct notifier_block *nb, 2166 unsigned long action, void *data) 2167 { 2168 struct mem_section *ms; 2169 struct memory_notify *arg = data; 2170 unsigned long end_pfn = arg->start_pfn + arg->nr_pages; 2171 unsigned long pfn = arg->start_pfn; 2172 2173 if ((action != MEM_GOING_OFFLINE) && (action != MEM_OFFLINE)) 2174 return NOTIFY_OK; 2175 2176 for (; pfn < end_pfn; pfn += PAGES_PER_SECTION) { 2177 unsigned long start = PFN_PHYS(pfn); 2178 unsigned long end = start + (1UL << PA_SECTION_SHIFT); 2179 2180 ms = __pfn_to_section(pfn); 2181 if (!early_section(ms)) 2182 continue; 2183 2184 if (action == MEM_GOING_OFFLINE) { 2185 /* 2186 * Boot memory removal is not supported. Prevent 2187 * it via blocking any attempted offline request 2188 * for the boot memory and just report it. 2189 */ 2190 pr_warn("Boot memory [%lx %lx] offlining attempted\n", start, end); 2191 return NOTIFY_BAD; 2192 } else if (action == MEM_OFFLINE) { 2193 /* 2194 * This should have never happened. Boot memory 2195 * offlining should have been prevented by this 2196 * very notifier. Probably some memory removal 2197 * procedure might have changed which would then 2198 * require further debug. 2199 */ 2200 pr_err("Boot memory [%lx %lx] offlined\n", start, end); 2201 2202 /* 2203 * Core memory hotplug does not process a return 2204 * code from the notifier for MEM_OFFLINE events. 2205 * The error condition has been reported. Return 2206 * from here as if ignored. 2207 */ 2208 return NOTIFY_DONE; 2209 } 2210 } 2211 2212 if (!can_unmap_without_split(arg->start_pfn, arg->nr_pages)) 2213 return NOTIFY_BAD; 2214 2215 return NOTIFY_OK; 2216 } 2217 2218 static struct notifier_block prevent_memory_remove_nb = { 2219 .notifier_call = prevent_memory_remove_notifier, 2220 }; 2221 2222 /* 2223 * This ensures that boot memory sections on the platform are online 2224 * from early boot. Memory sections could not be prevented from being 2225 * offlined, unless for some reason they are not online to begin with. 2226 * This helps validate the basic assumption on which the above memory 2227 * event notifier works to prevent boot memory section offlining and 2228 * its possible removal. 2229 */ 2230 static void validate_bootmem_online(void) 2231 { 2232 phys_addr_t start, end, addr; 2233 struct mem_section *ms; 2234 u64 i; 2235 2236 /* 2237 * Scanning across all memblock might be expensive 2238 * on some big memory systems. Hence enable this 2239 * validation only with DEBUG_VM. 2240 */ 2241 if (!IS_ENABLED(CONFIG_DEBUG_VM)) 2242 return; 2243 2244 for_each_mem_range(i, &start, &end) { 2245 for (addr = start; addr < end; addr += (1UL << PA_SECTION_SHIFT)) { 2246 ms = __pfn_to_section(PHYS_PFN(addr)); 2247 2248 /* 2249 * All memory ranges in the system at this point 2250 * should have been marked as early sections. 2251 */ 2252 WARN_ON(!early_section(ms)); 2253 2254 /* 2255 * Memory notifier mechanism here to prevent boot 2256 * memory offlining depends on the fact that each 2257 * early section memory on the system is initially 2258 * online. Otherwise a given memory section which 2259 * is already offline will be overlooked and can 2260 * be removed completely. Call out such sections. 2261 */ 2262 if (!online_section(ms)) 2263 pr_err("Boot memory [%llx %llx] is offline, can be removed\n", 2264 addr, addr + (1UL << PA_SECTION_SHIFT)); 2265 } 2266 } 2267 } 2268 2269 static int __init prevent_memory_remove_init(void) 2270 { 2271 int ret = 0; 2272 2273 if (!IS_ENABLED(CONFIG_MEMORY_HOTREMOVE)) 2274 return ret; 2275 2276 validate_bootmem_online(); 2277 ret = register_memory_notifier(&prevent_memory_remove_nb); 2278 if (ret) 2279 pr_err("%s: Notifier registration failed %d\n", __func__, ret); 2280 2281 return ret; 2282 } 2283 early_initcall(prevent_memory_remove_init); 2284 #endif 2285 2286 pte_t modify_prot_start_ptes(struct vm_area_struct *vma, unsigned long addr, 2287 pte_t *ptep, unsigned int nr) 2288 { 2289 pte_t pte = get_and_clear_ptes(vma->vm_mm, addr, ptep, nr); 2290 2291 if (alternative_has_cap_unlikely(ARM64_WORKAROUND_2645198)) { 2292 /* 2293 * Break-before-make (BBM) is required for all user space mappings 2294 * when the permission changes from executable to non-executable 2295 * in cases where cpu is affected with errata #2645198. 2296 */ 2297 if (pte_accessible(vma->vm_mm, pte) && pte_user_exec(pte)) 2298 __flush_tlb_range(vma, addr, nr * PAGE_SIZE, 2299 PAGE_SIZE, 3, TLBF_NOWALKCACHE); 2300 } 2301 2302 return pte; 2303 } 2304 2305 pte_t ptep_modify_prot_start(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) 2306 { 2307 return modify_prot_start_ptes(vma, addr, ptep, 1); 2308 } 2309 2310 void modify_prot_commit_ptes(struct vm_area_struct *vma, unsigned long addr, 2311 pte_t *ptep, pte_t old_pte, pte_t pte, 2312 unsigned int nr) 2313 { 2314 set_ptes(vma->vm_mm, addr, ptep, pte, nr); 2315 } 2316 2317 void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep, 2318 pte_t old_pte, pte_t pte) 2319 { 2320 modify_prot_commit_ptes(vma, addr, ptep, old_pte, pte, 1); 2321 } 2322 2323 /* 2324 * Atomically replaces the active TTBR1_EL1 PGD with a new VA-compatible PGD, 2325 * avoiding the possibility of conflicting TLB entries being allocated. 2326 */ 2327 void __cpu_replace_ttbr1(pgd_t *pgdp, bool cnp) 2328 { 2329 typedef void (ttbr_replace_func)(phys_addr_t); 2330 extern ttbr_replace_func idmap_cpu_replace_ttbr1; 2331 ttbr_replace_func *replace_phys; 2332 unsigned long daif; 2333 2334 /* phys_to_ttbr() zeros lower 2 bits of ttbr with 52-bit PA */ 2335 phys_addr_t ttbr1 = phys_to_ttbr(virt_to_phys(pgdp)); 2336 2337 if (cnp) 2338 ttbr1 |= TTBRx_EL1_CnP; 2339 2340 replace_phys = (void *)__pa_symbol(idmap_cpu_replace_ttbr1); 2341 2342 cpu_install_idmap(); 2343 2344 /* 2345 * We really don't want to take *any* exceptions while TTBR1 is 2346 * in the process of being replaced so mask everything. 2347 */ 2348 daif = local_daif_save(); 2349 replace_phys(ttbr1); 2350 local_daif_restore(daif); 2351 2352 cpu_uninstall_idmap(); 2353 } 2354 2355 #ifdef CONFIG_ARCH_HAS_PKEYS 2356 int arch_set_user_pkey_access(int pkey, unsigned long init_val) 2357 { 2358 u64 new_por; 2359 u64 old_por; 2360 2361 if (!system_supports_poe()) 2362 return -ENOSPC; 2363 2364 /* 2365 * This code should only be called with valid 'pkey' 2366 * values originating from in-kernel users. Complain 2367 * if a bad value is observed. 2368 */ 2369 if (WARN_ON_ONCE(pkey >= arch_max_pkey())) 2370 return -EINVAL; 2371 2372 /* Set the bits we need in POR: */ 2373 new_por = POE_RWX; 2374 if (init_val & PKEY_DISABLE_WRITE) 2375 new_por &= ~POE_W; 2376 if (init_val & PKEY_DISABLE_ACCESS) 2377 new_por &= ~POE_RW; 2378 if (init_val & PKEY_DISABLE_READ) 2379 new_por &= ~POE_R; 2380 if (init_val & PKEY_DISABLE_EXECUTE) 2381 new_por &= ~POE_X; 2382 2383 /* Shift the bits in to the correct place in POR for pkey: */ 2384 new_por = POR_ELx_PERM_PREP(pkey, new_por); 2385 2386 /* Get old POR and mask off any old bits in place: */ 2387 old_por = read_sysreg_s(SYS_POR_EL0); 2388 old_por &= ~(POE_MASK << POR_ELx_PERM_SHIFT(pkey)); 2389 2390 /* Write old part along with new part: */ 2391 write_sysreg_s(old_por | new_por, SYS_POR_EL0); 2392 2393 return 0; 2394 } 2395 #endif 2396