1 /* 2 * Sonics Silicon Backplane 3 * GPIO driver 4 * 5 * Copyright 2011, Broadcom Corporation 6 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de> 7 * 8 * Licensed under the GNU/GPL. See COPYING for details. 9 */ 10 11 #include "ssb_private.h" 12 13 #include <linux/gpio/driver.h> 14 #include <linux/irq.h> 15 #include <linux/interrupt.h> 16 #include <linux/irqdomain.h> 17 #include <linux/export.h> 18 #include <linux/property.h> 19 #include <linux/ssb/ssb.h> 20 21 const struct software_node ssb_gpio_swnode = { 22 .name = "ssb-gpio", 23 }; 24 EXPORT_SYMBOL_GPL(ssb_gpio_swnode); 25 26 27 /************************************************** 28 * Shared 29 **************************************************/ 30 31 #if IS_ENABLED(CONFIG_SSB_EMBEDDED) 32 static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned int gpio) 33 { 34 struct ssb_bus *bus = gpiochip_get_data(chip); 35 36 if (bus->bustype == SSB_BUSTYPE_SSB) 37 return irq_find_mapping(bus->irq_domain, gpio); 38 else 39 return -EINVAL; 40 } 41 #endif 42 43 /************************************************** 44 * ChipCommon 45 **************************************************/ 46 47 static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned int gpio) 48 { 49 struct ssb_bus *bus = gpiochip_get_data(chip); 50 51 return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio); 52 } 53 54 static int ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned int gpio, 55 int value) 56 { 57 struct ssb_bus *bus = gpiochip_get_data(chip); 58 59 ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0); 60 61 return 0; 62 } 63 64 static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip, 65 unsigned int gpio) 66 { 67 struct ssb_bus *bus = gpiochip_get_data(chip); 68 69 ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 0); 70 return 0; 71 } 72 73 static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip, 74 unsigned int gpio, int value) 75 { 76 struct ssb_bus *bus = gpiochip_get_data(chip); 77 78 ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 1 << gpio); 79 ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0); 80 return 0; 81 } 82 83 static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned int gpio) 84 { 85 struct ssb_bus *bus = gpiochip_get_data(chip); 86 87 ssb_chipco_gpio_control(&bus->chipco, 1 << gpio, 0); 88 /* clear pulldown */ 89 ssb_chipco_gpio_pulldown(&bus->chipco, 1 << gpio, 0); 90 /* Set pullup */ 91 ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 1 << gpio); 92 93 return 0; 94 } 95 96 static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned int gpio) 97 { 98 struct ssb_bus *bus = gpiochip_get_data(chip); 99 100 /* clear pullup */ 101 ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0); 102 } 103 104 #if IS_ENABLED(CONFIG_SSB_EMBEDDED) 105 static void ssb_gpio_irq_chipco_mask(struct irq_data *d) 106 { 107 struct ssb_bus *bus = irq_data_get_irq_chip_data(d); 108 int gpio = irqd_to_hwirq(d); 109 110 ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0); 111 } 112 113 static void ssb_gpio_irq_chipco_unmask(struct irq_data *d) 114 { 115 struct ssb_bus *bus = irq_data_get_irq_chip_data(d); 116 int gpio = irqd_to_hwirq(d); 117 u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio)); 118 119 ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val); 120 ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio)); 121 } 122 123 static struct irq_chip ssb_gpio_irq_chipco_chip = { 124 .name = "SSB-GPIO-CC", 125 .irq_mask = ssb_gpio_irq_chipco_mask, 126 .irq_unmask = ssb_gpio_irq_chipco_unmask, 127 }; 128 129 static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id) 130 { 131 struct ssb_bus *bus = dev_id; 132 struct ssb_chipcommon *chipco = &bus->chipco; 133 u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN); 134 u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ); 135 u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL); 136 unsigned long irqs = (val ^ pol) & mask; 137 int gpio; 138 139 if (!irqs) 140 return IRQ_NONE; 141 142 for_each_set_bit(gpio, &irqs, bus->gpio.ngpio) 143 generic_handle_domain_irq_safe(bus->irq_domain, gpio); 144 145 ssb_chipco_gpio_polarity(chipco, irqs, val & irqs); 146 147 return IRQ_HANDLED; 148 } 149 150 static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus) 151 { 152 struct ssb_chipcommon *chipco = &bus->chipco; 153 struct gpio_chip *chip = &bus->gpio; 154 int gpio, hwirq, err; 155 156 if (bus->bustype != SSB_BUSTYPE_SSB) 157 return 0; 158 159 bus->irq_domain = irq_domain_create_linear(NULL, chip->ngpio, &irq_domain_simple_ops, 160 chipco); 161 if (!bus->irq_domain) { 162 err = -ENODEV; 163 goto err_irq_domain; 164 } 165 for (gpio = 0; gpio < chip->ngpio; gpio++) { 166 int irq = irq_create_mapping(bus->irq_domain, gpio); 167 168 irq_set_chip_data(irq, bus); 169 irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip, 170 handle_simple_irq); 171 } 172 173 hwirq = ssb_mips_irq(bus->chipco.dev) + 2; 174 err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED, 175 "gpio", bus); 176 if (err) 177 goto err_req_irq; 178 179 ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0); 180 chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO); 181 182 return 0; 183 184 err_req_irq: 185 for (gpio = 0; gpio < chip->ngpio; gpio++) { 186 int irq = irq_find_mapping(bus->irq_domain, gpio); 187 188 irq_dispose_mapping(irq); 189 } 190 irq_domain_remove(bus->irq_domain); 191 err_irq_domain: 192 return err; 193 } 194 195 static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus) 196 { 197 struct ssb_chipcommon *chipco = &bus->chipco; 198 struct gpio_chip *chip = &bus->gpio; 199 int gpio; 200 201 if (bus->bustype != SSB_BUSTYPE_SSB) 202 return; 203 204 chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO); 205 free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco); 206 for (gpio = 0; gpio < chip->ngpio; gpio++) { 207 int irq = irq_find_mapping(bus->irq_domain, gpio); 208 209 irq_dispose_mapping(irq); 210 } 211 irq_domain_remove(bus->irq_domain); 212 } 213 #else 214 static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus) 215 { 216 return 0; 217 } 218 219 static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus) 220 { 221 } 222 #endif 223 224 static int ssb_gpio_chipco_init(struct ssb_bus *bus) 225 { 226 struct gpio_chip *chip = &bus->gpio; 227 int err; 228 229 chip->label = "ssb_chipco_gpio"; 230 chip->owner = THIS_MODULE; 231 chip->request = ssb_gpio_chipco_request; 232 chip->free = ssb_gpio_chipco_free; 233 chip->get = ssb_gpio_chipco_get_value; 234 chip->set = ssb_gpio_chipco_set_value; 235 chip->direction_input = ssb_gpio_chipco_direction_input; 236 chip->direction_output = ssb_gpio_chipco_direction_output; 237 #if IS_ENABLED(CONFIG_SSB_EMBEDDED) 238 chip->to_irq = ssb_gpio_to_irq; 239 #endif 240 chip->ngpio = 16; 241 if (bus->bustype == SSB_BUSTYPE_SSB) 242 chip->fwnode = software_node_fwnode(&ssb_gpio_swnode); 243 /* There is just one SoC in one device and its GPIO addresses should be 244 * deterministic to address them more easily. The other buses could get 245 * a random base number. 246 */ 247 if (bus->bustype == SSB_BUSTYPE_SSB) 248 chip->base = 0; 249 else 250 chip->base = -1; 251 252 err = ssb_gpio_irq_chipco_domain_init(bus); 253 if (err) 254 return err; 255 256 err = gpiochip_add_data(chip, bus); 257 if (err) { 258 ssb_gpio_irq_chipco_domain_exit(bus); 259 return err; 260 } 261 262 return 0; 263 } 264 265 /************************************************** 266 * EXTIF 267 **************************************************/ 268 269 #ifdef CONFIG_SSB_DRIVER_EXTIF 270 271 static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned int gpio) 272 { 273 struct ssb_bus *bus = gpiochip_get_data(chip); 274 275 return !!ssb_extif_gpio_in(&bus->extif, 1 << gpio); 276 } 277 278 static int ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned int gpio, 279 int value) 280 { 281 struct ssb_bus *bus = gpiochip_get_data(chip); 282 283 ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0); 284 285 return 0; 286 } 287 288 static int ssb_gpio_extif_direction_input(struct gpio_chip *chip, 289 unsigned int gpio) 290 { 291 struct ssb_bus *bus = gpiochip_get_data(chip); 292 293 ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 0); 294 return 0; 295 } 296 297 static int ssb_gpio_extif_direction_output(struct gpio_chip *chip, 298 unsigned int gpio, int value) 299 { 300 struct ssb_bus *bus = gpiochip_get_data(chip); 301 302 ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 1 << gpio); 303 ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0); 304 return 0; 305 } 306 307 #if IS_ENABLED(CONFIG_SSB_EMBEDDED) 308 static void ssb_gpio_irq_extif_mask(struct irq_data *d) 309 { 310 struct ssb_bus *bus = irq_data_get_irq_chip_data(d); 311 int gpio = irqd_to_hwirq(d); 312 313 ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0); 314 } 315 316 static void ssb_gpio_irq_extif_unmask(struct irq_data *d) 317 { 318 struct ssb_bus *bus = irq_data_get_irq_chip_data(d); 319 int gpio = irqd_to_hwirq(d); 320 u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio)); 321 322 ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val); 323 ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio)); 324 } 325 326 static struct irq_chip ssb_gpio_irq_extif_chip = { 327 .name = "SSB-GPIO-EXTIF", 328 .irq_mask = ssb_gpio_irq_extif_mask, 329 .irq_unmask = ssb_gpio_irq_extif_unmask, 330 }; 331 332 static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id) 333 { 334 struct ssb_bus *bus = dev_id; 335 struct ssb_extif *extif = &bus->extif; 336 u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN); 337 u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK); 338 u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL); 339 unsigned long irqs = (val ^ pol) & mask; 340 int gpio; 341 342 if (!irqs) 343 return IRQ_NONE; 344 345 for_each_set_bit(gpio, &irqs, bus->gpio.ngpio) 346 generic_handle_domain_irq_safe(bus->irq_domain, gpio); 347 348 ssb_extif_gpio_polarity(extif, irqs, val & irqs); 349 350 return IRQ_HANDLED; 351 } 352 353 static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus) 354 { 355 struct ssb_extif *extif = &bus->extif; 356 struct gpio_chip *chip = &bus->gpio; 357 int gpio, hwirq, err; 358 359 if (bus->bustype != SSB_BUSTYPE_SSB) 360 return 0; 361 362 bus->irq_domain = irq_domain_create_linear(NULL, chip->ngpio, &irq_domain_simple_ops, 363 extif); 364 if (!bus->irq_domain) { 365 err = -ENODEV; 366 goto err_irq_domain; 367 } 368 for (gpio = 0; gpio < chip->ngpio; gpio++) { 369 int irq = irq_create_mapping(bus->irq_domain, gpio); 370 371 irq_set_chip_data(irq, bus); 372 irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip, 373 handle_simple_irq); 374 } 375 376 hwirq = ssb_mips_irq(bus->extif.dev) + 2; 377 err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED, 378 "gpio", bus); 379 if (err) 380 goto err_req_irq; 381 382 ssb_extif_gpio_intmask(&bus->extif, ~0, 0); 383 384 return 0; 385 386 err_req_irq: 387 for (gpio = 0; gpio < chip->ngpio; gpio++) { 388 int irq = irq_find_mapping(bus->irq_domain, gpio); 389 390 irq_dispose_mapping(irq); 391 } 392 irq_domain_remove(bus->irq_domain); 393 err_irq_domain: 394 return err; 395 } 396 397 static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus) 398 { 399 struct ssb_extif *extif = &bus->extif; 400 struct gpio_chip *chip = &bus->gpio; 401 int gpio; 402 403 if (bus->bustype != SSB_BUSTYPE_SSB) 404 return; 405 406 free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif); 407 for (gpio = 0; gpio < chip->ngpio; gpio++) { 408 int irq = irq_find_mapping(bus->irq_domain, gpio); 409 410 irq_dispose_mapping(irq); 411 } 412 irq_domain_remove(bus->irq_domain); 413 } 414 #else 415 static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus) 416 { 417 return 0; 418 } 419 420 static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus) 421 { 422 } 423 #endif 424 425 static int ssb_gpio_extif_init(struct ssb_bus *bus) 426 { 427 struct gpio_chip *chip = &bus->gpio; 428 int err; 429 430 chip->label = "ssb_extif_gpio"; 431 chip->owner = THIS_MODULE; 432 chip->get = ssb_gpio_extif_get_value; 433 chip->set = ssb_gpio_extif_set_value; 434 chip->direction_input = ssb_gpio_extif_direction_input; 435 chip->direction_output = ssb_gpio_extif_direction_output; 436 #if IS_ENABLED(CONFIG_SSB_EMBEDDED) 437 chip->to_irq = ssb_gpio_to_irq; 438 #endif 439 chip->ngpio = 5; 440 /* There is just one SoC in one device and its GPIO addresses should be 441 * deterministic to address them more easily. The other buses could get 442 * a random base number. 443 */ 444 if (bus->bustype == SSB_BUSTYPE_SSB) { 445 chip->base = 0; 446 chip->fwnode = software_node_fwnode(&ssb_gpio_swnode); 447 } else { 448 chip->base = -1; 449 } 450 451 err = ssb_gpio_irq_extif_domain_init(bus); 452 if (err) 453 return err; 454 455 err = gpiochip_add_data(chip, bus); 456 if (err) { 457 ssb_gpio_irq_extif_domain_exit(bus); 458 return err; 459 } 460 461 return 0; 462 } 463 464 #else 465 static int ssb_gpio_extif_init(struct ssb_bus *bus) 466 { 467 return -ENOTSUPP; 468 } 469 #endif 470 471 /************************************************** 472 * Init 473 **************************************************/ 474 475 int ssb_gpio_init(struct ssb_bus *bus) 476 { 477 int err = 0; 478 479 /* 480 * Register software node only for the host SoC bus. There is only 481 * one SoC instance in the system, so there are no concerns with 482 * registration conflicts. 483 */ 484 if (bus->bustype == SSB_BUSTYPE_SSB) { 485 err = software_node_register(&ssb_gpio_swnode); 486 if (err) 487 return err; 488 } 489 490 if (ssb_chipco_available(&bus->chipco)) 491 err = ssb_gpio_chipco_init(bus); 492 else if (ssb_extif_available(&bus->extif)) 493 err = ssb_gpio_extif_init(bus); 494 else 495 err = -ENODEV; 496 497 if (err) { 498 if (bus->bustype == SSB_BUSTYPE_SSB) 499 software_node_unregister(&ssb_gpio_swnode); 500 return err; 501 } 502 503 return 0; 504 } 505 506 int ssb_gpio_unregister(struct ssb_bus *bus) 507 { 508 if (ssb_chipco_available(&bus->chipco) || 509 ssb_extif_available(&bus->extif)) { 510 gpiochip_remove(&bus->gpio); 511 if (bus->bustype == SSB_BUSTYPE_SSB) 512 software_node_unregister(&ssb_gpio_swnode); 513 return 0; 514 } 515 return -1; 516 } 517