1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * I2C Link Layer for Samsung S3FWRN5 NCI based Driver 4 * 5 * Copyright (C) 2015 Samsung Electronics 6 * Robert Baldyga <r.baldyga@samsung.com> 7 */ 8 9 #include <linux/clk.h> 10 #include <linux/i2c.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/delay.h> 13 #include <linux/module.h> 14 15 #include <net/nfc/nfc.h> 16 17 #include "phy_common.h" 18 19 #define S3FWRN5_I2C_DRIVER_NAME "s3fwrn5_i2c" 20 21 struct s3fwrn5_i2c_phy { 22 struct phy_common common; 23 struct i2c_client *i2c_dev; 24 struct clk *clk; 25 26 unsigned int irq_skip:1; 27 }; 28 29 static void s3fwrn5_i2c_set_mode(void *phy_id, enum s3fwrn5_mode mode) 30 { 31 struct s3fwrn5_i2c_phy *phy = phy_id; 32 33 mutex_lock(&phy->common.mutex); 34 35 if (s3fwrn5_phy_power_ctrl(&phy->common, mode) == false) 36 goto out; 37 38 phy->irq_skip = true; 39 40 out: 41 mutex_unlock(&phy->common.mutex); 42 } 43 44 static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb) 45 { 46 struct s3fwrn5_i2c_phy *phy = phy_id; 47 int ret; 48 49 mutex_lock(&phy->common.mutex); 50 51 phy->irq_skip = false; 52 53 ret = i2c_master_send(phy->i2c_dev, skb->data, skb->len); 54 if (ret == -EREMOTEIO) { 55 /* Retry, chip was in standby */ 56 usleep_range(110000, 120000); 57 ret = i2c_master_send(phy->i2c_dev, skb->data, skb->len); 58 } 59 60 mutex_unlock(&phy->common.mutex); 61 62 if (ret < 0) 63 return ret; 64 65 if (ret != skb->len) 66 return -EREMOTEIO; 67 68 return 0; 69 } 70 71 static const struct s3fwrn5_phy_ops i2c_phy_ops = { 72 .set_wake = s3fwrn5_phy_set_wake, 73 .set_mode = s3fwrn5_i2c_set_mode, 74 .get_mode = s3fwrn5_phy_get_mode, 75 .write = s3fwrn5_i2c_write, 76 }; 77 78 static int s3fwrn5_i2c_read(struct s3fwrn5_i2c_phy *phy) 79 { 80 struct sk_buff *skb; 81 size_t hdr_size; 82 size_t data_len; 83 char hdr[4]; 84 int ret; 85 86 hdr_size = (phy->common.mode == S3FWRN5_MODE_NCI) ? 87 NCI_CTRL_HDR_SIZE : S3FWRN5_FW_HDR_SIZE; 88 ret = i2c_master_recv(phy->i2c_dev, hdr, hdr_size); 89 if (ret < 0) 90 return ret; 91 92 if (ret < hdr_size) 93 return -EBADMSG; 94 95 data_len = (phy->common.mode == S3FWRN5_MODE_NCI) ? 96 ((struct nci_ctrl_hdr *)hdr)->plen : 97 ((struct s3fwrn5_fw_header *)hdr)->len; 98 99 skb = alloc_skb(hdr_size + data_len, GFP_KERNEL); 100 if (!skb) 101 return -ENOMEM; 102 103 skb_put_data(skb, hdr, hdr_size); 104 105 if (data_len == 0) 106 goto out; 107 108 ret = i2c_master_recv(phy->i2c_dev, skb_put(skb, data_len), data_len); 109 if (ret != data_len) { 110 kfree_skb(skb); 111 return -EBADMSG; 112 } 113 114 out: 115 return s3fwrn5_recv_frame(phy->common.ndev, skb, phy->common.mode); 116 } 117 118 static irqreturn_t s3fwrn5_i2c_irq_thread_fn(int irq, void *phy_id) 119 { 120 struct s3fwrn5_i2c_phy *phy = phy_id; 121 122 if (!phy || !phy->common.ndev) { 123 WARN_ON_ONCE(1); 124 return IRQ_NONE; 125 } 126 127 mutex_lock(&phy->common.mutex); 128 129 if (phy->irq_skip) 130 goto out; 131 132 switch (phy->common.mode) { 133 case S3FWRN5_MODE_NCI: 134 case S3FWRN5_MODE_FW: 135 s3fwrn5_i2c_read(phy); 136 break; 137 case S3FWRN5_MODE_COLD: 138 break; 139 } 140 141 out: 142 mutex_unlock(&phy->common.mutex); 143 144 return IRQ_HANDLED; 145 } 146 147 static int s3fwrn5_i2c_probe(struct i2c_client *client) 148 { 149 struct s3fwrn5_i2c_phy *phy; 150 int ret; 151 152 phy = devm_kzalloc(&client->dev, sizeof(*phy), GFP_KERNEL); 153 if (!phy) 154 return -ENOMEM; 155 156 mutex_init(&phy->common.mutex); 157 phy->common.mode = S3FWRN5_MODE_COLD; 158 phy->irq_skip = true; 159 160 phy->i2c_dev = client; 161 i2c_set_clientdata(client, phy); 162 163 phy->common.gpio_en = devm_gpiod_get(&client->dev, "en", GPIOD_OUT_HIGH); 164 if (IS_ERR(phy->common.gpio_en)) 165 return PTR_ERR(phy->common.gpio_en); 166 167 phy->common.gpio_fw_wake = devm_gpiod_get(&client->dev, "wake", GPIOD_OUT_LOW); 168 if (IS_ERR(phy->common.gpio_fw_wake)) 169 return PTR_ERR(phy->common.gpio_fw_wake); 170 171 /* 172 * S3FWRN5 depends on a clock input ("XI" pin) to function properly. 173 * Depending on the hardware configuration this could be an always-on 174 * oscillator or some external clock that must be explicitly enabled. 175 * Make sure the clock is running before starting S3FWRN5. 176 */ 177 phy->clk = devm_clk_get_optional_enabled(&client->dev, NULL); 178 if (IS_ERR(phy->clk)) 179 return dev_err_probe(&client->dev, PTR_ERR(phy->clk), 180 "failed to get clock\n"); 181 182 ret = s3fwrn5_probe(&phy->common.ndev, phy, &phy->i2c_dev->dev, 183 &i2c_phy_ops); 184 if (ret < 0) 185 return ret; 186 187 ret = devm_request_threaded_irq(&client->dev, phy->i2c_dev->irq, NULL, 188 s3fwrn5_i2c_irq_thread_fn, IRQF_ONESHOT, 189 S3FWRN5_I2C_DRIVER_NAME, phy); 190 if (ret) 191 goto s3fwrn5_remove; 192 193 return 0; 194 195 s3fwrn5_remove: 196 s3fwrn5_remove(phy->common.ndev); 197 return ret; 198 } 199 200 static void s3fwrn5_i2c_remove(struct i2c_client *client) 201 { 202 struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client); 203 204 s3fwrn5_remove(phy->common.ndev); 205 } 206 207 static const struct i2c_device_id s3fwrn5_i2c_id_table[] = { 208 { .name = S3FWRN5_I2C_DRIVER_NAME }, 209 { } 210 }; 211 MODULE_DEVICE_TABLE(i2c, s3fwrn5_i2c_id_table); 212 213 static const struct of_device_id of_s3fwrn5_i2c_match[] = { 214 { .compatible = "samsung,s3fwrn5-i2c" }, 215 { } 216 }; 217 MODULE_DEVICE_TABLE(of, of_s3fwrn5_i2c_match); 218 219 static struct i2c_driver s3fwrn5_i2c_driver = { 220 .driver = { 221 .name = S3FWRN5_I2C_DRIVER_NAME, 222 .of_match_table = of_match_ptr(of_s3fwrn5_i2c_match), 223 }, 224 .probe = s3fwrn5_i2c_probe, 225 .remove = s3fwrn5_i2c_remove, 226 .id_table = s3fwrn5_i2c_id_table, 227 }; 228 229 module_i2c_driver(s3fwrn5_i2c_driver); 230 231 MODULE_LICENSE("GPL"); 232 MODULE_DESCRIPTION("I2C driver for Samsung S3FWRN5"); 233 MODULE_AUTHOR("Robert Baldyga <r.baldyga@samsung.com>"); 234