xref: /linux/drivers/scsi/lpfc/lpfc_init.c (revision 69050f8d6d075dc01af7a5f2f550a8067510366f)
1 /*******************************************************************
2  * This file is part of the Emulex Linux Device Driver for         *
3  * Fibre Channel Host Bus Adapters.                                *
4  * Copyright (C) 2017-2025 Broadcom. All Rights Reserved. The term *
5  * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.  *
6  * Copyright (C) 2004-2016 Emulex.  All rights reserved.           *
7  * EMULEX and SLI are trademarks of Emulex.                        *
8  * www.broadcom.com                                                *
9  * Portions Copyright (C) 2004-2005 Christoph Hellwig              *
10  *                                                                 *
11  * This program is free software; you can redistribute it and/or   *
12  * modify it under the terms of version 2 of the GNU General       *
13  * Public License as published by the Free Software Foundation.    *
14  * This program is distributed in the hope that it will be useful. *
15  * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *
16  * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *
17  * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *
18  * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19  * TO BE LEGALLY INVALID.  See the GNU General Public License for  *
20  * more details, a copy of which can be found in the file COPYING  *
21  * included with this package.                                     *
22  *******************************************************************/
23 
24 #include <linux/blkdev.h>
25 #include <linux/delay.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/idr.h>
28 #include <linux/interrupt.h>
29 #include <linux/module.h>
30 #include <linux/kthread.h>
31 #include <linux/pci.h>
32 #include <linux/spinlock.h>
33 #include <linux/sched/clock.h>
34 #include <linux/ctype.h>
35 #include <linux/slab.h>
36 #include <linux/firmware.h>
37 #include <linux/miscdevice.h>
38 #include <linux/percpu.h>
39 #include <linux/irq.h>
40 #include <linux/bitops.h>
41 #include <linux/crash_dump.h>
42 #include <linux/cpu.h>
43 #include <linux/cpuhotplug.h>
44 
45 #include <scsi/scsi.h>
46 #include <scsi/scsi_device.h>
47 #include <scsi/scsi_host.h>
48 #include <scsi/scsi_transport_fc.h>
49 #include <scsi/scsi_tcq.h>
50 #include <scsi/fc/fc_fs.h>
51 
52 #include "lpfc_hw4.h"
53 #include "lpfc_hw.h"
54 #include "lpfc_sli.h"
55 #include "lpfc_sli4.h"
56 #include "lpfc_nl.h"
57 #include "lpfc_disc.h"
58 #include "lpfc.h"
59 #include "lpfc_scsi.h"
60 #include "lpfc_nvme.h"
61 #include "lpfc_logmsg.h"
62 #include "lpfc_crtn.h"
63 #include "lpfc_vport.h"
64 #include "lpfc_version.h"
65 #include "lpfc_ids.h"
66 
67 static enum cpuhp_state lpfc_cpuhp_state;
68 /* Used when mapping IRQ vectors in a driver centric manner */
69 static uint32_t lpfc_present_cpu;
70 static bool lpfc_pldv_detect;
71 
72 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba);
73 static void lpfc_cpuhp_remove(struct lpfc_hba *phba);
74 static void lpfc_cpuhp_add(struct lpfc_hba *phba);
75 static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
76 static int lpfc_post_rcv_buf(struct lpfc_hba *);
77 static int lpfc_sli4_queue_verify(struct lpfc_hba *);
78 static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
79 static int lpfc_setup_endian_order(struct lpfc_hba *);
80 static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
81 static void lpfc_free_els_sgl_list(struct lpfc_hba *);
82 static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
83 static void lpfc_init_sgl_list(struct lpfc_hba *);
84 static int lpfc_init_active_sgl_array(struct lpfc_hba *);
85 static void lpfc_free_active_sgl(struct lpfc_hba *);
86 static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
87 static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
88 static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
89 static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
90 static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
91 static void lpfc_sli4_disable_intr(struct lpfc_hba *);
92 static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
93 static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
94 static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int);
95 static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *);
96 static int lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *);
97 static void lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba);
98 static void lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba);
99 
100 static struct scsi_transport_template *lpfc_transport_template = NULL;
101 static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
102 static DEFINE_IDR(lpfc_hba_index);
103 #define LPFC_NVMET_BUF_POST 254
104 static int lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport);
105 static void lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts);
106 
107 /**
108  * lpfc_config_port_prep - Perform lpfc initialization prior to config port
109  * @phba: pointer to lpfc hba data structure.
110  *
111  * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
112  * mailbox command. It retrieves the revision information from the HBA and
113  * collects the Vital Product Data (VPD) about the HBA for preparing the
114  * configuration of the HBA.
115  *
116  * Return codes:
117  *   0 - success.
118  *   -ERESTART - requests the SLI layer to reset the HBA and try again.
119  *   Any other value - indicates an error.
120  **/
121 int
122 lpfc_config_port_prep(struct lpfc_hba *phba)
123 {
124 	lpfc_vpd_t *vp = &phba->vpd;
125 	int i = 0, rc;
126 	LPFC_MBOXQ_t *pmb;
127 	MAILBOX_t *mb;
128 	char *lpfc_vpd_data = NULL;
129 	uint16_t offset = 0;
130 	static char licensed[56] =
131 		    "key unlock for use with gnu public licensed code only\0";
132 	static int init_key = 1;
133 
134 	pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
135 	if (!pmb) {
136 		phba->link_state = LPFC_HBA_ERROR;
137 		return -ENOMEM;
138 	}
139 
140 	mb = &pmb->u.mb;
141 	phba->link_state = LPFC_INIT_MBX_CMDS;
142 
143 	if (lpfc_is_LC_HBA(phba->pcidev->device)) {
144 		if (init_key) {
145 			uint32_t *ptext = (uint32_t *) licensed;
146 
147 			for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
148 				*ptext = cpu_to_be32(*ptext);
149 			init_key = 0;
150 		}
151 
152 		lpfc_read_nv(phba, pmb);
153 		memset((char*)mb->un.varRDnvp.rsvd3, 0,
154 			sizeof (mb->un.varRDnvp.rsvd3));
155 		memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
156 			 sizeof (licensed));
157 
158 		rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
159 
160 		if (rc != MBX_SUCCESS) {
161 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
162 					"0324 Config Port initialization "
163 					"error, mbxCmd x%x READ_NVPARM, "
164 					"mbxStatus x%x\n",
165 					mb->mbxCommand, mb->mbxStatus);
166 			mempool_free(pmb, phba->mbox_mem_pool);
167 			return -ERESTART;
168 		}
169 		memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
170 		       sizeof(phba->wwnn));
171 		memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
172 		       sizeof(phba->wwpn));
173 	}
174 
175 	/*
176 	 * Clear all option bits except LPFC_SLI3_BG_ENABLED,
177 	 * which was already set in lpfc_get_cfgparam()
178 	 */
179 	phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED;
180 
181 	/* Setup and issue mailbox READ REV command */
182 	lpfc_read_rev(phba, pmb);
183 	rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
184 	if (rc != MBX_SUCCESS) {
185 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
186 				"0439 Adapter failed to init, mbxCmd x%x "
187 				"READ_REV, mbxStatus x%x\n",
188 				mb->mbxCommand, mb->mbxStatus);
189 		mempool_free( pmb, phba->mbox_mem_pool);
190 		return -ERESTART;
191 	}
192 
193 
194 	/*
195 	 * The value of rr must be 1 since the driver set the cv field to 1.
196 	 * This setting requires the FW to set all revision fields.
197 	 */
198 	if (mb->un.varRdRev.rr == 0) {
199 		vp->rev.rBit = 0;
200 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
201 				"0440 Adapter failed to init, READ_REV has "
202 				"missing revision information.\n");
203 		mempool_free(pmb, phba->mbox_mem_pool);
204 		return -ERESTART;
205 	}
206 
207 	if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
208 		mempool_free(pmb, phba->mbox_mem_pool);
209 		return -EINVAL;
210 	}
211 
212 	/* Save information as VPD data */
213 	vp->rev.rBit = 1;
214 	memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
215 	vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
216 	memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
217 	vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
218 	memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
219 	vp->rev.biuRev = mb->un.varRdRev.biuRev;
220 	vp->rev.smRev = mb->un.varRdRev.smRev;
221 	vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
222 	vp->rev.endecRev = mb->un.varRdRev.endecRev;
223 	vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
224 	vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
225 	vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
226 	vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
227 	vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
228 	vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
229 
230 	/* If the sli feature level is less then 9, we must
231 	 * tear down all RPIs and VPIs on link down if NPIV
232 	 * is enabled.
233 	 */
234 	if (vp->rev.feaLevelHigh < 9)
235 		phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
236 
237 	if (lpfc_is_LC_HBA(phba->pcidev->device))
238 		memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
239 						sizeof (phba->RandomData));
240 
241 	/* Get adapter VPD information */
242 	lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
243 	if (!lpfc_vpd_data)
244 		goto out_free_mbox;
245 	do {
246 		lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
247 		rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
248 
249 		if (rc != MBX_SUCCESS) {
250 			lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
251 					"0441 VPD not present on adapter, "
252 					"mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
253 					mb->mbxCommand, mb->mbxStatus);
254 			mb->un.varDmp.word_cnt = 0;
255 		}
256 		/* dump mem may return a zero when finished or we got a
257 		 * mailbox error, either way we are done.
258 		 */
259 		if (mb->un.varDmp.word_cnt == 0)
260 			break;
261 
262 		if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
263 			mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
264 		lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
265 				      lpfc_vpd_data + offset,
266 				      mb->un.varDmp.word_cnt);
267 		offset += mb->un.varDmp.word_cnt;
268 	} while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
269 
270 	lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
271 
272 	kfree(lpfc_vpd_data);
273 out_free_mbox:
274 	mempool_free(pmb, phba->mbox_mem_pool);
275 	return 0;
276 }
277 
278 /**
279  * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
280  * @phba: pointer to lpfc hba data structure.
281  * @pmboxq: pointer to the driver internal queue element for mailbox command.
282  *
283  * This is the completion handler for driver's configuring asynchronous event
284  * mailbox command to the device. If the mailbox command returns successfully,
285  * it will set internal async event support flag to 1; otherwise, it will
286  * set internal async event support flag to 0.
287  **/
288 static void
289 lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
290 {
291 	if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
292 		phba->temp_sensor_support = 1;
293 	else
294 		phba->temp_sensor_support = 0;
295 	mempool_free(pmboxq, phba->mbox_mem_pool);
296 	return;
297 }
298 
299 /**
300  * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
301  * @phba: pointer to lpfc hba data structure.
302  * @pmboxq: pointer to the driver internal queue element for mailbox command.
303  *
304  * This is the completion handler for dump mailbox command for getting
305  * wake up parameters. When this command complete, the response contain
306  * Option rom version of the HBA. This function translate the version number
307  * into a human readable string and store it in OptionROMVersion.
308  **/
309 static void
310 lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
311 {
312 	struct prog_id *prg;
313 	uint32_t prog_id_word;
314 	char dist = ' ';
315 	/* character array used for decoding dist type. */
316 	char dist_char[] = "nabx";
317 
318 	if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
319 		mempool_free(pmboxq, phba->mbox_mem_pool);
320 		return;
321 	}
322 
323 	prg = (struct prog_id *) &prog_id_word;
324 
325 	/* word 7 contain option rom version */
326 	prog_id_word = pmboxq->u.mb.un.varWords[7];
327 
328 	/* Decode the Option rom version word to a readable string */
329 	dist = dist_char[prg->dist];
330 
331 	if ((prg->dist == 3) && (prg->num == 0))
332 		snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
333 			prg->ver, prg->rev, prg->lev);
334 	else
335 		snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
336 			prg->ver, prg->rev, prg->lev,
337 			dist, prg->num);
338 	mempool_free(pmboxq, phba->mbox_mem_pool);
339 	return;
340 }
341 
342 /**
343  * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
344  * @vport: pointer to lpfc vport data structure.
345  *
346  *
347  * Return codes
348  *   None.
349  **/
350 void
351 lpfc_update_vport_wwn(struct lpfc_vport *vport)
352 {
353 	struct lpfc_hba *phba = vport->phba;
354 
355 	/*
356 	 * If the name is empty or there exists a soft name
357 	 * then copy the service params name, otherwise use the fc name
358 	 */
359 	if (vport->fc_nodename.u.wwn[0] == 0)
360 		memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
361 			sizeof(struct lpfc_name));
362 	else
363 		memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
364 			sizeof(struct lpfc_name));
365 
366 	/*
367 	 * If the port name has changed, then set the Param changes flag
368 	 * to unreg the login
369 	 */
370 	if (vport->fc_portname.u.wwn[0] != 0 &&
371 		memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
372 		       sizeof(struct lpfc_name))) {
373 		vport->vport_flag |= FAWWPN_PARAM_CHG;
374 
375 		if (phba->sli_rev == LPFC_SLI_REV4 &&
376 		    vport->port_type == LPFC_PHYSICAL_PORT &&
377 		    phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_FABRIC) {
378 			if (!(phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG))
379 				phba->sli4_hba.fawwpn_flag &=
380 						~LPFC_FAWWPN_FABRIC;
381 			lpfc_printf_log(phba, KERN_INFO,
382 					LOG_SLI | LOG_DISCOVERY | LOG_ELS,
383 					"2701 FA-PWWN change WWPN from %llx to "
384 					"%llx: vflag x%x fawwpn_flag x%x\n",
385 					wwn_to_u64(vport->fc_portname.u.wwn),
386 					wwn_to_u64
387 					   (vport->fc_sparam.portName.u.wwn),
388 					vport->vport_flag,
389 					phba->sli4_hba.fawwpn_flag);
390 			memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
391 			       sizeof(struct lpfc_name));
392 		}
393 	}
394 
395 	if (vport->fc_portname.u.wwn[0] == 0)
396 		memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
397 		       sizeof(struct lpfc_name));
398 	else
399 		memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
400 		       sizeof(struct lpfc_name));
401 }
402 
403 /**
404  * lpfc_config_port_post - Perform lpfc initialization after config port
405  * @phba: pointer to lpfc hba data structure.
406  *
407  * This routine will do LPFC initialization after the CONFIG_PORT mailbox
408  * command call. It performs all internal resource and state setups on the
409  * port: post IOCB buffers, enable appropriate host interrupt attentions,
410  * ELS ring timers, etc.
411  *
412  * Return codes
413  *   0 - success.
414  *   Any other value - error.
415  **/
416 int
417 lpfc_config_port_post(struct lpfc_hba *phba)
418 {
419 	struct lpfc_vport *vport = phba->pport;
420 	struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
421 	LPFC_MBOXQ_t *pmb;
422 	MAILBOX_t *mb;
423 	struct lpfc_dmabuf *mp;
424 	struct lpfc_sli *psli = &phba->sli;
425 	uint32_t status, timeout;
426 	int i, j;
427 	int rc;
428 
429 	spin_lock_irq(&phba->hbalock);
430 	/*
431 	 * If the Config port completed correctly the HBA is not
432 	 * over heated any more.
433 	 */
434 	if (phba->over_temp_state == HBA_OVER_TEMP)
435 		phba->over_temp_state = HBA_NORMAL_TEMP;
436 	spin_unlock_irq(&phba->hbalock);
437 
438 	pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
439 	if (!pmb) {
440 		phba->link_state = LPFC_HBA_ERROR;
441 		return -ENOMEM;
442 	}
443 	mb = &pmb->u.mb;
444 
445 	/* Get login parameters for NID.  */
446 	rc = lpfc_read_sparam(phba, pmb, 0);
447 	if (rc) {
448 		mempool_free(pmb, phba->mbox_mem_pool);
449 		return -ENOMEM;
450 	}
451 
452 	pmb->vport = vport;
453 	if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
454 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
455 				"0448 Adapter failed init, mbxCmd x%x "
456 				"READ_SPARM mbxStatus x%x\n",
457 				mb->mbxCommand, mb->mbxStatus);
458 		phba->link_state = LPFC_HBA_ERROR;
459 		lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
460 		return -EIO;
461 	}
462 
463 	mp = pmb->ctx_buf;
464 
465 	/* This dmabuf was allocated by lpfc_read_sparam. The dmabuf is no
466 	 * longer needed.  Prevent unintended ctx_buf access as the mbox is
467 	 * reused.
468 	 */
469 	memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
470 	lpfc_mbuf_free(phba, mp->virt, mp->phys);
471 	kfree(mp);
472 	pmb->ctx_buf = NULL;
473 	lpfc_update_vport_wwn(vport);
474 
475 	/* Update the fc_host data structures with new wwn. */
476 	fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
477 	fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
478 	fc_host_max_npiv_vports(shost) = phba->max_vpi;
479 
480 	/* If no serial number in VPD data, use low 6 bytes of WWNN */
481 	/* This should be consolidated into parse_vpd ? - mr */
482 	if (phba->SerialNumber[0] == 0) {
483 		uint8_t *outptr;
484 
485 		outptr = &vport->fc_nodename.u.s.IEEE[0];
486 		for (i = 0; i < 12; i++) {
487 			status = *outptr++;
488 			j = ((status & 0xf0) >> 4);
489 			if (j <= 9)
490 				phba->SerialNumber[i] =
491 				    (char)((uint8_t) 0x30 + (uint8_t) j);
492 			else
493 				phba->SerialNumber[i] =
494 				    (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
495 			i++;
496 			j = (status & 0xf);
497 			if (j <= 9)
498 				phba->SerialNumber[i] =
499 				    (char)((uint8_t) 0x30 + (uint8_t) j);
500 			else
501 				phba->SerialNumber[i] =
502 				    (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
503 		}
504 	}
505 
506 	lpfc_read_config(phba, pmb);
507 	pmb->vport = vport;
508 	if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
509 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
510 				"0453 Adapter failed to init, mbxCmd x%x "
511 				"READ_CONFIG, mbxStatus x%x\n",
512 				mb->mbxCommand, mb->mbxStatus);
513 		phba->link_state = LPFC_HBA_ERROR;
514 		mempool_free( pmb, phba->mbox_mem_pool);
515 		return -EIO;
516 	}
517 
518 	/* Check if the port is disabled */
519 	lpfc_sli_read_link_ste(phba);
520 
521 	/* Reset the DFT_HBA_Q_DEPTH to the max xri  */
522 	if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) {
523 		lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
524 				"3359 HBA queue depth changed from %d to %d\n",
525 				phba->cfg_hba_queue_depth,
526 				mb->un.varRdConfig.max_xri);
527 		phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri;
528 	}
529 
530 	phba->lmt = mb->un.varRdConfig.lmt;
531 
532 	/* Get the default values for Model Name and Description */
533 	lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
534 
535 	phba->link_state = LPFC_LINK_DOWN;
536 
537 	/* Only process IOCBs on ELS ring till hba_state is READY */
538 	if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
539 		psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
540 	if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
541 		psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
542 
543 	/* Post receive buffers for desired rings */
544 	if (phba->sli_rev != 3)
545 		lpfc_post_rcv_buf(phba);
546 
547 	/*
548 	 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
549 	 */
550 	if (phba->intr_type == MSIX) {
551 		rc = lpfc_config_msi(phba, pmb);
552 		if (rc) {
553 			mempool_free(pmb, phba->mbox_mem_pool);
554 			return -EIO;
555 		}
556 		rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
557 		if (rc != MBX_SUCCESS) {
558 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
559 					"0352 Config MSI mailbox command "
560 					"failed, mbxCmd x%x, mbxStatus x%x\n",
561 					pmb->u.mb.mbxCommand,
562 					pmb->u.mb.mbxStatus);
563 			mempool_free(pmb, phba->mbox_mem_pool);
564 			return -EIO;
565 		}
566 	}
567 
568 	spin_lock_irq(&phba->hbalock);
569 	/* Initialize ERATT handling flag */
570 	clear_bit(HBA_ERATT_HANDLED, &phba->hba_flag);
571 
572 	/* Enable appropriate host interrupts */
573 	if (lpfc_readl(phba->HCregaddr, &status)) {
574 		spin_unlock_irq(&phba->hbalock);
575 		return -EIO;
576 	}
577 	status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
578 	if (psli->num_rings > 0)
579 		status |= HC_R0INT_ENA;
580 	if (psli->num_rings > 1)
581 		status |= HC_R1INT_ENA;
582 	if (psli->num_rings > 2)
583 		status |= HC_R2INT_ENA;
584 	if (psli->num_rings > 3)
585 		status |= HC_R3INT_ENA;
586 
587 	if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
588 	    (phba->cfg_poll & DISABLE_FCP_RING_INT))
589 		status &= ~(HC_R0INT_ENA);
590 
591 	writel(status, phba->HCregaddr);
592 	readl(phba->HCregaddr); /* flush */
593 	spin_unlock_irq(&phba->hbalock);
594 
595 	/* Set up ring-0 (ELS) timer */
596 	timeout = phba->fc_ratov * 2;
597 	mod_timer(&vport->els_tmofunc,
598 		  jiffies + secs_to_jiffies(timeout));
599 	/* Set up heart beat (HB) timer */
600 	mod_timer(&phba->hb_tmofunc,
601 		  jiffies + secs_to_jiffies(LPFC_HB_MBOX_INTERVAL));
602 	clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
603 	clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
604 	phba->last_completion_time = jiffies;
605 	/* Set up error attention (ERATT) polling timer */
606 	mod_timer(&phba->eratt_poll,
607 		  jiffies + secs_to_jiffies(phba->eratt_poll_interval));
608 
609 	if (test_bit(LINK_DISABLED, &phba->hba_flag)) {
610 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
611 				"2598 Adapter Link is disabled.\n");
612 		lpfc_down_link(phba, pmb);
613 		pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
614 		rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
615 		if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
616 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
617 					"2599 Adapter failed to issue DOWN_LINK"
618 					" mbox command rc 0x%x\n", rc);
619 
620 			mempool_free(pmb, phba->mbox_mem_pool);
621 			return -EIO;
622 		}
623 	} else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
624 		mempool_free(pmb, phba->mbox_mem_pool);
625 		rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
626 		if (rc)
627 			return rc;
628 	}
629 	/* MBOX buffer will be freed in mbox compl */
630 	pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
631 	if (!pmb) {
632 		phba->link_state = LPFC_HBA_ERROR;
633 		return -ENOMEM;
634 	}
635 
636 	lpfc_config_async(phba, pmb, LPFC_ELS_RING);
637 	pmb->mbox_cmpl = lpfc_config_async_cmpl;
638 	pmb->vport = phba->pport;
639 	rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
640 
641 	if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
642 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
643 				"0456 Adapter failed to issue "
644 				"ASYNCEVT_ENABLE mbox status x%x\n",
645 				rc);
646 		mempool_free(pmb, phba->mbox_mem_pool);
647 	}
648 
649 	/* Get Option rom version */
650 	pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
651 	if (!pmb) {
652 		phba->link_state = LPFC_HBA_ERROR;
653 		return -ENOMEM;
654 	}
655 
656 	lpfc_dump_wakeup_param(phba, pmb);
657 	pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
658 	pmb->vport = phba->pport;
659 	rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
660 
661 	if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
662 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
663 				"0435 Adapter failed "
664 				"to get Option ROM version status x%x\n", rc);
665 		mempool_free(pmb, phba->mbox_mem_pool);
666 	}
667 
668 	return 0;
669 }
670 
671 /**
672  * lpfc_sli4_refresh_params - update driver copy of params.
673  * @phba: Pointer to HBA context object.
674  *
675  * This is called to refresh driver copy of dynamic fields from the
676  * common_get_sli4_parameters descriptor.
677  **/
678 int
679 lpfc_sli4_refresh_params(struct lpfc_hba *phba)
680 {
681 	LPFC_MBOXQ_t *mboxq;
682 	struct lpfc_mqe *mqe;
683 	struct lpfc_sli4_parameters *mbx_sli4_parameters;
684 	int length, rc;
685 
686 	mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
687 	if (!mboxq)
688 		return -ENOMEM;
689 
690 	mqe = &mboxq->u.mqe;
691 	/* Read the port's SLI4 Config Parameters */
692 	length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
693 		  sizeof(struct lpfc_sli4_cfg_mhdr));
694 	lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
695 			 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
696 			 length, LPFC_SLI4_MBX_EMBED);
697 
698 	rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
699 	if (unlikely(rc)) {
700 		mempool_free(mboxq, phba->mbox_mem_pool);
701 		return rc;
702 	}
703 	mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
704 	phba->sli4_hba.pc_sli4_params.mi_cap =
705 		bf_get(cfg_mi_ver, mbx_sli4_parameters);
706 
707 	/* Are we forcing MI off via module parameter? */
708 	if (phba->cfg_enable_mi)
709 		phba->sli4_hba.pc_sli4_params.mi_ver =
710 			bf_get(cfg_mi_ver, mbx_sli4_parameters);
711 	else
712 		phba->sli4_hba.pc_sli4_params.mi_ver = 0;
713 
714 	phba->sli4_hba.pc_sli4_params.cmf =
715 			bf_get(cfg_cmf, mbx_sli4_parameters);
716 	phba->sli4_hba.pc_sli4_params.pls =
717 			bf_get(cfg_pvl, mbx_sli4_parameters);
718 
719 	mempool_free(mboxq, phba->mbox_mem_pool);
720 	return rc;
721 }
722 
723 /**
724  * lpfc_hba_init_link - Initialize the FC link
725  * @phba: pointer to lpfc hba data structure.
726  * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
727  *
728  * This routine will issue the INIT_LINK mailbox command call.
729  * It is available to other drivers through the lpfc_hba data
730  * structure for use as a delayed link up mechanism with the
731  * module parameter lpfc_suppress_link_up.
732  *
733  * Return code
734  *		0 - success
735  *		Any other value - error
736  **/
737 static int
738 lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
739 {
740 	return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
741 }
742 
743 /**
744  * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
745  * @phba: pointer to lpfc hba data structure.
746  * @fc_topology: desired fc topology.
747  * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
748  *
749  * This routine will issue the INIT_LINK mailbox command call.
750  * It is available to other drivers through the lpfc_hba data
751  * structure for use as a delayed link up mechanism with the
752  * module parameter lpfc_suppress_link_up.
753  *
754  * Return code
755  *              0 - success
756  *              Any other value - error
757  **/
758 int
759 lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
760 			       uint32_t flag)
761 {
762 	struct lpfc_vport *vport = phba->pport;
763 	LPFC_MBOXQ_t *pmb;
764 	MAILBOX_t *mb;
765 	int rc;
766 
767 	pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
768 	if (!pmb) {
769 		phba->link_state = LPFC_HBA_ERROR;
770 		return -ENOMEM;
771 	}
772 	mb = &pmb->u.mb;
773 	pmb->vport = vport;
774 
775 	if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
776 	    ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
777 	     !(phba->lmt & LMT_1Gb)) ||
778 	    ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
779 	     !(phba->lmt & LMT_2Gb)) ||
780 	    ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
781 	     !(phba->lmt & LMT_4Gb)) ||
782 	    ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
783 	     !(phba->lmt & LMT_8Gb)) ||
784 	    ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
785 	     !(phba->lmt & LMT_10Gb)) ||
786 	    ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
787 	     !(phba->lmt & LMT_16Gb)) ||
788 	    ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
789 	     !(phba->lmt & LMT_32Gb)) ||
790 	    ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) &&
791 	     !(phba->lmt & LMT_64Gb))) {
792 		/* Reset link speed to auto */
793 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
794 				"1302 Invalid speed for this board:%d "
795 				"Reset link speed to auto.\n",
796 				phba->cfg_link_speed);
797 			phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
798 	}
799 	lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
800 	pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
801 	if (phba->sli_rev < LPFC_SLI_REV4)
802 		lpfc_set_loopback_flag(phba);
803 	rc = lpfc_sli_issue_mbox(phba, pmb, flag);
804 	if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
805 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
806 				"0498 Adapter failed to init, mbxCmd x%x "
807 				"INIT_LINK, mbxStatus x%x\n",
808 				mb->mbxCommand, mb->mbxStatus);
809 		if (phba->sli_rev <= LPFC_SLI_REV3) {
810 			/* Clear all interrupt enable conditions */
811 			writel(0, phba->HCregaddr);
812 			readl(phba->HCregaddr); /* flush */
813 			/* Clear all pending interrupts */
814 			writel(0xffffffff, phba->HAregaddr);
815 			readl(phba->HAregaddr); /* flush */
816 		}
817 		phba->link_state = LPFC_HBA_ERROR;
818 		if (rc != MBX_BUSY || flag == MBX_POLL)
819 			mempool_free(pmb, phba->mbox_mem_pool);
820 		return -EIO;
821 	}
822 	phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
823 	if (flag == MBX_POLL)
824 		mempool_free(pmb, phba->mbox_mem_pool);
825 
826 	return 0;
827 }
828 
829 /**
830  * lpfc_hba_down_link - this routine downs the FC link
831  * @phba: pointer to lpfc hba data structure.
832  * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
833  *
834  * This routine will issue the DOWN_LINK mailbox command call.
835  * It is available to other drivers through the lpfc_hba data
836  * structure for use to stop the link.
837  *
838  * Return code
839  *		0 - success
840  *		Any other value - error
841  **/
842 static int
843 lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
844 {
845 	LPFC_MBOXQ_t *pmb;
846 	int rc;
847 
848 	pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
849 	if (!pmb) {
850 		phba->link_state = LPFC_HBA_ERROR;
851 		return -ENOMEM;
852 	}
853 
854 	lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
855 			"0491 Adapter Link is disabled.\n");
856 	lpfc_down_link(phba, pmb);
857 	pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
858 	rc = lpfc_sli_issue_mbox(phba, pmb, flag);
859 	if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
860 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
861 				"2522 Adapter failed to issue DOWN_LINK"
862 				" mbox command rc 0x%x\n", rc);
863 
864 		mempool_free(pmb, phba->mbox_mem_pool);
865 		return -EIO;
866 	}
867 	if (flag == MBX_POLL)
868 		mempool_free(pmb, phba->mbox_mem_pool);
869 
870 	return 0;
871 }
872 
873 /**
874  * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
875  * @phba: pointer to lpfc HBA data structure.
876  *
877  * This routine will do LPFC uninitialization before the HBA is reset when
878  * bringing down the SLI Layer.
879  *
880  * Return codes
881  *   0 - success.
882  *   Any other value - error.
883  **/
884 int
885 lpfc_hba_down_prep(struct lpfc_hba *phba)
886 {
887 	struct lpfc_vport **vports;
888 	int i;
889 
890 	if (phba->sli_rev <= LPFC_SLI_REV3) {
891 		/* Disable interrupts */
892 		writel(0, phba->HCregaddr);
893 		readl(phba->HCregaddr); /* flush */
894 	}
895 
896 	if (test_bit(FC_UNLOADING, &phba->pport->load_flag))
897 		lpfc_cleanup_discovery_resources(phba->pport);
898 	else {
899 		vports = lpfc_create_vport_work_array(phba);
900 		if (vports != NULL)
901 			for (i = 0; i <= phba->max_vports &&
902 				vports[i] != NULL; i++)
903 				lpfc_cleanup_discovery_resources(vports[i]);
904 		lpfc_destroy_vport_work_array(phba, vports);
905 	}
906 	return 0;
907 }
908 
909 /**
910  * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
911  * rspiocb which got deferred
912  *
913  * @phba: pointer to lpfc HBA data structure.
914  *
915  * This routine will cleanup completed slow path events after HBA is reset
916  * when bringing down the SLI Layer.
917  *
918  *
919  * Return codes
920  *   void.
921  **/
922 static void
923 lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
924 {
925 	struct lpfc_iocbq *rspiocbq;
926 	struct hbq_dmabuf *dmabuf;
927 	struct lpfc_cq_event *cq_event;
928 
929 	clear_bit(HBA_SP_QUEUE_EVT, &phba->hba_flag);
930 
931 	while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
932 		/* Get the response iocb from the head of work queue */
933 		spin_lock_irq(&phba->hbalock);
934 		list_remove_head(&phba->sli4_hba.sp_queue_event,
935 				 cq_event, struct lpfc_cq_event, list);
936 		spin_unlock_irq(&phba->hbalock);
937 
938 		switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
939 		case CQE_CODE_COMPL_WQE:
940 			rspiocbq = container_of(cq_event, struct lpfc_iocbq,
941 						 cq_event);
942 			lpfc_sli_release_iocbq(phba, rspiocbq);
943 			break;
944 		case CQE_CODE_RECEIVE:
945 		case CQE_CODE_RECEIVE_V1:
946 			dmabuf = container_of(cq_event, struct hbq_dmabuf,
947 					      cq_event);
948 			lpfc_in_buf_free(phba, &dmabuf->dbuf);
949 		}
950 	}
951 }
952 
953 /**
954  * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
955  * @phba: pointer to lpfc HBA data structure.
956  *
957  * This routine will cleanup posted ELS buffers after the HBA is reset
958  * when bringing down the SLI Layer.
959  *
960  *
961  * Return codes
962  *   void.
963  **/
964 static void
965 lpfc_hba_free_post_buf(struct lpfc_hba *phba)
966 {
967 	struct lpfc_sli *psli = &phba->sli;
968 	struct lpfc_sli_ring *pring;
969 	struct lpfc_dmabuf *mp, *next_mp;
970 	LIST_HEAD(buflist);
971 	int count;
972 
973 	if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
974 		lpfc_sli_hbqbuf_free_all(phba);
975 	else {
976 		/* Cleanup preposted buffers on the ELS ring */
977 		pring = &psli->sli3_ring[LPFC_ELS_RING];
978 		spin_lock_irq(&phba->hbalock);
979 		list_splice_init(&pring->postbufq, &buflist);
980 		spin_unlock_irq(&phba->hbalock);
981 
982 		count = 0;
983 		list_for_each_entry_safe(mp, next_mp, &buflist, list) {
984 			list_del(&mp->list);
985 			count++;
986 			lpfc_mbuf_free(phba, mp->virt, mp->phys);
987 			kfree(mp);
988 		}
989 
990 		spin_lock_irq(&phba->hbalock);
991 		pring->postbufq_cnt -= count;
992 		spin_unlock_irq(&phba->hbalock);
993 	}
994 }
995 
996 /**
997  * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
998  * @phba: pointer to lpfc HBA data structure.
999  *
1000  * This routine will cleanup the txcmplq after the HBA is reset when bringing
1001  * down the SLI Layer.
1002  *
1003  * Return codes
1004  *   void
1005  **/
1006 static void
1007 lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
1008 {
1009 	struct lpfc_sli *psli = &phba->sli;
1010 	struct lpfc_queue *qp = NULL;
1011 	struct lpfc_sli_ring *pring;
1012 	LIST_HEAD(completions);
1013 	int i;
1014 	struct lpfc_iocbq *piocb, *next_iocb;
1015 
1016 	if (phba->sli_rev != LPFC_SLI_REV4) {
1017 		for (i = 0; i < psli->num_rings; i++) {
1018 			pring = &psli->sli3_ring[i];
1019 			spin_lock_irq(&phba->hbalock);
1020 			/* At this point in time the HBA is either reset or DOA
1021 			 * Nothing should be on txcmplq as it will
1022 			 * NEVER complete.
1023 			 */
1024 			list_splice_init(&pring->txcmplq, &completions);
1025 			pring->txcmplq_cnt = 0;
1026 			spin_unlock_irq(&phba->hbalock);
1027 
1028 			lpfc_sli_abort_iocb_ring(phba, pring);
1029 		}
1030 		/* Cancel all the IOCBs from the completions list */
1031 		lpfc_sli_cancel_iocbs(phba, &completions,
1032 				      IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
1033 		return;
1034 	}
1035 	list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
1036 		pring = qp->pring;
1037 		if (!pring)
1038 			continue;
1039 		spin_lock_irq(&pring->ring_lock);
1040 		list_for_each_entry_safe(piocb, next_iocb,
1041 					 &pring->txcmplq, list)
1042 			piocb->cmd_flag &= ~LPFC_IO_ON_TXCMPLQ;
1043 		list_splice_init(&pring->txcmplq, &completions);
1044 		pring->txcmplq_cnt = 0;
1045 		spin_unlock_irq(&pring->ring_lock);
1046 		lpfc_sli_abort_iocb_ring(phba, pring);
1047 	}
1048 	/* Cancel all the IOCBs from the completions list */
1049 	lpfc_sli_cancel_iocbs(phba, &completions,
1050 			      IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
1051 }
1052 
1053 /**
1054  * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
1055  * @phba: pointer to lpfc HBA data structure.
1056  *
1057  * This routine will do uninitialization after the HBA is reset when bring
1058  * down the SLI Layer.
1059  *
1060  * Return codes
1061  *   0 - success.
1062  *   Any other value - error.
1063  **/
1064 static int
1065 lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1066 {
1067 	lpfc_hba_free_post_buf(phba);
1068 	lpfc_hba_clean_txcmplq(phba);
1069 	return 0;
1070 }
1071 
1072 /**
1073  * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1074  * @phba: pointer to lpfc HBA data structure.
1075  *
1076  * This routine will do uninitialization after the HBA is reset when bring
1077  * down the SLI Layer.
1078  *
1079  * Return codes
1080  *   0 - success.
1081  *   Any other value - error.
1082  **/
1083 static int
1084 lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1085 {
1086 	struct lpfc_io_buf *psb, *psb_next;
1087 	struct lpfc_async_xchg_ctx *ctxp, *ctxp_next;
1088 	struct lpfc_sli4_hdw_queue *qp;
1089 	LIST_HEAD(aborts);
1090 	LIST_HEAD(nvme_aborts);
1091 	LIST_HEAD(nvmet_aborts);
1092 	struct lpfc_sglq *sglq_entry = NULL;
1093 	int cnt, idx;
1094 
1095 
1096 	lpfc_sli_hbqbuf_free_all(phba);
1097 	lpfc_hba_clean_txcmplq(phba);
1098 
1099 	/* At this point in time the HBA is either reset or DOA. Either
1100 	 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
1101 	 * on the lpfc_els_sgl_list so that it can either be freed if the
1102 	 * driver is unloading or reposted if the driver is restarting
1103 	 * the port.
1104 	 */
1105 
1106 	/* sgl_list_lock required because worker thread uses this
1107 	 * list.
1108 	 */
1109 	spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
1110 	list_for_each_entry(sglq_entry,
1111 		&phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1112 		sglq_entry->state = SGL_FREED;
1113 
1114 	list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
1115 			&phba->sli4_hba.lpfc_els_sgl_list);
1116 
1117 
1118 	spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
1119 
1120 	/* abts_xxxx_buf_list_lock required because worker thread uses this
1121 	 * list.
1122 	 */
1123 	spin_lock_irq(&phba->hbalock);
1124 	cnt = 0;
1125 	for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
1126 		qp = &phba->sli4_hba.hdwq[idx];
1127 
1128 		spin_lock(&qp->abts_io_buf_list_lock);
1129 		list_splice_init(&qp->lpfc_abts_io_buf_list,
1130 				 &aborts);
1131 
1132 		list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1133 			psb->pCmd = NULL;
1134 			psb->status = IOSTAT_SUCCESS;
1135 			cnt++;
1136 		}
1137 		spin_lock(&qp->io_buf_list_put_lock);
1138 		list_splice_init(&aborts, &qp->lpfc_io_buf_list_put);
1139 		qp->put_io_bufs += qp->abts_scsi_io_bufs;
1140 		qp->put_io_bufs += qp->abts_nvme_io_bufs;
1141 		qp->abts_scsi_io_bufs = 0;
1142 		qp->abts_nvme_io_bufs = 0;
1143 		spin_unlock(&qp->io_buf_list_put_lock);
1144 		spin_unlock(&qp->abts_io_buf_list_lock);
1145 	}
1146 	spin_unlock_irq(&phba->hbalock);
1147 
1148 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1149 		spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1150 		list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1151 				 &nvmet_aborts);
1152 		spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1153 		list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1154 			ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP);
1155 			lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
1156 		}
1157 	}
1158 
1159 	lpfc_sli4_free_sp_events(phba);
1160 	return cnt;
1161 }
1162 
1163 /**
1164  * lpfc_hba_down_post - Wrapper func for hba down post routine
1165  * @phba: pointer to lpfc HBA data structure.
1166  *
1167  * This routine wraps the actual SLI3 or SLI4 routine for performing
1168  * uninitialization after the HBA is reset when bring down the SLI Layer.
1169  *
1170  * Return codes
1171  *   0 - success.
1172  *   Any other value - error.
1173  **/
1174 int
1175 lpfc_hba_down_post(struct lpfc_hba *phba)
1176 {
1177 	return (*phba->lpfc_hba_down_post)(phba);
1178 }
1179 
1180 /**
1181  * lpfc_hb_timeout - The HBA-timer timeout handler
1182  * @t: timer context used to obtain the pointer to lpfc hba data structure.
1183  *
1184  * This is the HBA-timer timeout handler registered to the lpfc driver. When
1185  * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1186  * work-port-events bitmap and the worker thread is notified. This timeout
1187  * event will be used by the worker thread to invoke the actual timeout
1188  * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1189  * be performed in the timeout handler and the HBA timeout event bit shall
1190  * be cleared by the worker thread after it has taken the event bitmap out.
1191  **/
1192 static void
1193 lpfc_hb_timeout(struct timer_list *t)
1194 {
1195 	struct lpfc_hba *phba;
1196 	uint32_t tmo_posted;
1197 	unsigned long iflag;
1198 
1199 	phba = timer_container_of(phba, t, hb_tmofunc);
1200 
1201 	/* Check for heart beat timeout conditions */
1202 	spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
1203 	tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1204 	if (!tmo_posted)
1205 		phba->pport->work_port_events |= WORKER_HB_TMO;
1206 	spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1207 
1208 	/* Tell the worker thread there is work to do */
1209 	if (!tmo_posted)
1210 		lpfc_worker_wake_up(phba);
1211 	return;
1212 }
1213 
1214 /**
1215  * lpfc_rrq_timeout - The RRQ-timer timeout handler
1216  * @t: timer context used to obtain the pointer to lpfc hba data structure.
1217  *
1218  * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1219  * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1220  * work-port-events bitmap and the worker thread is notified. This timeout
1221  * event will be used by the worker thread to invoke the actual timeout
1222  * handler routine, lpfc_rrq_handler. Any periodical operations will
1223  * be performed in the timeout handler and the RRQ timeout event bit shall
1224  * be cleared by the worker thread after it has taken the event bitmap out.
1225  **/
1226 static void
1227 lpfc_rrq_timeout(struct timer_list *t)
1228 {
1229 	struct lpfc_hba *phba;
1230 
1231 	phba = timer_container_of(phba, t, rrq_tmr);
1232 	if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
1233 		clear_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
1234 		return;
1235 	}
1236 
1237 	set_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
1238 	lpfc_worker_wake_up(phba);
1239 }
1240 
1241 /**
1242  * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
1243  * @phba: pointer to lpfc hba data structure.
1244  * @pmboxq: pointer to the driver internal queue element for mailbox command.
1245  *
1246  * This is the callback function to the lpfc heart-beat mailbox command.
1247  * If configured, the lpfc driver issues the heart-beat mailbox command to
1248  * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1249  * heart-beat mailbox command is issued, the driver shall set up heart-beat
1250  * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1251  * heart-beat outstanding state. Once the mailbox command comes back and
1252  * no error conditions detected, the heart-beat mailbox command timer is
1253  * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1254  * state is cleared for the next heart-beat. If the timer expired with the
1255  * heart-beat outstanding state set, the driver will put the HBA offline.
1256  **/
1257 static void
1258 lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1259 {
1260 	clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
1261 	clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
1262 
1263 	/* Check and reset heart-beat timer if necessary */
1264 	mempool_free(pmboxq, phba->mbox_mem_pool);
1265 	if (!test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag) &&
1266 	    !(phba->link_state == LPFC_HBA_ERROR) &&
1267 	    !test_bit(FC_UNLOADING, &phba->pport->load_flag))
1268 		mod_timer(&phba->hb_tmofunc,
1269 			  jiffies +
1270 			  secs_to_jiffies(LPFC_HB_MBOX_INTERVAL));
1271 	return;
1272 }
1273 
1274 /*
1275  * lpfc_idle_stat_delay_work - idle_stat tracking
1276  *
1277  * This routine tracks per-eq idle_stat and determines polling decisions.
1278  *
1279  * Return codes:
1280  *   None
1281  **/
1282 static void
1283 lpfc_idle_stat_delay_work(struct work_struct *work)
1284 {
1285 	struct lpfc_hba *phba = container_of(to_delayed_work(work),
1286 					     struct lpfc_hba,
1287 					     idle_stat_delay_work);
1288 	struct lpfc_queue *eq;
1289 	struct lpfc_sli4_hdw_queue *hdwq;
1290 	struct lpfc_idle_stat *idle_stat;
1291 	u32 i, idle_percent;
1292 	u64 wall, wall_idle, diff_wall, diff_idle, busy_time;
1293 
1294 	if (test_bit(FC_UNLOADING, &phba->pport->load_flag))
1295 		return;
1296 
1297 	if (phba->link_state == LPFC_HBA_ERROR ||
1298 	    test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag) ||
1299 	    phba->cmf_active_mode != LPFC_CFG_OFF)
1300 		goto requeue;
1301 
1302 	for_each_present_cpu(i) {
1303 		hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq];
1304 		eq = hdwq->hba_eq;
1305 
1306 		/* Skip if we've already handled this eq's primary CPU */
1307 		if (eq->chann != i)
1308 			continue;
1309 
1310 		idle_stat = &phba->sli4_hba.idle_stat[i];
1311 
1312 		/* get_cpu_idle_time returns values as running counters. Thus,
1313 		 * to know the amount for this period, the prior counter values
1314 		 * need to be subtracted from the current counter values.
1315 		 * From there, the idle time stat can be calculated as a
1316 		 * percentage of 100 - the sum of the other consumption times.
1317 		 */
1318 		wall_idle = get_cpu_idle_time(i, &wall, 1);
1319 		diff_idle = wall_idle - idle_stat->prev_idle;
1320 		diff_wall = wall - idle_stat->prev_wall;
1321 
1322 		if (diff_wall <= diff_idle)
1323 			busy_time = 0;
1324 		else
1325 			busy_time = diff_wall - diff_idle;
1326 
1327 		idle_percent = div64_u64(100 * busy_time, diff_wall);
1328 		idle_percent = 100 - idle_percent;
1329 
1330 		if (idle_percent < 15)
1331 			eq->poll_mode = LPFC_QUEUE_WORK;
1332 		else
1333 			eq->poll_mode = LPFC_THREADED_IRQ;
1334 
1335 		idle_stat->prev_idle = wall_idle;
1336 		idle_stat->prev_wall = wall;
1337 	}
1338 
1339 requeue:
1340 	schedule_delayed_work(&phba->idle_stat_delay_work,
1341 			      msecs_to_jiffies(LPFC_IDLE_STAT_DELAY));
1342 }
1343 
1344 static void
1345 lpfc_hb_eq_delay_work(struct work_struct *work)
1346 {
1347 	struct lpfc_hba *phba = container_of(to_delayed_work(work),
1348 					     struct lpfc_hba, eq_delay_work);
1349 	struct lpfc_eq_intr_info *eqi, *eqi_new;
1350 	struct lpfc_queue *eq, *eq_next;
1351 	unsigned char *ena_delay = NULL;
1352 	uint32_t usdelay;
1353 	int i;
1354 
1355 	if (!phba->cfg_auto_imax ||
1356 	    test_bit(FC_UNLOADING, &phba->pport->load_flag))
1357 		return;
1358 
1359 	if (phba->link_state == LPFC_HBA_ERROR ||
1360 	    test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
1361 		goto requeue;
1362 
1363 	ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay),
1364 			    GFP_KERNEL);
1365 	if (!ena_delay)
1366 		goto requeue;
1367 
1368 	for (i = 0; i < phba->cfg_irq_chann; i++) {
1369 		/* Get the EQ corresponding to the IRQ vector */
1370 		eq = phba->sli4_hba.hba_eq_hdl[i].eq;
1371 		if (!eq)
1372 			continue;
1373 		if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) {
1374 			eq->q_flag &= ~HBA_EQ_DELAY_CHK;
1375 			ena_delay[eq->last_cpu] = 1;
1376 		}
1377 	}
1378 
1379 	for_each_present_cpu(i) {
1380 		eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
1381 		if (ena_delay[i]) {
1382 			usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP;
1383 			if (usdelay > LPFC_MAX_AUTO_EQ_DELAY)
1384 				usdelay = LPFC_MAX_AUTO_EQ_DELAY;
1385 		} else {
1386 			usdelay = 0;
1387 		}
1388 
1389 		eqi->icnt = 0;
1390 
1391 		list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) {
1392 			if (unlikely(eq->last_cpu != i)) {
1393 				eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info,
1394 						      eq->last_cpu);
1395 				list_move_tail(&eq->cpu_list, &eqi_new->list);
1396 				continue;
1397 			}
1398 			if (usdelay != eq->q_mode)
1399 				lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1,
1400 							 usdelay);
1401 		}
1402 	}
1403 
1404 	kfree(ena_delay);
1405 
1406 requeue:
1407 	queue_delayed_work(phba->wq, &phba->eq_delay_work,
1408 			   msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
1409 }
1410 
1411 /**
1412  * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution
1413  * @phba: pointer to lpfc hba data structure.
1414  *
1415  * For each heartbeat, this routine does some heuristic methods to adjust
1416  * XRI distribution. The goal is to fully utilize free XRIs.
1417  **/
1418 static void lpfc_hb_mxp_handler(struct lpfc_hba *phba)
1419 {
1420 	u32 i;
1421 	u32 hwq_count;
1422 
1423 	hwq_count = phba->cfg_hdw_queue;
1424 	for (i = 0; i < hwq_count; i++) {
1425 		/* Adjust XRIs in private pool */
1426 		lpfc_adjust_pvt_pool_count(phba, i);
1427 
1428 		/* Adjust high watermark */
1429 		lpfc_adjust_high_watermark(phba, i);
1430 
1431 #ifdef LPFC_MXP_STAT
1432 		/* Snapshot pbl, pvt and busy count */
1433 		lpfc_snapshot_mxp(phba, i);
1434 #endif
1435 	}
1436 }
1437 
1438 /**
1439  * lpfc_issue_hb_mbox - Issues heart-beat mailbox command
1440  * @phba: pointer to lpfc hba data structure.
1441  *
1442  * If a HB mbox is not already in progrees, this routine will allocate
1443  * a LPFC_MBOXQ_t, populate it with a MBX_HEARTBEAT (0x31) command,
1444  * and issue it. The HBA_HBEAT_INP flag means the command is in progress.
1445  **/
1446 int
1447 lpfc_issue_hb_mbox(struct lpfc_hba *phba)
1448 {
1449 	LPFC_MBOXQ_t *pmboxq;
1450 	int retval;
1451 
1452 	/* Is a Heartbeat mbox already in progress */
1453 	if (test_bit(HBA_HBEAT_INP, &phba->hba_flag))
1454 		return 0;
1455 
1456 	pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1457 	if (!pmboxq)
1458 		return -ENOMEM;
1459 
1460 	lpfc_heart_beat(phba, pmboxq);
1461 	pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1462 	pmboxq->vport = phba->pport;
1463 	retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
1464 
1465 	if (retval != MBX_BUSY && retval != MBX_SUCCESS) {
1466 		mempool_free(pmboxq, phba->mbox_mem_pool);
1467 		return -ENXIO;
1468 	}
1469 	set_bit(HBA_HBEAT_INP, &phba->hba_flag);
1470 
1471 	return 0;
1472 }
1473 
1474 /**
1475  * lpfc_issue_hb_tmo - Signals heartbeat timer to issue mbox command
1476  * @phba: pointer to lpfc hba data structure.
1477  *
1478  * The heartbeat timer (every 5 sec) will fire. If the HBA_HBEAT_TMO
1479  * flag is set, it will force a MBX_HEARTBEAT mbox command, regardless
1480  * of the value of lpfc_enable_hba_heartbeat.
1481  * If lpfc_enable_hba_heartbeat is set, the timeout routine will always
1482  * try to issue a MBX_HEARTBEAT mbox command.
1483  **/
1484 void
1485 lpfc_issue_hb_tmo(struct lpfc_hba *phba)
1486 {
1487 	if (phba->cfg_enable_hba_heartbeat)
1488 		return;
1489 	set_bit(HBA_HBEAT_TMO, &phba->hba_flag);
1490 }
1491 
1492 /**
1493  * lpfc_hb_timeout_handler - The HBA-timer timeout handler
1494  * @phba: pointer to lpfc hba data structure.
1495  *
1496  * This is the actual HBA-timer timeout handler to be invoked by the worker
1497  * thread whenever the HBA timer fired and HBA-timeout event posted. This
1498  * handler performs any periodic operations needed for the device. If such
1499  * periodic event has already been attended to either in the interrupt handler
1500  * or by processing slow-ring or fast-ring events within the HBA-timer
1501  * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1502  * the timer for the next timeout period. If lpfc heart-beat mailbox command
1503  * is configured and there is no heart-beat mailbox command outstanding, a
1504  * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1505  * has been a heart-beat mailbox command outstanding, the HBA shall be put
1506  * to offline.
1507  **/
1508 void
1509 lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1510 {
1511 	struct lpfc_vport **vports;
1512 	struct lpfc_dmabuf *buf_ptr;
1513 	int retval = 0;
1514 	int i, tmo;
1515 	struct lpfc_sli *psli = &phba->sli;
1516 	LIST_HEAD(completions);
1517 
1518 	if (phba->cfg_xri_rebalancing) {
1519 		/* Multi-XRI pools handler */
1520 		lpfc_hb_mxp_handler(phba);
1521 	}
1522 
1523 	vports = lpfc_create_vport_work_array(phba);
1524 	if (vports != NULL)
1525 		for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
1526 			lpfc_rcv_seq_check_edtov(vports[i]);
1527 			lpfc_fdmi_change_check(vports[i]);
1528 		}
1529 	lpfc_destroy_vport_work_array(phba, vports);
1530 
1531 	if (phba->link_state == LPFC_HBA_ERROR ||
1532 	    test_bit(FC_UNLOADING, &phba->pport->load_flag) ||
1533 	    test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
1534 		return;
1535 
1536 	if (phba->elsbuf_cnt &&
1537 		(phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1538 		spin_lock_irq(&phba->hbalock);
1539 		list_splice_init(&phba->elsbuf, &completions);
1540 		phba->elsbuf_cnt = 0;
1541 		phba->elsbuf_prev_cnt = 0;
1542 		spin_unlock_irq(&phba->hbalock);
1543 
1544 		while (!list_empty(&completions)) {
1545 			list_remove_head(&completions, buf_ptr,
1546 				struct lpfc_dmabuf, list);
1547 			lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1548 			kfree(buf_ptr);
1549 		}
1550 	}
1551 	phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1552 
1553 	/* If there is no heart beat outstanding, issue a heartbeat command */
1554 	if (phba->cfg_enable_hba_heartbeat) {
1555 		/* If IOs are completing, no need to issue a MBX_HEARTBEAT */
1556 		spin_lock_irq(&phba->pport->work_port_lock);
1557 		if (time_after(phba->last_completion_time +
1558 				secs_to_jiffies(LPFC_HB_MBOX_INTERVAL),
1559 				jiffies)) {
1560 			spin_unlock_irq(&phba->pport->work_port_lock);
1561 			if (test_bit(HBA_HBEAT_INP, &phba->hba_flag))
1562 				tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1563 			else
1564 				tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1565 			goto out;
1566 		}
1567 		spin_unlock_irq(&phba->pport->work_port_lock);
1568 
1569 		/* Check if a MBX_HEARTBEAT is already in progress */
1570 		if (test_bit(HBA_HBEAT_INP, &phba->hba_flag)) {
1571 			/*
1572 			 * If heart beat timeout called with HBA_HBEAT_INP set
1573 			 * we need to give the hb mailbox cmd a chance to
1574 			 * complete or TMO.
1575 			 */
1576 			lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1577 				"0459 Adapter heartbeat still outstanding: "
1578 				"last compl time was %d ms.\n",
1579 				jiffies_to_msecs(jiffies
1580 					 - phba->last_completion_time));
1581 			tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1582 		} else {
1583 			if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1584 				(list_empty(&psli->mboxq))) {
1585 
1586 				retval = lpfc_issue_hb_mbox(phba);
1587 				if (retval) {
1588 					tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1589 					goto out;
1590 				}
1591 				phba->skipped_hb = 0;
1592 			} else if (time_before_eq(phba->last_completion_time,
1593 					phba->skipped_hb)) {
1594 				lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1595 					"2857 Last completion time not "
1596 					" updated in %d ms\n",
1597 					jiffies_to_msecs(jiffies
1598 						 - phba->last_completion_time));
1599 			} else
1600 				phba->skipped_hb = jiffies;
1601 
1602 			tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1603 			goto out;
1604 		}
1605 	} else {
1606 		/* Check to see if we want to force a MBX_HEARTBEAT */
1607 		if (test_bit(HBA_HBEAT_TMO, &phba->hba_flag)) {
1608 			retval = lpfc_issue_hb_mbox(phba);
1609 			if (retval)
1610 				tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1611 			else
1612 				tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1613 			goto out;
1614 		}
1615 		tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1616 	}
1617 out:
1618 	mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(tmo));
1619 }
1620 
1621 /**
1622  * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
1623  * @phba: pointer to lpfc hba data structure.
1624  *
1625  * This routine is called to bring the HBA offline when HBA hardware error
1626  * other than Port Error 6 has been detected.
1627  **/
1628 static void
1629 lpfc_offline_eratt(struct lpfc_hba *phba)
1630 {
1631 	struct lpfc_sli   *psli = &phba->sli;
1632 
1633 	spin_lock_irq(&phba->hbalock);
1634 	psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1635 	spin_unlock_irq(&phba->hbalock);
1636 	lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1637 
1638 	lpfc_offline(phba);
1639 	lpfc_reset_barrier(phba);
1640 	spin_lock_irq(&phba->hbalock);
1641 	lpfc_sli_brdreset(phba);
1642 	spin_unlock_irq(&phba->hbalock);
1643 	lpfc_hba_down_post(phba);
1644 	lpfc_sli_brdready(phba, HS_MBRDY);
1645 	lpfc_unblock_mgmt_io(phba);
1646 	phba->link_state = LPFC_HBA_ERROR;
1647 	return;
1648 }
1649 
1650 /**
1651  * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1652  * @phba: pointer to lpfc hba data structure.
1653  *
1654  * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1655  * other than Port Error 6 has been detected.
1656  **/
1657 void
1658 lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1659 {
1660 	spin_lock_irq(&phba->hbalock);
1661 	if (phba->link_state == LPFC_HBA_ERROR &&
1662 		test_bit(HBA_PCI_ERR, &phba->bit_flags)) {
1663 		spin_unlock_irq(&phba->hbalock);
1664 		return;
1665 	}
1666 	phba->link_state = LPFC_HBA_ERROR;
1667 	spin_unlock_irq(&phba->hbalock);
1668 
1669 	lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1670 	lpfc_sli_flush_io_rings(phba);
1671 	lpfc_offline(phba);
1672 	lpfc_hba_down_post(phba);
1673 	lpfc_unblock_mgmt_io(phba);
1674 }
1675 
1676 /**
1677  * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1678  * @phba: pointer to lpfc hba data structure.
1679  *
1680  * This routine is invoked to handle the deferred HBA hardware error
1681  * conditions. This type of error is indicated by HBA by setting ER1
1682  * and another ER bit in the host status register. The driver will
1683  * wait until the ER1 bit clears before handling the error condition.
1684  **/
1685 static void
1686 lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1687 {
1688 	uint32_t old_host_status = phba->work_hs;
1689 	struct lpfc_sli *psli = &phba->sli;
1690 
1691 	/* If the pci channel is offline, ignore possible errors,
1692 	 * since we cannot communicate with the pci card anyway.
1693 	 */
1694 	if (pci_channel_offline(phba->pcidev)) {
1695 		clear_bit(DEFER_ERATT, &phba->hba_flag);
1696 		return;
1697 	}
1698 
1699 	lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1700 			"0479 Deferred Adapter Hardware Error "
1701 			"Data: x%x x%x x%x\n",
1702 			phba->work_hs, phba->work_status[0],
1703 			phba->work_status[1]);
1704 
1705 	spin_lock_irq(&phba->hbalock);
1706 	psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1707 	spin_unlock_irq(&phba->hbalock);
1708 
1709 
1710 	/*
1711 	 * Firmware stops when it triggred erratt. That could cause the I/Os
1712 	 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1713 	 * SCSI layer retry it after re-establishing link.
1714 	 */
1715 	lpfc_sli_abort_fcp_rings(phba);
1716 
1717 	/*
1718 	 * There was a firmware error. Take the hba offline and then
1719 	 * attempt to restart it.
1720 	 */
1721 	lpfc_offline_prep(phba, LPFC_MBX_WAIT);
1722 	lpfc_offline(phba);
1723 
1724 	/* Wait for the ER1 bit to clear.*/
1725 	while (phba->work_hs & HS_FFER1) {
1726 		msleep(100);
1727 		if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1728 			phba->work_hs = UNPLUG_ERR ;
1729 			break;
1730 		}
1731 		/* If driver is unloading let the worker thread continue */
1732 		if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
1733 			phba->work_hs = 0;
1734 			break;
1735 		}
1736 	}
1737 
1738 	/*
1739 	 * This is to ptrotect against a race condition in which
1740 	 * first write to the host attention register clear the
1741 	 * host status register.
1742 	 */
1743 	if (!phba->work_hs && !test_bit(FC_UNLOADING, &phba->pport->load_flag))
1744 		phba->work_hs = old_host_status & ~HS_FFER1;
1745 
1746 	clear_bit(DEFER_ERATT, &phba->hba_flag);
1747 	phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1748 	phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1749 }
1750 
1751 static void
1752 lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1753 {
1754 	struct lpfc_board_event_header board_event;
1755 	struct Scsi_Host *shost;
1756 
1757 	board_event.event_type = FC_REG_BOARD_EVENT;
1758 	board_event.subcategory = LPFC_EVENT_PORTINTERR;
1759 	shost = lpfc_shost_from_vport(phba->pport);
1760 	fc_host_post_vendor_event(shost, fc_get_event_number(),
1761 				  sizeof(board_event),
1762 				  (char *) &board_event,
1763 				  LPFC_NL_VENDOR_ID);
1764 }
1765 
1766 /**
1767  * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
1768  * @phba: pointer to lpfc hba data structure.
1769  *
1770  * This routine is invoked to handle the following HBA hardware error
1771  * conditions:
1772  * 1 - HBA error attention interrupt
1773  * 2 - DMA ring index out of range
1774  * 3 - Mailbox command came back as unknown
1775  **/
1776 static void
1777 lpfc_handle_eratt_s3(struct lpfc_hba *phba)
1778 {
1779 	struct lpfc_vport *vport = phba->pport;
1780 	struct lpfc_sli   *psli = &phba->sli;
1781 	uint32_t event_data;
1782 	unsigned long temperature;
1783 	struct temp_event temp_event_data;
1784 	struct Scsi_Host  *shost;
1785 
1786 	/* If the pci channel is offline, ignore possible errors,
1787 	 * since we cannot communicate with the pci card anyway.
1788 	 */
1789 	if (pci_channel_offline(phba->pcidev)) {
1790 		clear_bit(DEFER_ERATT, &phba->hba_flag);
1791 		return;
1792 	}
1793 
1794 	/* If resets are disabled then leave the HBA alone and return */
1795 	if (!phba->cfg_enable_hba_reset)
1796 		return;
1797 
1798 	/* Send an internal error event to mgmt application */
1799 	lpfc_board_errevt_to_mgmt(phba);
1800 
1801 	if (test_bit(DEFER_ERATT, &phba->hba_flag))
1802 		lpfc_handle_deferred_eratt(phba);
1803 
1804 	if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1805 		if (phba->work_hs & HS_FFER6)
1806 			/* Re-establishing Link */
1807 			lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1808 					"1301 Re-establishing Link "
1809 					"Data: x%x x%x x%x\n",
1810 					phba->work_hs, phba->work_status[0],
1811 					phba->work_status[1]);
1812 		if (phba->work_hs & HS_FFER8)
1813 			/* Device Zeroization */
1814 			lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1815 					"2861 Host Authentication device "
1816 					"zeroization Data:x%x x%x x%x\n",
1817 					phba->work_hs, phba->work_status[0],
1818 					phba->work_status[1]);
1819 
1820 		spin_lock_irq(&phba->hbalock);
1821 		psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1822 		spin_unlock_irq(&phba->hbalock);
1823 
1824 		/*
1825 		* Firmware stops when it triggled erratt with HS_FFER6.
1826 		* That could cause the I/Os dropped by the firmware.
1827 		* Error iocb (I/O) on txcmplq and let the SCSI layer
1828 		* retry it after re-establishing link.
1829 		*/
1830 		lpfc_sli_abort_fcp_rings(phba);
1831 
1832 		/*
1833 		 * There was a firmware error.  Take the hba offline and then
1834 		 * attempt to restart it.
1835 		 */
1836 		lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1837 		lpfc_offline(phba);
1838 		lpfc_sli_brdrestart(phba);
1839 		if (lpfc_online(phba) == 0) {	/* Initialize the HBA */
1840 			lpfc_unblock_mgmt_io(phba);
1841 			return;
1842 		}
1843 		lpfc_unblock_mgmt_io(phba);
1844 	} else if (phba->work_hs & HS_CRIT_TEMP) {
1845 		temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1846 		temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1847 		temp_event_data.event_code = LPFC_CRIT_TEMP;
1848 		temp_event_data.data = (uint32_t)temperature;
1849 
1850 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1851 				"0406 Adapter maximum temperature exceeded "
1852 				"(%ld), taking this port offline "
1853 				"Data: x%x x%x x%x\n",
1854 				temperature, phba->work_hs,
1855 				phba->work_status[0], phba->work_status[1]);
1856 
1857 		shost = lpfc_shost_from_vport(phba->pport);
1858 		fc_host_post_vendor_event(shost, fc_get_event_number(),
1859 					  sizeof(temp_event_data),
1860 					  (char *) &temp_event_data,
1861 					  SCSI_NL_VID_TYPE_PCI
1862 					  | PCI_VENDOR_ID_EMULEX);
1863 
1864 		spin_lock_irq(&phba->hbalock);
1865 		phba->over_temp_state = HBA_OVER_TEMP;
1866 		spin_unlock_irq(&phba->hbalock);
1867 		lpfc_offline_eratt(phba);
1868 
1869 	} else {
1870 		/* The if clause above forces this code path when the status
1871 		 * failure is a value other than FFER6. Do not call the offline
1872 		 * twice. This is the adapter hardware error path.
1873 		 */
1874 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1875 				"0457 Adapter Hardware Error "
1876 				"Data: x%x x%x x%x\n",
1877 				phba->work_hs,
1878 				phba->work_status[0], phba->work_status[1]);
1879 
1880 		event_data = FC_REG_DUMP_EVENT;
1881 		shost = lpfc_shost_from_vport(vport);
1882 		fc_host_post_vendor_event(shost, fc_get_event_number(),
1883 				sizeof(event_data), (char *) &event_data,
1884 				SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1885 
1886 		lpfc_offline_eratt(phba);
1887 	}
1888 	return;
1889 }
1890 
1891 /**
1892  * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1893  * @phba: pointer to lpfc hba data structure.
1894  * @mbx_action: flag for mailbox shutdown action.
1895  * @en_rn_msg: send reset/port recovery message.
1896  * This routine is invoked to perform an SLI4 port PCI function reset in
1897  * response to port status register polling attention. It waits for port
1898  * status register (ERR, RDY, RN) bits before proceeding with function reset.
1899  * During this process, interrupt vectors are freed and later requested
1900  * for handling possible port resource change.
1901  **/
1902 static int
1903 lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1904 			    bool en_rn_msg)
1905 {
1906 	int rc;
1907 	uint32_t intr_mode;
1908 	LPFC_MBOXQ_t *mboxq;
1909 
1910 	/* Notifying the transport that the targets are going offline. */
1911 	lpfc_scsi_dev_block(phba);
1912 
1913 	if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
1914 	    LPFC_SLI_INTF_IF_TYPE_2) {
1915 		/*
1916 		 * On error status condition, driver need to wait for port
1917 		 * ready before performing reset.
1918 		 */
1919 		rc = lpfc_sli4_pdev_status_reg_wait(phba);
1920 		if (rc)
1921 			return rc;
1922 	}
1923 
1924 	/* need reset: attempt for port recovery */
1925 	if (en_rn_msg)
1926 		lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
1927 				"2887 Reset Needed: Attempting Port "
1928 				"Recovery...\n");
1929 
1930 	/* If we are no wait, the HBA has been reset and is not
1931 	 * functional, thus we should clear
1932 	 * (LPFC_SLI_ACTIVE | LPFC_SLI_MBOX_ACTIVE) flags.
1933 	 */
1934 	if (mbx_action == LPFC_MBX_NO_WAIT) {
1935 		spin_lock_irq(&phba->hbalock);
1936 		phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
1937 		if (phba->sli.mbox_active) {
1938 			mboxq = phba->sli.mbox_active;
1939 			mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
1940 			__lpfc_mbox_cmpl_put(phba, mboxq);
1941 			phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1942 			phba->sli.mbox_active = NULL;
1943 		}
1944 		spin_unlock_irq(&phba->hbalock);
1945 	}
1946 
1947 	lpfc_offline_prep(phba, mbx_action);
1948 	lpfc_sli_flush_io_rings(phba);
1949 	lpfc_nvmels_flush_cmd(phba);
1950 	lpfc_offline(phba);
1951 	/* release interrupt for possible resource change */
1952 	lpfc_sli4_disable_intr(phba);
1953 	rc = lpfc_sli_brdrestart(phba);
1954 	if (rc) {
1955 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1956 				"6309 Failed to restart board\n");
1957 		return rc;
1958 	}
1959 	/* request and enable interrupt */
1960 	intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1961 	if (intr_mode == LPFC_INTR_ERROR) {
1962 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1963 				"3175 Failed to enable interrupt\n");
1964 		return -EIO;
1965 	}
1966 	phba->intr_mode = intr_mode;
1967 	rc = lpfc_online(phba);
1968 	if (rc == 0)
1969 		lpfc_unblock_mgmt_io(phba);
1970 
1971 	return rc;
1972 }
1973 
1974 /**
1975  * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1976  * @phba: pointer to lpfc hba data structure.
1977  *
1978  * This routine is invoked to handle the SLI4 HBA hardware error attention
1979  * conditions.
1980  **/
1981 static void
1982 lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1983 {
1984 	struct lpfc_vport *vport = phba->pport;
1985 	uint32_t event_data;
1986 	struct Scsi_Host *shost;
1987 	uint32_t if_type;
1988 	struct lpfc_register portstat_reg = {0};
1989 	uint32_t reg_err1, reg_err2;
1990 	uint32_t uerrlo_reg, uemasklo_reg;
1991 	uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
1992 	bool en_rn_msg = true;
1993 	struct temp_event temp_event_data;
1994 	struct lpfc_register portsmphr_reg;
1995 	int rc, i;
1996 
1997 	/* If the pci channel is offline, ignore possible errors, since
1998 	 * we cannot communicate with the pci card anyway.
1999 	 */
2000 	if (pci_channel_offline(phba->pcidev)) {
2001 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2002 				"3166 pci channel is offline\n");
2003 		lpfc_sli_flush_io_rings(phba);
2004 		return;
2005 	}
2006 
2007 	memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2008 	if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
2009 	switch (if_type) {
2010 	case LPFC_SLI_INTF_IF_TYPE_0:
2011 		pci_rd_rc1 = lpfc_readl(
2012 				phba->sli4_hba.u.if_type0.UERRLOregaddr,
2013 				&uerrlo_reg);
2014 		pci_rd_rc2 = lpfc_readl(
2015 				phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
2016 				&uemasklo_reg);
2017 		/* consider PCI bus read error as pci_channel_offline */
2018 		if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
2019 			return;
2020 		if (!test_bit(HBA_RECOVERABLE_UE, &phba->hba_flag)) {
2021 			lpfc_sli4_offline_eratt(phba);
2022 			return;
2023 		}
2024 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2025 				"7623 Checking UE recoverable");
2026 
2027 		for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
2028 			if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2029 				       &portsmphr_reg.word0))
2030 				continue;
2031 
2032 			smphr_port_status = bf_get(lpfc_port_smphr_port_status,
2033 						   &portsmphr_reg);
2034 			if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
2035 			    LPFC_PORT_SEM_UE_RECOVERABLE)
2036 				break;
2037 			/*Sleep for 1Sec, before checking SEMAPHORE */
2038 			msleep(1000);
2039 		}
2040 
2041 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2042 				"4827 smphr_port_status x%x : Waited %dSec",
2043 				smphr_port_status, i);
2044 
2045 		/* Recoverable UE, reset the HBA device */
2046 		if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
2047 		    LPFC_PORT_SEM_UE_RECOVERABLE) {
2048 			for (i = 0; i < 20; i++) {
2049 				msleep(1000);
2050 				if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2051 				    &portsmphr_reg.word0) &&
2052 				    (LPFC_POST_STAGE_PORT_READY ==
2053 				     bf_get(lpfc_port_smphr_port_status,
2054 				     &portsmphr_reg))) {
2055 					rc = lpfc_sli4_port_sta_fn_reset(phba,
2056 						LPFC_MBX_NO_WAIT, en_rn_msg);
2057 					if (rc == 0)
2058 						return;
2059 					lpfc_printf_log(phba, KERN_ERR,
2060 						LOG_TRACE_EVENT,
2061 						"4215 Failed to recover UE");
2062 					break;
2063 				}
2064 			}
2065 		}
2066 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2067 				"7624 Firmware not ready: Failing UE recovery,"
2068 				" waited %dSec", i);
2069 		phba->link_state = LPFC_HBA_ERROR;
2070 		break;
2071 
2072 	case LPFC_SLI_INTF_IF_TYPE_2:
2073 	case LPFC_SLI_INTF_IF_TYPE_6:
2074 		pci_rd_rc1 = lpfc_readl(
2075 				phba->sli4_hba.u.if_type2.STATUSregaddr,
2076 				&portstat_reg.word0);
2077 		/* consider PCI bus read error as pci_channel_offline */
2078 		if (pci_rd_rc1 == -EIO) {
2079 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2080 				"3151 PCI bus read access failure: x%x\n",
2081 				readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2082 			lpfc_sli4_offline_eratt(phba);
2083 			return;
2084 		}
2085 		reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
2086 		reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2087 		if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2088 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2089 					"2889 Port Overtemperature event, "
2090 					"taking port offline Data: x%x x%x\n",
2091 					reg_err1, reg_err2);
2092 
2093 			phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
2094 			temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
2095 			temp_event_data.event_code = LPFC_CRIT_TEMP;
2096 			temp_event_data.data = 0xFFFFFFFF;
2097 
2098 			shost = lpfc_shost_from_vport(phba->pport);
2099 			fc_host_post_vendor_event(shost, fc_get_event_number(),
2100 						  sizeof(temp_event_data),
2101 						  (char *)&temp_event_data,
2102 						  SCSI_NL_VID_TYPE_PCI
2103 						  | PCI_VENDOR_ID_EMULEX);
2104 
2105 			spin_lock_irq(&phba->hbalock);
2106 			phba->over_temp_state = HBA_OVER_TEMP;
2107 			spin_unlock_irq(&phba->hbalock);
2108 			lpfc_sli4_offline_eratt(phba);
2109 			return;
2110 		}
2111 		if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2112 		    reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2113 			lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2114 					"3143 Port Down: Firmware Update "
2115 					"Detected\n");
2116 			en_rn_msg = false;
2117 		} else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2118 			 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
2119 			lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2120 					"3144 Port Down: Debug Dump\n");
2121 		else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2122 			 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
2123 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2124 					"3145 Port Down: Provisioning\n");
2125 
2126 		/* If resets are disabled then leave the HBA alone and return */
2127 		if (!phba->cfg_enable_hba_reset)
2128 			return;
2129 
2130 		/* Check port status register for function reset */
2131 		rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
2132 				en_rn_msg);
2133 		if (rc == 0) {
2134 			/* don't report event on forced debug dump */
2135 			if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2136 			    reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
2137 				return;
2138 			else
2139 				break;
2140 		}
2141 		/* fall through for not able to recover */
2142 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2143 				"3152 Unrecoverable error\n");
2144 		lpfc_sli4_offline_eratt(phba);
2145 		break;
2146 	case LPFC_SLI_INTF_IF_TYPE_1:
2147 	default:
2148 		break;
2149 	}
2150 	lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
2151 			"3123 Report dump event to upper layer\n");
2152 	/* Send an internal error event to mgmt application */
2153 	lpfc_board_errevt_to_mgmt(phba);
2154 
2155 	event_data = FC_REG_DUMP_EVENT;
2156 	shost = lpfc_shost_from_vport(vport);
2157 	fc_host_post_vendor_event(shost, fc_get_event_number(),
2158 				  sizeof(event_data), (char *) &event_data,
2159 				  SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
2160 }
2161 
2162 /**
2163  * lpfc_handle_eratt - Wrapper func for handling hba error attention
2164  * @phba: pointer to lpfc HBA data structure.
2165  *
2166  * This routine wraps the actual SLI3 or SLI4 hba error attention handling
2167  * routine from the API jump table function pointer from the lpfc_hba struct.
2168  *
2169  * Return codes
2170  *   0 - success.
2171  *   Any other value - error.
2172  **/
2173 void
2174 lpfc_handle_eratt(struct lpfc_hba *phba)
2175 {
2176 	(*phba->lpfc_handle_eratt)(phba);
2177 }
2178 
2179 /**
2180  * lpfc_handle_latt - The HBA link event handler
2181  * @phba: pointer to lpfc hba data structure.
2182  *
2183  * This routine is invoked from the worker thread to handle a HBA host
2184  * attention link event. SLI3 only.
2185  **/
2186 void
2187 lpfc_handle_latt(struct lpfc_hba *phba)
2188 {
2189 	struct lpfc_vport *vport = phba->pport;
2190 	struct lpfc_sli   *psli = &phba->sli;
2191 	LPFC_MBOXQ_t *pmb;
2192 	volatile uint32_t control;
2193 	int rc = 0;
2194 
2195 	pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2196 	if (!pmb) {
2197 		rc = 1;
2198 		goto lpfc_handle_latt_err_exit;
2199 	}
2200 
2201 	rc = lpfc_mbox_rsrc_prep(phba, pmb);
2202 	if (rc) {
2203 		rc = 2;
2204 		mempool_free(pmb, phba->mbox_mem_pool);
2205 		goto lpfc_handle_latt_err_exit;
2206 	}
2207 
2208 	/* Cleanup any outstanding ELS commands */
2209 	lpfc_els_flush_all_cmd(phba);
2210 	psli->slistat.link_event++;
2211 	lpfc_read_topology(phba, pmb, pmb->ctx_buf);
2212 	pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2213 	pmb->vport = vport;
2214 	/* Block ELS IOCBs until we have processed this mbox command */
2215 	phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
2216 	rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
2217 	if (rc == MBX_NOT_FINISHED) {
2218 		rc = 4;
2219 		goto lpfc_handle_latt_free_mbuf;
2220 	}
2221 
2222 	/* Clear Link Attention in HA REG */
2223 	spin_lock_irq(&phba->hbalock);
2224 	writel(HA_LATT, phba->HAregaddr);
2225 	readl(phba->HAregaddr); /* flush */
2226 	spin_unlock_irq(&phba->hbalock);
2227 
2228 	return;
2229 
2230 lpfc_handle_latt_free_mbuf:
2231 	phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
2232 	lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
2233 lpfc_handle_latt_err_exit:
2234 	/* Enable Link attention interrupts */
2235 	spin_lock_irq(&phba->hbalock);
2236 	psli->sli_flag |= LPFC_PROCESS_LA;
2237 	control = readl(phba->HCregaddr);
2238 	control |= HC_LAINT_ENA;
2239 	writel(control, phba->HCregaddr);
2240 	readl(phba->HCregaddr); /* flush */
2241 
2242 	/* Clear Link Attention in HA REG */
2243 	writel(HA_LATT, phba->HAregaddr);
2244 	readl(phba->HAregaddr); /* flush */
2245 	spin_unlock_irq(&phba->hbalock);
2246 	lpfc_linkdown(phba);
2247 	phba->link_state = LPFC_HBA_ERROR;
2248 
2249 	lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2250 			"0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
2251 
2252 	return;
2253 }
2254 
2255 static void
2256 lpfc_fill_vpd(struct lpfc_hba *phba, uint8_t *vpd, int length, int *pindex)
2257 {
2258 	int i, j;
2259 
2260 	while (length > 0) {
2261 		/* Look for Serial Number */
2262 		if ((vpd[*pindex] == 'S') && (vpd[*pindex + 1] == 'N')) {
2263 			*pindex += 2;
2264 			i = vpd[*pindex];
2265 			*pindex += 1;
2266 			j = 0;
2267 			length -= (3+i);
2268 			while (i--) {
2269 				phba->SerialNumber[j++] = vpd[(*pindex)++];
2270 				if (j == 31)
2271 					break;
2272 			}
2273 			phba->SerialNumber[j] = 0;
2274 			continue;
2275 		} else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '1')) {
2276 			phba->vpd_flag |= VPD_MODEL_DESC;
2277 			*pindex += 2;
2278 			i = vpd[*pindex];
2279 			*pindex += 1;
2280 			j = 0;
2281 			length -= (3+i);
2282 			while (i--) {
2283 				phba->ModelDesc[j++] = vpd[(*pindex)++];
2284 				if (j == 255)
2285 					break;
2286 			}
2287 			phba->ModelDesc[j] = 0;
2288 			continue;
2289 		} else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '2')) {
2290 			phba->vpd_flag |= VPD_MODEL_NAME;
2291 			*pindex += 2;
2292 			i = vpd[*pindex];
2293 			*pindex += 1;
2294 			j = 0;
2295 			length -= (3+i);
2296 			while (i--) {
2297 				phba->ModelName[j++] = vpd[(*pindex)++];
2298 				if (j == 79)
2299 					break;
2300 			}
2301 			phba->ModelName[j] = 0;
2302 			continue;
2303 		} else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '3')) {
2304 			phba->vpd_flag |= VPD_PROGRAM_TYPE;
2305 			*pindex += 2;
2306 			i = vpd[*pindex];
2307 			*pindex += 1;
2308 			j = 0;
2309 			length -= (3+i);
2310 			while (i--) {
2311 				phba->ProgramType[j++] = vpd[(*pindex)++];
2312 				if (j == 255)
2313 					break;
2314 			}
2315 			phba->ProgramType[j] = 0;
2316 			continue;
2317 		} else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '4')) {
2318 			phba->vpd_flag |= VPD_PORT;
2319 			*pindex += 2;
2320 			i = vpd[*pindex];
2321 			*pindex += 1;
2322 			j = 0;
2323 			length -= (3 + i);
2324 			while (i--) {
2325 				if ((phba->sli_rev == LPFC_SLI_REV4) &&
2326 				    (phba->sli4_hba.pport_name_sta ==
2327 				     LPFC_SLI4_PPNAME_GET)) {
2328 					j++;
2329 					(*pindex)++;
2330 				} else
2331 					phba->Port[j++] = vpd[(*pindex)++];
2332 				if (j == 19)
2333 					break;
2334 			}
2335 			if ((phba->sli_rev != LPFC_SLI_REV4) ||
2336 			    (phba->sli4_hba.pport_name_sta ==
2337 			     LPFC_SLI4_PPNAME_NON))
2338 				phba->Port[j] = 0;
2339 			continue;
2340 		} else {
2341 			*pindex += 2;
2342 			i = vpd[*pindex];
2343 			*pindex += 1;
2344 			*pindex += i;
2345 			length -= (3 + i);
2346 		}
2347 	}
2348 }
2349 
2350 /**
2351  * lpfc_parse_vpd - Parse VPD (Vital Product Data)
2352  * @phba: pointer to lpfc hba data structure.
2353  * @vpd: pointer to the vital product data.
2354  * @len: length of the vital product data in bytes.
2355  *
2356  * This routine parses the Vital Product Data (VPD). The VPD is treated as
2357  * an array of characters. In this routine, the ModelName, ProgramType, and
2358  * ModelDesc, etc. fields of the phba data structure will be populated.
2359  *
2360  * Return codes
2361  *   0 - pointer to the VPD passed in is NULL
2362  *   1 - success
2363  **/
2364 int
2365 lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
2366 {
2367 	uint8_t lenlo, lenhi;
2368 	int Length;
2369 	int i;
2370 	int finished = 0;
2371 	int index = 0;
2372 
2373 	if (!vpd)
2374 		return 0;
2375 
2376 	/* Vital Product */
2377 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2378 			"0455 Vital Product Data: x%x x%x x%x x%x\n",
2379 			(uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2380 			(uint32_t) vpd[3]);
2381 	while (!finished && (index < (len - 4))) {
2382 		switch (vpd[index]) {
2383 		case 0x82:
2384 		case 0x91:
2385 			index += 1;
2386 			lenlo = vpd[index];
2387 			index += 1;
2388 			lenhi = vpd[index];
2389 			index += 1;
2390 			i = ((((unsigned short)lenhi) << 8) + lenlo);
2391 			index += i;
2392 			break;
2393 		case 0x90:
2394 			index += 1;
2395 			lenlo = vpd[index];
2396 			index += 1;
2397 			lenhi = vpd[index];
2398 			index += 1;
2399 			Length = ((((unsigned short)lenhi) << 8) + lenlo);
2400 			if (Length > len - index)
2401 				Length = len - index;
2402 
2403 			lpfc_fill_vpd(phba, vpd, Length, &index);
2404 			finished = 0;
2405 			break;
2406 		case 0x78:
2407 			finished = 1;
2408 			break;
2409 		default:
2410 			index ++;
2411 			break;
2412 		}
2413 	}
2414 
2415 	return(1);
2416 }
2417 
2418 /**
2419  * lpfc_get_atto_model_desc - Retrieve ATTO HBA device model name and description
2420  * @phba: pointer to lpfc hba data structure.
2421  * @mdp: pointer to the data structure to hold the derived model name.
2422  * @descp: pointer to the data structure to hold the derived description.
2423  *
2424  * This routine retrieves HBA's description based on its registered PCI device
2425  * ID. The @descp passed into this function points to an array of 256 chars. It
2426  * shall be returned with the model name, maximum speed, and the host bus type.
2427  * The @mdp passed into this function points to an array of 80 chars. When the
2428  * function returns, the @mdp will be filled with the model name.
2429  **/
2430 static void
2431 lpfc_get_atto_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2432 {
2433 	uint16_t sub_dev_id = phba->pcidev->subsystem_device;
2434 	char *model = "<Unknown>";
2435 	int tbolt = 0;
2436 
2437 	switch (sub_dev_id) {
2438 	case PCI_DEVICE_ID_CLRY_161E:
2439 		model = "161E";
2440 		break;
2441 	case PCI_DEVICE_ID_CLRY_162E:
2442 		model = "162E";
2443 		break;
2444 	case PCI_DEVICE_ID_CLRY_164E:
2445 		model = "164E";
2446 		break;
2447 	case PCI_DEVICE_ID_CLRY_161P:
2448 		model = "161P";
2449 		break;
2450 	case PCI_DEVICE_ID_CLRY_162P:
2451 		model = "162P";
2452 		break;
2453 	case PCI_DEVICE_ID_CLRY_164P:
2454 		model = "164P";
2455 		break;
2456 	case PCI_DEVICE_ID_CLRY_321E:
2457 		model = "321E";
2458 		break;
2459 	case PCI_DEVICE_ID_CLRY_322E:
2460 		model = "322E";
2461 		break;
2462 	case PCI_DEVICE_ID_CLRY_324E:
2463 		model = "324E";
2464 		break;
2465 	case PCI_DEVICE_ID_CLRY_321P:
2466 		model = "321P";
2467 		break;
2468 	case PCI_DEVICE_ID_CLRY_322P:
2469 		model = "322P";
2470 		break;
2471 	case PCI_DEVICE_ID_CLRY_324P:
2472 		model = "324P";
2473 		break;
2474 	case PCI_DEVICE_ID_TLFC_2XX2:
2475 		model = "2XX2";
2476 		tbolt = 1;
2477 		break;
2478 	case PCI_DEVICE_ID_TLFC_3162:
2479 		model = "3162";
2480 		tbolt = 1;
2481 		break;
2482 	case PCI_DEVICE_ID_TLFC_3322:
2483 		model = "3322";
2484 		tbolt = 1;
2485 		break;
2486 	default:
2487 		model = "Unknown";
2488 		break;
2489 	}
2490 
2491 	if (mdp && mdp[0] == '\0')
2492 		snprintf(mdp, 79, "%s", model);
2493 
2494 	if (descp && descp[0] == '\0')
2495 		snprintf(descp, 255,
2496 			 "ATTO %s%s, Fibre Channel Adapter Initiator, Port %s",
2497 			 (tbolt) ? "ThunderLink FC " : "Celerity FC-",
2498 			 model,
2499 			 phba->Port);
2500 }
2501 
2502 /**
2503  * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
2504  * @phba: pointer to lpfc hba data structure.
2505  * @mdp: pointer to the data structure to hold the derived model name.
2506  * @descp: pointer to the data structure to hold the derived description.
2507  *
2508  * This routine retrieves HBA's description based on its registered PCI device
2509  * ID. The @descp passed into this function points to an array of 256 chars. It
2510  * shall be returned with the model name, maximum speed, and the host bus type.
2511  * The @mdp passed into this function points to an array of 80 chars. When the
2512  * function returns, the @mdp will be filled with the model name.
2513  **/
2514 static void
2515 lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2516 {
2517 	lpfc_vpd_t *vp;
2518 	uint16_t dev_id = phba->pcidev->device;
2519 	int max_speed;
2520 	int GE = 0;
2521 	int oneConnect = 0; /* default is not a oneConnect */
2522 	struct {
2523 		char *name;
2524 		char *bus;
2525 		char *function;
2526 	} m = {"<Unknown>", "", ""};
2527 
2528 	if (mdp && mdp[0] != '\0'
2529 		&& descp && descp[0] != '\0')
2530 		return;
2531 
2532 	if (phba->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
2533 		lpfc_get_atto_model_desc(phba, mdp, descp);
2534 		return;
2535 	}
2536 
2537 	if (phba->lmt & LMT_64Gb)
2538 		max_speed = 64;
2539 	else if (phba->lmt & LMT_32Gb)
2540 		max_speed = 32;
2541 	else if (phba->lmt & LMT_16Gb)
2542 		max_speed = 16;
2543 	else if (phba->lmt & LMT_10Gb)
2544 		max_speed = 10;
2545 	else if (phba->lmt & LMT_8Gb)
2546 		max_speed = 8;
2547 	else if (phba->lmt & LMT_4Gb)
2548 		max_speed = 4;
2549 	else if (phba->lmt & LMT_2Gb)
2550 		max_speed = 2;
2551 	else if (phba->lmt & LMT_1Gb)
2552 		max_speed = 1;
2553 	else
2554 		max_speed = 0;
2555 
2556 	vp = &phba->vpd;
2557 
2558 	switch (dev_id) {
2559 	case PCI_DEVICE_ID_FIREFLY:
2560 		m = (typeof(m)){"LP6000", "PCI",
2561 				"Obsolete, Unsupported Fibre Channel Adapter"};
2562 		break;
2563 	case PCI_DEVICE_ID_SUPERFLY:
2564 		if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
2565 			m = (typeof(m)){"LP7000", "PCI", ""};
2566 		else
2567 			m = (typeof(m)){"LP7000E", "PCI", ""};
2568 		m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2569 		break;
2570 	case PCI_DEVICE_ID_DRAGONFLY:
2571 		m = (typeof(m)){"LP8000", "PCI",
2572 				"Obsolete, Unsupported Fibre Channel Adapter"};
2573 		break;
2574 	case PCI_DEVICE_ID_CENTAUR:
2575 		if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
2576 			m = (typeof(m)){"LP9002", "PCI", ""};
2577 		else
2578 			m = (typeof(m)){"LP9000", "PCI", ""};
2579 		m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2580 		break;
2581 	case PCI_DEVICE_ID_RFLY:
2582 		m = (typeof(m)){"LP952", "PCI",
2583 				"Obsolete, Unsupported Fibre Channel Adapter"};
2584 		break;
2585 	case PCI_DEVICE_ID_PEGASUS:
2586 		m = (typeof(m)){"LP9802", "PCI-X",
2587 				"Obsolete, Unsupported Fibre Channel Adapter"};
2588 		break;
2589 	case PCI_DEVICE_ID_THOR:
2590 		m = (typeof(m)){"LP10000", "PCI-X",
2591 				"Obsolete, Unsupported Fibre Channel Adapter"};
2592 		break;
2593 	case PCI_DEVICE_ID_VIPER:
2594 		m = (typeof(m)){"LPX1000",  "PCI-X",
2595 				"Obsolete, Unsupported Fibre Channel Adapter"};
2596 		break;
2597 	case PCI_DEVICE_ID_PFLY:
2598 		m = (typeof(m)){"LP982", "PCI-X",
2599 				"Obsolete, Unsupported Fibre Channel Adapter"};
2600 		break;
2601 	case PCI_DEVICE_ID_TFLY:
2602 		m = (typeof(m)){"LP1050", "PCI-X",
2603 				"Obsolete, Unsupported Fibre Channel Adapter"};
2604 		break;
2605 	case PCI_DEVICE_ID_HELIOS:
2606 		m = (typeof(m)){"LP11000", "PCI-X2",
2607 				"Obsolete, Unsupported Fibre Channel Adapter"};
2608 		break;
2609 	case PCI_DEVICE_ID_HELIOS_SCSP:
2610 		m = (typeof(m)){"LP11000-SP", "PCI-X2",
2611 				"Obsolete, Unsupported Fibre Channel Adapter"};
2612 		break;
2613 	case PCI_DEVICE_ID_HELIOS_DCSP:
2614 		m = (typeof(m)){"LP11002-SP",  "PCI-X2",
2615 				"Obsolete, Unsupported Fibre Channel Adapter"};
2616 		break;
2617 	case PCI_DEVICE_ID_NEPTUNE:
2618 		m = (typeof(m)){"LPe1000", "PCIe",
2619 				"Obsolete, Unsupported Fibre Channel Adapter"};
2620 		break;
2621 	case PCI_DEVICE_ID_NEPTUNE_SCSP:
2622 		m = (typeof(m)){"LPe1000-SP", "PCIe",
2623 				"Obsolete, Unsupported Fibre Channel Adapter"};
2624 		break;
2625 	case PCI_DEVICE_ID_NEPTUNE_DCSP:
2626 		m = (typeof(m)){"LPe1002-SP", "PCIe",
2627 				"Obsolete, Unsupported Fibre Channel Adapter"};
2628 		break;
2629 	case PCI_DEVICE_ID_BMID:
2630 		m = (typeof(m)){"LP1150", "PCI-X2",
2631 				"Obsolete, Unsupported Fibre Channel Adapter"};
2632 		break;
2633 	case PCI_DEVICE_ID_BSMB:
2634 		m = (typeof(m)){"LP111", "PCI-X2",
2635 				"Obsolete, Unsupported Fibre Channel Adapter"};
2636 		break;
2637 	case PCI_DEVICE_ID_ZEPHYR:
2638 		m = (typeof(m)){"LPe11000", "PCIe",
2639 				"Obsolete, Unsupported Fibre Channel Adapter"};
2640 		break;
2641 	case PCI_DEVICE_ID_ZEPHYR_SCSP:
2642 		m = (typeof(m)){"LPe11000", "PCIe",
2643 				"Obsolete, Unsupported Fibre Channel Adapter"};
2644 		break;
2645 	case PCI_DEVICE_ID_ZEPHYR_DCSP:
2646 		m = (typeof(m)){"LP2105", "PCIe",
2647 				"Obsolete, Unsupported FCoE Adapter"};
2648 		GE = 1;
2649 		break;
2650 	case PCI_DEVICE_ID_ZMID:
2651 		m = (typeof(m)){"LPe1150", "PCIe",
2652 				"Obsolete, Unsupported Fibre Channel Adapter"};
2653 		break;
2654 	case PCI_DEVICE_ID_ZSMB:
2655 		m = (typeof(m)){"LPe111", "PCIe",
2656 				"Obsolete, Unsupported Fibre Channel Adapter"};
2657 		break;
2658 	case PCI_DEVICE_ID_LP101:
2659 		m = (typeof(m)){"LP101", "PCI-X",
2660 				"Obsolete, Unsupported Fibre Channel Adapter"};
2661 		break;
2662 	case PCI_DEVICE_ID_LP10000S:
2663 		m = (typeof(m)){"LP10000-S", "PCI",
2664 				"Obsolete, Unsupported Fibre Channel Adapter"};
2665 		break;
2666 	case PCI_DEVICE_ID_LP11000S:
2667 		m = (typeof(m)){"LP11000-S", "PCI-X2",
2668 				"Obsolete, Unsupported Fibre Channel Adapter"};
2669 		break;
2670 	case PCI_DEVICE_ID_LPE11000S:
2671 		m = (typeof(m)){"LPe11000-S", "PCIe",
2672 				"Obsolete, Unsupported Fibre Channel Adapter"};
2673 		break;
2674 	case PCI_DEVICE_ID_SAT:
2675 		m = (typeof(m)){"LPe12000", "PCIe",
2676 				"Obsolete, Unsupported Fibre Channel Adapter"};
2677 		break;
2678 	case PCI_DEVICE_ID_SAT_MID:
2679 		m = (typeof(m)){"LPe1250", "PCIe",
2680 				"Obsolete, Unsupported Fibre Channel Adapter"};
2681 		break;
2682 	case PCI_DEVICE_ID_SAT_SMB:
2683 		m = (typeof(m)){"LPe121", "PCIe",
2684 				"Obsolete, Unsupported Fibre Channel Adapter"};
2685 		break;
2686 	case PCI_DEVICE_ID_SAT_DCSP:
2687 		m = (typeof(m)){"LPe12002-SP", "PCIe",
2688 				"Obsolete, Unsupported Fibre Channel Adapter"};
2689 		break;
2690 	case PCI_DEVICE_ID_SAT_SCSP:
2691 		m = (typeof(m)){"LPe12000-SP", "PCIe",
2692 				"Obsolete, Unsupported Fibre Channel Adapter"};
2693 		break;
2694 	case PCI_DEVICE_ID_SAT_S:
2695 		m = (typeof(m)){"LPe12000-S", "PCIe",
2696 				"Obsolete, Unsupported Fibre Channel Adapter"};
2697 		break;
2698 	case PCI_DEVICE_ID_PROTEUS_VF:
2699 		m = (typeof(m)){"LPev12000", "PCIe IOV",
2700 				"Obsolete, Unsupported Fibre Channel Adapter"};
2701 		break;
2702 	case PCI_DEVICE_ID_PROTEUS_PF:
2703 		m = (typeof(m)){"LPev12000", "PCIe IOV",
2704 				"Obsolete, Unsupported Fibre Channel Adapter"};
2705 		break;
2706 	case PCI_DEVICE_ID_PROTEUS_S:
2707 		m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
2708 				"Obsolete, Unsupported Fibre Channel Adapter"};
2709 		break;
2710 	case PCI_DEVICE_ID_TIGERSHARK:
2711 		oneConnect = 1;
2712 		m = (typeof(m)){"OCe10100", "PCIe",
2713 				"Obsolete, Unsupported FCoE Adapter"};
2714 		break;
2715 	case PCI_DEVICE_ID_TOMCAT:
2716 		oneConnect = 1;
2717 		m = (typeof(m)){"OCe11100", "PCIe",
2718 				"Obsolete, Unsupported FCoE Adapter"};
2719 		break;
2720 	case PCI_DEVICE_ID_FALCON:
2721 		m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2722 				"Obsolete, Unsupported Fibre Channel Adapter"};
2723 		break;
2724 	case PCI_DEVICE_ID_BALIUS:
2725 		m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
2726 				"Obsolete, Unsupported Fibre Channel Adapter"};
2727 		break;
2728 	case PCI_DEVICE_ID_LANCER_FC:
2729 		m = (typeof(m)){"LPe16000", "PCIe",
2730 				"Obsolete, Unsupported Fibre Channel Adapter"};
2731 		break;
2732 	case PCI_DEVICE_ID_LANCER_FC_VF:
2733 		m = (typeof(m)){"LPe16000", "PCIe",
2734 				"Obsolete, Unsupported Fibre Channel Adapter"};
2735 		break;
2736 	case PCI_DEVICE_ID_LANCER_FCOE:
2737 		oneConnect = 1;
2738 		m = (typeof(m)){"OCe15100", "PCIe",
2739 				"Obsolete, Unsupported FCoE Adapter"};
2740 		break;
2741 	case PCI_DEVICE_ID_LANCER_FCOE_VF:
2742 		oneConnect = 1;
2743 		m = (typeof(m)){"OCe15100", "PCIe",
2744 				"Obsolete, Unsupported FCoE Adapter"};
2745 		break;
2746 	case PCI_DEVICE_ID_LANCER_G6_FC:
2747 		m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2748 		break;
2749 	case PCI_DEVICE_ID_LANCER_G7_FC:
2750 		m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"};
2751 		break;
2752 	case PCI_DEVICE_ID_LANCER_G7P_FC:
2753 		m = (typeof(m)){"LPe38000", "PCIe", "Fibre Channel Adapter"};
2754 		break;
2755 	case PCI_DEVICE_ID_SKYHAWK:
2756 	case PCI_DEVICE_ID_SKYHAWK_VF:
2757 		oneConnect = 1;
2758 		m = (typeof(m)){"OCe14000", "PCIe",
2759 				"Obsolete, Unsupported FCoE Adapter"};
2760 		break;
2761 	default:
2762 		m = (typeof(m)){"Unknown", "", ""};
2763 		break;
2764 	}
2765 
2766 	if (mdp && mdp[0] == '\0')
2767 		snprintf(mdp, 79,"%s", m.name);
2768 	/*
2769 	 * oneConnect hba requires special processing, they are all initiators
2770 	 * and we put the port number on the end
2771 	 */
2772 	if (descp && descp[0] == '\0') {
2773 		if (oneConnect)
2774 			snprintf(descp, 255,
2775 				"Emulex OneConnect %s, %s Initiator %s",
2776 				m.name, m.function,
2777 				phba->Port);
2778 		else if (max_speed == 0)
2779 			snprintf(descp, 255,
2780 				"Emulex %s %s %s",
2781 				m.name, m.bus, m.function);
2782 		else
2783 			snprintf(descp, 255,
2784 				"Emulex %s %d%s %s %s",
2785 				m.name, max_speed, (GE) ? "GE" : "Gb",
2786 				m.bus, m.function);
2787 	}
2788 }
2789 
2790 /**
2791  * lpfc_sli3_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
2792  * @phba: pointer to lpfc hba data structure.
2793  * @pring: pointer to a IOCB ring.
2794  * @cnt: the number of IOCBs to be posted to the IOCB ring.
2795  *
2796  * This routine posts a given number of IOCBs with the associated DMA buffer
2797  * descriptors specified by the cnt argument to the given IOCB ring.
2798  *
2799  * Return codes
2800  *   The number of IOCBs NOT able to be posted to the IOCB ring.
2801  **/
2802 int
2803 lpfc_sli3_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
2804 {
2805 	IOCB_t *icmd;
2806 	struct lpfc_iocbq *iocb;
2807 	struct lpfc_dmabuf *mp1, *mp2;
2808 
2809 	cnt += pring->missbufcnt;
2810 
2811 	/* While there are buffers to post */
2812 	while (cnt > 0) {
2813 		/* Allocate buffer for  command iocb */
2814 		iocb = lpfc_sli_get_iocbq(phba);
2815 		if (iocb == NULL) {
2816 			pring->missbufcnt = cnt;
2817 			return cnt;
2818 		}
2819 		icmd = &iocb->iocb;
2820 
2821 		/* 2 buffers can be posted per command */
2822 		/* Allocate buffer to post */
2823 		mp1 = kmalloc_obj(struct lpfc_dmabuf, GFP_KERNEL);
2824 		if (mp1)
2825 		    mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2826 		if (!mp1 || !mp1->virt) {
2827 			kfree(mp1);
2828 			lpfc_sli_release_iocbq(phba, iocb);
2829 			pring->missbufcnt = cnt;
2830 			return cnt;
2831 		}
2832 
2833 		INIT_LIST_HEAD(&mp1->list);
2834 		/* Allocate buffer to post */
2835 		if (cnt > 1) {
2836 			mp2 = kmalloc_obj(struct lpfc_dmabuf, GFP_KERNEL);
2837 			if (mp2)
2838 				mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2839 							    &mp2->phys);
2840 			if (!mp2 || !mp2->virt) {
2841 				kfree(mp2);
2842 				lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2843 				kfree(mp1);
2844 				lpfc_sli_release_iocbq(phba, iocb);
2845 				pring->missbufcnt = cnt;
2846 				return cnt;
2847 			}
2848 
2849 			INIT_LIST_HEAD(&mp2->list);
2850 		} else {
2851 			mp2 = NULL;
2852 		}
2853 
2854 		icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2855 		icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2856 		icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2857 		icmd->ulpBdeCount = 1;
2858 		cnt--;
2859 		if (mp2) {
2860 			icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2861 			icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2862 			icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2863 			cnt--;
2864 			icmd->ulpBdeCount = 2;
2865 		}
2866 
2867 		icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2868 		icmd->ulpLe = 1;
2869 
2870 		if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2871 		    IOCB_ERROR) {
2872 			lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2873 			kfree(mp1);
2874 			cnt++;
2875 			if (mp2) {
2876 				lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2877 				kfree(mp2);
2878 				cnt++;
2879 			}
2880 			lpfc_sli_release_iocbq(phba, iocb);
2881 			pring->missbufcnt = cnt;
2882 			return cnt;
2883 		}
2884 		lpfc_sli_ringpostbuf_put(phba, pring, mp1);
2885 		if (mp2)
2886 			lpfc_sli_ringpostbuf_put(phba, pring, mp2);
2887 	}
2888 	pring->missbufcnt = 0;
2889 	return 0;
2890 }
2891 
2892 /**
2893  * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
2894  * @phba: pointer to lpfc hba data structure.
2895  *
2896  * This routine posts initial receive IOCB buffers to the ELS ring. The
2897  * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
2898  * set to 64 IOCBs. SLI3 only.
2899  *
2900  * Return codes
2901  *   0 - success (currently always success)
2902  **/
2903 static int
2904 lpfc_post_rcv_buf(struct lpfc_hba *phba)
2905 {
2906 	struct lpfc_sli *psli = &phba->sli;
2907 
2908 	/* Ring 0, ELS / CT buffers */
2909 	lpfc_sli3_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
2910 	/* Ring 2 - FCP no buffers needed */
2911 
2912 	return 0;
2913 }
2914 
2915 #define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2916 
2917 /**
2918  * lpfc_sha_init - Set up initial array of hash table entries
2919  * @HashResultPointer: pointer to an array as hash table.
2920  *
2921  * This routine sets up the initial values to the array of hash table entries
2922  * for the LC HBAs.
2923  **/
2924 static void
2925 lpfc_sha_init(uint32_t * HashResultPointer)
2926 {
2927 	HashResultPointer[0] = 0x67452301;
2928 	HashResultPointer[1] = 0xEFCDAB89;
2929 	HashResultPointer[2] = 0x98BADCFE;
2930 	HashResultPointer[3] = 0x10325476;
2931 	HashResultPointer[4] = 0xC3D2E1F0;
2932 }
2933 
2934 /**
2935  * lpfc_sha_iterate - Iterate initial hash table with the working hash table
2936  * @HashResultPointer: pointer to an initial/result hash table.
2937  * @HashWorkingPointer: pointer to an working hash table.
2938  *
2939  * This routine iterates an initial hash table pointed by @HashResultPointer
2940  * with the values from the working hash table pointeed by @HashWorkingPointer.
2941  * The results are putting back to the initial hash table, returned through
2942  * the @HashResultPointer as the result hash table.
2943  **/
2944 static void
2945 lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2946 {
2947 	int t;
2948 	uint32_t TEMP;
2949 	uint32_t A, B, C, D, E;
2950 	t = 16;
2951 	do {
2952 		HashWorkingPointer[t] =
2953 		    S(1,
2954 		      HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2955 								     8] ^
2956 		      HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2957 	} while (++t <= 79);
2958 	t = 0;
2959 	A = HashResultPointer[0];
2960 	B = HashResultPointer[1];
2961 	C = HashResultPointer[2];
2962 	D = HashResultPointer[3];
2963 	E = HashResultPointer[4];
2964 
2965 	do {
2966 		if (t < 20) {
2967 			TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2968 		} else if (t < 40) {
2969 			TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2970 		} else if (t < 60) {
2971 			TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2972 		} else {
2973 			TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2974 		}
2975 		TEMP += S(5, A) + E + HashWorkingPointer[t];
2976 		E = D;
2977 		D = C;
2978 		C = S(30, B);
2979 		B = A;
2980 		A = TEMP;
2981 	} while (++t <= 79);
2982 
2983 	HashResultPointer[0] += A;
2984 	HashResultPointer[1] += B;
2985 	HashResultPointer[2] += C;
2986 	HashResultPointer[3] += D;
2987 	HashResultPointer[4] += E;
2988 
2989 }
2990 
2991 /**
2992  * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
2993  * @RandomChallenge: pointer to the entry of host challenge random number array.
2994  * @HashWorking: pointer to the entry of the working hash array.
2995  *
2996  * This routine calculates the working hash array referred by @HashWorking
2997  * from the challenge random numbers associated with the host, referred by
2998  * @RandomChallenge. The result is put into the entry of the working hash
2999  * array and returned by reference through @HashWorking.
3000  **/
3001 static void
3002 lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
3003 {
3004 	*HashWorking = (*RandomChallenge ^ *HashWorking);
3005 }
3006 
3007 /**
3008  * lpfc_hba_init - Perform special handling for LC HBA initialization
3009  * @phba: pointer to lpfc hba data structure.
3010  * @hbainit: pointer to an array of unsigned 32-bit integers.
3011  *
3012  * This routine performs the special handling for LC HBA initialization.
3013  **/
3014 void
3015 lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
3016 {
3017 	int t;
3018 	uint32_t *HashWorking;
3019 	uint32_t *pwwnn = (uint32_t *) phba->wwnn;
3020 
3021 	HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
3022 	if (!HashWorking)
3023 		return;
3024 
3025 	HashWorking[0] = HashWorking[78] = *pwwnn++;
3026 	HashWorking[1] = HashWorking[79] = *pwwnn;
3027 
3028 	for (t = 0; t < 7; t++)
3029 		lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
3030 
3031 	lpfc_sha_init(hbainit);
3032 	lpfc_sha_iterate(hbainit, HashWorking);
3033 	kfree(HashWorking);
3034 }
3035 
3036 /**
3037  * lpfc_cleanup - Performs vport cleanups before deleting a vport
3038  * @vport: pointer to a virtual N_Port data structure.
3039  *
3040  * This routine performs the necessary cleanups before deleting the @vport.
3041  * It invokes the discovery state machine to perform necessary state
3042  * transitions and to release the ndlps associated with the @vport. Note,
3043  * the physical port is treated as @vport 0.
3044  **/
3045 void
3046 lpfc_cleanup(struct lpfc_vport *vport)
3047 {
3048 	struct lpfc_hba   *phba = vport->phba;
3049 	struct lpfc_nodelist *ndlp, *next_ndlp;
3050 	int i = 0;
3051 
3052 	if (phba->link_state > LPFC_LINK_DOWN)
3053 		lpfc_port_link_failure(vport);
3054 
3055 	/* Clean up VMID resources */
3056 	if (lpfc_is_vmid_enabled(phba))
3057 		lpfc_vmid_vport_cleanup(vport);
3058 
3059 	list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
3060 		/* Fabric Ports not in UNMAPPED state are cleaned up in the
3061 		 * DEVICE_RM event.
3062 		 */
3063 		if (ndlp->nlp_type & NLP_FABRIC &&
3064 		    ndlp->nlp_state == NLP_STE_UNMAPPED_NODE)
3065 			lpfc_disc_state_machine(vport, ndlp, NULL,
3066 					NLP_EVT_DEVICE_RECOVERY);
3067 
3068 		if (!(ndlp->fc4_xpt_flags & (NVME_XPT_REGD|SCSI_XPT_REGD)))
3069 			lpfc_disc_state_machine(vport, ndlp, NULL,
3070 					NLP_EVT_DEVICE_RM);
3071 	}
3072 
3073 	/* This is a special case flush to return all
3074 	 * IOs before entering this loop. There are
3075 	 * two points in the code where a flush is
3076 	 * avoided if the FC_UNLOADING flag is set.
3077 	 * one is in the multipool destroy,
3078 	 * (this prevents a crash) and the other is
3079 	 * in the nvme abort handler, ( also prevents
3080 	 * a crash). Both of these exceptions are
3081 	 * cases where the slot is still accessible.
3082 	 * The flush here is only when the pci slot
3083 	 * is offline.
3084 	 */
3085 	if (test_bit(FC_UNLOADING, &vport->load_flag) &&
3086 	    pci_channel_offline(phba->pcidev))
3087 		lpfc_sli_flush_io_rings(vport->phba);
3088 
3089 	/* At this point, ALL ndlp's should be gone
3090 	 * because of the previous NLP_EVT_DEVICE_RM.
3091 	 * Lets wait for this to happen, if needed.
3092 	 */
3093 	while (!list_empty(&vport->fc_nodes)) {
3094 		if (i++ > 3000) {
3095 			lpfc_printf_vlog(vport, KERN_ERR,
3096 					 LOG_TRACE_EVENT,
3097 				"0233 Nodelist not empty\n");
3098 			list_for_each_entry_safe(ndlp, next_ndlp,
3099 						&vport->fc_nodes, nlp_listp) {
3100 				lpfc_printf_vlog(ndlp->vport, KERN_ERR,
3101 						 LOG_DISCOVERY,
3102 						 "0282 did:x%x ndlp:x%px "
3103 						 "refcnt:%d xflags x%x "
3104 						 "nflag x%lx\n",
3105 						 ndlp->nlp_DID, (void *)ndlp,
3106 						 kref_read(&ndlp->kref),
3107 						 ndlp->fc4_xpt_flags,
3108 						 ndlp->nlp_flag);
3109 			}
3110 			break;
3111 		}
3112 
3113 		/* Wait for any activity on ndlps to settle */
3114 		msleep(10);
3115 	}
3116 	lpfc_cleanup_vports_rrqs(vport, NULL);
3117 }
3118 
3119 /**
3120  * lpfc_stop_vport_timers - Stop all the timers associated with a vport
3121  * @vport: pointer to a virtual N_Port data structure.
3122  *
3123  * This routine stops all the timers associated with a @vport. This function
3124  * is invoked before disabling or deleting a @vport. Note that the physical
3125  * port is treated as @vport 0.
3126  **/
3127 void
3128 lpfc_stop_vport_timers(struct lpfc_vport *vport)
3129 {
3130 	timer_delete_sync(&vport->els_tmofunc);
3131 	timer_delete_sync(&vport->delayed_disc_tmo);
3132 	lpfc_can_disctmo(vport);
3133 	return;
3134 }
3135 
3136 /**
3137  * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
3138  * @phba: pointer to lpfc hba data structure.
3139  *
3140  * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
3141  * caller of this routine should already hold the host lock.
3142  **/
3143 void
3144 __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
3145 {
3146 	/* Clear pending FCF rediscovery wait flag */
3147 	phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
3148 
3149 	/* Now, try to stop the timer */
3150 	timer_delete(&phba->fcf.redisc_wait);
3151 }
3152 
3153 /**
3154  * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
3155  * @phba: pointer to lpfc hba data structure.
3156  *
3157  * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
3158  * checks whether the FCF rediscovery wait timer is pending with the host
3159  * lock held before proceeding with disabling the timer and clearing the
3160  * wait timer pendig flag.
3161  **/
3162 void
3163 lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
3164 {
3165 	spin_lock_irq(&phba->hbalock);
3166 	if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
3167 		/* FCF rediscovery timer already fired or stopped */
3168 		spin_unlock_irq(&phba->hbalock);
3169 		return;
3170 	}
3171 	__lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3172 	/* Clear failover in progress flags */
3173 	phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
3174 	spin_unlock_irq(&phba->hbalock);
3175 }
3176 
3177 /**
3178  * lpfc_cmf_stop - Stop CMF processing
3179  * @phba: pointer to lpfc hba data structure.
3180  *
3181  * This is called when the link goes down or if CMF mode is turned OFF.
3182  * It is also called when going offline or unloaded just before the
3183  * congestion info buffer is unregistered.
3184  **/
3185 void
3186 lpfc_cmf_stop(struct lpfc_hba *phba)
3187 {
3188 	int cpu;
3189 	struct lpfc_cgn_stat *cgs;
3190 
3191 	/* We only do something if CMF is enabled */
3192 	if (!phba->sli4_hba.pc_sli4_params.cmf)
3193 		return;
3194 
3195 	lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3196 			"6221 Stop CMF / Cancel Timer\n");
3197 
3198 	/* Cancel the CMF timer */
3199 	hrtimer_cancel(&phba->cmf_stats_timer);
3200 	hrtimer_cancel(&phba->cmf_timer);
3201 
3202 	/* Zero CMF counters */
3203 	atomic_set(&phba->cmf_busy, 0);
3204 	for_each_present_cpu(cpu) {
3205 		cgs = per_cpu_ptr(phba->cmf_stat, cpu);
3206 		atomic64_set(&cgs->total_bytes, 0);
3207 		atomic64_set(&cgs->rcv_bytes, 0);
3208 		atomic_set(&cgs->rx_io_cnt, 0);
3209 		atomic64_set(&cgs->rx_latency, 0);
3210 	}
3211 	atomic_set(&phba->cmf_bw_wait, 0);
3212 
3213 	/* Resume any blocked IO - Queue unblock on workqueue */
3214 	queue_work(phba->wq, &phba->unblock_request_work);
3215 }
3216 
3217 static inline uint64_t
3218 lpfc_get_max_line_rate(struct lpfc_hba *phba)
3219 {
3220 	uint64_t rate = lpfc_sli_port_speed_get(phba);
3221 
3222 	return ((((unsigned long)rate) * 1024 * 1024) / 10);
3223 }
3224 
3225 void
3226 lpfc_cmf_signal_init(struct lpfc_hba *phba)
3227 {
3228 	lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3229 			"6223 Signal CMF init\n");
3230 
3231 	/* Use the new fc_linkspeed to recalculate */
3232 	phba->cmf_interval_rate = LPFC_CMF_INTERVAL;
3233 	phba->cmf_max_line_rate = lpfc_get_max_line_rate(phba);
3234 	phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate *
3235 					    phba->cmf_interval_rate, 1000);
3236 	phba->cmf_max_bytes_per_interval = phba->cmf_link_byte_count;
3237 
3238 	/* This is a signal to firmware to sync up CMF BW with link speed */
3239 	lpfc_issue_cmf_sync_wqe(phba, 0, 0);
3240 }
3241 
3242 /**
3243  * lpfc_cmf_start - Start CMF processing
3244  * @phba: pointer to lpfc hba data structure.
3245  *
3246  * This is called when the link comes up or if CMF mode is turned OFF
3247  * to Monitor or Managed.
3248  **/
3249 void
3250 lpfc_cmf_start(struct lpfc_hba *phba)
3251 {
3252 	struct lpfc_cgn_stat *cgs;
3253 	int cpu;
3254 
3255 	/* We only do something if CMF is enabled */
3256 	if (!phba->sli4_hba.pc_sli4_params.cmf ||
3257 	    phba->cmf_active_mode == LPFC_CFG_OFF)
3258 		return;
3259 
3260 	/* Reinitialize congestion buffer info */
3261 	lpfc_init_congestion_buf(phba);
3262 
3263 	atomic_set(&phba->cgn_fabric_warn_cnt, 0);
3264 	atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
3265 	atomic_set(&phba->cgn_sync_alarm_cnt, 0);
3266 	atomic_set(&phba->cgn_sync_warn_cnt, 0);
3267 
3268 	atomic_set(&phba->cmf_busy, 0);
3269 	for_each_present_cpu(cpu) {
3270 		cgs = per_cpu_ptr(phba->cmf_stat, cpu);
3271 		atomic64_set(&cgs->total_bytes, 0);
3272 		atomic64_set(&cgs->rcv_bytes, 0);
3273 		atomic_set(&cgs->rx_io_cnt, 0);
3274 		atomic64_set(&cgs->rx_latency, 0);
3275 	}
3276 	phba->cmf_latency.tv_sec = 0;
3277 	phba->cmf_latency.tv_nsec = 0;
3278 
3279 	lpfc_cmf_signal_init(phba);
3280 
3281 	lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3282 			"6222 Start CMF / Timer\n");
3283 
3284 	phba->cmf_timer_cnt = 0;
3285 	hrtimer_start(&phba->cmf_timer,
3286 		      ktime_set(0, LPFC_CMF_INTERVAL * NSEC_PER_MSEC),
3287 		      HRTIMER_MODE_REL);
3288 	hrtimer_start(&phba->cmf_stats_timer,
3289 		      ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC),
3290 		      HRTIMER_MODE_REL);
3291 	/* Setup for latency check in IO cmpl routines */
3292 	ktime_get_real_ts64(&phba->cmf_latency);
3293 
3294 	atomic_set(&phba->cmf_bw_wait, 0);
3295 	atomic_set(&phba->cmf_stop_io, 0);
3296 }
3297 
3298 /**
3299  * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
3300  * @phba: pointer to lpfc hba data structure.
3301  *
3302  * This routine stops all the timers associated with a HBA. This function is
3303  * invoked before either putting a HBA offline or unloading the driver.
3304  **/
3305 void
3306 lpfc_stop_hba_timers(struct lpfc_hba *phba)
3307 {
3308 	if (phba->pport)
3309 		lpfc_stop_vport_timers(phba->pport);
3310 	cancel_delayed_work_sync(&phba->eq_delay_work);
3311 	cancel_delayed_work_sync(&phba->idle_stat_delay_work);
3312 	timer_delete_sync(&phba->sli.mbox_tmo);
3313 	timer_delete_sync(&phba->fabric_block_timer);
3314 	timer_delete_sync(&phba->eratt_poll);
3315 	timer_delete_sync(&phba->hb_tmofunc);
3316 	if (phba->sli_rev == LPFC_SLI_REV4) {
3317 		timer_delete_sync(&phba->rrq_tmr);
3318 		clear_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
3319 	}
3320 	clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
3321 	clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
3322 
3323 	switch (phba->pci_dev_grp) {
3324 	case LPFC_PCI_DEV_LP:
3325 		/* Stop any LightPulse device specific driver timers */
3326 		timer_delete_sync(&phba->fcp_poll_timer);
3327 		break;
3328 	case LPFC_PCI_DEV_OC:
3329 		/* Stop any OneConnect device specific driver timers */
3330 		lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3331 		break;
3332 	default:
3333 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3334 				"0297 Invalid device group (x%x)\n",
3335 				phba->pci_dev_grp);
3336 		break;
3337 	}
3338 	return;
3339 }
3340 
3341 /**
3342  * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
3343  * @phba: pointer to lpfc hba data structure.
3344  * @mbx_action: flag for mailbox no wait action.
3345  *
3346  * This routine marks a HBA's management interface as blocked. Once the HBA's
3347  * management interface is marked as blocked, all the user space access to
3348  * the HBA, whether they are from sysfs interface or libdfc interface will
3349  * all be blocked. The HBA is set to block the management interface when the
3350  * driver prepares the HBA interface for online or offline.
3351  **/
3352 static void
3353 lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
3354 {
3355 	unsigned long iflag;
3356 	uint8_t actcmd = MBX_HEARTBEAT;
3357 	unsigned long timeout;
3358 
3359 	spin_lock_irqsave(&phba->hbalock, iflag);
3360 	phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
3361 	spin_unlock_irqrestore(&phba->hbalock, iflag);
3362 	if (mbx_action == LPFC_MBX_NO_WAIT)
3363 		return;
3364 	timeout = secs_to_jiffies(LPFC_MBOX_TMO) + jiffies;
3365 	spin_lock_irqsave(&phba->hbalock, iflag);
3366 	if (phba->sli.mbox_active) {
3367 		actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
3368 		/* Determine how long we might wait for the active mailbox
3369 		 * command to be gracefully completed by firmware.
3370 		 */
3371 		timeout = secs_to_jiffies(lpfc_mbox_tmo_val(phba,
3372 				phba->sli.mbox_active)) + jiffies;
3373 	}
3374 	spin_unlock_irqrestore(&phba->hbalock, iflag);
3375 
3376 	/* Wait for the outstnading mailbox command to complete */
3377 	while (phba->sli.mbox_active) {
3378 		/* Check active mailbox complete status every 2ms */
3379 		msleep(2);
3380 		if (time_after(jiffies, timeout)) {
3381 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3382 					"2813 Mgmt IO is Blocked %x "
3383 					"- mbox cmd %x still active\n",
3384 					phba->sli.sli_flag, actcmd);
3385 			break;
3386 		}
3387 	}
3388 }
3389 
3390 /**
3391  * lpfc_sli4_node_rpi_restore - Recover assigned RPIs for active nodes.
3392  * @phba: pointer to lpfc hba data structure.
3393  *
3394  * Allocate RPIs for all active remote nodes. This is needed whenever
3395  * an SLI4 adapter is reset and the driver is not unloading. Its purpose
3396  * is to fixup the temporary rpi assignments.
3397  **/
3398 void
3399 lpfc_sli4_node_rpi_restore(struct lpfc_hba *phba)
3400 {
3401 	struct lpfc_nodelist  *ndlp, *next_ndlp;
3402 	struct lpfc_vport **vports;
3403 	int i, rpi;
3404 
3405 	if (phba->sli_rev != LPFC_SLI_REV4)
3406 		return;
3407 
3408 	vports = lpfc_create_vport_work_array(phba);
3409 	if (!vports)
3410 		return;
3411 
3412 	for (i = 0; i <= phba->max_vports && vports[i]; i++) {
3413 		if (test_bit(FC_UNLOADING, &vports[i]->load_flag))
3414 			continue;
3415 
3416 		list_for_each_entry_safe(ndlp, next_ndlp,
3417 					 &vports[i]->fc_nodes,
3418 					 nlp_listp) {
3419 			rpi = lpfc_sli4_alloc_rpi(phba);
3420 			if (rpi == LPFC_RPI_ALLOC_ERROR) {
3421 				lpfc_printf_vlog(ndlp->vport, KERN_INFO,
3422 						 LOG_NODE | LOG_DISCOVERY,
3423 						 "0099 RPI alloc error for "
3424 						 "ndlp x%px DID:x%06x "
3425 						 "flg:x%lx\n",
3426 						 ndlp, ndlp->nlp_DID,
3427 						 ndlp->nlp_flag);
3428 				continue;
3429 			}
3430 			ndlp->nlp_rpi = rpi;
3431 			lpfc_printf_vlog(ndlp->vport, KERN_INFO,
3432 					 LOG_NODE | LOG_DISCOVERY,
3433 					 "0009 Assign RPI x%x to ndlp x%px "
3434 					 "DID:x%06x flg:x%lx\n",
3435 					 ndlp->nlp_rpi, ndlp, ndlp->nlp_DID,
3436 					 ndlp->nlp_flag);
3437 		}
3438 	}
3439 	lpfc_destroy_vport_work_array(phba, vports);
3440 }
3441 
3442 /**
3443  * lpfc_create_expedite_pool - create expedite pool
3444  * @phba: pointer to lpfc hba data structure.
3445  *
3446  * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0
3447  * to expedite pool. Mark them as expedite.
3448  **/
3449 static void lpfc_create_expedite_pool(struct lpfc_hba *phba)
3450 {
3451 	struct lpfc_sli4_hdw_queue *qp;
3452 	struct lpfc_io_buf *lpfc_ncmd;
3453 	struct lpfc_io_buf *lpfc_ncmd_next;
3454 	struct lpfc_epd_pool *epd_pool;
3455 	unsigned long iflag;
3456 
3457 	epd_pool = &phba->epd_pool;
3458 	qp = &phba->sli4_hba.hdwq[0];
3459 
3460 	spin_lock_init(&epd_pool->lock);
3461 	spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3462 	spin_lock(&epd_pool->lock);
3463 	INIT_LIST_HEAD(&epd_pool->list);
3464 	list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3465 				 &qp->lpfc_io_buf_list_put, list) {
3466 		list_move_tail(&lpfc_ncmd->list, &epd_pool->list);
3467 		lpfc_ncmd->expedite = true;
3468 		qp->put_io_bufs--;
3469 		epd_pool->count++;
3470 		if (epd_pool->count >= XRI_BATCH)
3471 			break;
3472 	}
3473 	spin_unlock(&epd_pool->lock);
3474 	spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3475 }
3476 
3477 /**
3478  * lpfc_destroy_expedite_pool - destroy expedite pool
3479  * @phba: pointer to lpfc hba data structure.
3480  *
3481  * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put
3482  * of HWQ 0. Clear the mark.
3483  **/
3484 static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba)
3485 {
3486 	struct lpfc_sli4_hdw_queue *qp;
3487 	struct lpfc_io_buf *lpfc_ncmd;
3488 	struct lpfc_io_buf *lpfc_ncmd_next;
3489 	struct lpfc_epd_pool *epd_pool;
3490 	unsigned long iflag;
3491 
3492 	epd_pool = &phba->epd_pool;
3493 	qp = &phba->sli4_hba.hdwq[0];
3494 
3495 	spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3496 	spin_lock(&epd_pool->lock);
3497 	list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3498 				 &epd_pool->list, list) {
3499 		list_move_tail(&lpfc_ncmd->list,
3500 			       &qp->lpfc_io_buf_list_put);
3501 		lpfc_ncmd->flags = false;
3502 		qp->put_io_bufs++;
3503 		epd_pool->count--;
3504 	}
3505 	spin_unlock(&epd_pool->lock);
3506 	spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3507 }
3508 
3509 /**
3510  * lpfc_create_multixri_pools - create multi-XRI pools
3511  * @phba: pointer to lpfc hba data structure.
3512  *
3513  * This routine initialize public, private per HWQ. Then, move XRIs from
3514  * lpfc_io_buf_list_put to public pool. High and low watermark are also
3515  * Initialized.
3516  **/
3517 void lpfc_create_multixri_pools(struct lpfc_hba *phba)
3518 {
3519 	u32 i, j;
3520 	u32 hwq_count;
3521 	u32 count_per_hwq;
3522 	struct lpfc_io_buf *lpfc_ncmd;
3523 	struct lpfc_io_buf *lpfc_ncmd_next;
3524 	unsigned long iflag;
3525 	struct lpfc_sli4_hdw_queue *qp;
3526 	struct lpfc_multixri_pool *multixri_pool;
3527 	struct lpfc_pbl_pool *pbl_pool;
3528 	struct lpfc_pvt_pool *pvt_pool;
3529 
3530 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3531 			"1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n",
3532 			phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu,
3533 			phba->sli4_hba.io_xri_cnt);
3534 
3535 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3536 		lpfc_create_expedite_pool(phba);
3537 
3538 	hwq_count = phba->cfg_hdw_queue;
3539 	count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count;
3540 
3541 	for (i = 0; i < hwq_count; i++) {
3542 		multixri_pool = kzalloc_obj(*multixri_pool, GFP_KERNEL);
3543 
3544 		if (!multixri_pool) {
3545 			lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3546 					"1238 Failed to allocate memory for "
3547 					"multixri_pool\n");
3548 
3549 			if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3550 				lpfc_destroy_expedite_pool(phba);
3551 
3552 			j = 0;
3553 			while (j < i) {
3554 				qp = &phba->sli4_hba.hdwq[j];
3555 				kfree(qp->p_multixri_pool);
3556 				j++;
3557 			}
3558 			phba->cfg_xri_rebalancing = 0;
3559 			return;
3560 		}
3561 
3562 		qp = &phba->sli4_hba.hdwq[i];
3563 		qp->p_multixri_pool = multixri_pool;
3564 
3565 		multixri_pool->xri_limit = count_per_hwq;
3566 		multixri_pool->rrb_next_hwqid = i;
3567 
3568 		/* Deal with public free xri pool */
3569 		pbl_pool = &multixri_pool->pbl_pool;
3570 		spin_lock_init(&pbl_pool->lock);
3571 		spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3572 		spin_lock(&pbl_pool->lock);
3573 		INIT_LIST_HEAD(&pbl_pool->list);
3574 		list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3575 					 &qp->lpfc_io_buf_list_put, list) {
3576 			list_move_tail(&lpfc_ncmd->list, &pbl_pool->list);
3577 			qp->put_io_bufs--;
3578 			pbl_pool->count++;
3579 		}
3580 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3581 				"1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n",
3582 				pbl_pool->count, i);
3583 		spin_unlock(&pbl_pool->lock);
3584 		spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3585 
3586 		/* Deal with private free xri pool */
3587 		pvt_pool = &multixri_pool->pvt_pool;
3588 		pvt_pool->high_watermark = multixri_pool->xri_limit / 2;
3589 		pvt_pool->low_watermark = XRI_BATCH;
3590 		spin_lock_init(&pvt_pool->lock);
3591 		spin_lock_irqsave(&pvt_pool->lock, iflag);
3592 		INIT_LIST_HEAD(&pvt_pool->list);
3593 		pvt_pool->count = 0;
3594 		spin_unlock_irqrestore(&pvt_pool->lock, iflag);
3595 	}
3596 }
3597 
3598 /**
3599  * lpfc_destroy_multixri_pools - destroy multi-XRI pools
3600  * @phba: pointer to lpfc hba data structure.
3601  *
3602  * This routine returns XRIs from public/private to lpfc_io_buf_list_put.
3603  **/
3604 static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba)
3605 {
3606 	u32 i;
3607 	u32 hwq_count;
3608 	struct lpfc_io_buf *lpfc_ncmd;
3609 	struct lpfc_io_buf *lpfc_ncmd_next;
3610 	unsigned long iflag;
3611 	struct lpfc_sli4_hdw_queue *qp;
3612 	struct lpfc_multixri_pool *multixri_pool;
3613 	struct lpfc_pbl_pool *pbl_pool;
3614 	struct lpfc_pvt_pool *pvt_pool;
3615 
3616 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3617 		lpfc_destroy_expedite_pool(phba);
3618 
3619 	if (!test_bit(FC_UNLOADING, &phba->pport->load_flag))
3620 		lpfc_sli_flush_io_rings(phba);
3621 
3622 	hwq_count = phba->cfg_hdw_queue;
3623 
3624 	for (i = 0; i < hwq_count; i++) {
3625 		qp = &phba->sli4_hba.hdwq[i];
3626 		multixri_pool = qp->p_multixri_pool;
3627 		if (!multixri_pool)
3628 			continue;
3629 
3630 		qp->p_multixri_pool = NULL;
3631 
3632 		spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3633 
3634 		/* Deal with public free xri pool */
3635 		pbl_pool = &multixri_pool->pbl_pool;
3636 		spin_lock(&pbl_pool->lock);
3637 
3638 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3639 				"1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n",
3640 				pbl_pool->count, i);
3641 
3642 		list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3643 					 &pbl_pool->list, list) {
3644 			list_move_tail(&lpfc_ncmd->list,
3645 				       &qp->lpfc_io_buf_list_put);
3646 			qp->put_io_bufs++;
3647 			pbl_pool->count--;
3648 		}
3649 
3650 		INIT_LIST_HEAD(&pbl_pool->list);
3651 		pbl_pool->count = 0;
3652 
3653 		spin_unlock(&pbl_pool->lock);
3654 
3655 		/* Deal with private free xri pool */
3656 		pvt_pool = &multixri_pool->pvt_pool;
3657 		spin_lock(&pvt_pool->lock);
3658 
3659 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3660 				"1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n",
3661 				pvt_pool->count, i);
3662 
3663 		list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3664 					 &pvt_pool->list, list) {
3665 			list_move_tail(&lpfc_ncmd->list,
3666 				       &qp->lpfc_io_buf_list_put);
3667 			qp->put_io_bufs++;
3668 			pvt_pool->count--;
3669 		}
3670 
3671 		INIT_LIST_HEAD(&pvt_pool->list);
3672 		pvt_pool->count = 0;
3673 
3674 		spin_unlock(&pvt_pool->lock);
3675 		spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3676 
3677 		kfree(multixri_pool);
3678 	}
3679 }
3680 
3681 /**
3682  * lpfc_online - Initialize and bring a HBA online
3683  * @phba: pointer to lpfc hba data structure.
3684  *
3685  * This routine initializes the HBA and brings a HBA online. During this
3686  * process, the management interface is blocked to prevent user space access
3687  * to the HBA interfering with the driver initialization.
3688  *
3689  * Return codes
3690  *   0 - successful
3691  *   1 - failed
3692  **/
3693 int
3694 lpfc_online(struct lpfc_hba *phba)
3695 {
3696 	struct lpfc_vport *vport;
3697 	struct lpfc_vport **vports;
3698 	int i, error = 0;
3699 	bool vpis_cleared = false;
3700 
3701 	if (!phba)
3702 		return 0;
3703 	vport = phba->pport;
3704 
3705 	if (!test_bit(FC_OFFLINE_MODE, &vport->fc_flag))
3706 		return 0;
3707 
3708 	lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3709 			"0458 Bring Adapter online\n");
3710 
3711 	lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
3712 
3713 	if (phba->sli_rev == LPFC_SLI_REV4) {
3714 		if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3715 			lpfc_unblock_mgmt_io(phba);
3716 			return 1;
3717 		}
3718 		spin_lock_irq(&phba->hbalock);
3719 		if (!phba->sli4_hba.max_cfg_param.vpi_used)
3720 			vpis_cleared = true;
3721 		spin_unlock_irq(&phba->hbalock);
3722 
3723 		/* Reestablish the local initiator port.
3724 		 * The offline process destroyed the previous lport.
3725 		 */
3726 		if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
3727 				!phba->nvmet_support) {
3728 			error = lpfc_nvme_create_localport(phba->pport);
3729 			if (error)
3730 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3731 					"6132 NVME restore reg failed "
3732 					"on nvmei error x%x\n", error);
3733 		}
3734 	} else {
3735 		lpfc_sli_queue_init(phba);
3736 		if (lpfc_sli_hba_setup(phba)) {	/* Initialize SLI2/SLI3 HBA */
3737 			lpfc_unblock_mgmt_io(phba);
3738 			return 1;
3739 		}
3740 	}
3741 
3742 	vports = lpfc_create_vport_work_array(phba);
3743 	if (vports != NULL) {
3744 		for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3745 			clear_bit(FC_OFFLINE_MODE, &vports[i]->fc_flag);
3746 			if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3747 				set_bit(FC_VPORT_NEEDS_REG_VPI,
3748 					&vports[i]->fc_flag);
3749 			if (phba->sli_rev == LPFC_SLI_REV4) {
3750 				set_bit(FC_VPORT_NEEDS_INIT_VPI,
3751 					&vports[i]->fc_flag);
3752 				if ((vpis_cleared) &&
3753 				    (vports[i]->port_type !=
3754 					LPFC_PHYSICAL_PORT))
3755 					vports[i]->vpi = 0;
3756 			}
3757 		}
3758 	}
3759 	lpfc_destroy_vport_work_array(phba, vports);
3760 
3761 	if (phba->cfg_xri_rebalancing)
3762 		lpfc_create_multixri_pools(phba);
3763 
3764 	lpfc_cpuhp_add(phba);
3765 
3766 	lpfc_unblock_mgmt_io(phba);
3767 	return 0;
3768 }
3769 
3770 /**
3771  * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
3772  * @phba: pointer to lpfc hba data structure.
3773  *
3774  * This routine marks a HBA's management interface as not blocked. Once the
3775  * HBA's management interface is marked as not blocked, all the user space
3776  * access to the HBA, whether they are from sysfs interface or libdfc
3777  * interface will be allowed. The HBA is set to block the management interface
3778  * when the driver prepares the HBA interface for online or offline and then
3779  * set to unblock the management interface afterwards.
3780  **/
3781 void
3782 lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3783 {
3784 	unsigned long iflag;
3785 
3786 	spin_lock_irqsave(&phba->hbalock, iflag);
3787 	phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3788 	spin_unlock_irqrestore(&phba->hbalock, iflag);
3789 }
3790 
3791 /**
3792  * lpfc_offline_prep - Prepare a HBA to be brought offline
3793  * @phba: pointer to lpfc hba data structure.
3794  * @mbx_action: flag for mailbox shutdown action.
3795  *
3796  * This routine is invoked to prepare a HBA to be brought offline. It performs
3797  * unregistration login to all the nodes on all vports and flushes the mailbox
3798  * queue to make it ready to be brought offline.
3799  **/
3800 void
3801 lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
3802 {
3803 	struct lpfc_vport *vport = phba->pport;
3804 	struct lpfc_nodelist  *ndlp, *next_ndlp;
3805 	struct lpfc_vport **vports;
3806 	struct Scsi_Host *shost;
3807 	int i;
3808 	int offline;
3809 	bool hba_pci_err;
3810 
3811 	if (test_bit(FC_OFFLINE_MODE, &vport->fc_flag))
3812 		return;
3813 
3814 	lpfc_block_mgmt_io(phba, mbx_action);
3815 
3816 	lpfc_linkdown(phba);
3817 
3818 	offline =  pci_channel_offline(phba->pcidev);
3819 	hba_pci_err = test_bit(HBA_PCI_ERR, &phba->bit_flags);
3820 
3821 	/* Issue an unreg_login to all nodes on all vports */
3822 	vports = lpfc_create_vport_work_array(phba);
3823 	if (vports != NULL) {
3824 		for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3825 			if (test_bit(FC_UNLOADING, &vports[i]->load_flag))
3826 				continue;
3827 			shost = lpfc_shost_from_vport(vports[i]);
3828 			spin_lock_irq(shost->host_lock);
3829 			vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
3830 			spin_unlock_irq(shost->host_lock);
3831 			set_bit(FC_VPORT_NEEDS_REG_VPI, &vports[i]->fc_flag);
3832 			clear_bit(FC_VFI_REGISTERED, &vports[i]->fc_flag);
3833 
3834 			list_for_each_entry_safe(ndlp, next_ndlp,
3835 						 &vports[i]->fc_nodes,
3836 						 nlp_listp) {
3837 
3838 				clear_bit(NLP_NPR_ADISC, &ndlp->nlp_flag);
3839 				if (offline || hba_pci_err) {
3840 					clear_bit(NLP_UNREG_INP,
3841 						  &ndlp->nlp_flag);
3842 					clear_bit(NLP_RPI_REGISTERED,
3843 						  &ndlp->nlp_flag);
3844 				}
3845 
3846 				if (ndlp->nlp_type & NLP_FABRIC) {
3847 					lpfc_disc_state_machine(vports[i], ndlp,
3848 						NULL, NLP_EVT_DEVICE_RECOVERY);
3849 
3850 					/* Don't remove the node unless the node
3851 					 * has been unregistered with the
3852 					 * transport, and we're not in recovery
3853 					 * before dev_loss_tmo triggered.
3854 					 * Otherwise, let dev_loss take care of
3855 					 * the node.
3856 					 */
3857 					if (!test_bit(NLP_IN_RECOV_POST_DEV_LOSS,
3858 						      &ndlp->save_flags) &&
3859 					    !(ndlp->fc4_xpt_flags &
3860 					      (NVME_XPT_REGD | SCSI_XPT_REGD)))
3861 						lpfc_disc_state_machine
3862 							(vports[i], ndlp,
3863 							 NULL,
3864 							 NLP_EVT_DEVICE_RM);
3865 				}
3866 			}
3867 		}
3868 	}
3869 	lpfc_destroy_vport_work_array(phba, vports);
3870 
3871 	lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
3872 
3873 	if (phba->wq)
3874 		flush_workqueue(phba->wq);
3875 }
3876 
3877 /**
3878  * lpfc_offline - Bring a HBA offline
3879  * @phba: pointer to lpfc hba data structure.
3880  *
3881  * This routine actually brings a HBA offline. It stops all the timers
3882  * associated with the HBA, brings down the SLI layer, and eventually
3883  * marks the HBA as in offline state for the upper layer protocol.
3884  **/
3885 void
3886 lpfc_offline(struct lpfc_hba *phba)
3887 {
3888 	struct Scsi_Host  *shost;
3889 	struct lpfc_vport **vports;
3890 	int i;
3891 
3892 	if (test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
3893 		return;
3894 
3895 	/* stop port and all timers associated with this hba */
3896 	lpfc_stop_port(phba);
3897 
3898 	/* Tear down the local and target port registrations.  The
3899 	 * nvme transports need to cleanup.
3900 	 */
3901 	lpfc_nvmet_destroy_targetport(phba);
3902 	lpfc_nvme_destroy_localport(phba->pport);
3903 
3904 	vports = lpfc_create_vport_work_array(phba);
3905 	if (vports != NULL)
3906 		for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
3907 			lpfc_stop_vport_timers(vports[i]);
3908 	lpfc_destroy_vport_work_array(phba, vports);
3909 	lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3910 			"0460 Bring Adapter offline\n");
3911 	/* Bring down the SLI Layer and cleanup.  The HBA is offline
3912 	   now.  */
3913 	lpfc_sli_hba_down(phba);
3914 	spin_lock_irq(&phba->hbalock);
3915 	phba->work_ha = 0;
3916 	spin_unlock_irq(&phba->hbalock);
3917 	vports = lpfc_create_vport_work_array(phba);
3918 	if (vports != NULL)
3919 		for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3920 			shost = lpfc_shost_from_vport(vports[i]);
3921 			spin_lock_irq(shost->host_lock);
3922 			vports[i]->work_port_events = 0;
3923 			spin_unlock_irq(shost->host_lock);
3924 			set_bit(FC_OFFLINE_MODE, &vports[i]->fc_flag);
3925 		}
3926 	lpfc_destroy_vport_work_array(phba, vports);
3927 	/* If OFFLINE flag is clear (i.e. unloading), cpuhp removal is handled
3928 	 * in hba_unset
3929 	 */
3930 	if (test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
3931 		__lpfc_cpuhp_remove(phba);
3932 
3933 	if (phba->cfg_xri_rebalancing)
3934 		lpfc_destroy_multixri_pools(phba);
3935 }
3936 
3937 /**
3938  * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
3939  * @phba: pointer to lpfc hba data structure.
3940  *
3941  * This routine is to free all the SCSI buffers and IOCBs from the driver
3942  * list back to kernel. It is called from lpfc_pci_remove_one to free
3943  * the internal resources before the device is removed from the system.
3944  **/
3945 static void
3946 lpfc_scsi_free(struct lpfc_hba *phba)
3947 {
3948 	struct lpfc_io_buf *sb, *sb_next;
3949 
3950 	if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3951 		return;
3952 
3953 	spin_lock_irq(&phba->hbalock);
3954 
3955 	/* Release all the lpfc_scsi_bufs maintained by this host. */
3956 
3957 	spin_lock(&phba->scsi_buf_list_put_lock);
3958 	list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3959 				 list) {
3960 		list_del(&sb->list);
3961 		dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3962 			      sb->dma_handle);
3963 		kfree(sb);
3964 		phba->total_scsi_bufs--;
3965 	}
3966 	spin_unlock(&phba->scsi_buf_list_put_lock);
3967 
3968 	spin_lock(&phba->scsi_buf_list_get_lock);
3969 	list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3970 				 list) {
3971 		list_del(&sb->list);
3972 		dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3973 			      sb->dma_handle);
3974 		kfree(sb);
3975 		phba->total_scsi_bufs--;
3976 	}
3977 	spin_unlock(&phba->scsi_buf_list_get_lock);
3978 	spin_unlock_irq(&phba->hbalock);
3979 }
3980 
3981 /**
3982  * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists
3983  * @phba: pointer to lpfc hba data structure.
3984  *
3985  * This routine is to free all the IO buffers and IOCBs from the driver
3986  * list back to kernel. It is called from lpfc_pci_remove_one to free
3987  * the internal resources before the device is removed from the system.
3988  **/
3989 void
3990 lpfc_io_free(struct lpfc_hba *phba)
3991 {
3992 	struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
3993 	struct lpfc_sli4_hdw_queue *qp;
3994 	int idx;
3995 
3996 	for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
3997 		qp = &phba->sli4_hba.hdwq[idx];
3998 		/* Release all the lpfc_nvme_bufs maintained by this host. */
3999 		spin_lock(&qp->io_buf_list_put_lock);
4000 		list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4001 					 &qp->lpfc_io_buf_list_put,
4002 					 list) {
4003 			list_del(&lpfc_ncmd->list);
4004 			qp->put_io_bufs--;
4005 			dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4006 				      lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4007 			if (phba->cfg_xpsgl && !phba->nvmet_support)
4008 				lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
4009 			lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
4010 			kfree(lpfc_ncmd);
4011 			qp->total_io_bufs--;
4012 		}
4013 		spin_unlock(&qp->io_buf_list_put_lock);
4014 
4015 		spin_lock(&qp->io_buf_list_get_lock);
4016 		list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4017 					 &qp->lpfc_io_buf_list_get,
4018 					 list) {
4019 			list_del(&lpfc_ncmd->list);
4020 			qp->get_io_bufs--;
4021 			dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4022 				      lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4023 			if (phba->cfg_xpsgl && !phba->nvmet_support)
4024 				lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
4025 			lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
4026 			kfree(lpfc_ncmd);
4027 			qp->total_io_bufs--;
4028 		}
4029 		spin_unlock(&qp->io_buf_list_get_lock);
4030 	}
4031 }
4032 
4033 /**
4034  * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
4035  * @phba: pointer to lpfc hba data structure.
4036  *
4037  * This routine first calculates the sizes of the current els and allocated
4038  * scsi sgl lists, and then goes through all sgls to updates the physical
4039  * XRIs assigned due to port function reset. During port initialization, the
4040  * current els and allocated scsi sgl lists are 0s.
4041  *
4042  * Return codes
4043  *   0 - successful (for now, it always returns 0)
4044  **/
4045 int
4046 lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
4047 {
4048 	struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
4049 	uint16_t i, lxri, xri_cnt, els_xri_cnt;
4050 	LIST_HEAD(els_sgl_list);
4051 	int rc;
4052 
4053 	/*
4054 	 * update on pci function's els xri-sgl list
4055 	 */
4056 	els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4057 
4058 	if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
4059 		/* els xri-sgl expanded */
4060 		xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
4061 		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4062 				"3157 ELS xri-sgl count increased from "
4063 				"%d to %d\n", phba->sli4_hba.els_xri_cnt,
4064 				els_xri_cnt);
4065 		/* allocate the additional els sgls */
4066 		for (i = 0; i < xri_cnt; i++) {
4067 			sglq_entry = kzalloc_obj(struct lpfc_sglq, GFP_KERNEL);
4068 			if (sglq_entry == NULL) {
4069 				lpfc_printf_log(phba, KERN_ERR,
4070 						LOG_TRACE_EVENT,
4071 						"2562 Failure to allocate an "
4072 						"ELS sgl entry:%d\n", i);
4073 				rc = -ENOMEM;
4074 				goto out_free_mem;
4075 			}
4076 			sglq_entry->buff_type = GEN_BUFF_TYPE;
4077 			sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
4078 							   &sglq_entry->phys);
4079 			if (sglq_entry->virt == NULL) {
4080 				kfree(sglq_entry);
4081 				lpfc_printf_log(phba, KERN_ERR,
4082 						LOG_TRACE_EVENT,
4083 						"2563 Failure to allocate an "
4084 						"ELS mbuf:%d\n", i);
4085 				rc = -ENOMEM;
4086 				goto out_free_mem;
4087 			}
4088 			sglq_entry->sgl = sglq_entry->virt;
4089 			memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
4090 			sglq_entry->state = SGL_FREED;
4091 			list_add_tail(&sglq_entry->list, &els_sgl_list);
4092 		}
4093 		spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4094 		list_splice_init(&els_sgl_list,
4095 				 &phba->sli4_hba.lpfc_els_sgl_list);
4096 		spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4097 	} else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
4098 		/* els xri-sgl shrinked */
4099 		xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
4100 		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4101 				"3158 ELS xri-sgl count decreased from "
4102 				"%d to %d\n", phba->sli4_hba.els_xri_cnt,
4103 				els_xri_cnt);
4104 		spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4105 		list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
4106 				 &els_sgl_list);
4107 		/* release extra els sgls from list */
4108 		for (i = 0; i < xri_cnt; i++) {
4109 			list_remove_head(&els_sgl_list,
4110 					 sglq_entry, struct lpfc_sglq, list);
4111 			if (sglq_entry) {
4112 				__lpfc_mbuf_free(phba, sglq_entry->virt,
4113 						 sglq_entry->phys);
4114 				kfree(sglq_entry);
4115 			}
4116 		}
4117 		list_splice_init(&els_sgl_list,
4118 				 &phba->sli4_hba.lpfc_els_sgl_list);
4119 		spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4120 	} else
4121 		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4122 				"3163 ELS xri-sgl count unchanged: %d\n",
4123 				els_xri_cnt);
4124 	phba->sli4_hba.els_xri_cnt = els_xri_cnt;
4125 
4126 	/* update xris to els sgls on the list */
4127 	sglq_entry = NULL;
4128 	sglq_entry_next = NULL;
4129 	list_for_each_entry_safe(sglq_entry, sglq_entry_next,
4130 				 &phba->sli4_hba.lpfc_els_sgl_list, list) {
4131 		lxri = lpfc_sli4_next_xritag(phba);
4132 		if (lxri == NO_XRI) {
4133 			lpfc_printf_log(phba, KERN_ERR,
4134 					LOG_TRACE_EVENT,
4135 					"2400 Failed to allocate xri for "
4136 					"ELS sgl\n");
4137 			rc = -ENOMEM;
4138 			goto out_free_mem;
4139 		}
4140 		sglq_entry->sli4_lxritag = lxri;
4141 		sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4142 	}
4143 	return 0;
4144 
4145 out_free_mem:
4146 	lpfc_free_els_sgl_list(phba);
4147 	return rc;
4148 }
4149 
4150 /**
4151  * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
4152  * @phba: pointer to lpfc hba data structure.
4153  *
4154  * This routine first calculates the sizes of the current els and allocated
4155  * scsi sgl lists, and then goes through all sgls to updates the physical
4156  * XRIs assigned due to port function reset. During port initialization, the
4157  * current els and allocated scsi sgl lists are 0s.
4158  *
4159  * Return codes
4160  *   0 - successful (for now, it always returns 0)
4161  **/
4162 int
4163 lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
4164 {
4165 	struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
4166 	uint16_t i, lxri, xri_cnt, els_xri_cnt;
4167 	uint16_t nvmet_xri_cnt;
4168 	LIST_HEAD(nvmet_sgl_list);
4169 	int rc;
4170 
4171 	/*
4172 	 * update on pci function's nvmet xri-sgl list
4173 	 */
4174 	els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4175 
4176 	/* For NVMET, ALL remaining XRIs are dedicated for IO processing */
4177 	nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4178 	if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
4179 		/* els xri-sgl expanded */
4180 		xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
4181 		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4182 				"6302 NVMET xri-sgl cnt grew from %d to %d\n",
4183 				phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
4184 		/* allocate the additional nvmet sgls */
4185 		for (i = 0; i < xri_cnt; i++) {
4186 			sglq_entry = kzalloc_obj(struct lpfc_sglq, GFP_KERNEL);
4187 			if (sglq_entry == NULL) {
4188 				lpfc_printf_log(phba, KERN_ERR,
4189 						LOG_TRACE_EVENT,
4190 						"6303 Failure to allocate an "
4191 						"NVMET sgl entry:%d\n", i);
4192 				rc = -ENOMEM;
4193 				goto out_free_mem;
4194 			}
4195 			sglq_entry->buff_type = NVMET_BUFF_TYPE;
4196 			sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
4197 							   &sglq_entry->phys);
4198 			if (sglq_entry->virt == NULL) {
4199 				kfree(sglq_entry);
4200 				lpfc_printf_log(phba, KERN_ERR,
4201 						LOG_TRACE_EVENT,
4202 						"6304 Failure to allocate an "
4203 						"NVMET buf:%d\n", i);
4204 				rc = -ENOMEM;
4205 				goto out_free_mem;
4206 			}
4207 			sglq_entry->sgl = sglq_entry->virt;
4208 			memset(sglq_entry->sgl, 0,
4209 			       phba->cfg_sg_dma_buf_size);
4210 			sglq_entry->state = SGL_FREED;
4211 			list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
4212 		}
4213 		spin_lock_irq(&phba->hbalock);
4214 		spin_lock(&phba->sli4_hba.sgl_list_lock);
4215 		list_splice_init(&nvmet_sgl_list,
4216 				 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4217 		spin_unlock(&phba->sli4_hba.sgl_list_lock);
4218 		spin_unlock_irq(&phba->hbalock);
4219 	} else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
4220 		/* nvmet xri-sgl shrunk */
4221 		xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
4222 		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4223 				"6305 NVMET xri-sgl count decreased from "
4224 				"%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
4225 				nvmet_xri_cnt);
4226 		spin_lock_irq(&phba->hbalock);
4227 		spin_lock(&phba->sli4_hba.sgl_list_lock);
4228 		list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
4229 				 &nvmet_sgl_list);
4230 		/* release extra nvmet sgls from list */
4231 		for (i = 0; i < xri_cnt; i++) {
4232 			list_remove_head(&nvmet_sgl_list,
4233 					 sglq_entry, struct lpfc_sglq, list);
4234 			if (sglq_entry) {
4235 				lpfc_nvmet_buf_free(phba, sglq_entry->virt,
4236 						    sglq_entry->phys);
4237 				kfree(sglq_entry);
4238 			}
4239 		}
4240 		list_splice_init(&nvmet_sgl_list,
4241 				 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4242 		spin_unlock(&phba->sli4_hba.sgl_list_lock);
4243 		spin_unlock_irq(&phba->hbalock);
4244 	} else
4245 		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4246 				"6306 NVMET xri-sgl count unchanged: %d\n",
4247 				nvmet_xri_cnt);
4248 	phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
4249 
4250 	/* update xris to nvmet sgls on the list */
4251 	sglq_entry = NULL;
4252 	sglq_entry_next = NULL;
4253 	list_for_each_entry_safe(sglq_entry, sglq_entry_next,
4254 				 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
4255 		lxri = lpfc_sli4_next_xritag(phba);
4256 		if (lxri == NO_XRI) {
4257 			lpfc_printf_log(phba, KERN_ERR,
4258 					LOG_TRACE_EVENT,
4259 					"6307 Failed to allocate xri for "
4260 					"NVMET sgl\n");
4261 			rc = -ENOMEM;
4262 			goto out_free_mem;
4263 		}
4264 		sglq_entry->sli4_lxritag = lxri;
4265 		sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4266 	}
4267 	return 0;
4268 
4269 out_free_mem:
4270 	lpfc_free_nvmet_sgl_list(phba);
4271 	return rc;
4272 }
4273 
4274 int
4275 lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf)
4276 {
4277 	LIST_HEAD(blist);
4278 	struct lpfc_sli4_hdw_queue *qp;
4279 	struct lpfc_io_buf *lpfc_cmd;
4280 	struct lpfc_io_buf *iobufp, *prev_iobufp;
4281 	int idx, cnt, xri, inserted;
4282 
4283 	cnt = 0;
4284 	for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4285 		qp = &phba->sli4_hba.hdwq[idx];
4286 		spin_lock_irq(&qp->io_buf_list_get_lock);
4287 		spin_lock(&qp->io_buf_list_put_lock);
4288 
4289 		/* Take everything off the get and put lists */
4290 		list_splice_init(&qp->lpfc_io_buf_list_get, &blist);
4291 		list_splice(&qp->lpfc_io_buf_list_put, &blist);
4292 		INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
4293 		INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
4294 		cnt += qp->get_io_bufs + qp->put_io_bufs;
4295 		qp->get_io_bufs = 0;
4296 		qp->put_io_bufs = 0;
4297 		qp->total_io_bufs = 0;
4298 		spin_unlock(&qp->io_buf_list_put_lock);
4299 		spin_unlock_irq(&qp->io_buf_list_get_lock);
4300 	}
4301 
4302 	/*
4303 	 * Take IO buffers off blist and put on cbuf sorted by XRI.
4304 	 * This is because POST_SGL takes a sequential range of XRIs
4305 	 * to post to the firmware.
4306 	 */
4307 	for (idx = 0; idx < cnt; idx++) {
4308 		list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list);
4309 		if (!lpfc_cmd)
4310 			return cnt;
4311 		if (idx == 0) {
4312 			list_add_tail(&lpfc_cmd->list, cbuf);
4313 			continue;
4314 		}
4315 		xri = lpfc_cmd->cur_iocbq.sli4_xritag;
4316 		inserted = 0;
4317 		prev_iobufp = NULL;
4318 		list_for_each_entry(iobufp, cbuf, list) {
4319 			if (xri < iobufp->cur_iocbq.sli4_xritag) {
4320 				if (prev_iobufp)
4321 					list_add(&lpfc_cmd->list,
4322 						 &prev_iobufp->list);
4323 				else
4324 					list_add(&lpfc_cmd->list, cbuf);
4325 				inserted = 1;
4326 				break;
4327 			}
4328 			prev_iobufp = iobufp;
4329 		}
4330 		if (!inserted)
4331 			list_add_tail(&lpfc_cmd->list, cbuf);
4332 	}
4333 	return cnt;
4334 }
4335 
4336 int
4337 lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf)
4338 {
4339 	struct lpfc_sli4_hdw_queue *qp;
4340 	struct lpfc_io_buf *lpfc_cmd;
4341 	int idx, cnt;
4342 	unsigned long iflags;
4343 
4344 	qp = phba->sli4_hba.hdwq;
4345 	cnt = 0;
4346 	while (!list_empty(cbuf)) {
4347 		for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4348 			list_remove_head(cbuf, lpfc_cmd,
4349 					 struct lpfc_io_buf, list);
4350 			if (!lpfc_cmd)
4351 				return cnt;
4352 			cnt++;
4353 			qp = &phba->sli4_hba.hdwq[idx];
4354 			lpfc_cmd->hdwq_no = idx;
4355 			lpfc_cmd->hdwq = qp;
4356 			lpfc_cmd->cur_iocbq.cmd_cmpl = NULL;
4357 			spin_lock_irqsave(&qp->io_buf_list_put_lock, iflags);
4358 			list_add_tail(&lpfc_cmd->list,
4359 				      &qp->lpfc_io_buf_list_put);
4360 			qp->put_io_bufs++;
4361 			qp->total_io_bufs++;
4362 			spin_unlock_irqrestore(&qp->io_buf_list_put_lock,
4363 					       iflags);
4364 		}
4365 	}
4366 	return cnt;
4367 }
4368 
4369 /**
4370  * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping
4371  * @phba: pointer to lpfc hba data structure.
4372  *
4373  * This routine first calculates the sizes of the current els and allocated
4374  * scsi sgl lists, and then goes through all sgls to updates the physical
4375  * XRIs assigned due to port function reset. During port initialization, the
4376  * current els and allocated scsi sgl lists are 0s.
4377  *
4378  * Return codes
4379  *   0 - successful (for now, it always returns 0)
4380  **/
4381 int
4382 lpfc_sli4_io_sgl_update(struct lpfc_hba *phba)
4383 {
4384 	struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
4385 	uint16_t i, lxri, els_xri_cnt;
4386 	uint16_t io_xri_cnt, io_xri_max;
4387 	LIST_HEAD(io_sgl_list);
4388 	int rc, cnt;
4389 
4390 	/*
4391 	 * update on pci function's allocated nvme xri-sgl list
4392 	 */
4393 
4394 	/* maximum number of xris available for nvme buffers */
4395 	els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4396 	io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4397 	phba->sli4_hba.io_xri_max = io_xri_max;
4398 
4399 	lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4400 			"6074 Current allocated XRI sgl count:%d, "
4401 			"maximum XRI count:%d els_xri_cnt:%d\n\n",
4402 			phba->sli4_hba.io_xri_cnt,
4403 			phba->sli4_hba.io_xri_max,
4404 			els_xri_cnt);
4405 
4406 	cnt = lpfc_io_buf_flush(phba, &io_sgl_list);
4407 
4408 	if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) {
4409 		/* max nvme xri shrunk below the allocated nvme buffers */
4410 		io_xri_cnt = phba->sli4_hba.io_xri_cnt -
4411 					phba->sli4_hba.io_xri_max;
4412 		/* release the extra allocated nvme buffers */
4413 		for (i = 0; i < io_xri_cnt; i++) {
4414 			list_remove_head(&io_sgl_list, lpfc_ncmd,
4415 					 struct lpfc_io_buf, list);
4416 			if (lpfc_ncmd) {
4417 				dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4418 					      lpfc_ncmd->data,
4419 					      lpfc_ncmd->dma_handle);
4420 				kfree(lpfc_ncmd);
4421 			}
4422 		}
4423 		phba->sli4_hba.io_xri_cnt -= io_xri_cnt;
4424 	}
4425 
4426 	/* update xris associated to remaining allocated nvme buffers */
4427 	lpfc_ncmd = NULL;
4428 	lpfc_ncmd_next = NULL;
4429 	phba->sli4_hba.io_xri_cnt = cnt;
4430 	list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4431 				 &io_sgl_list, list) {
4432 		lxri = lpfc_sli4_next_xritag(phba);
4433 		if (lxri == NO_XRI) {
4434 			lpfc_printf_log(phba, KERN_ERR,
4435 					LOG_TRACE_EVENT,
4436 					"6075 Failed to allocate xri for "
4437 					"nvme buffer\n");
4438 			rc = -ENOMEM;
4439 			goto out_free_mem;
4440 		}
4441 		lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
4442 		lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4443 	}
4444 	cnt = lpfc_io_buf_replenish(phba, &io_sgl_list);
4445 	return 0;
4446 
4447 out_free_mem:
4448 	lpfc_io_free(phba);
4449 	return rc;
4450 }
4451 
4452 /**
4453  * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec
4454  * @phba: Pointer to lpfc hba data structure.
4455  * @num_to_alloc: The requested number of buffers to allocate.
4456  *
4457  * This routine allocates nvme buffers for device with SLI-4 interface spec,
4458  * the nvme buffer contains all the necessary information needed to initiate
4459  * an I/O. After allocating up to @num_to_allocate IO buffers and put
4460  * them on a list, it post them to the port by using SGL block post.
4461  *
4462  * Return codes:
4463  *   int - number of IO buffers that were allocated and posted.
4464  *   0 = failure, less than num_to_alloc is a partial failure.
4465  **/
4466 int
4467 lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc)
4468 {
4469 	struct lpfc_io_buf *lpfc_ncmd;
4470 	struct lpfc_iocbq *pwqeq;
4471 	uint16_t iotag, lxri = 0;
4472 	int bcnt, num_posted;
4473 	LIST_HEAD(prep_nblist);
4474 	LIST_HEAD(post_nblist);
4475 	LIST_HEAD(nvme_nblist);
4476 
4477 	phba->sli4_hba.io_xri_cnt = 0;
4478 	for (bcnt = 0; bcnt < num_to_alloc; bcnt++) {
4479 		lpfc_ncmd = kzalloc_obj(*lpfc_ncmd, GFP_KERNEL);
4480 		if (!lpfc_ncmd)
4481 			break;
4482 		/*
4483 		 * Get memory from the pci pool to map the virt space to
4484 		 * pci bus space for an I/O. The DMA buffer includes the
4485 		 * number of SGE's necessary to support the sg_tablesize.
4486 		 */
4487 		lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool,
4488 						  GFP_KERNEL,
4489 						  &lpfc_ncmd->dma_handle);
4490 		if (!lpfc_ncmd->data) {
4491 			kfree(lpfc_ncmd);
4492 			break;
4493 		}
4494 
4495 		if (phba->cfg_xpsgl && !phba->nvmet_support) {
4496 			INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list);
4497 		} else {
4498 			/*
4499 			 * 4K Page alignment is CRITICAL to BlockGuard, double
4500 			 * check to be sure.
4501 			 */
4502 			if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) &&
4503 			    (((unsigned long)(lpfc_ncmd->data) &
4504 			    (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) {
4505 				lpfc_printf_log(phba, KERN_ERR,
4506 						LOG_TRACE_EVENT,
4507 						"3369 Memory alignment err: "
4508 						"addr=%lx\n",
4509 						(unsigned long)lpfc_ncmd->data);
4510 				dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4511 					      lpfc_ncmd->data,
4512 					      lpfc_ncmd->dma_handle);
4513 				kfree(lpfc_ncmd);
4514 				break;
4515 			}
4516 		}
4517 
4518 		INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list);
4519 
4520 		lxri = lpfc_sli4_next_xritag(phba);
4521 		if (lxri == NO_XRI) {
4522 			dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4523 				      lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4524 			kfree(lpfc_ncmd);
4525 			break;
4526 		}
4527 		pwqeq = &lpfc_ncmd->cur_iocbq;
4528 
4529 		/* Allocate iotag for lpfc_ncmd->cur_iocbq. */
4530 		iotag = lpfc_sli_next_iotag(phba, pwqeq);
4531 		if (iotag == 0) {
4532 			dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4533 				      lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4534 			kfree(lpfc_ncmd);
4535 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4536 					"6121 Failed to allocate IOTAG for"
4537 					" XRI:0x%x\n", lxri);
4538 			lpfc_sli4_free_xri(phba, lxri);
4539 			break;
4540 		}
4541 		pwqeq->sli4_lxritag = lxri;
4542 		pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4543 
4544 		/* Initialize local short-hand pointers. */
4545 		lpfc_ncmd->dma_sgl = lpfc_ncmd->data;
4546 		lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle;
4547 		lpfc_ncmd->cur_iocbq.io_buf = lpfc_ncmd;
4548 		spin_lock_init(&lpfc_ncmd->buf_lock);
4549 
4550 		/* add the nvme buffer to a post list */
4551 		list_add_tail(&lpfc_ncmd->list, &post_nblist);
4552 		phba->sli4_hba.io_xri_cnt++;
4553 	}
4554 	lpfc_printf_log(phba, KERN_INFO, LOG_NVME,
4555 			"6114 Allocate %d out of %d requested new NVME "
4556 			"buffers of size x%zu bytes\n", bcnt, num_to_alloc,
4557 			sizeof(*lpfc_ncmd));
4558 
4559 
4560 	/* post the list of nvme buffer sgls to port if available */
4561 	if (!list_empty(&post_nblist))
4562 		num_posted = lpfc_sli4_post_io_sgl_list(
4563 				phba, &post_nblist, bcnt);
4564 	else
4565 		num_posted = 0;
4566 
4567 	return num_posted;
4568 }
4569 
4570 static uint64_t
4571 lpfc_get_wwpn(struct lpfc_hba *phba)
4572 {
4573 	uint64_t wwn;
4574 	int rc;
4575 	LPFC_MBOXQ_t *mboxq;
4576 	MAILBOX_t *mb;
4577 
4578 	mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
4579 						GFP_KERNEL);
4580 	if (!mboxq)
4581 		return (uint64_t)-1;
4582 
4583 	/* First get WWN of HBA instance */
4584 	lpfc_read_nv(phba, mboxq);
4585 	rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
4586 	if (rc != MBX_SUCCESS) {
4587 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4588 				"6019 Mailbox failed , mbxCmd x%x "
4589 				"READ_NV, mbxStatus x%x\n",
4590 				bf_get(lpfc_mqe_command, &mboxq->u.mqe),
4591 				bf_get(lpfc_mqe_status, &mboxq->u.mqe));
4592 		mempool_free(mboxq, phba->mbox_mem_pool);
4593 		return (uint64_t) -1;
4594 	}
4595 	mb = &mboxq->u.mb;
4596 	memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
4597 	/* wwn is WWPN of HBA instance */
4598 	mempool_free(mboxq, phba->mbox_mem_pool);
4599 	if (phba->sli_rev == LPFC_SLI_REV4)
4600 		return be64_to_cpu(wwn);
4601 	else
4602 		return rol64(wwn, 32);
4603 }
4604 
4605 static unsigned short lpfc_get_sg_tablesize(struct lpfc_hba *phba)
4606 {
4607 	if (phba->sli_rev == LPFC_SLI_REV4)
4608 		if (phba->cfg_xpsgl && !phba->nvmet_support)
4609 			return LPFC_MAX_SG_TABLESIZE;
4610 		else
4611 			return phba->cfg_scsi_seg_cnt;
4612 	else
4613 		return phba->cfg_sg_seg_cnt;
4614 }
4615 
4616 /**
4617  * lpfc_vmid_res_alloc - Allocates resources for VMID
4618  * @phba: pointer to lpfc hba data structure.
4619  * @vport: pointer to vport data structure
4620  *
4621  * This routine allocated the resources needed for the VMID.
4622  *
4623  * Return codes
4624  *	0 on Success
4625  *	Non-0 on Failure
4626  */
4627 static int
4628 lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport)
4629 {
4630 	/* VMID feature is supported only on SLI4 */
4631 	if (phba->sli_rev == LPFC_SLI_REV3) {
4632 		phba->cfg_vmid_app_header = 0;
4633 		phba->cfg_vmid_priority_tagging = 0;
4634 	}
4635 
4636 	if (lpfc_is_vmid_enabled(phba)) {
4637 		vport->vmid =
4638 		    kzalloc_objs(struct lpfc_vmid, phba->cfg_max_vmid,
4639 				 GFP_KERNEL);
4640 		if (!vport->vmid)
4641 			return -ENOMEM;
4642 
4643 		rwlock_init(&vport->vmid_lock);
4644 
4645 		/* Set the VMID parameters for the vport */
4646 		vport->vmid_priority_tagging = phba->cfg_vmid_priority_tagging;
4647 		vport->vmid_inactivity_timeout =
4648 		    phba->cfg_vmid_inactivity_timeout;
4649 		vport->max_vmid = phba->cfg_max_vmid;
4650 		vport->cur_vmid_cnt = 0;
4651 
4652 		vport->vmid_priority_range = bitmap_zalloc
4653 			(LPFC_VMID_MAX_PRIORITY_RANGE, GFP_KERNEL);
4654 
4655 		if (!vport->vmid_priority_range) {
4656 			kfree(vport->vmid);
4657 			return -ENOMEM;
4658 		}
4659 
4660 		hash_init(vport->hash_table);
4661 	}
4662 	return 0;
4663 }
4664 
4665 /**
4666  * lpfc_create_port - Create an FC port
4667  * @phba: pointer to lpfc hba data structure.
4668  * @instance: a unique integer ID to this FC port.
4669  * @dev: pointer to the device data structure.
4670  *
4671  * This routine creates a FC port for the upper layer protocol. The FC port
4672  * can be created on top of either a physical port or a virtual port provided
4673  * by the HBA. This routine also allocates a SCSI host data structure (shost)
4674  * and associates the FC port created before adding the shost into the SCSI
4675  * layer.
4676  *
4677  * Return codes
4678  *   @vport - pointer to the virtual N_Port data structure.
4679  *   NULL - port create failed.
4680  **/
4681 struct lpfc_vport *
4682 lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
4683 {
4684 	struct lpfc_vport *vport;
4685 	struct Scsi_Host  *shost = NULL;
4686 	struct scsi_host_template *template;
4687 	int error = 0;
4688 	int i;
4689 	uint64_t wwn;
4690 	bool use_no_reset_hba = false;
4691 	int rc;
4692 	u8 if_type;
4693 
4694 	if (lpfc_no_hba_reset_cnt) {
4695 		if (phba->sli_rev < LPFC_SLI_REV4 &&
4696 		    dev == &phba->pcidev->dev) {
4697 			/* Reset the port first */
4698 			lpfc_sli_brdrestart(phba);
4699 			rc = lpfc_sli_chipset_init(phba);
4700 			if (rc)
4701 				return NULL;
4702 		}
4703 		wwn = lpfc_get_wwpn(phba);
4704 	}
4705 
4706 	for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
4707 		if (wwn == lpfc_no_hba_reset[i]) {
4708 			lpfc_printf_log(phba, KERN_ERR,
4709 					LOG_TRACE_EVENT,
4710 					"6020 Setting use_no_reset port=%llx\n",
4711 					wwn);
4712 			use_no_reset_hba = true;
4713 			break;
4714 		}
4715 	}
4716 
4717 	/* Seed template for SCSI host registration */
4718 	if (dev == &phba->pcidev->dev) {
4719 		if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
4720 			/* Seed physical port template */
4721 			template = &lpfc_template;
4722 
4723 			if (use_no_reset_hba)
4724 				/* template is for a no reset SCSI Host */
4725 				template->eh_host_reset_handler = NULL;
4726 
4727 			/* Seed updated value of sg_tablesize */
4728 			template->sg_tablesize = lpfc_get_sg_tablesize(phba);
4729 		} else {
4730 			/* NVMET is for physical port only */
4731 			template = &lpfc_template_nvme;
4732 		}
4733 	} else {
4734 		/* Seed vport template */
4735 		template = &lpfc_vport_template;
4736 
4737 		/* Seed updated value of sg_tablesize */
4738 		template->sg_tablesize = lpfc_get_sg_tablesize(phba);
4739 	}
4740 
4741 	shost = scsi_host_alloc(template, sizeof(struct lpfc_vport));
4742 	if (!shost)
4743 		goto out;
4744 
4745 	vport = (struct lpfc_vport *) shost->hostdata;
4746 	vport->phba = phba;
4747 	set_bit(FC_LOADING, &vport->load_flag);
4748 	set_bit(FC_VPORT_NEEDS_REG_VPI, &vport->fc_flag);
4749 	vport->fc_rscn_flush = 0;
4750 	atomic_set(&vport->fc_plogi_cnt, 0);
4751 	atomic_set(&vport->fc_adisc_cnt, 0);
4752 	atomic_set(&vport->fc_reglogin_cnt, 0);
4753 	atomic_set(&vport->fc_prli_cnt, 0);
4754 	atomic_set(&vport->fc_unmap_cnt, 0);
4755 	atomic_set(&vport->fc_map_cnt, 0);
4756 	atomic_set(&vport->fc_npr_cnt, 0);
4757 	atomic_set(&vport->fc_unused_cnt, 0);
4758 	lpfc_get_vport_cfgparam(vport);
4759 
4760 	/* Adjust value in vport */
4761 	vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type;
4762 
4763 	shost->unique_id = instance;
4764 	shost->max_id = LPFC_MAX_TARGET;
4765 	shost->max_lun = vport->cfg_max_luns;
4766 	shost->this_id = -1;
4767 
4768 	/* Set max_cmd_len applicable to ASIC support */
4769 	if (phba->sli_rev == LPFC_SLI_REV4) {
4770 		if_type = bf_get(lpfc_sli_intf_if_type,
4771 				 &phba->sli4_hba.sli_intf);
4772 		switch (if_type) {
4773 		case LPFC_SLI_INTF_IF_TYPE_2:
4774 			fallthrough;
4775 		case LPFC_SLI_INTF_IF_TYPE_6:
4776 			shost->max_cmd_len = LPFC_FCP_CDB_LEN_32;
4777 			break;
4778 		default:
4779 			shost->max_cmd_len = LPFC_FCP_CDB_LEN;
4780 			break;
4781 		}
4782 	} else {
4783 		shost->max_cmd_len = LPFC_FCP_CDB_LEN;
4784 	}
4785 
4786 	if (phba->sli_rev == LPFC_SLI_REV4) {
4787 		if (!phba->cfg_fcp_mq_threshold ||
4788 		    phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue)
4789 			phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue;
4790 
4791 		shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(),
4792 					    phba->cfg_fcp_mq_threshold);
4793 
4794 		shost->dma_boundary =
4795 			phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
4796 	} else
4797 		/* SLI-3 has a limited number of hardware queues (3),
4798 		 * thus there is only one for FCP processing.
4799 		 */
4800 		shost->nr_hw_queues = 1;
4801 
4802 	/*
4803 	 * Set initial can_queue value since 0 is no longer supported and
4804 	 * scsi_add_host will fail. This will be adjusted later based on the
4805 	 * max xri value determined in hba setup.
4806 	 */
4807 	shost->can_queue = phba->cfg_hba_queue_depth - 10;
4808 	if (dev != &phba->pcidev->dev) {
4809 		shost->transportt = lpfc_vport_transport_template;
4810 		vport->port_type = LPFC_NPIV_PORT;
4811 	} else {
4812 		shost->transportt = lpfc_transport_template;
4813 		vport->port_type = LPFC_PHYSICAL_PORT;
4814 	}
4815 
4816 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
4817 			"9081 CreatePort TMPLATE type %x TBLsize %d "
4818 			"SEGcnt %d/%d\n",
4819 			vport->port_type, shost->sg_tablesize,
4820 			phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt);
4821 
4822 	/* Allocate the resources for VMID */
4823 	rc = lpfc_vmid_res_alloc(phba, vport);
4824 
4825 	if (rc)
4826 		goto out_put_shost;
4827 
4828 	/* Initialize all internally managed lists. */
4829 	INIT_LIST_HEAD(&vport->fc_nodes);
4830 	spin_lock_init(&vport->fc_nodes_list_lock);
4831 	INIT_LIST_HEAD(&vport->rcv_buffer_list);
4832 	spin_lock_init(&vport->work_port_lock);
4833 
4834 	timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0);
4835 
4836 	timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0);
4837 
4838 	timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0);
4839 
4840 	if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
4841 		lpfc_setup_bg(phba, shost);
4842 
4843 	error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
4844 	if (error)
4845 		goto out_free_vmid;
4846 
4847 	spin_lock_irq(&phba->port_list_lock);
4848 	list_add_tail(&vport->listentry, &phba->port_list);
4849 	spin_unlock_irq(&phba->port_list_lock);
4850 	return vport;
4851 
4852 out_free_vmid:
4853 	kfree(vport->vmid);
4854 	bitmap_free(vport->vmid_priority_range);
4855 out_put_shost:
4856 	scsi_host_put(shost);
4857 out:
4858 	return NULL;
4859 }
4860 
4861 /**
4862  * destroy_port -  destroy an FC port
4863  * @vport: pointer to an lpfc virtual N_Port data structure.
4864  *
4865  * This routine destroys a FC port from the upper layer protocol. All the
4866  * resources associated with the port are released.
4867  **/
4868 void
4869 destroy_port(struct lpfc_vport *vport)
4870 {
4871 	struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
4872 	struct lpfc_hba  *phba = vport->phba;
4873 
4874 	lpfc_debugfs_terminate(vport);
4875 	fc_remove_host(shost);
4876 	scsi_remove_host(shost);
4877 
4878 	spin_lock_irq(&phba->port_list_lock);
4879 	list_del_init(&vport->listentry);
4880 	spin_unlock_irq(&phba->port_list_lock);
4881 
4882 	lpfc_cleanup(vport);
4883 	return;
4884 }
4885 
4886 /**
4887  * lpfc_get_instance - Get a unique integer ID
4888  *
4889  * This routine allocates a unique integer ID from lpfc_hba_index pool. It
4890  * uses the kernel idr facility to perform the task.
4891  *
4892  * Return codes:
4893  *   instance - a unique integer ID allocated as the new instance.
4894  *   -1 - lpfc get instance failed.
4895  **/
4896 int
4897 lpfc_get_instance(void)
4898 {
4899 	int ret;
4900 
4901 	ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
4902 	return ret < 0 ? -1 : ret;
4903 }
4904 
4905 /**
4906  * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
4907  * @shost: pointer to SCSI host data structure.
4908  * @time: elapsed time of the scan in jiffies.
4909  *
4910  * This routine is called by the SCSI layer with a SCSI host to determine
4911  * whether the scan host is finished.
4912  *
4913  * Note: there is no scan_start function as adapter initialization will have
4914  * asynchronously kicked off the link initialization.
4915  *
4916  * Return codes
4917  *   0 - SCSI host scan is not over yet.
4918  *   1 - SCSI host scan is over.
4919  **/
4920 int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4921 {
4922 	struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4923 	struct lpfc_hba   *phba = vport->phba;
4924 	int stat = 0;
4925 
4926 	spin_lock_irq(shost->host_lock);
4927 
4928 	if (test_bit(FC_UNLOADING, &vport->load_flag)) {
4929 		stat = 1;
4930 		goto finished;
4931 	}
4932 	if (time >= secs_to_jiffies(30)) {
4933 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4934 				"0461 Scanning longer than 30 "
4935 				"seconds.  Continuing initialization\n");
4936 		stat = 1;
4937 		goto finished;
4938 	}
4939 	if (time >= secs_to_jiffies(15) &&
4940 	    phba->link_state <= LPFC_LINK_DOWN) {
4941 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4942 				"0465 Link down longer than 15 "
4943 				"seconds.  Continuing initialization\n");
4944 		stat = 1;
4945 		goto finished;
4946 	}
4947 
4948 	if (vport->port_state != LPFC_VPORT_READY)
4949 		goto finished;
4950 	if (vport->num_disc_nodes || vport->fc_prli_sent)
4951 		goto finished;
4952 	if (!atomic_read(&vport->fc_map_cnt) &&
4953 	    time < secs_to_jiffies(2))
4954 		goto finished;
4955 	if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
4956 		goto finished;
4957 
4958 	stat = 1;
4959 
4960 finished:
4961 	spin_unlock_irq(shost->host_lock);
4962 	return stat;
4963 }
4964 
4965 static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost)
4966 {
4967 	struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata;
4968 	struct lpfc_hba   *phba = vport->phba;
4969 
4970 	fc_host_supported_speeds(shost) = 0;
4971 	/*
4972 	 * Avoid reporting supported link speed for FCoE as it can't be
4973 	 * controlled via FCoE.
4974 	 */
4975 	if (test_bit(HBA_FCOE_MODE, &phba->hba_flag))
4976 		return;
4977 
4978 	if (phba->lmt & LMT_256Gb)
4979 		fc_host_supported_speeds(shost) |= FC_PORTSPEED_256GBIT;
4980 	if (phba->lmt & LMT_128Gb)
4981 		fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT;
4982 	if (phba->lmt & LMT_64Gb)
4983 		fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT;
4984 	if (phba->lmt & LMT_32Gb)
4985 		fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
4986 	if (phba->lmt & LMT_16Gb)
4987 		fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
4988 	if (phba->lmt & LMT_10Gb)
4989 		fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
4990 	if (phba->lmt & LMT_8Gb)
4991 		fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
4992 	if (phba->lmt & LMT_4Gb)
4993 		fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4994 	if (phba->lmt & LMT_2Gb)
4995 		fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4996 	if (phba->lmt & LMT_1Gb)
4997 		fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4998 }
4999 
5000 /**
5001  * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
5002  * @shost: pointer to SCSI host data structure.
5003  *
5004  * This routine initializes a given SCSI host attributes on a FC port. The
5005  * SCSI host can be either on top of a physical port or a virtual port.
5006  **/
5007 void lpfc_host_attrib_init(struct Scsi_Host *shost)
5008 {
5009 	struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
5010 	struct lpfc_hba   *phba = vport->phba;
5011 	/*
5012 	 * Set fixed host attributes.  Must done after lpfc_sli_hba_setup().
5013 	 */
5014 
5015 	fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
5016 	fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
5017 	fc_host_supported_classes(shost) = FC_COS_CLASS3;
5018 
5019 	memset(fc_host_supported_fc4s(shost), 0,
5020 	       sizeof(fc_host_supported_fc4s(shost)));
5021 	fc_host_supported_fc4s(shost)[2] = 1;
5022 	fc_host_supported_fc4s(shost)[7] = 1;
5023 
5024 	lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
5025 				 sizeof fc_host_symbolic_name(shost));
5026 
5027 	lpfc_host_supported_speeds_set(shost);
5028 
5029 	fc_host_maxframe_size(shost) =
5030 		(((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
5031 		(uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
5032 
5033 	fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
5034 
5035 	/* This value is also unchanging */
5036 	memset(fc_host_active_fc4s(shost), 0,
5037 	       sizeof(fc_host_active_fc4s(shost)));
5038 	fc_host_active_fc4s(shost)[2] = 1;
5039 	fc_host_active_fc4s(shost)[7] = 1;
5040 
5041 	fc_host_max_npiv_vports(shost) = phba->max_vpi;
5042 	clear_bit(FC_LOADING, &vport->load_flag);
5043 }
5044 
5045 /**
5046  * lpfc_stop_port_s3 - Stop SLI3 device port
5047  * @phba: pointer to lpfc hba data structure.
5048  *
5049  * This routine is invoked to stop an SLI3 device port, it stops the device
5050  * from generating interrupts and stops the device driver's timers for the
5051  * device.
5052  **/
5053 static void
5054 lpfc_stop_port_s3(struct lpfc_hba *phba)
5055 {
5056 	/* Clear all interrupt enable conditions */
5057 	writel(0, phba->HCregaddr);
5058 	readl(phba->HCregaddr); /* flush */
5059 	/* Clear all pending interrupts */
5060 	writel(0xffffffff, phba->HAregaddr);
5061 	readl(phba->HAregaddr); /* flush */
5062 
5063 	/* Reset some HBA SLI setup states */
5064 	lpfc_stop_hba_timers(phba);
5065 	phba->pport->work_port_events = 0;
5066 }
5067 
5068 /**
5069  * lpfc_stop_port_s4 - Stop SLI4 device port
5070  * @phba: pointer to lpfc hba data structure.
5071  *
5072  * This routine is invoked to stop an SLI4 device port, it stops the device
5073  * from generating interrupts and stops the device driver's timers for the
5074  * device.
5075  **/
5076 static void
5077 lpfc_stop_port_s4(struct lpfc_hba *phba)
5078 {
5079 	/* Reset some HBA SLI4 setup states */
5080 	lpfc_stop_hba_timers(phba);
5081 	if (phba->pport)
5082 		phba->pport->work_port_events = 0;
5083 	phba->sli4_hba.intr_enable = 0;
5084 }
5085 
5086 /**
5087  * lpfc_stop_port - Wrapper function for stopping hba port
5088  * @phba: Pointer to HBA context object.
5089  *
5090  * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
5091  * the API jump table function pointer from the lpfc_hba struct.
5092  **/
5093 void
5094 lpfc_stop_port(struct lpfc_hba *phba)
5095 {
5096 	phba->lpfc_stop_port(phba);
5097 
5098 	if (phba->wq)
5099 		flush_workqueue(phba->wq);
5100 }
5101 
5102 /**
5103  * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
5104  * @phba: Pointer to hba for which this call is being executed.
5105  *
5106  * This routine starts the timer waiting for the FCF rediscovery to complete.
5107  **/
5108 void
5109 lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
5110 {
5111 	unsigned long fcf_redisc_wait_tmo =
5112 		(jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
5113 	/* Start fcf rediscovery wait period timer */
5114 	mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
5115 	spin_lock_irq(&phba->hbalock);
5116 	/* Allow action to new fcf asynchronous event */
5117 	phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
5118 	/* Mark the FCF rediscovery pending state */
5119 	phba->fcf.fcf_flag |= FCF_REDISC_PEND;
5120 	spin_unlock_irq(&phba->hbalock);
5121 }
5122 
5123 /**
5124  * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
5125  * @t: Timer context used to obtain the pointer to lpfc hba data structure.
5126  *
5127  * This routine is invoked when waiting for FCF table rediscover has been
5128  * timed out. If new FCF record(s) has (have) been discovered during the
5129  * wait period, a new FCF event shall be added to the FCOE async event
5130  * list, and then worker thread shall be waked up for processing from the
5131  * worker thread context.
5132  **/
5133 static void
5134 lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t)
5135 {
5136 	struct lpfc_hba *phba = timer_container_of(phba, t, fcf.redisc_wait);
5137 
5138 	/* Don't send FCF rediscovery event if timer cancelled */
5139 	spin_lock_irq(&phba->hbalock);
5140 	if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
5141 		spin_unlock_irq(&phba->hbalock);
5142 		return;
5143 	}
5144 	/* Clear FCF rediscovery timer pending flag */
5145 	phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
5146 	/* FCF rediscovery event to worker thread */
5147 	phba->fcf.fcf_flag |= FCF_REDISC_EVT;
5148 	spin_unlock_irq(&phba->hbalock);
5149 	lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
5150 			"2776 FCF rediscover quiescent timer expired\n");
5151 	/* wake up worker thread */
5152 	lpfc_worker_wake_up(phba);
5153 }
5154 
5155 /**
5156  * lpfc_vmid_poll - VMID timeout detection
5157  * @t: Timer context used to obtain the pointer to lpfc hba data structure.
5158  *
5159  * This routine is invoked when there is no I/O on by a VM for the specified
5160  * amount of time. When this situation is detected, the VMID has to be
5161  * deregistered from the switch and all the local resources freed. The VMID
5162  * will be reassigned to the VM once the I/O begins.
5163  **/
5164 static void
5165 lpfc_vmid_poll(struct timer_list *t)
5166 {
5167 	struct lpfc_hba *phba = timer_container_of(phba, t,
5168 						   inactive_vmid_poll);
5169 	u32 wake_up = 0;
5170 
5171 	/* check if there is a need to issue QFPA */
5172 	if (phba->pport->vmid_priority_tagging) {
5173 		wake_up = 1;
5174 		phba->pport->work_port_events |= WORKER_CHECK_VMID_ISSUE_QFPA;
5175 	}
5176 
5177 	/* Is the vmid inactivity timer enabled */
5178 	if (phba->pport->vmid_inactivity_timeout ||
5179 	    test_bit(FC_DEREGISTER_ALL_APP_ID, &phba->pport->load_flag)) {
5180 		wake_up = 1;
5181 		phba->pport->work_port_events |= WORKER_CHECK_INACTIVE_VMID;
5182 	}
5183 
5184 	if (wake_up)
5185 		lpfc_worker_wake_up(phba);
5186 
5187 	/* restart the timer for the next iteration */
5188 	mod_timer(&phba->inactive_vmid_poll,
5189 		  jiffies + secs_to_jiffies(LPFC_VMID_TIMER));
5190 }
5191 
5192 /**
5193  * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
5194  * @phba: pointer to lpfc hba data structure.
5195  * @acqe_link: pointer to the async link completion queue entry.
5196  *
5197  * This routine is to parse the SLI4 link-attention link fault code.
5198  **/
5199 static void
5200 lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
5201 			   struct lpfc_acqe_link *acqe_link)
5202 {
5203 	switch (bf_get(lpfc_acqe_fc_la_att_type, acqe_link)) {
5204 	case LPFC_FC_LA_TYPE_LINK_DOWN:
5205 	case LPFC_FC_LA_TYPE_TRUNKING_EVENT:
5206 	case LPFC_FC_LA_TYPE_ACTIVATE_FAIL:
5207 	case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT:
5208 		break;
5209 	default:
5210 		switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
5211 		case LPFC_ASYNC_LINK_FAULT_NONE:
5212 		case LPFC_ASYNC_LINK_FAULT_LOCAL:
5213 		case LPFC_ASYNC_LINK_FAULT_REMOTE:
5214 		case LPFC_ASYNC_LINK_FAULT_LR_LRR:
5215 			break;
5216 		default:
5217 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5218 					"0398 Unknown link fault code: x%x\n",
5219 					bf_get(lpfc_acqe_link_fault, acqe_link));
5220 			break;
5221 		}
5222 		break;
5223 	}
5224 }
5225 
5226 /**
5227  * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5228  * @phba: pointer to lpfc hba data structure.
5229  * @acqe_link: pointer to the async link completion queue entry.
5230  *
5231  * This routine is to parse the SLI4 link attention type and translate it
5232  * into the base driver's link attention type coding.
5233  *
5234  * Return: Link attention type in terms of base driver's coding.
5235  **/
5236 static uint8_t
5237 lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
5238 			  struct lpfc_acqe_link *acqe_link)
5239 {
5240 	uint8_t att_type;
5241 
5242 	switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
5243 	case LPFC_ASYNC_LINK_STATUS_DOWN:
5244 	case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
5245 		att_type = LPFC_ATT_LINK_DOWN;
5246 		break;
5247 	case LPFC_ASYNC_LINK_STATUS_UP:
5248 		/* Ignore physical link up events - wait for logical link up */
5249 		att_type = LPFC_ATT_RESERVED;
5250 		break;
5251 	case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
5252 		att_type = LPFC_ATT_LINK_UP;
5253 		break;
5254 	default:
5255 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5256 				"0399 Invalid link attention type: x%x\n",
5257 				bf_get(lpfc_acqe_link_status, acqe_link));
5258 		att_type = LPFC_ATT_RESERVED;
5259 		break;
5260 	}
5261 	return att_type;
5262 }
5263 
5264 /**
5265  * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
5266  * @phba: pointer to lpfc hba data structure.
5267  *
5268  * This routine is to get an SLI3 FC port's link speed in Mbps.
5269  *
5270  * Return: link speed in terms of Mbps.
5271  **/
5272 uint32_t
5273 lpfc_sli_port_speed_get(struct lpfc_hba *phba)
5274 {
5275 	uint32_t link_speed;
5276 
5277 	if (!lpfc_is_link_up(phba))
5278 		return 0;
5279 
5280 	if (phba->sli_rev <= LPFC_SLI_REV3) {
5281 		switch (phba->fc_linkspeed) {
5282 		case LPFC_LINK_SPEED_1GHZ:
5283 			link_speed = 1000;
5284 			break;
5285 		case LPFC_LINK_SPEED_2GHZ:
5286 			link_speed = 2000;
5287 			break;
5288 		case LPFC_LINK_SPEED_4GHZ:
5289 			link_speed = 4000;
5290 			break;
5291 		case LPFC_LINK_SPEED_8GHZ:
5292 			link_speed = 8000;
5293 			break;
5294 		case LPFC_LINK_SPEED_10GHZ:
5295 			link_speed = 10000;
5296 			break;
5297 		case LPFC_LINK_SPEED_16GHZ:
5298 			link_speed = 16000;
5299 			break;
5300 		default:
5301 			link_speed = 0;
5302 		}
5303 	} else {
5304 		if (phba->sli4_hba.link_state.logical_speed)
5305 			link_speed =
5306 			      phba->sli4_hba.link_state.logical_speed;
5307 		else
5308 			link_speed = phba->sli4_hba.link_state.speed;
5309 	}
5310 	return link_speed;
5311 }
5312 
5313 /**
5314  * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
5315  * @phba: pointer to lpfc hba data structure.
5316  * @evt_code: asynchronous event code.
5317  * @speed_code: asynchronous event link speed code.
5318  *
5319  * This routine is to parse the giving SLI4 async event link speed code into
5320  * value of Mbps for the link speed.
5321  *
5322  * Return: link speed in terms of Mbps.
5323  **/
5324 static uint32_t
5325 lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
5326 			   uint8_t speed_code)
5327 {
5328 	uint32_t port_speed;
5329 
5330 	switch (evt_code) {
5331 	case LPFC_TRAILER_CODE_LINK:
5332 		switch (speed_code) {
5333 		case LPFC_ASYNC_LINK_SPEED_ZERO:
5334 			port_speed = 0;
5335 			break;
5336 		case LPFC_ASYNC_LINK_SPEED_10MBPS:
5337 			port_speed = 10;
5338 			break;
5339 		case LPFC_ASYNC_LINK_SPEED_100MBPS:
5340 			port_speed = 100;
5341 			break;
5342 		case LPFC_ASYNC_LINK_SPEED_1GBPS:
5343 			port_speed = 1000;
5344 			break;
5345 		case LPFC_ASYNC_LINK_SPEED_10GBPS:
5346 			port_speed = 10000;
5347 			break;
5348 		case LPFC_ASYNC_LINK_SPEED_20GBPS:
5349 			port_speed = 20000;
5350 			break;
5351 		case LPFC_ASYNC_LINK_SPEED_25GBPS:
5352 			port_speed = 25000;
5353 			break;
5354 		case LPFC_ASYNC_LINK_SPEED_40GBPS:
5355 			port_speed = 40000;
5356 			break;
5357 		case LPFC_ASYNC_LINK_SPEED_100GBPS:
5358 			port_speed = 100000;
5359 			break;
5360 		default:
5361 			port_speed = 0;
5362 		}
5363 		break;
5364 	case LPFC_TRAILER_CODE_FC:
5365 		switch (speed_code) {
5366 		case LPFC_FC_LA_SPEED_UNKNOWN:
5367 			port_speed = 0;
5368 			break;
5369 		case LPFC_FC_LA_SPEED_1G:
5370 			port_speed = 1000;
5371 			break;
5372 		case LPFC_FC_LA_SPEED_2G:
5373 			port_speed = 2000;
5374 			break;
5375 		case LPFC_FC_LA_SPEED_4G:
5376 			port_speed = 4000;
5377 			break;
5378 		case LPFC_FC_LA_SPEED_8G:
5379 			port_speed = 8000;
5380 			break;
5381 		case LPFC_FC_LA_SPEED_10G:
5382 			port_speed = 10000;
5383 			break;
5384 		case LPFC_FC_LA_SPEED_16G:
5385 			port_speed = 16000;
5386 			break;
5387 		case LPFC_FC_LA_SPEED_32G:
5388 			port_speed = 32000;
5389 			break;
5390 		case LPFC_FC_LA_SPEED_64G:
5391 			port_speed = 64000;
5392 			break;
5393 		case LPFC_FC_LA_SPEED_128G:
5394 			port_speed = 128000;
5395 			break;
5396 		case LPFC_FC_LA_SPEED_256G:
5397 			port_speed = 256000;
5398 			break;
5399 		default:
5400 			port_speed = 0;
5401 		}
5402 		break;
5403 	default:
5404 		port_speed = 0;
5405 	}
5406 	return port_speed;
5407 }
5408 
5409 /**
5410  * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
5411  * @phba: pointer to lpfc hba data structure.
5412  * @acqe_link: pointer to the async link completion queue entry.
5413  *
5414  * This routine is to handle the SLI4 asynchronous FCoE link event.
5415  **/
5416 static void
5417 lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
5418 			 struct lpfc_acqe_link *acqe_link)
5419 {
5420 	LPFC_MBOXQ_t *pmb;
5421 	MAILBOX_t *mb;
5422 	struct lpfc_mbx_read_top *la;
5423 	uint8_t att_type;
5424 	int rc;
5425 
5426 	att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
5427 	if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
5428 		return;
5429 	phba->fcoe_eventtag = acqe_link->event_tag;
5430 	pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5431 	if (!pmb) {
5432 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5433 				"0395 The mboxq allocation failed\n");
5434 		return;
5435 	}
5436 
5437 	rc = lpfc_mbox_rsrc_prep(phba, pmb);
5438 	if (rc) {
5439 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5440 				"0396 mailbox allocation failed\n");
5441 		goto out_free_pmb;
5442 	}
5443 
5444 	/* Cleanup any outstanding ELS commands */
5445 	lpfc_els_flush_all_cmd(phba);
5446 
5447 	/* Block ELS IOCBs until we have done process link event */
5448 	phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
5449 
5450 	/* Update link event statistics */
5451 	phba->sli.slistat.link_event++;
5452 
5453 	/* Create lpfc_handle_latt mailbox command from link ACQE */
5454 	lpfc_read_topology(phba, pmb, pmb->ctx_buf);
5455 	pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
5456 	pmb->vport = phba->pport;
5457 
5458 	/* Keep the link status for extra SLI4 state machine reference */
5459 	phba->sli4_hba.link_state.speed =
5460 			lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
5461 				bf_get(lpfc_acqe_link_speed, acqe_link));
5462 	phba->sli4_hba.link_state.duplex =
5463 				bf_get(lpfc_acqe_link_duplex, acqe_link);
5464 	phba->sli4_hba.link_state.status =
5465 				bf_get(lpfc_acqe_link_status, acqe_link);
5466 	phba->sli4_hba.link_state.type =
5467 				bf_get(lpfc_acqe_link_type, acqe_link);
5468 	phba->sli4_hba.link_state.number =
5469 				bf_get(lpfc_acqe_link_number, acqe_link);
5470 	phba->sli4_hba.link_state.fault =
5471 				bf_get(lpfc_acqe_link_fault, acqe_link);
5472 	phba->sli4_hba.link_state.logical_speed =
5473 			bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
5474 
5475 	lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5476 			"2900 Async FC/FCoE Link event - Speed:%dGBit "
5477 			"duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
5478 			"Logical speed:%dMbps Fault:%d\n",
5479 			phba->sli4_hba.link_state.speed,
5480 			phba->sli4_hba.link_state.topology,
5481 			phba->sli4_hba.link_state.status,
5482 			phba->sli4_hba.link_state.type,
5483 			phba->sli4_hba.link_state.number,
5484 			phba->sli4_hba.link_state.logical_speed,
5485 			phba->sli4_hba.link_state.fault);
5486 	/*
5487 	 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
5488 	 * topology info. Note: Optional for non FC-AL ports.
5489 	 */
5490 	if (!test_bit(HBA_FCOE_MODE, &phba->hba_flag)) {
5491 		rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
5492 		if (rc == MBX_NOT_FINISHED)
5493 			goto out_free_pmb;
5494 		return;
5495 	}
5496 	/*
5497 	 * For FCoE Mode: fill in all the topology information we need and call
5498 	 * the READ_TOPOLOGY completion routine to continue without actually
5499 	 * sending the READ_TOPOLOGY mailbox command to the port.
5500 	 */
5501 	/* Initialize completion status */
5502 	mb = &pmb->u.mb;
5503 	mb->mbxStatus = MBX_SUCCESS;
5504 
5505 	/* Parse port fault information field */
5506 	lpfc_sli4_parse_latt_fault(phba, acqe_link);
5507 
5508 	/* Parse and translate link attention fields */
5509 	la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
5510 	la->eventTag = acqe_link->event_tag;
5511 	bf_set(lpfc_mbx_read_top_att_type, la, att_type);
5512 	bf_set(lpfc_mbx_read_top_link_spd, la,
5513 	       (bf_get(lpfc_acqe_link_speed, acqe_link)));
5514 
5515 	/* Fake the following irrelevant fields */
5516 	bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
5517 	bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
5518 	bf_set(lpfc_mbx_read_top_il, la, 0);
5519 	bf_set(lpfc_mbx_read_top_pb, la, 0);
5520 	bf_set(lpfc_mbx_read_top_fa, la, 0);
5521 	bf_set(lpfc_mbx_read_top_mm, la, 0);
5522 
5523 	/* Invoke the lpfc_handle_latt mailbox command callback function */
5524 	lpfc_mbx_cmpl_read_topology(phba, pmb);
5525 
5526 	return;
5527 
5528 out_free_pmb:
5529 	lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
5530 }
5531 
5532 /**
5533  * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read
5534  * topology.
5535  * @phba: pointer to lpfc hba data structure.
5536  * @speed_code: asynchronous event link speed code.
5537  *
5538  * This routine is to parse the giving SLI4 async event link speed code into
5539  * value of Read topology link speed.
5540  *
5541  * Return: link speed in terms of Read topology.
5542  **/
5543 static uint8_t
5544 lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code)
5545 {
5546 	uint8_t port_speed;
5547 
5548 	switch (speed_code) {
5549 	case LPFC_FC_LA_SPEED_1G:
5550 		port_speed = LPFC_LINK_SPEED_1GHZ;
5551 		break;
5552 	case LPFC_FC_LA_SPEED_2G:
5553 		port_speed = LPFC_LINK_SPEED_2GHZ;
5554 		break;
5555 	case LPFC_FC_LA_SPEED_4G:
5556 		port_speed = LPFC_LINK_SPEED_4GHZ;
5557 		break;
5558 	case LPFC_FC_LA_SPEED_8G:
5559 		port_speed = LPFC_LINK_SPEED_8GHZ;
5560 		break;
5561 	case LPFC_FC_LA_SPEED_16G:
5562 		port_speed = LPFC_LINK_SPEED_16GHZ;
5563 		break;
5564 	case LPFC_FC_LA_SPEED_32G:
5565 		port_speed = LPFC_LINK_SPEED_32GHZ;
5566 		break;
5567 	case LPFC_FC_LA_SPEED_64G:
5568 		port_speed = LPFC_LINK_SPEED_64GHZ;
5569 		break;
5570 	case LPFC_FC_LA_SPEED_128G:
5571 		port_speed = LPFC_LINK_SPEED_128GHZ;
5572 		break;
5573 	case LPFC_FC_LA_SPEED_256G:
5574 		port_speed = LPFC_LINK_SPEED_256GHZ;
5575 		break;
5576 	default:
5577 		port_speed = 0;
5578 		break;
5579 	}
5580 
5581 	return port_speed;
5582 }
5583 
5584 void
5585 lpfc_cgn_dump_rxmonitor(struct lpfc_hba *phba)
5586 {
5587 	if (!phba->rx_monitor) {
5588 		lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5589 				"4411 Rx Monitor Info is empty.\n");
5590 	} else {
5591 		lpfc_rx_monitor_report(phba, phba->rx_monitor, NULL, 0,
5592 				       LPFC_MAX_RXMONITOR_DUMP);
5593 	}
5594 }
5595 
5596 /**
5597  * lpfc_cgn_update_stat - Save data into congestion stats buffer
5598  * @phba: pointer to lpfc hba data structure.
5599  * @dtag: FPIN descriptor received
5600  *
5601  * Increment the FPIN received counter/time when it happens.
5602  */
5603 void
5604 lpfc_cgn_update_stat(struct lpfc_hba *phba, uint32_t dtag)
5605 {
5606 	struct lpfc_cgn_info *cp;
5607 	u32 value;
5608 
5609 	/* Make sure we have a congestion info buffer */
5610 	if (!phba->cgn_i)
5611 		return;
5612 	cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
5613 
5614 	/* Update congestion statistics */
5615 	switch (dtag) {
5616 	case ELS_DTAG_LNK_INTEGRITY:
5617 		le32_add_cpu(&cp->link_integ_notification, 1);
5618 		lpfc_cgn_update_tstamp(phba, &cp->stat_lnk);
5619 		break;
5620 	case ELS_DTAG_DELIVERY:
5621 		le32_add_cpu(&cp->delivery_notification, 1);
5622 		lpfc_cgn_update_tstamp(phba, &cp->stat_delivery);
5623 		break;
5624 	case ELS_DTAG_PEER_CONGEST:
5625 		le32_add_cpu(&cp->cgn_peer_notification, 1);
5626 		lpfc_cgn_update_tstamp(phba, &cp->stat_peer);
5627 		break;
5628 	case ELS_DTAG_CONGESTION:
5629 		le32_add_cpu(&cp->cgn_notification, 1);
5630 		lpfc_cgn_update_tstamp(phba, &cp->stat_fpin);
5631 	}
5632 	if (phba->cgn_fpin_frequency &&
5633 	    phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) {
5634 		value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency;
5635 		cp->cgn_stat_npm = value;
5636 	}
5637 
5638 	value = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
5639 				    LPFC_CGN_CRC32_SEED);
5640 	cp->cgn_info_crc = cpu_to_le32(value);
5641 }
5642 
5643 /**
5644  * lpfc_cgn_update_tstamp - Update cmf timestamp
5645  * @phba: pointer to lpfc hba data structure.
5646  * @ts: structure to write the timestamp to.
5647  */
5648 void
5649 lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts)
5650 {
5651 	struct timespec64 cur_time;
5652 	struct tm tm_val;
5653 
5654 	ktime_get_real_ts64(&cur_time);
5655 	time64_to_tm(cur_time.tv_sec, 0, &tm_val);
5656 
5657 	ts->month = tm_val.tm_mon + 1;
5658 	ts->day	= tm_val.tm_mday;
5659 	ts->year = tm_val.tm_year - 100;
5660 	ts->hour = tm_val.tm_hour;
5661 	ts->minute = tm_val.tm_min;
5662 	ts->second = tm_val.tm_sec;
5663 
5664 	lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5665 			"2646 Updated CMF timestamp : "
5666 			"%u/%u/%u %u:%u:%u\n",
5667 			ts->day, ts->month,
5668 			ts->year, ts->hour,
5669 			ts->minute, ts->second);
5670 }
5671 
5672 /**
5673  * lpfc_cmf_stats_timer - Save data into registered congestion buffer
5674  * @timer: Timer cookie to access lpfc private data
5675  *
5676  * Save the congestion event data every minute.
5677  * On the hour collapse all the minute data into hour data. Every day
5678  * collapse all the hour data into daily data. Separate driver
5679  * and fabrc congestion event counters that will be saved out
5680  * to the registered congestion buffer every minute.
5681  */
5682 static enum hrtimer_restart
5683 lpfc_cmf_stats_timer(struct hrtimer *timer)
5684 {
5685 	struct lpfc_hba *phba;
5686 	struct lpfc_cgn_info *cp;
5687 	uint32_t i, index;
5688 	uint16_t value, mvalue;
5689 	uint64_t bps;
5690 	uint32_t mbps;
5691 	uint32_t dvalue, wvalue, lvalue, avalue;
5692 	uint64_t latsum;
5693 	__le16 *ptr;
5694 	__le32 *lptr;
5695 	__le16 *mptr;
5696 
5697 	phba = container_of(timer, struct lpfc_hba, cmf_stats_timer);
5698 	/* Make sure we have a congestion info buffer */
5699 	if (!phba->cgn_i)
5700 		return HRTIMER_NORESTART;
5701 	cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
5702 
5703 	phba->cgn_evt_timestamp = jiffies +
5704 			msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN);
5705 	phba->cgn_evt_minute++;
5706 
5707 	/* We should get to this point in the routine on 1 minute intervals */
5708 	lpfc_cgn_update_tstamp(phba, &cp->base_time);
5709 
5710 	if (phba->cgn_fpin_frequency &&
5711 	    phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) {
5712 		value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency;
5713 		cp->cgn_stat_npm = value;
5714 	}
5715 
5716 	/* Read and clear the latency counters for this minute */
5717 	lvalue = atomic_read(&phba->cgn_latency_evt_cnt);
5718 	latsum = atomic64_read(&phba->cgn_latency_evt);
5719 	atomic_set(&phba->cgn_latency_evt_cnt, 0);
5720 	atomic64_set(&phba->cgn_latency_evt, 0);
5721 
5722 	/* We need to store MB/sec bandwidth in the congestion information.
5723 	 * block_cnt is count of 512 byte blocks for the entire minute,
5724 	 * bps will get bytes per sec before finally converting to MB/sec.
5725 	 */
5726 	bps = div_u64(phba->rx_block_cnt, LPFC_SEC_MIN) * 512;
5727 	phba->rx_block_cnt = 0;
5728 	mvalue = bps / (1024 * 1024); /* convert to MB/sec */
5729 
5730 	/* Every minute */
5731 	/* cgn parameters */
5732 	cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
5733 	cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
5734 	cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
5735 	cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
5736 
5737 	/* Fill in default LUN qdepth */
5738 	value = (uint16_t)(phba->pport->cfg_lun_queue_depth);
5739 	cp->cgn_lunq = cpu_to_le16(value);
5740 
5741 	/* Record congestion buffer info - every minute
5742 	 * cgn_driver_evt_cnt (Driver events)
5743 	 * cgn_fabric_warn_cnt (Congestion Warnings)
5744 	 * cgn_latency_evt_cnt / cgn_latency_evt (IO Latency)
5745 	 * cgn_fabric_alarm_cnt (Congestion Alarms)
5746 	 */
5747 	index = ++cp->cgn_index_minute;
5748 	if (cp->cgn_index_minute == LPFC_MIN_HOUR) {
5749 		cp->cgn_index_minute = 0;
5750 		index = 0;
5751 	}
5752 
5753 	/* Get the number of driver events in this sample and reset counter */
5754 	dvalue = atomic_read(&phba->cgn_driver_evt_cnt);
5755 	atomic_set(&phba->cgn_driver_evt_cnt, 0);
5756 
5757 	/* Get the number of warning events - FPIN and Signal for this minute */
5758 	wvalue = 0;
5759 	if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_WARN) ||
5760 	    phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY ||
5761 	    phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM)
5762 		wvalue = atomic_read(&phba->cgn_fabric_warn_cnt);
5763 	atomic_set(&phba->cgn_fabric_warn_cnt, 0);
5764 
5765 	/* Get the number of alarm events - FPIN and Signal for this minute */
5766 	avalue = 0;
5767 	if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_ALARM) ||
5768 	    phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM)
5769 		avalue = atomic_read(&phba->cgn_fabric_alarm_cnt);
5770 	atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
5771 
5772 	/* Collect the driver, warning, alarm and latency counts for this
5773 	 * minute into the driver congestion buffer.
5774 	 */
5775 	ptr = &cp->cgn_drvr_min[index];
5776 	value = (uint16_t)dvalue;
5777 	*ptr = cpu_to_le16(value);
5778 
5779 	ptr = &cp->cgn_warn_min[index];
5780 	value = (uint16_t)wvalue;
5781 	*ptr = cpu_to_le16(value);
5782 
5783 	ptr = &cp->cgn_alarm_min[index];
5784 	value = (uint16_t)avalue;
5785 	*ptr = cpu_to_le16(value);
5786 
5787 	lptr = &cp->cgn_latency_min[index];
5788 	if (lvalue) {
5789 		lvalue = (uint32_t)div_u64(latsum, lvalue);
5790 		*lptr = cpu_to_le32(lvalue);
5791 	} else {
5792 		*lptr = 0;
5793 	}
5794 
5795 	/* Collect the bandwidth value into the driver's congesion buffer. */
5796 	mptr = &cp->cgn_bw_min[index];
5797 	*mptr = cpu_to_le16(mvalue);
5798 
5799 	lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5800 			"2418 Congestion Info - minute (%d): %d %d %d %d %d\n",
5801 			index, dvalue, wvalue, *lptr, mvalue, avalue);
5802 
5803 	/* Every hour */
5804 	if ((phba->cgn_evt_minute % LPFC_MIN_HOUR) == 0) {
5805 		/* Record congestion buffer info - every hour
5806 		 * Collapse all minutes into an hour
5807 		 */
5808 		index = ++cp->cgn_index_hour;
5809 		if (cp->cgn_index_hour == LPFC_HOUR_DAY) {
5810 			cp->cgn_index_hour = 0;
5811 			index = 0;
5812 		}
5813 
5814 		dvalue = 0;
5815 		wvalue = 0;
5816 		lvalue = 0;
5817 		avalue = 0;
5818 		mvalue = 0;
5819 		mbps = 0;
5820 		for (i = 0; i < LPFC_MIN_HOUR; i++) {
5821 			dvalue += le16_to_cpu(cp->cgn_drvr_min[i]);
5822 			wvalue += le16_to_cpu(cp->cgn_warn_min[i]);
5823 			lvalue += le32_to_cpu(cp->cgn_latency_min[i]);
5824 			mbps += le16_to_cpu(cp->cgn_bw_min[i]);
5825 			avalue += le16_to_cpu(cp->cgn_alarm_min[i]);
5826 		}
5827 		if (lvalue)		/* Avg of latency averages */
5828 			lvalue /= LPFC_MIN_HOUR;
5829 		if (mbps)		/* Avg of Bandwidth averages */
5830 			mvalue = mbps / LPFC_MIN_HOUR;
5831 
5832 		lptr = &cp->cgn_drvr_hr[index];
5833 		*lptr = cpu_to_le32(dvalue);
5834 		lptr = &cp->cgn_warn_hr[index];
5835 		*lptr = cpu_to_le32(wvalue);
5836 		lptr = &cp->cgn_latency_hr[index];
5837 		*lptr = cpu_to_le32(lvalue);
5838 		mptr = &cp->cgn_bw_hr[index];
5839 		*mptr = cpu_to_le16(mvalue);
5840 		lptr = &cp->cgn_alarm_hr[index];
5841 		*lptr = cpu_to_le32(avalue);
5842 
5843 		lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5844 				"2419 Congestion Info - hour "
5845 				"(%d): %d %d %d %d %d\n",
5846 				index, dvalue, wvalue, lvalue, mvalue, avalue);
5847 	}
5848 
5849 	/* Every day */
5850 	if ((phba->cgn_evt_minute % LPFC_MIN_DAY) == 0) {
5851 		/* Record congestion buffer info - every hour
5852 		 * Collapse all hours into a day. Rotate days
5853 		 * after LPFC_MAX_CGN_DAYS.
5854 		 */
5855 		index = ++cp->cgn_index_day;
5856 		if (cp->cgn_index_day == LPFC_MAX_CGN_DAYS) {
5857 			cp->cgn_index_day = 0;
5858 			index = 0;
5859 		}
5860 
5861 		dvalue = 0;
5862 		wvalue = 0;
5863 		lvalue = 0;
5864 		mvalue = 0;
5865 		mbps = 0;
5866 		avalue = 0;
5867 		for (i = 0; i < LPFC_HOUR_DAY; i++) {
5868 			dvalue += le32_to_cpu(cp->cgn_drvr_hr[i]);
5869 			wvalue += le32_to_cpu(cp->cgn_warn_hr[i]);
5870 			lvalue += le32_to_cpu(cp->cgn_latency_hr[i]);
5871 			mbps += le16_to_cpu(cp->cgn_bw_hr[i]);
5872 			avalue += le32_to_cpu(cp->cgn_alarm_hr[i]);
5873 		}
5874 		if (lvalue)		/* Avg of latency averages */
5875 			lvalue /= LPFC_HOUR_DAY;
5876 		if (mbps)		/* Avg of Bandwidth averages */
5877 			mvalue = mbps / LPFC_HOUR_DAY;
5878 
5879 		lptr = &cp->cgn_drvr_day[index];
5880 		*lptr = cpu_to_le32(dvalue);
5881 		lptr = &cp->cgn_warn_day[index];
5882 		*lptr = cpu_to_le32(wvalue);
5883 		lptr = &cp->cgn_latency_day[index];
5884 		*lptr = cpu_to_le32(lvalue);
5885 		mptr = &cp->cgn_bw_day[index];
5886 		*mptr = cpu_to_le16(mvalue);
5887 		lptr = &cp->cgn_alarm_day[index];
5888 		*lptr = cpu_to_le32(avalue);
5889 
5890 		lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5891 				"2420 Congestion Info - daily (%d): "
5892 				"%d %d %d %d %d\n",
5893 				index, dvalue, wvalue, lvalue, mvalue, avalue);
5894 	}
5895 
5896 	/* Use the frequency found in the last rcv'ed FPIN */
5897 	value = phba->cgn_fpin_frequency;
5898 	cp->cgn_warn_freq = cpu_to_le16(value);
5899 	cp->cgn_alarm_freq = cpu_to_le16(value);
5900 
5901 	lvalue = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
5902 				     LPFC_CGN_CRC32_SEED);
5903 	cp->cgn_info_crc = cpu_to_le32(lvalue);
5904 
5905 	hrtimer_forward_now(timer, ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC));
5906 
5907 	return HRTIMER_RESTART;
5908 }
5909 
5910 /**
5911  * lpfc_calc_cmf_latency - latency from start of rxate timer interval
5912  * @phba: The Hba for which this call is being executed.
5913  *
5914  * The routine calculates the latency from the beginning of the CMF timer
5915  * interval to the current point in time. It is called from IO completion
5916  * when we exceed our Bandwidth limitation for the time interval.
5917  */
5918 uint32_t
5919 lpfc_calc_cmf_latency(struct lpfc_hba *phba)
5920 {
5921 	struct timespec64 cmpl_time;
5922 	uint32_t msec = 0;
5923 
5924 	ktime_get_real_ts64(&cmpl_time);
5925 
5926 	/* This routine works on a ms granularity so sec and usec are
5927 	 * converted accordingly.
5928 	 */
5929 	if (cmpl_time.tv_sec == phba->cmf_latency.tv_sec) {
5930 		msec = (cmpl_time.tv_nsec - phba->cmf_latency.tv_nsec) /
5931 			NSEC_PER_MSEC;
5932 	} else {
5933 		if (cmpl_time.tv_nsec >= phba->cmf_latency.tv_nsec) {
5934 			msec = (cmpl_time.tv_sec -
5935 				phba->cmf_latency.tv_sec) * MSEC_PER_SEC;
5936 			msec += ((cmpl_time.tv_nsec -
5937 				  phba->cmf_latency.tv_nsec) / NSEC_PER_MSEC);
5938 		} else {
5939 			msec = (cmpl_time.tv_sec - phba->cmf_latency.tv_sec -
5940 				1) * MSEC_PER_SEC;
5941 			msec += (((NSEC_PER_SEC - phba->cmf_latency.tv_nsec) +
5942 				 cmpl_time.tv_nsec) / NSEC_PER_MSEC);
5943 		}
5944 	}
5945 	return msec;
5946 }
5947 
5948 /**
5949  * lpfc_cmf_timer -  This is the timer function for one congestion
5950  * rate interval.
5951  * @timer: Pointer to the high resolution timer that expired
5952  */
5953 static enum hrtimer_restart
5954 lpfc_cmf_timer(struct hrtimer *timer)
5955 {
5956 	struct lpfc_hba *phba = container_of(timer, struct lpfc_hba,
5957 					     cmf_timer);
5958 	struct rx_info_entry entry;
5959 	uint32_t io_cnt;
5960 	uint32_t busy, max_read;
5961 	uint64_t total, rcv, lat, mbpi, extra, cnt;
5962 	int timer_interval = LPFC_CMF_INTERVAL;
5963 	uint32_t ms;
5964 	struct lpfc_cgn_stat *cgs;
5965 	int cpu;
5966 
5967 	/* Only restart the timer if congestion mgmt is on */
5968 	if (phba->cmf_active_mode == LPFC_CFG_OFF ||
5969 	    !phba->cmf_latency.tv_sec) {
5970 		lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5971 				"6224 CMF timer exit: %d %lld\n",
5972 				phba->cmf_active_mode,
5973 				(uint64_t)phba->cmf_latency.tv_sec);
5974 		return HRTIMER_NORESTART;
5975 	}
5976 
5977 	/* If pport is not ready yet, just exit and wait for
5978 	 * the next timer cycle to hit.
5979 	 */
5980 	if (!phba->pport)
5981 		goto skip;
5982 
5983 	/* Do not block SCSI IO while in the timer routine since
5984 	 * total_bytes will be cleared
5985 	 */
5986 	atomic_set(&phba->cmf_stop_io, 1);
5987 
5988 	/* First we need to calculate the actual ms between
5989 	 * the last timer interrupt and this one. We ask for
5990 	 * LPFC_CMF_INTERVAL, however the actual time may
5991 	 * vary depending on system overhead.
5992 	 */
5993 	ms = lpfc_calc_cmf_latency(phba);
5994 
5995 
5996 	/* Immediately after we calculate the time since the last
5997 	 * timer interrupt, set the start time for the next
5998 	 * interrupt
5999 	 */
6000 	ktime_get_real_ts64(&phba->cmf_latency);
6001 
6002 	phba->cmf_link_byte_count =
6003 		div_u64(phba->cmf_max_line_rate * LPFC_CMF_INTERVAL, 1000);
6004 
6005 	/* Collect all the stats from the prior timer interval */
6006 	total = 0;
6007 	io_cnt = 0;
6008 	lat = 0;
6009 	rcv = 0;
6010 	for_each_present_cpu(cpu) {
6011 		cgs = per_cpu_ptr(phba->cmf_stat, cpu);
6012 		total += atomic64_xchg(&cgs->total_bytes, 0);
6013 		io_cnt += atomic_xchg(&cgs->rx_io_cnt, 0);
6014 		lat += atomic64_xchg(&cgs->rx_latency, 0);
6015 		rcv += atomic64_xchg(&cgs->rcv_bytes, 0);
6016 	}
6017 
6018 	/* Before we issue another CMF_SYNC_WQE, retrieve the BW
6019 	 * returned from the last CMF_SYNC_WQE issued, from
6020 	 * cmf_last_sync_bw. This will be the target BW for
6021 	 * this next timer interval.
6022 	 */
6023 	if (phba->cmf_active_mode == LPFC_CFG_MANAGED &&
6024 	    phba->link_state != LPFC_LINK_DOWN &&
6025 	    test_bit(HBA_SETUP, &phba->hba_flag)) {
6026 		mbpi = phba->cmf_last_sync_bw;
6027 		phba->cmf_last_sync_bw = 0;
6028 		extra = 0;
6029 
6030 		/* Calculate any extra bytes needed to account for the
6031 		 * timer accuracy. If we are less than LPFC_CMF_INTERVAL
6032 		 * calculate the adjustment needed for total to reflect
6033 		 * a full LPFC_CMF_INTERVAL.
6034 		 */
6035 		if (ms && ms < LPFC_CMF_INTERVAL) {
6036 			cnt = div_u64(total, ms); /* bytes per ms */
6037 			cnt *= LPFC_CMF_INTERVAL; /* what total should be */
6038 			extra = cnt - total;
6039 		}
6040 		lpfc_issue_cmf_sync_wqe(phba, LPFC_CMF_INTERVAL, total + extra);
6041 	} else {
6042 		/* For Monitor mode or link down we want mbpi
6043 		 * to be the full link speed
6044 		 */
6045 		mbpi = phba->cmf_link_byte_count;
6046 		extra = 0;
6047 	}
6048 	phba->cmf_timer_cnt++;
6049 
6050 	if (io_cnt) {
6051 		/* Update congestion info buffer latency in us */
6052 		atomic_add(io_cnt, &phba->cgn_latency_evt_cnt);
6053 		atomic64_add(lat, &phba->cgn_latency_evt);
6054 	}
6055 	busy = atomic_xchg(&phba->cmf_busy, 0);
6056 	max_read = atomic_xchg(&phba->rx_max_read_cnt, 0);
6057 
6058 	/* Calculate MBPI for the next timer interval */
6059 	if (mbpi) {
6060 		if (mbpi > phba->cmf_link_byte_count ||
6061 		    phba->cmf_active_mode == LPFC_CFG_MONITOR)
6062 			mbpi = phba->cmf_link_byte_count;
6063 
6064 		/* Change max_bytes_per_interval to what the prior
6065 		 * CMF_SYNC_WQE cmpl indicated.
6066 		 */
6067 		if (mbpi != phba->cmf_max_bytes_per_interval)
6068 			phba->cmf_max_bytes_per_interval = mbpi;
6069 	}
6070 
6071 	/* Save rxmonitor information for debug */
6072 	if (phba->rx_monitor) {
6073 		entry.total_bytes = total;
6074 		entry.cmf_bytes = total + extra;
6075 		entry.rcv_bytes = rcv;
6076 		entry.cmf_busy = busy;
6077 		entry.cmf_info = phba->cmf_active_info;
6078 		if (io_cnt) {
6079 			entry.avg_io_latency = div_u64(lat, io_cnt);
6080 			entry.avg_io_size = div_u64(rcv, io_cnt);
6081 		} else {
6082 			entry.avg_io_latency = 0;
6083 			entry.avg_io_size = 0;
6084 		}
6085 		entry.max_read_cnt = max_read;
6086 		entry.io_cnt = io_cnt;
6087 		entry.max_bytes_per_interval = mbpi;
6088 		if (phba->cmf_active_mode == LPFC_CFG_MANAGED)
6089 			entry.timer_utilization = phba->cmf_last_ts;
6090 		else
6091 			entry.timer_utilization = ms;
6092 		entry.timer_interval = ms;
6093 		phba->cmf_last_ts = 0;
6094 
6095 		lpfc_rx_monitor_record(phba->rx_monitor, &entry);
6096 	}
6097 
6098 	if (phba->cmf_active_mode == LPFC_CFG_MONITOR) {
6099 		/* If Monitor mode, check if we are oversubscribed
6100 		 * against the full line rate.
6101 		 */
6102 		if (mbpi && total > mbpi)
6103 			atomic_inc(&phba->cgn_driver_evt_cnt);
6104 	}
6105 	phba->rx_block_cnt += div_u64(rcv, 512);  /* save 512 byte block cnt */
6106 
6107 	/* Since total_bytes has already been zero'ed, its okay to unblock
6108 	 * after max_bytes_per_interval is setup.
6109 	 */
6110 	if (atomic_xchg(&phba->cmf_bw_wait, 0))
6111 		queue_work(phba->wq, &phba->unblock_request_work);
6112 
6113 	/* SCSI IO is now unblocked */
6114 	atomic_set(&phba->cmf_stop_io, 0);
6115 
6116 skip:
6117 	hrtimer_forward_now(timer,
6118 			    ktime_set(0, timer_interval * NSEC_PER_MSEC));
6119 	return HRTIMER_RESTART;
6120 }
6121 
6122 #define trunk_link_status(__idx)\
6123 	bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
6124 	       ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\
6125 		"Link up" : "Link down") : "NA"
6126 /* Did port __idx reported an error */
6127 #define trunk_port_fault(__idx)\
6128 	bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
6129 	       (port_fault & (1 << __idx) ? "YES" : "NO") : "NA"
6130 
6131 static void
6132 lpfc_update_trunk_link_status(struct lpfc_hba *phba,
6133 			      struct lpfc_acqe_fc_la *acqe_fc)
6134 {
6135 	uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc);
6136 	uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc);
6137 	u8 cnt = 0;
6138 
6139 	phba->sli4_hba.link_state.speed =
6140 		lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
6141 				bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6142 
6143 	phba->sli4_hba.link_state.logical_speed =
6144 				bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
6145 	/* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */
6146 	phba->fc_linkspeed =
6147 		 lpfc_async_link_speed_to_read_top(
6148 				phba,
6149 				bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6150 
6151 	if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) {
6152 		phba->trunk_link.link0.state =
6153 			bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc)
6154 			? LPFC_LINK_UP : LPFC_LINK_DOWN;
6155 		phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0;
6156 		cnt++;
6157 	}
6158 	if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) {
6159 		phba->trunk_link.link1.state =
6160 			bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc)
6161 			? LPFC_LINK_UP : LPFC_LINK_DOWN;
6162 		phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0;
6163 		cnt++;
6164 	}
6165 	if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) {
6166 		phba->trunk_link.link2.state =
6167 			bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc)
6168 			? LPFC_LINK_UP : LPFC_LINK_DOWN;
6169 		phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0;
6170 		cnt++;
6171 	}
6172 	if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) {
6173 		phba->trunk_link.link3.state =
6174 			bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc)
6175 			? LPFC_LINK_UP : LPFC_LINK_DOWN;
6176 		phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0;
6177 		cnt++;
6178 	}
6179 
6180 	if (cnt)
6181 		phba->trunk_link.phy_lnk_speed =
6182 			phba->sli4_hba.link_state.logical_speed / (cnt * 1000);
6183 	else
6184 		phba->trunk_link.phy_lnk_speed = LPFC_LINK_SPEED_UNKNOWN;
6185 
6186 	lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6187 			"2910 Async FC Trunking Event - Speed:%d\n"
6188 			"\tLogical speed:%d "
6189 			"port0: %s port1: %s port2: %s port3: %s\n",
6190 			phba->sli4_hba.link_state.speed,
6191 			phba->sli4_hba.link_state.logical_speed,
6192 			trunk_link_status(0), trunk_link_status(1),
6193 			trunk_link_status(2), trunk_link_status(3));
6194 
6195 	if (phba->cmf_active_mode != LPFC_CFG_OFF)
6196 		lpfc_cmf_signal_init(phba);
6197 
6198 	if (port_fault)
6199 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6200 				"3202 trunk error:0x%x (%s) seen on port0:%s "
6201 				/*
6202 				 * SLI-4: We have only 0xA error codes
6203 				 * defined as of now. print an appropriate
6204 				 * message in case driver needs to be updated.
6205 				 */
6206 				"port1:%s port2:%s port3:%s\n", err, err > 0xA ?
6207 				"UNDEFINED. update driver." : trunk_errmsg[err],
6208 				trunk_port_fault(0), trunk_port_fault(1),
6209 				trunk_port_fault(2), trunk_port_fault(3));
6210 }
6211 
6212 
6213 /**
6214  * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
6215  * @phba: pointer to lpfc hba data structure.
6216  * @acqe_fc: pointer to the async fc completion queue entry.
6217  *
6218  * This routine is to handle the SLI4 asynchronous FC event. It will simply log
6219  * that the event was received and then issue a read_topology mailbox command so
6220  * that the rest of the driver will treat it the same as SLI3.
6221  **/
6222 static void
6223 lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
6224 {
6225 	LPFC_MBOXQ_t *pmb;
6226 	MAILBOX_t *mb;
6227 	struct lpfc_mbx_read_top *la;
6228 	char *log_level;
6229 	int rc;
6230 
6231 	if (bf_get(lpfc_trailer_type, acqe_fc) !=
6232 	    LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
6233 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6234 				"2895 Non FC link Event detected.(%d)\n",
6235 				bf_get(lpfc_trailer_type, acqe_fc));
6236 		return;
6237 	}
6238 
6239 	if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
6240 	    LPFC_FC_LA_TYPE_TRUNKING_EVENT) {
6241 		lpfc_update_trunk_link_status(phba, acqe_fc);
6242 		return;
6243 	}
6244 
6245 	/* Keep the link status for extra SLI4 state machine reference */
6246 	phba->sli4_hba.link_state.speed =
6247 			lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
6248 				bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6249 	phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
6250 	phba->sli4_hba.link_state.topology =
6251 				bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
6252 	phba->sli4_hba.link_state.status =
6253 				bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
6254 	phba->sli4_hba.link_state.type =
6255 				bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
6256 	phba->sli4_hba.link_state.number =
6257 				bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
6258 	phba->sli4_hba.link_state.fault =
6259 				bf_get(lpfc_acqe_link_fault, acqe_fc);
6260 	phba->sli4_hba.link_state.link_status =
6261 				bf_get(lpfc_acqe_fc_la_link_status, acqe_fc);
6262 
6263 	/*
6264 	 * Only select attention types need logical speed modification to what
6265 	 * was previously set.
6266 	 */
6267 	if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_LINK_UP &&
6268 	    phba->sli4_hba.link_state.status < LPFC_FC_LA_TYPE_ACTIVATE_FAIL) {
6269 		if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
6270 		    LPFC_FC_LA_TYPE_LINK_DOWN)
6271 			phba->sli4_hba.link_state.logical_speed = 0;
6272 		else if (!phba->sli4_hba.conf_trunk)
6273 			phba->sli4_hba.link_state.logical_speed =
6274 				bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
6275 	}
6276 
6277 	lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6278 			"2896 Async FC event - Speed:%dGBaud Topology:x%x "
6279 			"LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
6280 			"%dMbps Fault:x%x Link Status:x%x\n",
6281 			phba->sli4_hba.link_state.speed,
6282 			phba->sli4_hba.link_state.topology,
6283 			phba->sli4_hba.link_state.status,
6284 			phba->sli4_hba.link_state.type,
6285 			phba->sli4_hba.link_state.number,
6286 			phba->sli4_hba.link_state.logical_speed,
6287 			phba->sli4_hba.link_state.fault,
6288 			phba->sli4_hba.link_state.link_status);
6289 
6290 	/*
6291 	 * The following attention types are informational only, providing
6292 	 * further details about link status.  Overwrite the value of
6293 	 * link_state.status appropriately.  No further action is required.
6294 	 */
6295 	if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_ACTIVATE_FAIL) {
6296 		switch (phba->sli4_hba.link_state.status) {
6297 		case LPFC_FC_LA_TYPE_ACTIVATE_FAIL:
6298 			log_level = KERN_WARNING;
6299 			phba->sli4_hba.link_state.status =
6300 					LPFC_FC_LA_TYPE_LINK_DOWN;
6301 			break;
6302 		case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT:
6303 			/*
6304 			 * During bb credit recovery establishment, receiving
6305 			 * this attention type is normal.  Link Up attention
6306 			 * type is expected to occur before this informational
6307 			 * attention type so keep the Link Up status.
6308 			 */
6309 			log_level = KERN_INFO;
6310 			phba->sli4_hba.link_state.status =
6311 					LPFC_FC_LA_TYPE_LINK_UP;
6312 			break;
6313 		default:
6314 			log_level = KERN_INFO;
6315 			break;
6316 		}
6317 		lpfc_log_msg(phba, log_level, LOG_SLI,
6318 			     "2992 Async FC event - Informational Link "
6319 			     "Attention Type x%x\n",
6320 			     bf_get(lpfc_acqe_fc_la_att_type, acqe_fc));
6321 		return;
6322 	}
6323 
6324 	pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6325 	if (!pmb) {
6326 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6327 				"2897 The mboxq allocation failed\n");
6328 		return;
6329 	}
6330 	rc = lpfc_mbox_rsrc_prep(phba, pmb);
6331 	if (rc) {
6332 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6333 				"2898 The mboxq prep failed\n");
6334 		goto out_free_pmb;
6335 	}
6336 
6337 	/* Cleanup any outstanding ELS commands */
6338 	lpfc_els_flush_all_cmd(phba);
6339 
6340 	/* Block ELS IOCBs until we have done process link event */
6341 	phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
6342 
6343 	/* Update link event statistics */
6344 	phba->sli.slistat.link_event++;
6345 
6346 	/* Create lpfc_handle_latt mailbox command from link ACQE */
6347 	lpfc_read_topology(phba, pmb, pmb->ctx_buf);
6348 	pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
6349 	pmb->vport = phba->pport;
6350 
6351 	if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
6352 		phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
6353 
6354 		switch (phba->sli4_hba.link_state.status) {
6355 		case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
6356 			phba->link_flag |= LS_MDS_LINK_DOWN;
6357 			break;
6358 		case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
6359 			phba->link_flag |= LS_MDS_LOOPBACK;
6360 			break;
6361 		default:
6362 			break;
6363 		}
6364 
6365 		/* Initialize completion status */
6366 		mb = &pmb->u.mb;
6367 		mb->mbxStatus = MBX_SUCCESS;
6368 
6369 		/* Parse port fault information field */
6370 		lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc);
6371 
6372 		/* Parse and translate link attention fields */
6373 		la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
6374 		la->eventTag = acqe_fc->event_tag;
6375 
6376 		if (phba->sli4_hba.link_state.status ==
6377 		    LPFC_FC_LA_TYPE_UNEXP_WWPN) {
6378 			bf_set(lpfc_mbx_read_top_att_type, la,
6379 			       LPFC_FC_LA_TYPE_UNEXP_WWPN);
6380 		} else {
6381 			bf_set(lpfc_mbx_read_top_att_type, la,
6382 			       LPFC_FC_LA_TYPE_LINK_DOWN);
6383 		}
6384 		/* Invoke the mailbox command callback function */
6385 		lpfc_mbx_cmpl_read_topology(phba, pmb);
6386 
6387 		return;
6388 	}
6389 
6390 	rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
6391 	if (rc == MBX_NOT_FINISHED)
6392 		goto out_free_pmb;
6393 	return;
6394 
6395 out_free_pmb:
6396 	lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
6397 }
6398 
6399 /**
6400  * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
6401  * @phba: pointer to lpfc hba data structure.
6402  * @acqe_sli: pointer to the async SLI completion queue entry.
6403  *
6404  * This routine is to handle the SLI4 asynchronous SLI events.
6405  **/
6406 static void
6407 lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
6408 {
6409 	char port_name;
6410 	char message[128];
6411 	uint8_t status;
6412 	uint8_t evt_type;
6413 	uint8_t operational = 0;
6414 	struct temp_event temp_event_data;
6415 	struct lpfc_acqe_misconfigured_event *misconfigured;
6416 	struct lpfc_acqe_cgn_signal *cgn_signal;
6417 	struct Scsi_Host  *shost;
6418 	struct lpfc_vport **vports;
6419 	int rc, i, cnt;
6420 
6421 	evt_type = bf_get(lpfc_trailer_type, acqe_sli);
6422 
6423 	lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6424 			"2901 Async SLI event - Type:%d, Event Data: x%08x "
6425 			"x%08x x%08x x%08x\n", evt_type,
6426 			acqe_sli->event_data1, acqe_sli->event_data2,
6427 			acqe_sli->event_data3, acqe_sli->trailer);
6428 
6429 	port_name = phba->Port[0];
6430 	if (port_name == 0x00)
6431 		port_name = '?'; /* get port name is empty */
6432 
6433 	switch (evt_type) {
6434 	case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
6435 		temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
6436 		temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
6437 		temp_event_data.data = (uint32_t)acqe_sli->event_data1;
6438 
6439 		lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
6440 				"3190 Over Temperature:%d Celsius- Port Name %c\n",
6441 				acqe_sli->event_data1, port_name);
6442 
6443 		phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
6444 		shost = lpfc_shost_from_vport(phba->pport);
6445 		fc_host_post_vendor_event(shost, fc_get_event_number(),
6446 					  sizeof(temp_event_data),
6447 					  (char *)&temp_event_data,
6448 					  SCSI_NL_VID_TYPE_PCI
6449 					  | PCI_VENDOR_ID_EMULEX);
6450 		break;
6451 	case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
6452 		temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
6453 		temp_event_data.event_code = LPFC_NORMAL_TEMP;
6454 		temp_event_data.data = (uint32_t)acqe_sli->event_data1;
6455 
6456 		lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_LDS_EVENT,
6457 				"3191 Normal Temperature:%d Celsius - Port Name %c\n",
6458 				acqe_sli->event_data1, port_name);
6459 
6460 		shost = lpfc_shost_from_vport(phba->pport);
6461 		fc_host_post_vendor_event(shost, fc_get_event_number(),
6462 					  sizeof(temp_event_data),
6463 					  (char *)&temp_event_data,
6464 					  SCSI_NL_VID_TYPE_PCI
6465 					  | PCI_VENDOR_ID_EMULEX);
6466 		break;
6467 	case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
6468 		misconfigured = (struct lpfc_acqe_misconfigured_event *)
6469 					&acqe_sli->event_data1;
6470 
6471 		/* fetch the status for this port */
6472 		switch (phba->sli4_hba.lnk_info.lnk_no) {
6473 		case LPFC_LINK_NUMBER_0:
6474 			status = bf_get(lpfc_sli_misconfigured_port0_state,
6475 					&misconfigured->theEvent);
6476 			operational = bf_get(lpfc_sli_misconfigured_port0_op,
6477 					&misconfigured->theEvent);
6478 			break;
6479 		case LPFC_LINK_NUMBER_1:
6480 			status = bf_get(lpfc_sli_misconfigured_port1_state,
6481 					&misconfigured->theEvent);
6482 			operational = bf_get(lpfc_sli_misconfigured_port1_op,
6483 					&misconfigured->theEvent);
6484 			break;
6485 		case LPFC_LINK_NUMBER_2:
6486 			status = bf_get(lpfc_sli_misconfigured_port2_state,
6487 					&misconfigured->theEvent);
6488 			operational = bf_get(lpfc_sli_misconfigured_port2_op,
6489 					&misconfigured->theEvent);
6490 			break;
6491 		case LPFC_LINK_NUMBER_3:
6492 			status = bf_get(lpfc_sli_misconfigured_port3_state,
6493 					&misconfigured->theEvent);
6494 			operational = bf_get(lpfc_sli_misconfigured_port3_op,
6495 					&misconfigured->theEvent);
6496 			break;
6497 		default:
6498 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6499 					"3296 "
6500 					"LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
6501 					"event: Invalid link %d",
6502 					phba->sli4_hba.lnk_info.lnk_no);
6503 			return;
6504 		}
6505 
6506 		/* Skip if optic state unchanged */
6507 		if (phba->sli4_hba.lnk_info.optic_state == status)
6508 			return;
6509 
6510 		switch (status) {
6511 		case LPFC_SLI_EVENT_STATUS_VALID:
6512 			sprintf(message, "Physical Link is functional");
6513 			break;
6514 		case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
6515 			sprintf(message, "Optics faulted/incorrectly "
6516 				"installed/not installed - Reseat optics, "
6517 				"if issue not resolved, replace.");
6518 			break;
6519 		case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
6520 			sprintf(message,
6521 				"Optics of two types installed - Remove one "
6522 				"optic or install matching pair of optics.");
6523 			break;
6524 		case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
6525 			sprintf(message, "Incompatible optics - Replace with "
6526 				"compatible optics for card to function.");
6527 			break;
6528 		case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
6529 			sprintf(message, "Unqualified optics - Replace with "
6530 				"Avago optics for Warranty and Technical "
6531 				"Support - Link is%s operational",
6532 				(operational) ? " not" : "");
6533 			break;
6534 		case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
6535 			sprintf(message, "Uncertified optics - Replace with "
6536 				"Avago-certified optics to enable link "
6537 				"operation - Link is%s operational",
6538 				(operational) ? " not" : "");
6539 			break;
6540 		default:
6541 			/* firmware is reporting a status we don't know about */
6542 			sprintf(message, "Unknown event status x%02x", status);
6543 			break;
6544 		}
6545 
6546 		/* Issue READ_CONFIG mbox command to refresh supported speeds */
6547 		rc = lpfc_sli4_read_config(phba);
6548 		if (rc) {
6549 			phba->lmt = 0;
6550 			lpfc_printf_log(phba, KERN_ERR,
6551 					LOG_TRACE_EVENT,
6552 					"3194 Unable to retrieve supported "
6553 					"speeds, rc = 0x%x\n", rc);
6554 		}
6555 		rc = lpfc_sli4_refresh_params(phba);
6556 		if (rc) {
6557 			lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6558 					"3174 Unable to update pls support, "
6559 					"rc x%x\n", rc);
6560 		}
6561 		vports = lpfc_create_vport_work_array(phba);
6562 		if (vports != NULL) {
6563 			for (i = 0; i <= phba->max_vports && vports[i] != NULL;
6564 					i++) {
6565 				shost = lpfc_shost_from_vport(vports[i]);
6566 				lpfc_host_supported_speeds_set(shost);
6567 			}
6568 		}
6569 		lpfc_destroy_vport_work_array(phba, vports);
6570 
6571 		phba->sli4_hba.lnk_info.optic_state = status;
6572 		lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6573 				"3176 Port Name %c %s\n", port_name, message);
6574 		break;
6575 	case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
6576 		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6577 				"3192 Remote DPort Test Initiated - "
6578 				"Event Data1:x%08x Event Data2: x%08x\n",
6579 				acqe_sli->event_data1, acqe_sli->event_data2);
6580 		break;
6581 	case LPFC_SLI_EVENT_TYPE_PORT_PARAMS_CHG:
6582 		/* Call FW to obtain active parms */
6583 		lpfc_sli4_cgn_parm_chg_evt(phba);
6584 		break;
6585 	case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN:
6586 		/* Misconfigured WWN. Reports that the SLI Port is configured
6587 		 * to use FA-WWN, but the attached device doesn’t support it.
6588 		 * Event Data1 - N.A, Event Data2 - N.A
6589 		 * This event only happens on the physical port.
6590 		 */
6591 		lpfc_log_msg(phba, KERN_WARNING, LOG_SLI | LOG_DISCOVERY,
6592 			     "2699 Misconfigured FA-PWWN - Attached device "
6593 			     "does not support FA-PWWN\n");
6594 		phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC;
6595 		memset(phba->pport->fc_portname.u.wwn, 0,
6596 		       sizeof(struct lpfc_name));
6597 		break;
6598 	case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE:
6599 		/* EEPROM failure. No driver action is required */
6600 		lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
6601 			     "2518 EEPROM failure - "
6602 			     "Event Data1: x%08x Event Data2: x%08x\n",
6603 			     acqe_sli->event_data1, acqe_sli->event_data2);
6604 		break;
6605 	case LPFC_SLI_EVENT_TYPE_CGN_SIGNAL:
6606 		if (phba->cmf_active_mode == LPFC_CFG_OFF)
6607 			break;
6608 		cgn_signal = (struct lpfc_acqe_cgn_signal *)
6609 					&acqe_sli->event_data1;
6610 		phba->cgn_acqe_cnt++;
6611 
6612 		cnt = bf_get(lpfc_warn_acqe, cgn_signal);
6613 		atomic64_add(cnt, &phba->cgn_acqe_stat.warn);
6614 		atomic64_add(cgn_signal->alarm_cnt, &phba->cgn_acqe_stat.alarm);
6615 
6616 		/* no threshold for CMF, even 1 signal will trigger an event */
6617 
6618 		/* Alarm overrides warning, so check that first */
6619 		if (cgn_signal->alarm_cnt) {
6620 			if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) {
6621 				/* Keep track of alarm cnt for CMF_SYNC_WQE */
6622 				atomic_add(cgn_signal->alarm_cnt,
6623 					   &phba->cgn_sync_alarm_cnt);
6624 			}
6625 		} else if (cnt) {
6626 			/* signal action needs to be taken */
6627 			if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY ||
6628 			    phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) {
6629 				/* Keep track of warning cnt for CMF_SYNC_WQE */
6630 				atomic_add(cnt, &phba->cgn_sync_warn_cnt);
6631 			}
6632 		}
6633 		break;
6634 	case LPFC_SLI_EVENT_TYPE_RD_SIGNAL:
6635 		/* May be accompanied by a temperature event */
6636 		lpfc_printf_log(phba, KERN_INFO,
6637 				LOG_SLI | LOG_LINK_EVENT | LOG_LDS_EVENT,
6638 				"2902 Remote Degrade Signaling: x%08x x%08x "
6639 				"x%08x\n",
6640 				acqe_sli->event_data1, acqe_sli->event_data2,
6641 				acqe_sli->event_data3);
6642 		break;
6643 	case LPFC_SLI_EVENT_TYPE_RESET_CM_STATS:
6644 		lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
6645 				"2905 Reset CM statistics\n");
6646 		lpfc_sli4_async_cmstat_evt(phba);
6647 		break;
6648 	default:
6649 		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6650 				"3193 Unrecognized SLI event, type: 0x%x",
6651 				evt_type);
6652 		break;
6653 	}
6654 }
6655 
6656 /**
6657  * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
6658  * @vport: pointer to vport data structure.
6659  *
6660  * This routine is to perform Clear Virtual Link (CVL) on a vport in
6661  * response to a CVL event.
6662  *
6663  * Return the pointer to the ndlp with the vport if successful, otherwise
6664  * return NULL.
6665  **/
6666 static struct lpfc_nodelist *
6667 lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
6668 {
6669 	struct lpfc_nodelist *ndlp;
6670 	struct Scsi_Host *shost;
6671 	struct lpfc_hba *phba;
6672 
6673 	if (!vport)
6674 		return NULL;
6675 	phba = vport->phba;
6676 	if (!phba)
6677 		return NULL;
6678 	ndlp = lpfc_findnode_did(vport, Fabric_DID);
6679 	if (!ndlp) {
6680 		/* Cannot find existing Fabric ndlp, so allocate a new one */
6681 		ndlp = lpfc_nlp_init(vport, Fabric_DID);
6682 		if (!ndlp)
6683 			return NULL;
6684 		/* Set the node type */
6685 		ndlp->nlp_type |= NLP_FABRIC;
6686 		/* Put ndlp onto node list */
6687 		lpfc_enqueue_node(vport, ndlp);
6688 	}
6689 	if ((phba->pport->port_state < LPFC_FLOGI) &&
6690 		(phba->pport->port_state != LPFC_VPORT_FAILED))
6691 		return NULL;
6692 	/* If virtual link is not yet instantiated ignore CVL */
6693 	if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
6694 		&& (vport->port_state != LPFC_VPORT_FAILED))
6695 		return NULL;
6696 	shost = lpfc_shost_from_vport(vport);
6697 	if (!shost)
6698 		return NULL;
6699 	lpfc_linkdown_port(vport);
6700 	lpfc_cleanup_pending_mbox(vport);
6701 	set_bit(FC_VPORT_CVL_RCVD, &vport->fc_flag);
6702 
6703 	return ndlp;
6704 }
6705 
6706 /**
6707  * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
6708  * @phba: pointer to lpfc hba data structure.
6709  *
6710  * This routine is to perform Clear Virtual Link (CVL) on all vports in
6711  * response to a FCF dead event.
6712  **/
6713 static void
6714 lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
6715 {
6716 	struct lpfc_vport **vports;
6717 	int i;
6718 
6719 	vports = lpfc_create_vport_work_array(phba);
6720 	if (vports)
6721 		for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
6722 			lpfc_sli4_perform_vport_cvl(vports[i]);
6723 	lpfc_destroy_vport_work_array(phba, vports);
6724 }
6725 
6726 /**
6727  * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
6728  * @phba: pointer to lpfc hba data structure.
6729  * @acqe_fip: pointer to the async fcoe completion queue entry.
6730  *
6731  * This routine is to handle the SLI4 asynchronous fcoe event.
6732  **/
6733 static void
6734 lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
6735 			struct lpfc_acqe_fip *acqe_fip)
6736 {
6737 	uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
6738 	int rc;
6739 	struct lpfc_vport *vport;
6740 	struct lpfc_nodelist *ndlp;
6741 	int active_vlink_present;
6742 	struct lpfc_vport **vports;
6743 	int i;
6744 
6745 	phba->fc_eventTag = acqe_fip->event_tag;
6746 	phba->fcoe_eventtag = acqe_fip->event_tag;
6747 	switch (event_type) {
6748 	case LPFC_FIP_EVENT_TYPE_NEW_FCF:
6749 	case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
6750 		if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
6751 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6752 					"2546 New FCF event, evt_tag:x%x, "
6753 					"index:x%x\n",
6754 					acqe_fip->event_tag,
6755 					acqe_fip->index);
6756 		else
6757 			lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
6758 					LOG_DISCOVERY,
6759 					"2788 FCF param modified event, "
6760 					"evt_tag:x%x, index:x%x\n",
6761 					acqe_fip->event_tag,
6762 					acqe_fip->index);
6763 		if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
6764 			/*
6765 			 * During period of FCF discovery, read the FCF
6766 			 * table record indexed by the event to update
6767 			 * FCF roundrobin failover eligible FCF bmask.
6768 			 */
6769 			lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
6770 					LOG_DISCOVERY,
6771 					"2779 Read FCF (x%x) for updating "
6772 					"roundrobin FCF failover bmask\n",
6773 					acqe_fip->index);
6774 			rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
6775 		}
6776 
6777 		/* If the FCF discovery is in progress, do nothing. */
6778 		if (test_bit(FCF_TS_INPROG, &phba->hba_flag))
6779 			break;
6780 		spin_lock_irq(&phba->hbalock);
6781 		/* If fast FCF failover rescan event is pending, do nothing */
6782 		if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) {
6783 			spin_unlock_irq(&phba->hbalock);
6784 			break;
6785 		}
6786 
6787 		/* If the FCF has been in discovered state, do nothing. */
6788 		if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
6789 			spin_unlock_irq(&phba->hbalock);
6790 			break;
6791 		}
6792 		spin_unlock_irq(&phba->hbalock);
6793 
6794 		/* Otherwise, scan the entire FCF table and re-discover SAN */
6795 		lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
6796 				"2770 Start FCF table scan per async FCF "
6797 				"event, evt_tag:x%x, index:x%x\n",
6798 				acqe_fip->event_tag, acqe_fip->index);
6799 		rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
6800 						     LPFC_FCOE_FCF_GET_FIRST);
6801 		if (rc)
6802 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6803 					"2547 Issue FCF scan read FCF mailbox "
6804 					"command failed (x%x)\n", rc);
6805 		break;
6806 
6807 	case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
6808 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6809 				"2548 FCF Table full count 0x%x tag 0x%x\n",
6810 				bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
6811 				acqe_fip->event_tag);
6812 		break;
6813 
6814 	case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
6815 		phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
6816 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6817 				"2549 FCF (x%x) disconnected from network, "
6818 				 "tag:x%x\n", acqe_fip->index,
6819 				 acqe_fip->event_tag);
6820 		/*
6821 		 * If we are in the middle of FCF failover process, clear
6822 		 * the corresponding FCF bit in the roundrobin bitmap.
6823 		 */
6824 		spin_lock_irq(&phba->hbalock);
6825 		if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
6826 		    (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
6827 			spin_unlock_irq(&phba->hbalock);
6828 			/* Update FLOGI FCF failover eligible FCF bmask */
6829 			lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
6830 			break;
6831 		}
6832 		spin_unlock_irq(&phba->hbalock);
6833 
6834 		/* If the event is not for currently used fcf do nothing */
6835 		if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
6836 			break;
6837 
6838 		/*
6839 		 * Otherwise, request the port to rediscover the entire FCF
6840 		 * table for a fast recovery from case that the current FCF
6841 		 * is no longer valid as we are not in the middle of FCF
6842 		 * failover process already.
6843 		 */
6844 		spin_lock_irq(&phba->hbalock);
6845 		/* Mark the fast failover process in progress */
6846 		phba->fcf.fcf_flag |= FCF_DEAD_DISC;
6847 		spin_unlock_irq(&phba->hbalock);
6848 
6849 		lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
6850 				"2771 Start FCF fast failover process due to "
6851 				"FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
6852 				"\n", acqe_fip->event_tag, acqe_fip->index);
6853 		rc = lpfc_sli4_redisc_fcf_table(phba);
6854 		if (rc) {
6855 			lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
6856 					LOG_TRACE_EVENT,
6857 					"2772 Issue FCF rediscover mailbox "
6858 					"command failed, fail through to FCF "
6859 					"dead event\n");
6860 			spin_lock_irq(&phba->hbalock);
6861 			phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
6862 			spin_unlock_irq(&phba->hbalock);
6863 			/*
6864 			 * Last resort will fail over by treating this
6865 			 * as a link down to FCF registration.
6866 			 */
6867 			lpfc_sli4_fcf_dead_failthrough(phba);
6868 		} else {
6869 			/* Reset FCF roundrobin bmask for new discovery */
6870 			lpfc_sli4_clear_fcf_rr_bmask(phba);
6871 			/*
6872 			 * Handling fast FCF failover to a DEAD FCF event is
6873 			 * considered equalivant to receiving CVL to all vports.
6874 			 */
6875 			lpfc_sli4_perform_all_vport_cvl(phba);
6876 		}
6877 		break;
6878 	case LPFC_FIP_EVENT_TYPE_CVL:
6879 		phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
6880 		lpfc_printf_log(phba, KERN_ERR,
6881 				LOG_TRACE_EVENT,
6882 			"2718 Clear Virtual Link Received for VPI 0x%x"
6883 			" tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6884 
6885 		vport = lpfc_find_vport_by_vpid(phba,
6886 						acqe_fip->index);
6887 		ndlp = lpfc_sli4_perform_vport_cvl(vport);
6888 		if (!ndlp)
6889 			break;
6890 		active_vlink_present = 0;
6891 
6892 		vports = lpfc_create_vport_work_array(phba);
6893 		if (vports) {
6894 			for (i = 0; i <= phba->max_vports && vports[i] != NULL;
6895 					i++) {
6896 				if (!test_bit(FC_VPORT_CVL_RCVD,
6897 					      &vports[i]->fc_flag) &&
6898 				    vports[i]->port_state > LPFC_FDISC) {
6899 					active_vlink_present = 1;
6900 					break;
6901 				}
6902 			}
6903 			lpfc_destroy_vport_work_array(phba, vports);
6904 		}
6905 
6906 		/*
6907 		 * Don't re-instantiate if vport is marked for deletion.
6908 		 * If we are here first then vport_delete is going to wait
6909 		 * for discovery to complete.
6910 		 */
6911 		if (!test_bit(FC_UNLOADING, &vport->load_flag) &&
6912 		    active_vlink_present) {
6913 			/*
6914 			 * If there are other active VLinks present,
6915 			 * re-instantiate the Vlink using FDISC.
6916 			 */
6917 			mod_timer(&ndlp->nlp_delayfunc,
6918 				  jiffies + secs_to_jiffies(1));
6919 			set_bit(NLP_DELAY_TMO, &ndlp->nlp_flag);
6920 			ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
6921 			vport->port_state = LPFC_FDISC;
6922 		} else {
6923 			/*
6924 			 * Otherwise, we request port to rediscover
6925 			 * the entire FCF table for a fast recovery
6926 			 * from possible case that the current FCF
6927 			 * is no longer valid if we are not already
6928 			 * in the FCF failover process.
6929 			 */
6930 			spin_lock_irq(&phba->hbalock);
6931 			if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
6932 				spin_unlock_irq(&phba->hbalock);
6933 				break;
6934 			}
6935 			/* Mark the fast failover process in progress */
6936 			phba->fcf.fcf_flag |= FCF_ACVL_DISC;
6937 			spin_unlock_irq(&phba->hbalock);
6938 			lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
6939 					LOG_DISCOVERY,
6940 					"2773 Start FCF failover per CVL, "
6941 					"evt_tag:x%x\n", acqe_fip->event_tag);
6942 			rc = lpfc_sli4_redisc_fcf_table(phba);
6943 			if (rc) {
6944 				lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
6945 						LOG_TRACE_EVENT,
6946 						"2774 Issue FCF rediscover "
6947 						"mailbox command failed, "
6948 						"through to CVL event\n");
6949 				spin_lock_irq(&phba->hbalock);
6950 				phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
6951 				spin_unlock_irq(&phba->hbalock);
6952 				/*
6953 				 * Last resort will be re-try on the
6954 				 * the current registered FCF entry.
6955 				 */
6956 				lpfc_retry_pport_discovery(phba);
6957 			} else
6958 				/*
6959 				 * Reset FCF roundrobin bmask for new
6960 				 * discovery.
6961 				 */
6962 				lpfc_sli4_clear_fcf_rr_bmask(phba);
6963 		}
6964 		break;
6965 	default:
6966 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6967 				"0288 Unknown FCoE event type 0x%x event tag "
6968 				"0x%x\n", event_type, acqe_fip->event_tag);
6969 		break;
6970 	}
6971 }
6972 
6973 /**
6974  * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
6975  * @phba: pointer to lpfc hba data structure.
6976  * @acqe_dcbx: pointer to the async dcbx completion queue entry.
6977  *
6978  * This routine is to handle the SLI4 asynchronous dcbx event.
6979  **/
6980 static void
6981 lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
6982 			 struct lpfc_acqe_dcbx *acqe_dcbx)
6983 {
6984 	phba->fc_eventTag = acqe_dcbx->event_tag;
6985 	lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6986 			"0290 The SLI4 DCBX asynchronous event is not "
6987 			"handled yet\n");
6988 }
6989 
6990 /**
6991  * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
6992  * @phba: pointer to lpfc hba data structure.
6993  * @acqe_grp5: pointer to the async grp5 completion queue entry.
6994  *
6995  * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
6996  * is an asynchronous notified of a logical link speed change.  The Port
6997  * reports the logical link speed in units of 10Mbps.
6998  **/
6999 static void
7000 lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
7001 			 struct lpfc_acqe_grp5 *acqe_grp5)
7002 {
7003 	uint16_t prev_ll_spd;
7004 
7005 	phba->fc_eventTag = acqe_grp5->event_tag;
7006 	phba->fcoe_eventtag = acqe_grp5->event_tag;
7007 	prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
7008 	phba->sli4_hba.link_state.logical_speed =
7009 		(bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
7010 	lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7011 			"2789 GRP5 Async Event: Updating logical link speed "
7012 			"from %dMbps to %dMbps\n", prev_ll_spd,
7013 			phba->sli4_hba.link_state.logical_speed);
7014 }
7015 
7016 /**
7017  * lpfc_sli4_async_cmstat_evt - Process the asynchronous cmstat event
7018  * @phba: pointer to lpfc hba data structure.
7019  *
7020  * This routine is to handle the SLI4 asynchronous cmstat event. A cmstat event
7021  * is an asynchronous notification of a request to reset CM stats.
7022  **/
7023 static void
7024 lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba)
7025 {
7026 	if (!phba->cgn_i)
7027 		return;
7028 	lpfc_init_congestion_stat(phba);
7029 }
7030 
7031 /**
7032  * lpfc_cgn_params_val - Validate FW congestion parameters.
7033  * @phba: pointer to lpfc hba data structure.
7034  * @p_cfg_param: pointer to FW provided congestion parameters.
7035  *
7036  * This routine validates the congestion parameters passed
7037  * by the FW to the driver via an ACQE event.
7038  **/
7039 static void
7040 lpfc_cgn_params_val(struct lpfc_hba *phba, struct lpfc_cgn_param *p_cfg_param)
7041 {
7042 	spin_lock_irq(&phba->hbalock);
7043 
7044 	if (!lpfc_rangecheck(p_cfg_param->cgn_param_mode, LPFC_CFG_OFF,
7045 			     LPFC_CFG_MONITOR)) {
7046 		lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT,
7047 				"6225 CMF mode param out of range: %d\n",
7048 				 p_cfg_param->cgn_param_mode);
7049 		p_cfg_param->cgn_param_mode = LPFC_CFG_OFF;
7050 	}
7051 
7052 	spin_unlock_irq(&phba->hbalock);
7053 }
7054 
7055 static const char * const lpfc_cmf_mode_to_str[] = {
7056 	"OFF",
7057 	"MANAGED",
7058 	"MONITOR",
7059 };
7060 
7061 /**
7062  * lpfc_cgn_params_parse - Process a FW cong parm change event
7063  * @phba: pointer to lpfc hba data structure.
7064  * @p_cgn_param: pointer to a data buffer with the FW cong params.
7065  * @len: the size of pdata in bytes.
7066  *
7067  * This routine validates the congestion management buffer signature
7068  * from the FW, validates the contents and makes corrections for
7069  * valid, in-range values.  If the signature magic is correct and
7070  * after parameter validation, the contents are copied to the driver's
7071  * @phba structure. If the magic is incorrect, an error message is
7072  * logged.
7073  **/
7074 static void
7075 lpfc_cgn_params_parse(struct lpfc_hba *phba,
7076 		      struct lpfc_cgn_param *p_cgn_param, uint32_t len)
7077 {
7078 	struct lpfc_cgn_info *cp;
7079 	uint32_t crc, oldmode;
7080 	char acr_string[4] = {0};
7081 
7082 	/* Make sure the FW has encoded the correct magic number to
7083 	 * validate the congestion parameter in FW memory.
7084 	 */
7085 	if (p_cgn_param->cgn_param_magic == LPFC_CFG_PARAM_MAGIC_NUM) {
7086 		lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
7087 				"4668 FW cgn parm buffer data: "
7088 				"magic 0x%x version %d mode %d "
7089 				"level0 %d level1 %d "
7090 				"level2 %d byte13 %d "
7091 				"byte14 %d byte15 %d "
7092 				"byte11 %d byte12 %d activeMode %d\n",
7093 				p_cgn_param->cgn_param_magic,
7094 				p_cgn_param->cgn_param_version,
7095 				p_cgn_param->cgn_param_mode,
7096 				p_cgn_param->cgn_param_level0,
7097 				p_cgn_param->cgn_param_level1,
7098 				p_cgn_param->cgn_param_level2,
7099 				p_cgn_param->byte13,
7100 				p_cgn_param->byte14,
7101 				p_cgn_param->byte15,
7102 				p_cgn_param->byte11,
7103 				p_cgn_param->byte12,
7104 				phba->cmf_active_mode);
7105 
7106 		oldmode = phba->cmf_active_mode;
7107 
7108 		/* Any parameters out of range are corrected to defaults
7109 		 * by this routine.  No need to fail.
7110 		 */
7111 		lpfc_cgn_params_val(phba, p_cgn_param);
7112 
7113 		/* Parameters are verified, move them into driver storage */
7114 		spin_lock_irq(&phba->hbalock);
7115 		memcpy(&phba->cgn_p, p_cgn_param,
7116 		       sizeof(struct lpfc_cgn_param));
7117 
7118 		/* Update parameters in congestion info buffer now */
7119 		if (phba->cgn_i) {
7120 			cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
7121 			cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
7122 			cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
7123 			cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
7124 			cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
7125 			crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
7126 						  LPFC_CGN_CRC32_SEED);
7127 			cp->cgn_info_crc = cpu_to_le32(crc);
7128 		}
7129 		spin_unlock_irq(&phba->hbalock);
7130 
7131 		phba->cmf_active_mode = phba->cgn_p.cgn_param_mode;
7132 
7133 		switch (oldmode) {
7134 		case LPFC_CFG_OFF:
7135 			if (phba->cgn_p.cgn_param_mode != LPFC_CFG_OFF) {
7136 				/* Turning CMF on */
7137 				lpfc_cmf_start(phba);
7138 
7139 				if (phba->link_state >= LPFC_LINK_UP) {
7140 					phba->cgn_reg_fpin =
7141 						phba->cgn_init_reg_fpin;
7142 					phba->cgn_reg_signal =
7143 						phba->cgn_init_reg_signal;
7144 					lpfc_issue_els_edc(phba->pport, 0);
7145 				}
7146 			}
7147 			break;
7148 		case LPFC_CFG_MANAGED:
7149 			switch (phba->cgn_p.cgn_param_mode) {
7150 			case LPFC_CFG_OFF:
7151 				/* Turning CMF off */
7152 				lpfc_cmf_stop(phba);
7153 				if (phba->link_state >= LPFC_LINK_UP)
7154 					lpfc_issue_els_edc(phba->pport, 0);
7155 				break;
7156 			case LPFC_CFG_MONITOR:
7157 				phba->cmf_max_bytes_per_interval =
7158 					phba->cmf_link_byte_count;
7159 
7160 				/* Resume blocked IO - unblock on workqueue */
7161 				queue_work(phba->wq,
7162 					   &phba->unblock_request_work);
7163 				break;
7164 			}
7165 			break;
7166 		case LPFC_CFG_MONITOR:
7167 			switch (phba->cgn_p.cgn_param_mode) {
7168 			case LPFC_CFG_OFF:
7169 				/* Turning CMF off */
7170 				lpfc_cmf_stop(phba);
7171 				if (phba->link_state >= LPFC_LINK_UP)
7172 					lpfc_issue_els_edc(phba->pport, 0);
7173 				break;
7174 			case LPFC_CFG_MANAGED:
7175 				lpfc_cmf_signal_init(phba);
7176 				break;
7177 			}
7178 			break;
7179 		}
7180 		if (oldmode != LPFC_CFG_OFF ||
7181 		    oldmode != phba->cgn_p.cgn_param_mode) {
7182 			if (phba->cgn_p.cgn_param_mode == LPFC_CFG_MANAGED)
7183 				scnprintf(acr_string, sizeof(acr_string), "%u",
7184 					  phba->cgn_p.cgn_param_level0);
7185 			else
7186 				scnprintf(acr_string, sizeof(acr_string), "NA");
7187 
7188 			dev_info(&phba->pcidev->dev, "%d: "
7189 				 "4663 CMF: Mode %s acr %s\n",
7190 				 phba->brd_no,
7191 				 lpfc_cmf_mode_to_str
7192 				 [phba->cgn_p.cgn_param_mode],
7193 				 acr_string);
7194 		}
7195 	} else {
7196 		lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7197 				"4669 FW cgn parm buf wrong magic 0x%x "
7198 				"version %d\n", p_cgn_param->cgn_param_magic,
7199 				p_cgn_param->cgn_param_version);
7200 	}
7201 }
7202 
7203 /**
7204  * lpfc_sli4_cgn_params_read - Read and Validate FW congestion parameters.
7205  * @phba: pointer to lpfc hba data structure.
7206  *
7207  * This routine issues a read_object mailbox command to
7208  * get the congestion management parameters from the FW
7209  * parses it and updates the driver maintained values.
7210  *
7211  * Returns
7212  *  0     if the object was empty
7213  *  -Eval if an error was encountered
7214  *  Count if bytes were read from object
7215  **/
7216 int
7217 lpfc_sli4_cgn_params_read(struct lpfc_hba *phba)
7218 {
7219 	int ret = 0;
7220 	struct lpfc_cgn_param *p_cgn_param = NULL;
7221 	u32 *pdata = NULL;
7222 	u32 len = 0;
7223 
7224 	/* Find out if the FW has a new set of congestion parameters. */
7225 	len = sizeof(struct lpfc_cgn_param);
7226 	pdata = kzalloc(len, GFP_KERNEL);
7227 	if (!pdata)
7228 		return -ENOMEM;
7229 	ret = lpfc_read_object(phba, (char *)LPFC_PORT_CFG_NAME,
7230 			       pdata, len);
7231 
7232 	/* 0 means no data.  A negative means error.  A positive means
7233 	 * bytes were copied.
7234 	 */
7235 	if (!ret) {
7236 		lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7237 				"4670 CGN RD OBJ returns no data\n");
7238 		goto rd_obj_err;
7239 	} else if (ret < 0) {
7240 		/* Some error.  Just exit and return it to the caller.*/
7241 		goto rd_obj_err;
7242 	}
7243 
7244 	lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
7245 			"6234 READ CGN PARAMS Successful %d\n", len);
7246 
7247 	/* Parse data pointer over len and update the phba congestion
7248 	 * parameters with values passed back.  The receive rate values
7249 	 * may have been altered in FW, but take no action here.
7250 	 */
7251 	p_cgn_param = (struct lpfc_cgn_param *)pdata;
7252 	lpfc_cgn_params_parse(phba, p_cgn_param, len);
7253 
7254  rd_obj_err:
7255 	kfree(pdata);
7256 	return ret;
7257 }
7258 
7259 /**
7260  * lpfc_sli4_cgn_parm_chg_evt - Process a FW congestion param change event
7261  * @phba: pointer to lpfc hba data structure.
7262  *
7263  * The FW generated Async ACQE SLI event calls this routine when
7264  * the event type is an SLI Internal Port Event and the Event Code
7265  * indicates a change to the FW maintained congestion parameters.
7266  *
7267  * This routine executes a Read_Object mailbox call to obtain the
7268  * current congestion parameters maintained in FW and corrects
7269  * the driver's active congestion parameters.
7270  *
7271  * The acqe event is not passed because there is no further data
7272  * required.
7273  *
7274  * Returns nonzero error if event processing encountered an error.
7275  * Zero otherwise for success.
7276  **/
7277 static int
7278 lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *phba)
7279 {
7280 	int ret = 0;
7281 
7282 	if (!phba->sli4_hba.pc_sli4_params.cmf) {
7283 		lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7284 				"4664 Cgn Evt when E2E off. Drop event\n");
7285 		return -EACCES;
7286 	}
7287 
7288 	/* If the event is claiming an empty object, it's ok.  A write
7289 	 * could have cleared it.  Only error is a negative return
7290 	 * status.
7291 	 */
7292 	ret = lpfc_sli4_cgn_params_read(phba);
7293 	if (ret < 0) {
7294 		lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7295 				"4667 Error reading Cgn Params (%d)\n",
7296 				ret);
7297 	} else if (!ret) {
7298 		lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7299 				"4673 CGN Event empty object.\n");
7300 	}
7301 	return ret;
7302 }
7303 
7304 /**
7305  * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
7306  * @phba: pointer to lpfc hba data structure.
7307  *
7308  * This routine is invoked by the worker thread to process all the pending
7309  * SLI4 asynchronous events.
7310  **/
7311 void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
7312 {
7313 	struct lpfc_cq_event *cq_event;
7314 	unsigned long iflags;
7315 
7316 	/* First, declare the async event has been handled */
7317 	clear_bit(ASYNC_EVENT, &phba->hba_flag);
7318 
7319 	/* Now, handle all the async events */
7320 	spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7321 	while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
7322 		list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
7323 				 cq_event, struct lpfc_cq_event, list);
7324 		spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock,
7325 				       iflags);
7326 
7327 		/* Process the asynchronous event */
7328 		switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
7329 		case LPFC_TRAILER_CODE_LINK:
7330 			lpfc_sli4_async_link_evt(phba,
7331 						 &cq_event->cqe.acqe_link);
7332 			break;
7333 		case LPFC_TRAILER_CODE_FCOE:
7334 			lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
7335 			break;
7336 		case LPFC_TRAILER_CODE_DCBX:
7337 			lpfc_sli4_async_dcbx_evt(phba,
7338 						 &cq_event->cqe.acqe_dcbx);
7339 			break;
7340 		case LPFC_TRAILER_CODE_GRP5:
7341 			lpfc_sli4_async_grp5_evt(phba,
7342 						 &cq_event->cqe.acqe_grp5);
7343 			break;
7344 		case LPFC_TRAILER_CODE_FC:
7345 			lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
7346 			break;
7347 		case LPFC_TRAILER_CODE_SLI:
7348 			lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
7349 			break;
7350 		default:
7351 			lpfc_printf_log(phba, KERN_ERR,
7352 					LOG_TRACE_EVENT,
7353 					"1804 Invalid asynchronous event code: "
7354 					"x%x\n", bf_get(lpfc_trailer_code,
7355 					&cq_event->cqe.mcqe_cmpl));
7356 			break;
7357 		}
7358 
7359 		/* Free the completion event processed to the free pool */
7360 		lpfc_sli4_cq_event_release(phba, cq_event);
7361 		spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7362 	}
7363 	spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
7364 }
7365 
7366 /**
7367  * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
7368  * @phba: pointer to lpfc hba data structure.
7369  *
7370  * This routine is invoked by the worker thread to process FCF table
7371  * rediscovery pending completion event.
7372  **/
7373 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
7374 {
7375 	int rc;
7376 
7377 	spin_lock_irq(&phba->hbalock);
7378 	/* Clear FCF rediscovery timeout event */
7379 	phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
7380 	/* Clear driver fast failover FCF record flag */
7381 	phba->fcf.failover_rec.flag = 0;
7382 	/* Set state for FCF fast failover */
7383 	phba->fcf.fcf_flag |= FCF_REDISC_FOV;
7384 	spin_unlock_irq(&phba->hbalock);
7385 
7386 	/* Scan FCF table from the first entry to re-discover SAN */
7387 	lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
7388 			"2777 Start post-quiescent FCF table scan\n");
7389 	rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
7390 	if (rc)
7391 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7392 				"2747 Issue FCF scan read FCF mailbox "
7393 				"command failed 0x%x\n", rc);
7394 }
7395 
7396 /**
7397  * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
7398  * @phba: pointer to lpfc hba data structure.
7399  * @dev_grp: The HBA PCI-Device group number.
7400  *
7401  * This routine is invoked to set up the per HBA PCI-Device group function
7402  * API jump table entries.
7403  *
7404  * Return: 0 if success, otherwise -ENODEV
7405  **/
7406 int
7407 lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
7408 {
7409 	int rc;
7410 
7411 	/* Set up lpfc PCI-device group */
7412 	phba->pci_dev_grp = dev_grp;
7413 
7414 	/* The LPFC_PCI_DEV_OC uses SLI4 */
7415 	if (dev_grp == LPFC_PCI_DEV_OC)
7416 		phba->sli_rev = LPFC_SLI_REV4;
7417 
7418 	/* Set up device INIT API function jump table */
7419 	rc = lpfc_init_api_table_setup(phba, dev_grp);
7420 	if (rc)
7421 		return -ENODEV;
7422 	/* Set up SCSI API function jump table */
7423 	rc = lpfc_scsi_api_table_setup(phba, dev_grp);
7424 	if (rc)
7425 		return -ENODEV;
7426 	/* Set up SLI API function jump table */
7427 	rc = lpfc_sli_api_table_setup(phba, dev_grp);
7428 	if (rc)
7429 		return -ENODEV;
7430 	/* Set up MBOX API function jump table */
7431 	rc = lpfc_mbox_api_table_setup(phba, dev_grp);
7432 	if (rc)
7433 		return -ENODEV;
7434 
7435 	return 0;
7436 }
7437 
7438 /**
7439  * lpfc_log_intr_mode - Log the active interrupt mode
7440  * @phba: pointer to lpfc hba data structure.
7441  * @intr_mode: active interrupt mode adopted.
7442  *
7443  * This routine it invoked to log the currently used active interrupt mode
7444  * to the device.
7445  **/
7446 static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
7447 {
7448 	switch (intr_mode) {
7449 	case 0:
7450 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7451 				"0470 Enable INTx interrupt mode.\n");
7452 		break;
7453 	case 1:
7454 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7455 				"0481 Enabled MSI interrupt mode.\n");
7456 		break;
7457 	case 2:
7458 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7459 				"0480 Enabled MSI-X interrupt mode.\n");
7460 		break;
7461 	default:
7462 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7463 				"0482 Illegal interrupt mode.\n");
7464 		break;
7465 	}
7466 	return;
7467 }
7468 
7469 /**
7470  * lpfc_enable_pci_dev - Enable a generic PCI device.
7471  * @phba: pointer to lpfc hba data structure.
7472  *
7473  * This routine is invoked to enable the PCI device that is common to all
7474  * PCI devices.
7475  *
7476  * Return codes
7477  * 	0 - successful
7478  * 	other values - error
7479  **/
7480 static int
7481 lpfc_enable_pci_dev(struct lpfc_hba *phba)
7482 {
7483 	struct pci_dev *pdev;
7484 
7485 	/* Obtain PCI device reference */
7486 	if (!phba->pcidev)
7487 		goto out_error;
7488 	else
7489 		pdev = phba->pcidev;
7490 	/* Enable PCI device */
7491 	if (pci_enable_device_mem(pdev))
7492 		goto out_error;
7493 	/* Request PCI resource for the device */
7494 	if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
7495 		goto out_disable_device;
7496 	/* Set up device as PCI master and save state for EEH */
7497 	pci_set_master(pdev);
7498 	pci_try_set_mwi(pdev);
7499 	pci_save_state(pdev);
7500 
7501 	/* PCIe EEH recovery on powerpc platforms needs fundamental reset */
7502 	if (pci_is_pcie(pdev))
7503 		pdev->needs_freset = 1;
7504 
7505 	return 0;
7506 
7507 out_disable_device:
7508 	pci_disable_device(pdev);
7509 out_error:
7510 	lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7511 			"1401 Failed to enable pci device\n");
7512 	return -ENODEV;
7513 }
7514 
7515 /**
7516  * lpfc_disable_pci_dev - Disable a generic PCI device.
7517  * @phba: pointer to lpfc hba data structure.
7518  *
7519  * This routine is invoked to disable the PCI device that is common to all
7520  * PCI devices.
7521  **/
7522 static void
7523 lpfc_disable_pci_dev(struct lpfc_hba *phba)
7524 {
7525 	struct pci_dev *pdev;
7526 
7527 	/* Obtain PCI device reference */
7528 	if (!phba->pcidev)
7529 		return;
7530 	else
7531 		pdev = phba->pcidev;
7532 	/* Release PCI resource and disable PCI device */
7533 	pci_release_mem_regions(pdev);
7534 	pci_disable_device(pdev);
7535 
7536 	return;
7537 }
7538 
7539 /**
7540  * lpfc_reset_hba - Reset a hba
7541  * @phba: pointer to lpfc hba data structure.
7542  *
7543  * This routine is invoked to reset a hba device. It brings the HBA
7544  * offline, performs a board restart, and then brings the board back
7545  * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
7546  * on outstanding mailbox commands.
7547  **/
7548 void
7549 lpfc_reset_hba(struct lpfc_hba *phba)
7550 {
7551 	int rc = 0;
7552 
7553 	/* If resets are disabled then set error state and return. */
7554 	if (!phba->cfg_enable_hba_reset) {
7555 		phba->link_state = LPFC_HBA_ERROR;
7556 		return;
7557 	}
7558 
7559 	/* If not LPFC_SLI_ACTIVE, force all IO to be flushed */
7560 	if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) {
7561 		lpfc_offline_prep(phba, LPFC_MBX_WAIT);
7562 	} else {
7563 		if (test_bit(MBX_TMO_ERR, &phba->bit_flags)) {
7564 			/* Perform a PCI function reset to start from clean */
7565 			rc = lpfc_pci_function_reset(phba);
7566 			lpfc_els_flush_all_cmd(phba);
7567 		}
7568 		lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
7569 		lpfc_sli_flush_io_rings(phba);
7570 	}
7571 	lpfc_offline(phba);
7572 	clear_bit(MBX_TMO_ERR, &phba->bit_flags);
7573 	if (unlikely(rc)) {
7574 		lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7575 				"8888 PCI function reset failed rc %x\n",
7576 				rc);
7577 	} else {
7578 		lpfc_sli_brdrestart(phba);
7579 		lpfc_online(phba);
7580 		lpfc_unblock_mgmt_io(phba);
7581 	}
7582 }
7583 
7584 /**
7585  * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
7586  * @phba: pointer to lpfc hba data structure.
7587  *
7588  * This function enables the PCI SR-IOV virtual functions to a physical
7589  * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
7590  * enable the number of virtual functions to the physical function. As
7591  * not all devices support SR-IOV, the return code from the pci_enable_sriov()
7592  * API call does not considered as an error condition for most of the device.
7593  **/
7594 uint16_t
7595 lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
7596 {
7597 	struct pci_dev *pdev = phba->pcidev;
7598 	uint16_t nr_virtfn;
7599 	int pos;
7600 
7601 	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
7602 	if (pos == 0)
7603 		return 0;
7604 
7605 	pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
7606 	return nr_virtfn;
7607 }
7608 
7609 /**
7610  * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
7611  * @phba: pointer to lpfc hba data structure.
7612  * @nr_vfn: number of virtual functions to be enabled.
7613  *
7614  * This function enables the PCI SR-IOV virtual functions to a physical
7615  * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
7616  * enable the number of virtual functions to the physical function. As
7617  * not all devices support SR-IOV, the return code from the pci_enable_sriov()
7618  * API call does not considered as an error condition for most of the device.
7619  **/
7620 int
7621 lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
7622 {
7623 	struct pci_dev *pdev = phba->pcidev;
7624 	uint16_t max_nr_vfn;
7625 	int rc;
7626 
7627 	max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
7628 	if (nr_vfn > max_nr_vfn) {
7629 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7630 				"3057 Requested vfs (%d) greater than "
7631 				"supported vfs (%d)", nr_vfn, max_nr_vfn);
7632 		return -EINVAL;
7633 	}
7634 
7635 	rc = pci_enable_sriov(pdev, nr_vfn);
7636 	if (rc) {
7637 		lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7638 				"2806 Failed to enable sriov on this device "
7639 				"with vfn number nr_vf:%d, rc:%d\n",
7640 				nr_vfn, rc);
7641 	} else
7642 		lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7643 				"2807 Successful enable sriov on this device "
7644 				"with vfn number nr_vf:%d\n", nr_vfn);
7645 	return rc;
7646 }
7647 
7648 static void
7649 lpfc_unblock_requests_work(struct work_struct *work)
7650 {
7651 	struct lpfc_hba *phba = container_of(work, struct lpfc_hba,
7652 					     unblock_request_work);
7653 
7654 	lpfc_unblock_requests(phba);
7655 }
7656 
7657 /**
7658  * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
7659  * @phba: pointer to lpfc hba data structure.
7660  *
7661  * This routine is invoked to set up the driver internal resources before the
7662  * device specific resource setup to support the HBA device it attached to.
7663  *
7664  * Return codes
7665  *	0 - successful
7666  *	other values - error
7667  **/
7668 static int
7669 lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
7670 {
7671 	struct lpfc_sli *psli = &phba->sli;
7672 
7673 	/*
7674 	 * Driver resources common to all SLI revisions
7675 	 */
7676 	atomic_set(&phba->fast_event_count, 0);
7677 	atomic_set(&phba->dbg_log_idx, 0);
7678 	atomic_set(&phba->dbg_log_cnt, 0);
7679 	atomic_set(&phba->dbg_log_dmping, 0);
7680 	spin_lock_init(&phba->hbalock);
7681 
7682 	/* Initialize port_list spinlock */
7683 	spin_lock_init(&phba->port_list_lock);
7684 	INIT_LIST_HEAD(&phba->port_list);
7685 
7686 	INIT_LIST_HEAD(&phba->work_list);
7687 
7688 	/* Initialize the wait queue head for the kernel thread */
7689 	init_waitqueue_head(&phba->work_waitq);
7690 
7691 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7692 			"1403 Protocols supported %s %s %s\n",
7693 			((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
7694 				"SCSI" : " "),
7695 			((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
7696 				"NVME" : " "),
7697 			(phba->nvmet_support ? "NVMET" : " "));
7698 
7699 	/* ras_fwlog state */
7700 	spin_lock_init(&phba->ras_fwlog_lock);
7701 
7702 	/* Initialize the IO buffer list used by driver for SLI3 SCSI */
7703 	spin_lock_init(&phba->scsi_buf_list_get_lock);
7704 	INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
7705 	spin_lock_init(&phba->scsi_buf_list_put_lock);
7706 	INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
7707 
7708 	/* Initialize the fabric iocb list */
7709 	INIT_LIST_HEAD(&phba->fabric_iocb_list);
7710 
7711 	/* Initialize list to save ELS buffers */
7712 	INIT_LIST_HEAD(&phba->elsbuf);
7713 
7714 	/* Initialize FCF connection rec list */
7715 	INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
7716 
7717 	/* Initialize OAS configuration list */
7718 	spin_lock_init(&phba->devicelock);
7719 	INIT_LIST_HEAD(&phba->luns);
7720 
7721 	/* MBOX heartbeat timer */
7722 	timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0);
7723 	/* Fabric block timer */
7724 	timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0);
7725 	/* EA polling mode timer */
7726 	timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0);
7727 	/* Heartbeat timer */
7728 	timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
7729 
7730 	INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work);
7731 
7732 	INIT_DELAYED_WORK(&phba->idle_stat_delay_work,
7733 			  lpfc_idle_stat_delay_work);
7734 	INIT_WORK(&phba->unblock_request_work, lpfc_unblock_requests_work);
7735 	return 0;
7736 }
7737 
7738 /**
7739  * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
7740  * @phba: pointer to lpfc hba data structure.
7741  *
7742  * This routine is invoked to set up the driver internal resources specific to
7743  * support the SLI-3 HBA device it attached to.
7744  *
7745  * Return codes
7746  * 0 - successful
7747  * other values - error
7748  **/
7749 static int
7750 lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
7751 {
7752 	int rc, entry_sz;
7753 
7754 	/*
7755 	 * Initialize timers used by driver
7756 	 */
7757 
7758 	/* FCP polling mode timer */
7759 	timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0);
7760 
7761 	/* Host attention work mask setup */
7762 	phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
7763 	phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
7764 
7765 	/* Get all the module params for configuring this host */
7766 	lpfc_get_cfgparam(phba);
7767 	/* Set up phase-1 common device driver resources */
7768 
7769 	rc = lpfc_setup_driver_resource_phase1(phba);
7770 	if (rc)
7771 		return -ENODEV;
7772 
7773 	if (!phba->sli.sli3_ring)
7774 		phba->sli.sli3_ring = kzalloc_objs(struct lpfc_sli_ring,
7775 						   LPFC_SLI3_MAX_RING,
7776 						   GFP_KERNEL);
7777 	if (!phba->sli.sli3_ring)
7778 		return -ENOMEM;
7779 
7780 	/*
7781 	 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
7782 	 * used to create the sg_dma_buf_pool must be dynamically calculated.
7783 	 */
7784 
7785 	if (phba->sli_rev == LPFC_SLI_REV4)
7786 		entry_sz = sizeof(struct sli4_sge);
7787 	else
7788 		entry_sz = sizeof(struct ulp_bde64);
7789 
7790 	/* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
7791 	if (phba->cfg_enable_bg) {
7792 		/*
7793 		 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
7794 		 * the FCP rsp, and a BDE for each. Sice we have no control
7795 		 * over how many protection data segments the SCSI Layer
7796 		 * will hand us (ie: there could be one for every block
7797 		 * in the IO), we just allocate enough BDEs to accomidate
7798 		 * our max amount and we need to limit lpfc_sg_seg_cnt to
7799 		 * minimize the risk of running out.
7800 		 */
7801 		phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
7802 			sizeof(struct fcp_rsp) +
7803 			(LPFC_MAX_SG_SEG_CNT * entry_sz);
7804 
7805 		if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
7806 			phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
7807 
7808 		/* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
7809 		phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
7810 	} else {
7811 		/*
7812 		 * The scsi_buf for a regular I/O will hold the FCP cmnd,
7813 		 * the FCP rsp, a BDE for each, and a BDE for up to
7814 		 * cfg_sg_seg_cnt data segments.
7815 		 */
7816 		phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
7817 			sizeof(struct fcp_rsp) +
7818 			((phba->cfg_sg_seg_cnt + 2) * entry_sz);
7819 
7820 		/* Total BDEs in BPL for scsi_sg_list */
7821 		phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
7822 	}
7823 
7824 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
7825 			"9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
7826 			phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
7827 			phba->cfg_total_seg_cnt);
7828 
7829 	phba->max_vpi = LPFC_MAX_VPI;
7830 	/* This will be set to correct value after config_port mbox */
7831 	phba->max_vports = 0;
7832 
7833 	/*
7834 	 * Initialize the SLI Layer to run with lpfc HBAs.
7835 	 */
7836 	lpfc_sli_setup(phba);
7837 	lpfc_sli_queue_init(phba);
7838 
7839 	/* Allocate device driver memory */
7840 	if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
7841 		return -ENOMEM;
7842 
7843 	phba->lpfc_sg_dma_buf_pool =
7844 		dma_pool_create("lpfc_sg_dma_buf_pool",
7845 				&phba->pcidev->dev, phba->cfg_sg_dma_buf_size,
7846 				BPL_ALIGN_SZ, 0);
7847 
7848 	if (!phba->lpfc_sg_dma_buf_pool)
7849 		goto fail_free_mem;
7850 
7851 	phba->lpfc_cmd_rsp_buf_pool =
7852 			dma_pool_create("lpfc_cmd_rsp_buf_pool",
7853 					&phba->pcidev->dev,
7854 					sizeof(struct fcp_cmnd) +
7855 					sizeof(struct fcp_rsp),
7856 					BPL_ALIGN_SZ, 0);
7857 
7858 	if (!phba->lpfc_cmd_rsp_buf_pool)
7859 		goto fail_free_dma_buf_pool;
7860 
7861 	/*
7862 	 * Enable sr-iov virtual functions if supported and configured
7863 	 * through the module parameter.
7864 	 */
7865 	if (phba->cfg_sriov_nr_virtfn > 0) {
7866 		rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
7867 						 phba->cfg_sriov_nr_virtfn);
7868 		if (rc) {
7869 			lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7870 					"2808 Requested number of SR-IOV "
7871 					"virtual functions (%d) is not "
7872 					"supported\n",
7873 					phba->cfg_sriov_nr_virtfn);
7874 			phba->cfg_sriov_nr_virtfn = 0;
7875 		}
7876 	}
7877 
7878 	return 0;
7879 
7880 fail_free_dma_buf_pool:
7881 	dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
7882 	phba->lpfc_sg_dma_buf_pool = NULL;
7883 fail_free_mem:
7884 	lpfc_mem_free(phba);
7885 	return -ENOMEM;
7886 }
7887 
7888 /**
7889  * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
7890  * @phba: pointer to lpfc hba data structure.
7891  *
7892  * This routine is invoked to unset the driver internal resources set up
7893  * specific for supporting the SLI-3 HBA device it attached to.
7894  **/
7895 static void
7896 lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
7897 {
7898 	/* Free device driver memory allocated */
7899 	lpfc_mem_free_all(phba);
7900 
7901 	return;
7902 }
7903 
7904 /**
7905  * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
7906  * @phba: pointer to lpfc hba data structure.
7907  *
7908  * This routine is invoked to set up the driver internal resources specific to
7909  * support the SLI-4 HBA device it attached to.
7910  *
7911  * Return codes
7912  * 	0 - successful
7913  * 	other values - error
7914  **/
7915 static int
7916 lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
7917 {
7918 	LPFC_MBOXQ_t *mboxq;
7919 	MAILBOX_t *mb;
7920 	int rc, i, max_buf_size;
7921 	int longs;
7922 	int extra;
7923 	uint64_t wwn;
7924 
7925 	phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
7926 	phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1;
7927 	phba->sli4_hba.curr_disp_cpu = 0;
7928 
7929 	/* Get all the module params for configuring this host */
7930 	lpfc_get_cfgparam(phba);
7931 
7932 	/* Set up phase-1 common device driver resources */
7933 	rc = lpfc_setup_driver_resource_phase1(phba);
7934 	if (rc)
7935 		return -ENODEV;
7936 
7937 	/* Before proceed, wait for POST done and device ready */
7938 	rc = lpfc_sli4_post_status_check(phba);
7939 	if (rc)
7940 		return -ENODEV;
7941 
7942 	/* Allocate all driver workqueues here */
7943 
7944 	/* The lpfc_wq workqueue for deferred irq use */
7945 	phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM | WQ_PERCPU, 0);
7946 	if (!phba->wq)
7947 		return -ENOMEM;
7948 
7949 	/*
7950 	 * Initialize timers used by driver
7951 	 */
7952 
7953 	timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0);
7954 
7955 	/* FCF rediscover timer */
7956 	timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0);
7957 
7958 	/* CMF congestion timer */
7959 	hrtimer_setup(&phba->cmf_timer, lpfc_cmf_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
7960 	/* CMF 1 minute stats collection timer */
7961 	hrtimer_setup(&phba->cmf_stats_timer, lpfc_cmf_stats_timer, CLOCK_MONOTONIC,
7962 		      HRTIMER_MODE_REL);
7963 
7964 	/*
7965 	 * Control structure for handling external multi-buffer mailbox
7966 	 * command pass-through.
7967 	 */
7968 	memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
7969 		sizeof(struct lpfc_mbox_ext_buf_ctx));
7970 	INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
7971 
7972 	phba->max_vpi = LPFC_MAX_VPI;
7973 
7974 	/* This will be set to correct value after the read_config mbox */
7975 	phba->max_vports = 0;
7976 
7977 	/* Program the default value of vlan_id and fc_map */
7978 	phba->valid_vlan = 0;
7979 	phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
7980 	phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
7981 	phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
7982 
7983 	/*
7984 	 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
7985 	 * we will associate a new ring, for each EQ/CQ/WQ tuple.
7986 	 * The WQ create will allocate the ring.
7987 	 */
7988 
7989 	/* Initialize buffer queue management fields */
7990 	INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
7991 	phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
7992 	phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
7993 
7994 	/* for VMID idle timeout if VMID is enabled */
7995 	if (lpfc_is_vmid_enabled(phba))
7996 		timer_setup(&phba->inactive_vmid_poll, lpfc_vmid_poll, 0);
7997 
7998 	/*
7999 	 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
8000 	 */
8001 	/* Initialize the Abort buffer list used by driver */
8002 	spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock);
8003 	INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list);
8004 
8005 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8006 		/* Initialize the Abort nvme buffer list used by driver */
8007 		spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock);
8008 		INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8009 		INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
8010 		spin_lock_init(&phba->sli4_hba.t_active_list_lock);
8011 		INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list);
8012 	}
8013 
8014 	/* This abort list used by worker thread */
8015 	spin_lock_init(&phba->sli4_hba.sgl_list_lock);
8016 	spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
8017 	spin_lock_init(&phba->sli4_hba.asynce_list_lock);
8018 	spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock);
8019 
8020 	/*
8021 	 * Initialize driver internal slow-path work queues
8022 	 */
8023 
8024 	/* Driver internel slow-path CQ Event pool */
8025 	INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
8026 	/* Response IOCB work queue list */
8027 	INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
8028 	/* Asynchronous event CQ Event work queue list */
8029 	INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
8030 	/* Slow-path XRI aborted CQ Event work queue list */
8031 	INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
8032 	/* Receive queue CQ Event work queue list */
8033 	INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
8034 
8035 	/* Initialize extent block lists. */
8036 	INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
8037 	INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
8038 	INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
8039 	INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
8040 
8041 	/* Initialize mboxq lists. If the early init routines fail
8042 	 * these lists need to be correctly initialized.
8043 	 */
8044 	INIT_LIST_HEAD(&phba->sli.mboxq);
8045 	INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
8046 
8047 	/* initialize optic_state to 0xFF */
8048 	phba->sli4_hba.lnk_info.optic_state = 0xff;
8049 
8050 	/* Allocate device driver memory */
8051 	rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
8052 	if (rc)
8053 		goto out_destroy_workqueue;
8054 
8055 	/* IF Type 2 ports get initialized now. */
8056 	if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
8057 	    LPFC_SLI_INTF_IF_TYPE_2) {
8058 		rc = lpfc_pci_function_reset(phba);
8059 		if (unlikely(rc)) {
8060 			rc = -ENODEV;
8061 			goto out_free_mem;
8062 		}
8063 		phba->temp_sensor_support = 1;
8064 	}
8065 
8066 	/* Create the bootstrap mailbox command */
8067 	rc = lpfc_create_bootstrap_mbox(phba);
8068 	if (unlikely(rc))
8069 		goto out_free_mem;
8070 
8071 	/* Set up the host's endian order with the device. */
8072 	rc = lpfc_setup_endian_order(phba);
8073 	if (unlikely(rc))
8074 		goto out_free_bsmbx;
8075 
8076 	/* Set up the hba's configuration parameters. */
8077 	rc = lpfc_sli4_read_config(phba);
8078 	if (unlikely(rc))
8079 		goto out_free_bsmbx;
8080 
8081 	if (phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG) {
8082 		/* Right now the link is down, if FA-PWWN is configured the
8083 		 * firmware will try FLOGI before the driver gets a link up.
8084 		 * If it fails, the driver should get a MISCONFIGURED async
8085 		 * event which will clear this flag. The only notification
8086 		 * the driver gets is if it fails, if it succeeds there is no
8087 		 * notification given. Assume success.
8088 		 */
8089 		phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_FABRIC;
8090 	}
8091 
8092 	rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
8093 	if (unlikely(rc))
8094 		goto out_free_bsmbx;
8095 
8096 	/* IF Type 0 ports get initialized now. */
8097 	if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
8098 	    LPFC_SLI_INTF_IF_TYPE_0) {
8099 		rc = lpfc_pci_function_reset(phba);
8100 		if (unlikely(rc))
8101 			goto out_free_bsmbx;
8102 	}
8103 
8104 	mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
8105 						       GFP_KERNEL);
8106 	if (!mboxq) {
8107 		rc = -ENOMEM;
8108 		goto out_free_bsmbx;
8109 	}
8110 
8111 	/* Check for NVMET being configured */
8112 	phba->nvmet_support = 0;
8113 	if (lpfc_enable_nvmet_cnt) {
8114 
8115 		/* First get WWN of HBA instance */
8116 		lpfc_read_nv(phba, mboxq);
8117 		rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8118 		if (rc != MBX_SUCCESS) {
8119 			lpfc_printf_log(phba, KERN_ERR,
8120 					LOG_TRACE_EVENT,
8121 					"6016 Mailbox failed , mbxCmd x%x "
8122 					"READ_NV, mbxStatus x%x\n",
8123 					bf_get(lpfc_mqe_command, &mboxq->u.mqe),
8124 					bf_get(lpfc_mqe_status, &mboxq->u.mqe));
8125 			mempool_free(mboxq, phba->mbox_mem_pool);
8126 			rc = -EIO;
8127 			goto out_free_bsmbx;
8128 		}
8129 		mb = &mboxq->u.mb;
8130 		memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
8131 		       sizeof(uint64_t));
8132 		wwn = cpu_to_be64(wwn);
8133 		phba->sli4_hba.wwnn.u.name = wwn;
8134 		memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
8135 		       sizeof(uint64_t));
8136 		/* wwn is WWPN of HBA instance */
8137 		wwn = cpu_to_be64(wwn);
8138 		phba->sli4_hba.wwpn.u.name = wwn;
8139 
8140 		/* Check to see if it matches any module parameter */
8141 		for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
8142 			if (wwn == lpfc_enable_nvmet[i]) {
8143 #if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
8144 				if (lpfc_nvmet_mem_alloc(phba))
8145 					break;
8146 
8147 				phba->nvmet_support = 1; /* a match */
8148 
8149 				lpfc_printf_log(phba, KERN_ERR,
8150 						LOG_TRACE_EVENT,
8151 						"6017 NVME Target %016llx\n",
8152 						wwn);
8153 #else
8154 				lpfc_printf_log(phba, KERN_ERR,
8155 						LOG_TRACE_EVENT,
8156 						"6021 Can't enable NVME Target."
8157 						" NVME_TARGET_FC infrastructure"
8158 						" is not in kernel\n");
8159 #endif
8160 				/* Not supported for NVMET */
8161 				phba->cfg_xri_rebalancing = 0;
8162 				if (phba->irq_chann_mode == NHT_MODE) {
8163 					phba->cfg_irq_chann =
8164 						phba->sli4_hba.num_present_cpu;
8165 					phba->cfg_hdw_queue =
8166 						phba->sli4_hba.num_present_cpu;
8167 					phba->irq_chann_mode = NORMAL_MODE;
8168 				}
8169 				break;
8170 			}
8171 		}
8172 	}
8173 
8174 	lpfc_nvme_mod_param_dep(phba);
8175 
8176 	/*
8177 	 * Get sli4 parameters that override parameters from Port capabilities.
8178 	 * If this call fails, it isn't critical unless the SLI4 parameters come
8179 	 * back in conflict.
8180 	 */
8181 	rc = lpfc_get_sli4_parameters(phba, mboxq);
8182 	if (rc) {
8183 		lpfc_log_msg(phba, KERN_WARNING, LOG_INIT,
8184 			     "2999 Could not get SLI4 parameters\n");
8185 		rc = -EIO;
8186 		mempool_free(mboxq, phba->mbox_mem_pool);
8187 		goto out_free_bsmbx;
8188 	}
8189 
8190 	/*
8191 	 * 1 for cmd, 1 for rsp, NVME adds an extra one
8192 	 * for boundary conditions in its max_sgl_segment template.
8193 	 */
8194 	extra = 2;
8195 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
8196 		extra++;
8197 
8198 	/*
8199 	 * It doesn't matter what family our adapter is in, we are
8200 	 * limited to 2 Pages, 512 SGEs, for our SGL.
8201 	 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
8202 	 */
8203 	max_buf_size = (2 * SLI4_PAGE_SIZE);
8204 
8205 	/*
8206 	 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
8207 	 * used to create the sg_dma_buf_pool must be calculated.
8208 	 */
8209 	if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
8210 		/* Both cfg_enable_bg and cfg_external_dif code paths */
8211 
8212 		/*
8213 		 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
8214 		 * the FCP rsp, and a SGE. Sice we have no control
8215 		 * over how many protection segments the SCSI Layer
8216 		 * will hand us (ie: there could be one for every block
8217 		 * in the IO), just allocate enough SGEs to accomidate
8218 		 * our max amount and we need to limit lpfc_sg_seg_cnt
8219 		 * to minimize the risk of running out.
8220 		 */
8221 		phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd32) +
8222 				sizeof(struct fcp_rsp) + max_buf_size;
8223 
8224 		/* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
8225 		phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
8226 
8227 		/*
8228 		 * If supporting DIF, reduce the seg count for scsi to
8229 		 * allow room for the DIF sges.
8230 		 */
8231 		if (phba->cfg_enable_bg &&
8232 		    phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF)
8233 			phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF;
8234 		else
8235 			phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
8236 
8237 	} else {
8238 		/*
8239 		 * The scsi_buf for a regular I/O holds the FCP cmnd,
8240 		 * the FCP rsp, a SGE for each, and a SGE for up to
8241 		 * cfg_sg_seg_cnt data segments.
8242 		 */
8243 		phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd32) +
8244 				sizeof(struct fcp_rsp) +
8245 				((phba->cfg_sg_seg_cnt + extra) *
8246 				sizeof(struct sli4_sge));
8247 
8248 		/* Total SGEs for scsi_sg_list */
8249 		phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra;
8250 		phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
8251 
8252 		/*
8253 		 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only
8254 		 * need to post 1 page for the SGL.
8255 		 */
8256 	}
8257 
8258 	if (phba->cfg_xpsgl && !phba->nvmet_support)
8259 		phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE;
8260 	else if (phba->cfg_sg_dma_buf_size  <= LPFC_MIN_SG_SLI4_BUF_SZ)
8261 		phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
8262 	else
8263 		phba->cfg_sg_dma_buf_size =
8264 				SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
8265 
8266 	phba->border_sge_num = phba->cfg_sg_dma_buf_size /
8267 			       sizeof(struct sli4_sge);
8268 
8269 	/* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */
8270 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8271 		if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) {
8272 			lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT,
8273 					"6300 Reducing NVME sg segment "
8274 					"cnt to %d\n",
8275 					LPFC_MAX_NVME_SEG_CNT);
8276 			phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
8277 		} else
8278 			phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt;
8279 	}
8280 
8281 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
8282 			"9087 sg_seg_cnt:%d dmabuf_size:%d "
8283 			"total:%d scsi:%d nvme:%d\n",
8284 			phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
8285 			phba->cfg_total_seg_cnt,  phba->cfg_scsi_seg_cnt,
8286 			phba->cfg_nvme_seg_cnt);
8287 
8288 	i = min(phba->cfg_sg_dma_buf_size, SLI4_PAGE_SIZE);
8289 
8290 	phba->lpfc_sg_dma_buf_pool =
8291 			dma_pool_create("lpfc_sg_dma_buf_pool",
8292 					&phba->pcidev->dev,
8293 					phba->cfg_sg_dma_buf_size,
8294 					i, 0);
8295 	if (!phba->lpfc_sg_dma_buf_pool) {
8296 		rc = -ENOMEM;
8297 		goto out_free_bsmbx;
8298 	}
8299 
8300 	phba->lpfc_cmd_rsp_buf_pool =
8301 			dma_pool_create("lpfc_cmd_rsp_buf_pool",
8302 					&phba->pcidev->dev,
8303 					sizeof(struct fcp_cmnd32) +
8304 					sizeof(struct fcp_rsp),
8305 					i, 0);
8306 	if (!phba->lpfc_cmd_rsp_buf_pool) {
8307 		rc = -ENOMEM;
8308 		goto out_free_sg_dma_buf;
8309 	}
8310 
8311 	mempool_free(mboxq, phba->mbox_mem_pool);
8312 
8313 	/* Verify OAS is supported */
8314 	lpfc_sli4_oas_verify(phba);
8315 
8316 	/* Verify RAS support on adapter */
8317 	lpfc_sli4_ras_init(phba);
8318 
8319 	/* Verify all the SLI4 queues */
8320 	rc = lpfc_sli4_queue_verify(phba);
8321 	if (rc)
8322 		goto out_free_cmd_rsp_buf;
8323 
8324 	/* Create driver internal CQE event pool */
8325 	rc = lpfc_sli4_cq_event_pool_create(phba);
8326 	if (rc)
8327 		goto out_free_cmd_rsp_buf;
8328 
8329 	/* Initialize sgl lists per host */
8330 	lpfc_init_sgl_list(phba);
8331 
8332 	/* Allocate and initialize active sgl array */
8333 	rc = lpfc_init_active_sgl_array(phba);
8334 	if (rc) {
8335 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8336 				"1430 Failed to initialize sgl list.\n");
8337 		goto out_destroy_cq_event_pool;
8338 	}
8339 	rc = lpfc_sli4_init_rpi_hdrs(phba);
8340 	if (rc) {
8341 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8342 				"1432 Failed to initialize rpi headers.\n");
8343 		goto out_free_active_sgl;
8344 	}
8345 
8346 	/* Allocate eligible FCF bmask memory for FCF roundrobin failover */
8347 	longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
8348 	phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long),
8349 					 GFP_KERNEL);
8350 	if (!phba->fcf.fcf_rr_bmask) {
8351 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8352 				"2759 Failed allocate memory for FCF round "
8353 				"robin failover bmask\n");
8354 		rc = -ENOMEM;
8355 		goto out_remove_rpi_hdrs;
8356 	}
8357 
8358 	phba->sli4_hba.hba_eq_hdl = kzalloc_objs(struct lpfc_hba_eq_hdl,
8359 						 phba->cfg_irq_chann,
8360 						 GFP_KERNEL);
8361 	if (!phba->sli4_hba.hba_eq_hdl) {
8362 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8363 				"2572 Failed allocate memory for "
8364 				"fast-path per-EQ handle array\n");
8365 		rc = -ENOMEM;
8366 		goto out_free_fcf_rr_bmask;
8367 	}
8368 
8369 	phba->sli4_hba.cpu_map = kzalloc_objs(struct lpfc_vector_map_info,
8370 					      phba->sli4_hba.num_possible_cpu,
8371 					      GFP_KERNEL);
8372 	if (!phba->sli4_hba.cpu_map) {
8373 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8374 				"3327 Failed allocate memory for msi-x "
8375 				"interrupt vector mapping\n");
8376 		rc = -ENOMEM;
8377 		goto out_free_hba_eq_hdl;
8378 	}
8379 
8380 	phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info);
8381 	if (!phba->sli4_hba.eq_info) {
8382 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8383 				"3321 Failed allocation for per_cpu stats\n");
8384 		rc = -ENOMEM;
8385 		goto out_free_hba_cpu_map;
8386 	}
8387 
8388 	phba->sli4_hba.idle_stat = kzalloc_objs(*phba->sli4_hba.idle_stat,
8389 						phba->sli4_hba.num_possible_cpu,
8390 						GFP_KERNEL);
8391 	if (!phba->sli4_hba.idle_stat) {
8392 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8393 				"3390 Failed allocation for idle_stat\n");
8394 		rc = -ENOMEM;
8395 		goto out_free_hba_eq_info;
8396 	}
8397 
8398 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8399 	phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat);
8400 	if (!phba->sli4_hba.c_stat) {
8401 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8402 				"3332 Failed allocating per cpu hdwq stats\n");
8403 		rc = -ENOMEM;
8404 		goto out_free_hba_idle_stat;
8405 	}
8406 #endif
8407 
8408 	phba->cmf_stat = alloc_percpu(struct lpfc_cgn_stat);
8409 	if (!phba->cmf_stat) {
8410 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8411 				"3331 Failed allocating per cpu cgn stats\n");
8412 		rc = -ENOMEM;
8413 		goto out_free_hba_hdwq_info;
8414 	}
8415 
8416 	/*
8417 	 * Enable sr-iov virtual functions if supported and configured
8418 	 * through the module parameter.
8419 	 */
8420 	if (phba->cfg_sriov_nr_virtfn > 0) {
8421 		rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
8422 						 phba->cfg_sriov_nr_virtfn);
8423 		if (rc) {
8424 			lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
8425 					"3020 Requested number of SR-IOV "
8426 					"virtual functions (%d) is not "
8427 					"supported\n",
8428 					phba->cfg_sriov_nr_virtfn);
8429 			phba->cfg_sriov_nr_virtfn = 0;
8430 		}
8431 	}
8432 
8433 	return 0;
8434 
8435 out_free_hba_hdwq_info:
8436 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8437 	free_percpu(phba->sli4_hba.c_stat);
8438 out_free_hba_idle_stat:
8439 #endif
8440 	kfree(phba->sli4_hba.idle_stat);
8441 out_free_hba_eq_info:
8442 	free_percpu(phba->sli4_hba.eq_info);
8443 out_free_hba_cpu_map:
8444 	kfree(phba->sli4_hba.cpu_map);
8445 out_free_hba_eq_hdl:
8446 	kfree(phba->sli4_hba.hba_eq_hdl);
8447 out_free_fcf_rr_bmask:
8448 	kfree(phba->fcf.fcf_rr_bmask);
8449 out_remove_rpi_hdrs:
8450 	lpfc_sli4_remove_rpi_hdrs(phba);
8451 out_free_active_sgl:
8452 	lpfc_free_active_sgl(phba);
8453 out_destroy_cq_event_pool:
8454 	lpfc_sli4_cq_event_pool_destroy(phba);
8455 out_free_cmd_rsp_buf:
8456 	dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool);
8457 	phba->lpfc_cmd_rsp_buf_pool = NULL;
8458 out_free_sg_dma_buf:
8459 	dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
8460 	phba->lpfc_sg_dma_buf_pool = NULL;
8461 out_free_bsmbx:
8462 	lpfc_destroy_bootstrap_mbox(phba);
8463 out_free_mem:
8464 	lpfc_mem_free(phba);
8465 out_destroy_workqueue:
8466 	destroy_workqueue(phba->wq);
8467 	phba->wq = NULL;
8468 	return rc;
8469 }
8470 
8471 /**
8472  * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
8473  * @phba: pointer to lpfc hba data structure.
8474  *
8475  * This routine is invoked to unset the driver internal resources set up
8476  * specific for supporting the SLI-4 HBA device it attached to.
8477  **/
8478 static void
8479 lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
8480 {
8481 	struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
8482 
8483 	free_percpu(phba->sli4_hba.eq_info);
8484 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8485 	free_percpu(phba->sli4_hba.c_stat);
8486 #endif
8487 	free_percpu(phba->cmf_stat);
8488 	kfree(phba->sli4_hba.idle_stat);
8489 
8490 	/* Free memory allocated for msi-x interrupt vector to CPU mapping */
8491 	kfree(phba->sli4_hba.cpu_map);
8492 	phba->sli4_hba.num_possible_cpu = 0;
8493 	phba->sli4_hba.num_present_cpu = 0;
8494 	phba->sli4_hba.curr_disp_cpu = 0;
8495 	cpumask_clear(&phba->sli4_hba.irq_aff_mask);
8496 
8497 	/* Free memory allocated for fast-path work queue handles */
8498 	kfree(phba->sli4_hba.hba_eq_hdl);
8499 
8500 	/* Free the allocated rpi headers. */
8501 	lpfc_sli4_remove_rpi_hdrs(phba);
8502 	lpfc_sli4_remove_rpis(phba);
8503 
8504 	/* Free eligible FCF index bmask */
8505 	kfree(phba->fcf.fcf_rr_bmask);
8506 
8507 	/* Free the ELS sgl list */
8508 	lpfc_free_active_sgl(phba);
8509 	lpfc_free_els_sgl_list(phba);
8510 	lpfc_free_nvmet_sgl_list(phba);
8511 
8512 	/* Free the completion queue EQ event pool */
8513 	lpfc_sli4_cq_event_release_all(phba);
8514 	lpfc_sli4_cq_event_pool_destroy(phba);
8515 
8516 	/* Release resource identifiers. */
8517 	lpfc_sli4_dealloc_resource_identifiers(phba);
8518 
8519 	/* Free the bsmbx region. */
8520 	lpfc_destroy_bootstrap_mbox(phba);
8521 
8522 	/* Free the SLI Layer memory with SLI4 HBAs */
8523 	lpfc_mem_free_all(phba);
8524 
8525 	/* Free the current connect table */
8526 	list_for_each_entry_safe(conn_entry, next_conn_entry,
8527 		&phba->fcf_conn_rec_list, list) {
8528 		list_del_init(&conn_entry->list);
8529 		kfree(conn_entry);
8530 	}
8531 
8532 	return;
8533 }
8534 
8535 /**
8536  * lpfc_init_api_table_setup - Set up init api function jump table
8537  * @phba: The hba struct for which this call is being executed.
8538  * @dev_grp: The HBA PCI-Device group number.
8539  *
8540  * This routine sets up the device INIT interface API function jump table
8541  * in @phba struct.
8542  *
8543  * Returns: 0 - success, -ENODEV - failure.
8544  **/
8545 int
8546 lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
8547 {
8548 	phba->lpfc_hba_init_link = lpfc_hba_init_link;
8549 	phba->lpfc_hba_down_link = lpfc_hba_down_link;
8550 	phba->lpfc_selective_reset = lpfc_selective_reset;
8551 	switch (dev_grp) {
8552 	case LPFC_PCI_DEV_LP:
8553 		phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
8554 		phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
8555 		phba->lpfc_stop_port = lpfc_stop_port_s3;
8556 		break;
8557 	case LPFC_PCI_DEV_OC:
8558 		phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
8559 		phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
8560 		phba->lpfc_stop_port = lpfc_stop_port_s4;
8561 		break;
8562 	default:
8563 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8564 				"1431 Invalid HBA PCI-device group: 0x%x\n",
8565 				dev_grp);
8566 		return -ENODEV;
8567 	}
8568 	return 0;
8569 }
8570 
8571 /**
8572  * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
8573  * @phba: pointer to lpfc hba data structure.
8574  *
8575  * This routine is invoked to set up the driver internal resources after the
8576  * device specific resource setup to support the HBA device it attached to.
8577  *
8578  * Return codes
8579  * 	0 - successful
8580  * 	other values - error
8581  **/
8582 static int
8583 lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
8584 {
8585 	int error;
8586 
8587 	/* Startup the kernel thread for this host adapter. */
8588 	phba->worker_thread = kthread_run(lpfc_do_work, phba,
8589 					  "lpfc_worker_%d", phba->brd_no);
8590 	if (IS_ERR(phba->worker_thread)) {
8591 		error = PTR_ERR(phba->worker_thread);
8592 		return error;
8593 	}
8594 
8595 	return 0;
8596 }
8597 
8598 /**
8599  * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
8600  * @phba: pointer to lpfc hba data structure.
8601  *
8602  * This routine is invoked to unset the driver internal resources set up after
8603  * the device specific resource setup for supporting the HBA device it
8604  * attached to.
8605  **/
8606 static void
8607 lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
8608 {
8609 	if (phba->wq) {
8610 		destroy_workqueue(phba->wq);
8611 		phba->wq = NULL;
8612 	}
8613 
8614 	/* Stop kernel worker thread */
8615 	if (phba->worker_thread)
8616 		kthread_stop(phba->worker_thread);
8617 }
8618 
8619 /**
8620  * lpfc_free_iocb_list - Free iocb list.
8621  * @phba: pointer to lpfc hba data structure.
8622  *
8623  * This routine is invoked to free the driver's IOCB list and memory.
8624  **/
8625 void
8626 lpfc_free_iocb_list(struct lpfc_hba *phba)
8627 {
8628 	struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
8629 
8630 	spin_lock_irq(&phba->hbalock);
8631 	list_for_each_entry_safe(iocbq_entry, iocbq_next,
8632 				 &phba->lpfc_iocb_list, list) {
8633 		list_del(&iocbq_entry->list);
8634 		kfree(iocbq_entry);
8635 		phba->total_iocbq_bufs--;
8636 	}
8637 	spin_unlock_irq(&phba->hbalock);
8638 
8639 	return;
8640 }
8641 
8642 /**
8643  * lpfc_init_iocb_list - Allocate and initialize iocb list.
8644  * @phba: pointer to lpfc hba data structure.
8645  * @iocb_count: number of requested iocbs
8646  *
8647  * This routine is invoked to allocate and initizlize the driver's IOCB
8648  * list and set up the IOCB tag array accordingly.
8649  *
8650  * Return codes
8651  *	0 - successful
8652  *	other values - error
8653  **/
8654 int
8655 lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
8656 {
8657 	struct lpfc_iocbq *iocbq_entry = NULL;
8658 	uint16_t iotag;
8659 	int i;
8660 
8661 	/* Initialize and populate the iocb list per host.  */
8662 	INIT_LIST_HEAD(&phba->lpfc_iocb_list);
8663 	for (i = 0; i < iocb_count; i++) {
8664 		iocbq_entry = kzalloc_obj(struct lpfc_iocbq, GFP_KERNEL);
8665 		if (iocbq_entry == NULL) {
8666 			printk(KERN_ERR "%s: only allocated %d iocbs of "
8667 				"expected %d count. Unloading driver.\n",
8668 				__func__, i, iocb_count);
8669 			goto out_free_iocbq;
8670 		}
8671 
8672 		iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
8673 		if (iotag == 0) {
8674 			kfree(iocbq_entry);
8675 			printk(KERN_ERR "%s: failed to allocate IOTAG. "
8676 				"Unloading driver.\n", __func__);
8677 			goto out_free_iocbq;
8678 		}
8679 		iocbq_entry->sli4_lxritag = NO_XRI;
8680 		iocbq_entry->sli4_xritag = NO_XRI;
8681 
8682 		spin_lock_irq(&phba->hbalock);
8683 		list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
8684 		phba->total_iocbq_bufs++;
8685 		spin_unlock_irq(&phba->hbalock);
8686 	}
8687 
8688 	return 0;
8689 
8690 out_free_iocbq:
8691 	lpfc_free_iocb_list(phba);
8692 
8693 	return -ENOMEM;
8694 }
8695 
8696 /**
8697  * lpfc_free_sgl_list - Free a given sgl list.
8698  * @phba: pointer to lpfc hba data structure.
8699  * @sglq_list: pointer to the head of sgl list.
8700  *
8701  * This routine is invoked to free a give sgl list and memory.
8702  **/
8703 void
8704 lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
8705 {
8706 	struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8707 
8708 	list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
8709 		list_del(&sglq_entry->list);
8710 		lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
8711 		kfree(sglq_entry);
8712 	}
8713 }
8714 
8715 /**
8716  * lpfc_free_els_sgl_list - Free els sgl list.
8717  * @phba: pointer to lpfc hba data structure.
8718  *
8719  * This routine is invoked to free the driver's els sgl list and memory.
8720  **/
8721 static void
8722 lpfc_free_els_sgl_list(struct lpfc_hba *phba)
8723 {
8724 	LIST_HEAD(sglq_list);
8725 
8726 	/* Retrieve all els sgls from driver list */
8727 	spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
8728 	list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
8729 	spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
8730 
8731 	/* Now free the sgl list */
8732 	lpfc_free_sgl_list(phba, &sglq_list);
8733 }
8734 
8735 /**
8736  * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
8737  * @phba: pointer to lpfc hba data structure.
8738  *
8739  * This routine is invoked to free the driver's nvmet sgl list and memory.
8740  **/
8741 static void
8742 lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
8743 {
8744 	struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8745 	LIST_HEAD(sglq_list);
8746 
8747 	/* Retrieve all nvmet sgls from driver list */
8748 	spin_lock_irq(&phba->hbalock);
8749 	spin_lock(&phba->sli4_hba.sgl_list_lock);
8750 	list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
8751 	spin_unlock(&phba->sli4_hba.sgl_list_lock);
8752 	spin_unlock_irq(&phba->hbalock);
8753 
8754 	/* Now free the sgl list */
8755 	list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
8756 		list_del(&sglq_entry->list);
8757 		lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
8758 		kfree(sglq_entry);
8759 	}
8760 
8761 	/* Update the nvmet_xri_cnt to reflect no current sgls.
8762 	 * The next initialization cycle sets the count and allocates
8763 	 * the sgls over again.
8764 	 */
8765 	phba->sli4_hba.nvmet_xri_cnt = 0;
8766 }
8767 
8768 /**
8769  * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
8770  * @phba: pointer to lpfc hba data structure.
8771  *
8772  * This routine is invoked to allocate the driver's active sgl memory.
8773  * This array will hold the sglq_entry's for active IOs.
8774  **/
8775 static int
8776 lpfc_init_active_sgl_array(struct lpfc_hba *phba)
8777 {
8778 	int size;
8779 	size = sizeof(struct lpfc_sglq *);
8780 	size *= phba->sli4_hba.max_cfg_param.max_xri;
8781 
8782 	phba->sli4_hba.lpfc_sglq_active_list =
8783 		kzalloc(size, GFP_KERNEL);
8784 	if (!phba->sli4_hba.lpfc_sglq_active_list)
8785 		return -ENOMEM;
8786 	return 0;
8787 }
8788 
8789 /**
8790  * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
8791  * @phba: pointer to lpfc hba data structure.
8792  *
8793  * This routine is invoked to walk through the array of active sglq entries
8794  * and free all of the resources.
8795  * This is just a place holder for now.
8796  **/
8797 static void
8798 lpfc_free_active_sgl(struct lpfc_hba *phba)
8799 {
8800 	kfree(phba->sli4_hba.lpfc_sglq_active_list);
8801 }
8802 
8803 /**
8804  * lpfc_init_sgl_list - Allocate and initialize sgl list.
8805  * @phba: pointer to lpfc hba data structure.
8806  *
8807  * This routine is invoked to allocate and initizlize the driver's sgl
8808  * list and set up the sgl xritag tag array accordingly.
8809  *
8810  **/
8811 static void
8812 lpfc_init_sgl_list(struct lpfc_hba *phba)
8813 {
8814 	/* Initialize and populate the sglq list per host/VF. */
8815 	INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
8816 	INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
8817 	INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
8818 	INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8819 
8820 	/* els xri-sgl book keeping */
8821 	phba->sli4_hba.els_xri_cnt = 0;
8822 
8823 	/* nvme xri-buffer book keeping */
8824 	phba->sli4_hba.io_xri_cnt = 0;
8825 }
8826 
8827 /**
8828  * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
8829  * @phba: pointer to lpfc hba data structure.
8830  *
8831  * This routine is invoked to post rpi header templates to the
8832  * port for those SLI4 ports that do not support extents.  This routine
8833  * posts a PAGE_SIZE memory region to the port to hold up to
8834  * PAGE_SIZE modulo 64 rpi context headers.  This is an initialization routine
8835  * and should be called only when interrupts are disabled.
8836  *
8837  * Return codes
8838  * 	0 - successful
8839  *	-ERROR - otherwise.
8840  **/
8841 int
8842 lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
8843 {
8844 	int rc = 0;
8845 	struct lpfc_rpi_hdr *rpi_hdr;
8846 
8847 	INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
8848 	if (!phba->sli4_hba.rpi_hdrs_in_use)
8849 		return rc;
8850 	if (phba->sli4_hba.extents_in_use)
8851 		return -EIO;
8852 
8853 	rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
8854 	if (!rpi_hdr) {
8855 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8856 				"0391 Error during rpi post operation\n");
8857 		lpfc_sli4_remove_rpis(phba);
8858 		rc = -ENODEV;
8859 	}
8860 
8861 	return rc;
8862 }
8863 
8864 /**
8865  * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
8866  * @phba: pointer to lpfc hba data structure.
8867  *
8868  * This routine is invoked to allocate a single 4KB memory region to
8869  * support rpis and stores them in the phba.  This single region
8870  * provides support for up to 64 rpis.  The region is used globally
8871  * by the device.
8872  *
8873  * Returns:
8874  *   A valid rpi hdr on success.
8875  *   A NULL pointer on any failure.
8876  **/
8877 struct lpfc_rpi_hdr *
8878 lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
8879 {
8880 	uint16_t rpi_limit, curr_rpi_range;
8881 	struct lpfc_dmabuf *dmabuf;
8882 	struct lpfc_rpi_hdr *rpi_hdr;
8883 
8884 	/*
8885 	 * If the SLI4 port supports extents, posting the rpi header isn't
8886 	 * required.  Set the expected maximum count and let the actual value
8887 	 * get set when extents are fully allocated.
8888 	 */
8889 	if (!phba->sli4_hba.rpi_hdrs_in_use)
8890 		return NULL;
8891 	if (phba->sli4_hba.extents_in_use)
8892 		return NULL;
8893 
8894 	/* The limit on the logical index is just the max_rpi count. */
8895 	rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
8896 
8897 	spin_lock_irq(&phba->hbalock);
8898 	/*
8899 	 * Establish the starting RPI in this header block.  The starting
8900 	 * rpi is normalized to a zero base because the physical rpi is
8901 	 * port based.
8902 	 */
8903 	curr_rpi_range = phba->sli4_hba.next_rpi;
8904 	spin_unlock_irq(&phba->hbalock);
8905 
8906 	/* Reached full RPI range */
8907 	if (curr_rpi_range == rpi_limit)
8908 		return NULL;
8909 
8910 	/*
8911 	 * First allocate the protocol header region for the port.  The
8912 	 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
8913 	 */
8914 	dmabuf = kzalloc_obj(struct lpfc_dmabuf, GFP_KERNEL);
8915 	if (!dmabuf)
8916 		return NULL;
8917 
8918 	dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
8919 					  LPFC_HDR_TEMPLATE_SIZE,
8920 					  &dmabuf->phys, GFP_KERNEL);
8921 	if (!dmabuf->virt) {
8922 		rpi_hdr = NULL;
8923 		goto err_free_dmabuf;
8924 	}
8925 
8926 	if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
8927 		rpi_hdr = NULL;
8928 		goto err_free_coherent;
8929 	}
8930 
8931 	/* Save the rpi header data for cleanup later. */
8932 	rpi_hdr = kzalloc_obj(struct lpfc_rpi_hdr, GFP_KERNEL);
8933 	if (!rpi_hdr)
8934 		goto err_free_coherent;
8935 
8936 	rpi_hdr->dmabuf = dmabuf;
8937 	rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
8938 	rpi_hdr->page_count = 1;
8939 	spin_lock_irq(&phba->hbalock);
8940 
8941 	/* The rpi_hdr stores the logical index only. */
8942 	rpi_hdr->start_rpi = curr_rpi_range;
8943 	rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
8944 	list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
8945 
8946 	spin_unlock_irq(&phba->hbalock);
8947 	return rpi_hdr;
8948 
8949  err_free_coherent:
8950 	dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
8951 			  dmabuf->virt, dmabuf->phys);
8952  err_free_dmabuf:
8953 	kfree(dmabuf);
8954 	return NULL;
8955 }
8956 
8957 /**
8958  * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
8959  * @phba: pointer to lpfc hba data structure.
8960  *
8961  * This routine is invoked to remove all memory resources allocated
8962  * to support rpis for SLI4 ports not supporting extents. This routine
8963  * presumes the caller has released all rpis consumed by fabric or port
8964  * logins and is prepared to have the header pages removed.
8965  **/
8966 void
8967 lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
8968 {
8969 	struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
8970 
8971 	if (!phba->sli4_hba.rpi_hdrs_in_use)
8972 		goto exit;
8973 
8974 	list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
8975 				 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
8976 		list_del(&rpi_hdr->list);
8977 		dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
8978 				  rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
8979 		kfree(rpi_hdr->dmabuf);
8980 		kfree(rpi_hdr);
8981 	}
8982  exit:
8983 	/* There are no rpis available to the port now. */
8984 	phba->sli4_hba.next_rpi = 0;
8985 }
8986 
8987 /**
8988  * lpfc_hba_alloc - Allocate driver hba data structure for a device.
8989  * @pdev: pointer to pci device data structure.
8990  *
8991  * This routine is invoked to allocate the driver hba data structure for an
8992  * HBA device. If the allocation is successful, the phba reference to the
8993  * PCI device data structure is set.
8994  *
8995  * Return codes
8996  *      pointer to @phba - successful
8997  *      NULL - error
8998  **/
8999 static struct lpfc_hba *
9000 lpfc_hba_alloc(struct pci_dev *pdev)
9001 {
9002 	struct lpfc_hba *phba;
9003 
9004 	/* Allocate memory for HBA structure */
9005 	phba = kzalloc_obj(struct lpfc_hba, GFP_KERNEL);
9006 	if (!phba) {
9007 		dev_err(&pdev->dev, "failed to allocate hba struct\n");
9008 		return NULL;
9009 	}
9010 
9011 	/* Set reference to PCI device in HBA structure */
9012 	phba->pcidev = pdev;
9013 
9014 	/* Assign an unused board number */
9015 	phba->brd_no = lpfc_get_instance();
9016 	if (phba->brd_no < 0) {
9017 		kfree(phba);
9018 		return NULL;
9019 	}
9020 	phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
9021 
9022 	spin_lock_init(&phba->ct_ev_lock);
9023 	INIT_LIST_HEAD(&phba->ct_ev_waiters);
9024 
9025 	return phba;
9026 }
9027 
9028 /**
9029  * lpfc_hba_free - Free driver hba data structure with a device.
9030  * @phba: pointer to lpfc hba data structure.
9031  *
9032  * This routine is invoked to free the driver hba data structure with an
9033  * HBA device.
9034  **/
9035 static void
9036 lpfc_hba_free(struct lpfc_hba *phba)
9037 {
9038 	if (phba->sli_rev == LPFC_SLI_REV4)
9039 		kfree(phba->sli4_hba.hdwq);
9040 
9041 	/* Release the driver assigned board number */
9042 	idr_remove(&lpfc_hba_index, phba->brd_no);
9043 
9044 	/* Free memory allocated with sli3 rings */
9045 	kfree(phba->sli.sli3_ring);
9046 	phba->sli.sli3_ring = NULL;
9047 
9048 	kfree(phba);
9049 	return;
9050 }
9051 
9052 /**
9053  * lpfc_setup_fdmi_mask - Setup initial FDMI mask for HBA and Port attributes
9054  * @vport: pointer to lpfc vport data structure.
9055  *
9056  * This routine is will setup initial FDMI attribute masks for
9057  * FDMI2 or SmartSAN depending on module parameters. The driver will attempt
9058  * to get these attributes first before falling back, the attribute
9059  * fallback hierarchy is SmartSAN -> FDMI2 -> FMDI1
9060  **/
9061 void
9062 lpfc_setup_fdmi_mask(struct lpfc_vport *vport)
9063 {
9064 	struct lpfc_hba *phba = vport->phba;
9065 
9066 	set_bit(FC_ALLOW_FDMI, &vport->load_flag);
9067 	if (phba->cfg_enable_SmartSAN ||
9068 	    phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT) {
9069 		/* Setup appropriate attribute masks */
9070 		vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
9071 		if (phba->cfg_enable_SmartSAN)
9072 			vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
9073 		else
9074 			vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
9075 	}
9076 
9077 	lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY,
9078 			 "6077 Setup FDMI mask: hba x%x port x%x\n",
9079 			 vport->fdmi_hba_mask, vport->fdmi_port_mask);
9080 }
9081 
9082 /**
9083  * lpfc_create_shost - Create hba physical port with associated scsi host.
9084  * @phba: pointer to lpfc hba data structure.
9085  *
9086  * This routine is invoked to create HBA physical port and associate a SCSI
9087  * host with it.
9088  *
9089  * Return codes
9090  *      0 - successful
9091  *      other values - error
9092  **/
9093 static int
9094 lpfc_create_shost(struct lpfc_hba *phba)
9095 {
9096 	struct lpfc_vport *vport;
9097 	struct Scsi_Host  *shost;
9098 
9099 	/* Initialize HBA FC structure */
9100 	phba->fc_edtov = FF_DEF_EDTOV;
9101 	phba->fc_ratov = FF_DEF_RATOV;
9102 	phba->fc_altov = FF_DEF_ALTOV;
9103 	phba->fc_arbtov = FF_DEF_ARBTOV;
9104 
9105 	atomic_set(&phba->sdev_cnt, 0);
9106 	vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
9107 	if (!vport)
9108 		return -ENODEV;
9109 
9110 	shost = lpfc_shost_from_vport(vport);
9111 	phba->pport = vport;
9112 
9113 	if (phba->nvmet_support) {
9114 		/* Only 1 vport (pport) will support NVME target */
9115 		phba->targetport = NULL;
9116 		phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
9117 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC,
9118 				"6076 NVME Target Found\n");
9119 	}
9120 
9121 	lpfc_debugfs_initialize(vport);
9122 	/* Put reference to SCSI host to driver's device private data */
9123 	pci_set_drvdata(phba->pcidev, shost);
9124 
9125 	lpfc_setup_fdmi_mask(vport);
9126 
9127 	/*
9128 	 * At this point we are fully registered with PSA. In addition,
9129 	 * any initial discovery should be completed.
9130 	 */
9131 	return 0;
9132 }
9133 
9134 /**
9135  * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
9136  * @phba: pointer to lpfc hba data structure.
9137  *
9138  * This routine is invoked to destroy HBA physical port and the associated
9139  * SCSI host.
9140  **/
9141 static void
9142 lpfc_destroy_shost(struct lpfc_hba *phba)
9143 {
9144 	struct lpfc_vport *vport = phba->pport;
9145 
9146 	/* Destroy physical port that associated with the SCSI host */
9147 	destroy_port(vport);
9148 
9149 	return;
9150 }
9151 
9152 /**
9153  * lpfc_setup_bg - Setup Block guard structures and debug areas.
9154  * @phba: pointer to lpfc hba data structure.
9155  * @shost: the shost to be used to detect Block guard settings.
9156  *
9157  * This routine sets up the local Block guard protocol settings for @shost.
9158  * This routine also allocates memory for debugging bg buffers.
9159  **/
9160 static void
9161 lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
9162 {
9163 	uint32_t old_mask;
9164 	uint32_t old_guard;
9165 
9166 	if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
9167 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9168 				"1478 Registering BlockGuard with the "
9169 				"SCSI layer\n");
9170 
9171 		old_mask = phba->cfg_prot_mask;
9172 		old_guard = phba->cfg_prot_guard;
9173 
9174 		/* Only allow supported values */
9175 		phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
9176 			SHOST_DIX_TYPE0_PROTECTION |
9177 			SHOST_DIX_TYPE1_PROTECTION);
9178 		phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
9179 					 SHOST_DIX_GUARD_CRC);
9180 
9181 		/* DIF Type 1 protection for profiles AST1/C1 is end to end */
9182 		if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
9183 			phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
9184 
9185 		if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
9186 			if ((old_mask != phba->cfg_prot_mask) ||
9187 				(old_guard != phba->cfg_prot_guard))
9188 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9189 					"1475 Registering BlockGuard with the "
9190 					"SCSI layer: mask %d  guard %d\n",
9191 					phba->cfg_prot_mask,
9192 					phba->cfg_prot_guard);
9193 
9194 			scsi_host_set_prot(shost, phba->cfg_prot_mask);
9195 			scsi_host_set_guard(shost, phba->cfg_prot_guard);
9196 		} else
9197 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9198 				"1479 Not Registering BlockGuard with the SCSI "
9199 				"layer, Bad protection parameters: %d %d\n",
9200 				old_mask, old_guard);
9201 	}
9202 }
9203 
9204 /**
9205  * lpfc_post_init_setup - Perform necessary device post initialization setup.
9206  * @phba: pointer to lpfc hba data structure.
9207  *
9208  * This routine is invoked to perform all the necessary post initialization
9209  * setup for the device.
9210  **/
9211 static void
9212 lpfc_post_init_setup(struct lpfc_hba *phba)
9213 {
9214 	struct Scsi_Host  *shost;
9215 	struct lpfc_adapter_event_header adapter_event;
9216 
9217 	/* Get the default values for Model Name and Description */
9218 	lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
9219 
9220 	/*
9221 	 * hba setup may have changed the hba_queue_depth so we need to
9222 	 * adjust the value of can_queue.
9223 	 */
9224 	shost = pci_get_drvdata(phba->pcidev);
9225 	shost->can_queue = phba->cfg_hba_queue_depth - 10;
9226 
9227 	lpfc_host_attrib_init(shost);
9228 
9229 	if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9230 		spin_lock_irq(shost->host_lock);
9231 		lpfc_poll_start_timer(phba);
9232 		spin_unlock_irq(shost->host_lock);
9233 	}
9234 
9235 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9236 			"0428 Perform SCSI scan\n");
9237 	/* Send board arrival event to upper layer */
9238 	adapter_event.event_type = FC_REG_ADAPTER_EVENT;
9239 	adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
9240 	fc_host_post_vendor_event(shost, fc_get_event_number(),
9241 				  sizeof(adapter_event),
9242 				  (char *) &adapter_event,
9243 				  LPFC_NL_VENDOR_ID);
9244 	return;
9245 }
9246 
9247 /**
9248  * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
9249  * @phba: pointer to lpfc hba data structure.
9250  *
9251  * This routine is invoked to set up the PCI device memory space for device
9252  * with SLI-3 interface spec.
9253  *
9254  * Return codes
9255  * 	0 - successful
9256  * 	other values - error
9257  **/
9258 static int
9259 lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
9260 {
9261 	struct pci_dev *pdev = phba->pcidev;
9262 	unsigned long bar0map_len, bar2map_len;
9263 	int i, hbq_count;
9264 	void *ptr;
9265 	int error;
9266 
9267 	if (!pdev)
9268 		return -ENODEV;
9269 
9270 	/* Set the device DMA mask size */
9271 	error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9272 	if (error)
9273 		error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9274 	if (error)
9275 		return error;
9276 	error = -ENODEV;
9277 
9278 	/* Get the bus address of Bar0 and Bar2 and the number of bytes
9279 	 * required by each mapping.
9280 	 */
9281 	phba->pci_bar0_map = pci_resource_start(pdev, 0);
9282 	bar0map_len = pci_resource_len(pdev, 0);
9283 
9284 	phba->pci_bar2_map = pci_resource_start(pdev, 2);
9285 	bar2map_len = pci_resource_len(pdev, 2);
9286 
9287 	/* Map HBA SLIM to a kernel virtual address. */
9288 	phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
9289 	if (!phba->slim_memmap_p) {
9290 		dev_printk(KERN_ERR, &pdev->dev,
9291 			   "ioremap failed for SLIM memory.\n");
9292 		goto out;
9293 	}
9294 
9295 	/* Map HBA Control Registers to a kernel virtual address. */
9296 	phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
9297 	if (!phba->ctrl_regs_memmap_p) {
9298 		dev_printk(KERN_ERR, &pdev->dev,
9299 			   "ioremap failed for HBA control registers.\n");
9300 		goto out_iounmap_slim;
9301 	}
9302 
9303 	/* Allocate memory for SLI-2 structures */
9304 	phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9305 					       &phba->slim2p.phys, GFP_KERNEL);
9306 	if (!phba->slim2p.virt)
9307 		goto out_iounmap;
9308 
9309 	phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
9310 	phba->mbox_ext = (phba->slim2p.virt +
9311 		offsetof(struct lpfc_sli2_slim, mbx_ext_words));
9312 	phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
9313 	phba->IOCBs = (phba->slim2p.virt +
9314 		       offsetof(struct lpfc_sli2_slim, IOCBs));
9315 
9316 	phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
9317 						 lpfc_sli_hbq_size(),
9318 						 &phba->hbqslimp.phys,
9319 						 GFP_KERNEL);
9320 	if (!phba->hbqslimp.virt)
9321 		goto out_free_slim;
9322 
9323 	hbq_count = lpfc_sli_hbq_count();
9324 	ptr = phba->hbqslimp.virt;
9325 	for (i = 0; i < hbq_count; ++i) {
9326 		phba->hbqs[i].hbq_virt = ptr;
9327 		INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
9328 		ptr += (lpfc_hbq_defs[i]->entry_count *
9329 			sizeof(struct lpfc_hbq_entry));
9330 	}
9331 	phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
9332 	phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
9333 
9334 	memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
9335 
9336 	phba->MBslimaddr = phba->slim_memmap_p;
9337 	phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
9338 	phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
9339 	phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
9340 	phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
9341 
9342 	return 0;
9343 
9344 out_free_slim:
9345 	dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9346 			  phba->slim2p.virt, phba->slim2p.phys);
9347 out_iounmap:
9348 	iounmap(phba->ctrl_regs_memmap_p);
9349 out_iounmap_slim:
9350 	iounmap(phba->slim_memmap_p);
9351 out:
9352 	return error;
9353 }
9354 
9355 /**
9356  * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
9357  * @phba: pointer to lpfc hba data structure.
9358  *
9359  * This routine is invoked to unset the PCI device memory space for device
9360  * with SLI-3 interface spec.
9361  **/
9362 static void
9363 lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
9364 {
9365 	struct pci_dev *pdev;
9366 
9367 	/* Obtain PCI device reference */
9368 	if (!phba->pcidev)
9369 		return;
9370 	else
9371 		pdev = phba->pcidev;
9372 
9373 	/* Free coherent DMA memory allocated */
9374 	dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
9375 			  phba->hbqslimp.virt, phba->hbqslimp.phys);
9376 	dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9377 			  phba->slim2p.virt, phba->slim2p.phys);
9378 
9379 	/* I/O memory unmap */
9380 	iounmap(phba->ctrl_regs_memmap_p);
9381 	iounmap(phba->slim_memmap_p);
9382 
9383 	return;
9384 }
9385 
9386 /**
9387  * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
9388  * @phba: pointer to lpfc hba data structure.
9389  *
9390  * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
9391  * done and check status.
9392  *
9393  * Return 0 if successful, otherwise -ENODEV.
9394  **/
9395 int
9396 lpfc_sli4_post_status_check(struct lpfc_hba *phba)
9397 {
9398 	struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
9399 	struct lpfc_register reg_data;
9400 	int i, port_error = 0;
9401 	uint32_t if_type;
9402 
9403 	memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
9404 	memset(&reg_data, 0, sizeof(reg_data));
9405 	if (!phba->sli4_hba.PSMPHRregaddr)
9406 		return -ENODEV;
9407 
9408 	/* Wait up to 30 seconds for the SLI Port POST done and ready */
9409 	for (i = 0; i < 3000; i++) {
9410 		if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
9411 			&portsmphr_reg.word0) ||
9412 			(bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
9413 			/* Port has a fatal POST error, break out */
9414 			port_error = -ENODEV;
9415 			break;
9416 		}
9417 		if (LPFC_POST_STAGE_PORT_READY ==
9418 		    bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
9419 			break;
9420 		msleep(10);
9421 	}
9422 
9423 	/*
9424 	 * If there was a port error during POST, then don't proceed with
9425 	 * other register reads as the data may not be valid.  Just exit.
9426 	 */
9427 	if (port_error) {
9428 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9429 			"1408 Port Failed POST - portsmphr=0x%x, "
9430 			"perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
9431 			"scr2=x%x, hscratch=x%x, pstatus=x%x\n",
9432 			portsmphr_reg.word0,
9433 			bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
9434 			bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
9435 			bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
9436 			bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
9437 			bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
9438 			bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
9439 			bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
9440 			bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
9441 	} else {
9442 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9443 				"2534 Device Info: SLIFamily=0x%x, "
9444 				"SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
9445 				"SLIHint_2=0x%x, FT=0x%x\n",
9446 				bf_get(lpfc_sli_intf_sli_family,
9447 				       &phba->sli4_hba.sli_intf),
9448 				bf_get(lpfc_sli_intf_slirev,
9449 				       &phba->sli4_hba.sli_intf),
9450 				bf_get(lpfc_sli_intf_if_type,
9451 				       &phba->sli4_hba.sli_intf),
9452 				bf_get(lpfc_sli_intf_sli_hint1,
9453 				       &phba->sli4_hba.sli_intf),
9454 				bf_get(lpfc_sli_intf_sli_hint2,
9455 				       &phba->sli4_hba.sli_intf),
9456 				bf_get(lpfc_sli_intf_func_type,
9457 				       &phba->sli4_hba.sli_intf));
9458 		/*
9459 		 * Check for other Port errors during the initialization
9460 		 * process.  Fail the load if the port did not come up
9461 		 * correctly.
9462 		 */
9463 		if_type = bf_get(lpfc_sli_intf_if_type,
9464 				 &phba->sli4_hba.sli_intf);
9465 		switch (if_type) {
9466 		case LPFC_SLI_INTF_IF_TYPE_0:
9467 			phba->sli4_hba.ue_mask_lo =
9468 			      readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
9469 			phba->sli4_hba.ue_mask_hi =
9470 			      readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
9471 			uerrlo_reg.word0 =
9472 			      readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
9473 			uerrhi_reg.word0 =
9474 				readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
9475 			if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
9476 			    (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
9477 				lpfc_printf_log(phba, KERN_ERR,
9478 						LOG_TRACE_EVENT,
9479 						"1422 Unrecoverable Error "
9480 						"Detected during POST "
9481 						"uerr_lo_reg=0x%x, "
9482 						"uerr_hi_reg=0x%x, "
9483 						"ue_mask_lo_reg=0x%x, "
9484 						"ue_mask_hi_reg=0x%x\n",
9485 						uerrlo_reg.word0,
9486 						uerrhi_reg.word0,
9487 						phba->sli4_hba.ue_mask_lo,
9488 						phba->sli4_hba.ue_mask_hi);
9489 				port_error = -ENODEV;
9490 			}
9491 			break;
9492 		case LPFC_SLI_INTF_IF_TYPE_2:
9493 		case LPFC_SLI_INTF_IF_TYPE_6:
9494 			/* Final checks.  The port status should be clean. */
9495 			if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
9496 				&reg_data.word0) ||
9497 				lpfc_sli4_unrecoverable_port(&reg_data)) {
9498 				phba->work_status[0] =
9499 					readl(phba->sli4_hba.u.if_type2.
9500 					      ERR1regaddr);
9501 				phba->work_status[1] =
9502 					readl(phba->sli4_hba.u.if_type2.
9503 					      ERR2regaddr);
9504 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9505 					"2888 Unrecoverable port error "
9506 					"following POST: port status reg "
9507 					"0x%x, port_smphr reg 0x%x, "
9508 					"error 1=0x%x, error 2=0x%x\n",
9509 					reg_data.word0,
9510 					portsmphr_reg.word0,
9511 					phba->work_status[0],
9512 					phba->work_status[1]);
9513 				port_error = -ENODEV;
9514 				break;
9515 			}
9516 
9517 			if (lpfc_pldv_detect &&
9518 			    bf_get(lpfc_sli_intf_sli_family,
9519 				   &phba->sli4_hba.sli_intf) ==
9520 					LPFC_SLI_INTF_FAMILY_G6)
9521 				pci_write_config_byte(phba->pcidev,
9522 						      LPFC_SLI_INTF, CFG_PLD);
9523 			break;
9524 		case LPFC_SLI_INTF_IF_TYPE_1:
9525 		default:
9526 			break;
9527 		}
9528 	}
9529 	return port_error;
9530 }
9531 
9532 /**
9533  * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
9534  * @phba: pointer to lpfc hba data structure.
9535  * @if_type:  The SLI4 interface type getting configured.
9536  *
9537  * This routine is invoked to set up SLI4 BAR0 PCI config space register
9538  * memory map.
9539  **/
9540 static void
9541 lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
9542 {
9543 	switch (if_type) {
9544 	case LPFC_SLI_INTF_IF_TYPE_0:
9545 		phba->sli4_hba.u.if_type0.UERRLOregaddr =
9546 			phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
9547 		phba->sli4_hba.u.if_type0.UERRHIregaddr =
9548 			phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
9549 		phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
9550 			phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
9551 		phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
9552 			phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
9553 		phba->sli4_hba.SLIINTFregaddr =
9554 			phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9555 		break;
9556 	case LPFC_SLI_INTF_IF_TYPE_2:
9557 		phba->sli4_hba.u.if_type2.EQDregaddr =
9558 			phba->sli4_hba.conf_regs_memmap_p +
9559 						LPFC_CTL_PORT_EQ_DELAY_OFFSET;
9560 		phba->sli4_hba.u.if_type2.ERR1regaddr =
9561 			phba->sli4_hba.conf_regs_memmap_p +
9562 						LPFC_CTL_PORT_ER1_OFFSET;
9563 		phba->sli4_hba.u.if_type2.ERR2regaddr =
9564 			phba->sli4_hba.conf_regs_memmap_p +
9565 						LPFC_CTL_PORT_ER2_OFFSET;
9566 		phba->sli4_hba.u.if_type2.CTRLregaddr =
9567 			phba->sli4_hba.conf_regs_memmap_p +
9568 						LPFC_CTL_PORT_CTL_OFFSET;
9569 		phba->sli4_hba.u.if_type2.STATUSregaddr =
9570 			phba->sli4_hba.conf_regs_memmap_p +
9571 						LPFC_CTL_PORT_STA_OFFSET;
9572 		phba->sli4_hba.SLIINTFregaddr =
9573 			phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9574 		phba->sli4_hba.PSMPHRregaddr =
9575 			phba->sli4_hba.conf_regs_memmap_p +
9576 						LPFC_CTL_PORT_SEM_OFFSET;
9577 		phba->sli4_hba.RQDBregaddr =
9578 			phba->sli4_hba.conf_regs_memmap_p +
9579 						LPFC_ULP0_RQ_DOORBELL;
9580 		phba->sli4_hba.WQDBregaddr =
9581 			phba->sli4_hba.conf_regs_memmap_p +
9582 						LPFC_ULP0_WQ_DOORBELL;
9583 		phba->sli4_hba.CQDBregaddr =
9584 			phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
9585 		phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9586 		phba->sli4_hba.MQDBregaddr =
9587 			phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
9588 		phba->sli4_hba.BMBXregaddr =
9589 			phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9590 		break;
9591 	case LPFC_SLI_INTF_IF_TYPE_6:
9592 		phba->sli4_hba.u.if_type2.EQDregaddr =
9593 			phba->sli4_hba.conf_regs_memmap_p +
9594 						LPFC_CTL_PORT_EQ_DELAY_OFFSET;
9595 		phba->sli4_hba.u.if_type2.ERR1regaddr =
9596 			phba->sli4_hba.conf_regs_memmap_p +
9597 						LPFC_CTL_PORT_ER1_OFFSET;
9598 		phba->sli4_hba.u.if_type2.ERR2regaddr =
9599 			phba->sli4_hba.conf_regs_memmap_p +
9600 						LPFC_CTL_PORT_ER2_OFFSET;
9601 		phba->sli4_hba.u.if_type2.CTRLregaddr =
9602 			phba->sli4_hba.conf_regs_memmap_p +
9603 						LPFC_CTL_PORT_CTL_OFFSET;
9604 		phba->sli4_hba.u.if_type2.STATUSregaddr =
9605 			phba->sli4_hba.conf_regs_memmap_p +
9606 						LPFC_CTL_PORT_STA_OFFSET;
9607 		phba->sli4_hba.PSMPHRregaddr =
9608 			phba->sli4_hba.conf_regs_memmap_p +
9609 						LPFC_CTL_PORT_SEM_OFFSET;
9610 		phba->sli4_hba.BMBXregaddr =
9611 			phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9612 		break;
9613 	case LPFC_SLI_INTF_IF_TYPE_1:
9614 	default:
9615 		dev_printk(KERN_ERR, &phba->pcidev->dev,
9616 			   "FATAL - unsupported SLI4 interface type - %d\n",
9617 			   if_type);
9618 		break;
9619 	}
9620 }
9621 
9622 /**
9623  * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
9624  * @phba: pointer to lpfc hba data structure.
9625  * @if_type: sli if type to operate on.
9626  *
9627  * This routine is invoked to set up SLI4 BAR1 register memory map.
9628  **/
9629 static void
9630 lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
9631 {
9632 	switch (if_type) {
9633 	case LPFC_SLI_INTF_IF_TYPE_0:
9634 		phba->sli4_hba.PSMPHRregaddr =
9635 			phba->sli4_hba.ctrl_regs_memmap_p +
9636 			LPFC_SLIPORT_IF0_SMPHR;
9637 		phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9638 			LPFC_HST_ISR0;
9639 		phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9640 			LPFC_HST_IMR0;
9641 		phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9642 			LPFC_HST_ISCR0;
9643 		break;
9644 	case LPFC_SLI_INTF_IF_TYPE_6:
9645 		phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9646 			LPFC_IF6_RQ_DOORBELL;
9647 		phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9648 			LPFC_IF6_WQ_DOORBELL;
9649 		phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9650 			LPFC_IF6_CQ_DOORBELL;
9651 		phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9652 			LPFC_IF6_EQ_DOORBELL;
9653 		phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9654 			LPFC_IF6_MQ_DOORBELL;
9655 		break;
9656 	case LPFC_SLI_INTF_IF_TYPE_2:
9657 	case LPFC_SLI_INTF_IF_TYPE_1:
9658 	default:
9659 		dev_err(&phba->pcidev->dev,
9660 			   "FATAL - unsupported SLI4 interface type - %d\n",
9661 			   if_type);
9662 		break;
9663 	}
9664 }
9665 
9666 /**
9667  * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
9668  * @phba: pointer to lpfc hba data structure.
9669  * @vf: virtual function number
9670  *
9671  * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
9672  * based on the given viftual function number, @vf.
9673  *
9674  * Return 0 if successful, otherwise -ENODEV.
9675  **/
9676 static int
9677 lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
9678 {
9679 	if (vf > LPFC_VIR_FUNC_MAX)
9680 		return -ENODEV;
9681 
9682 	phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9683 				vf * LPFC_VFR_PAGE_SIZE +
9684 					LPFC_ULP0_RQ_DOORBELL);
9685 	phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9686 				vf * LPFC_VFR_PAGE_SIZE +
9687 					LPFC_ULP0_WQ_DOORBELL);
9688 	phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9689 				vf * LPFC_VFR_PAGE_SIZE +
9690 					LPFC_EQCQ_DOORBELL);
9691 	phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9692 	phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9693 				vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
9694 	phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9695 				vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
9696 	return 0;
9697 }
9698 
9699 /**
9700  * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
9701  * @phba: pointer to lpfc hba data structure.
9702  *
9703  * This routine is invoked to create the bootstrap mailbox
9704  * region consistent with the SLI-4 interface spec.  This
9705  * routine allocates all memory necessary to communicate
9706  * mailbox commands to the port and sets up all alignment
9707  * needs.  No locks are expected to be held when calling
9708  * this routine.
9709  *
9710  * Return codes
9711  * 	0 - successful
9712  * 	-ENOMEM - could not allocated memory.
9713  **/
9714 static int
9715 lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
9716 {
9717 	uint32_t bmbx_size;
9718 	struct lpfc_dmabuf *dmabuf;
9719 	struct dma_address *dma_address;
9720 	uint32_t pa_addr;
9721 	uint64_t phys_addr;
9722 
9723 	dmabuf = kzalloc_obj(struct lpfc_dmabuf, GFP_KERNEL);
9724 	if (!dmabuf)
9725 		return -ENOMEM;
9726 
9727 	/*
9728 	 * The bootstrap mailbox region is comprised of 2 parts
9729 	 * plus an alignment restriction of 16 bytes.
9730 	 */
9731 	bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
9732 	dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size,
9733 					  &dmabuf->phys, GFP_KERNEL);
9734 	if (!dmabuf->virt) {
9735 		kfree(dmabuf);
9736 		return -ENOMEM;
9737 	}
9738 
9739 	/*
9740 	 * Initialize the bootstrap mailbox pointers now so that the register
9741 	 * operations are simple later.  The mailbox dma address is required
9742 	 * to be 16-byte aligned.  Also align the virtual memory as each
9743 	 * maibox is copied into the bmbx mailbox region before issuing the
9744 	 * command to the port.
9745 	 */
9746 	phba->sli4_hba.bmbx.dmabuf = dmabuf;
9747 	phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
9748 
9749 	phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
9750 					      LPFC_ALIGN_16_BYTE);
9751 	phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
9752 					      LPFC_ALIGN_16_BYTE);
9753 
9754 	/*
9755 	 * Set the high and low physical addresses now.  The SLI4 alignment
9756 	 * requirement is 16 bytes and the mailbox is posted to the port
9757 	 * as two 30-bit addresses.  The other data is a bit marking whether
9758 	 * the 30-bit address is the high or low address.
9759 	 * Upcast bmbx aphys to 64bits so shift instruction compiles
9760 	 * clean on 32 bit machines.
9761 	 */
9762 	dma_address = &phba->sli4_hba.bmbx.dma_address;
9763 	phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
9764 	pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
9765 	dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
9766 					   LPFC_BMBX_BIT1_ADDR_HI);
9767 
9768 	pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
9769 	dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
9770 					   LPFC_BMBX_BIT1_ADDR_LO);
9771 	return 0;
9772 }
9773 
9774 /**
9775  * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
9776  * @phba: pointer to lpfc hba data structure.
9777  *
9778  * This routine is invoked to teardown the bootstrap mailbox
9779  * region and release all host resources. This routine requires
9780  * the caller to ensure all mailbox commands recovered, no
9781  * additional mailbox comands are sent, and interrupts are disabled
9782  * before calling this routine.
9783  *
9784  **/
9785 static void
9786 lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
9787 {
9788 	dma_free_coherent(&phba->pcidev->dev,
9789 			  phba->sli4_hba.bmbx.bmbx_size,
9790 			  phba->sli4_hba.bmbx.dmabuf->virt,
9791 			  phba->sli4_hba.bmbx.dmabuf->phys);
9792 
9793 	kfree(phba->sli4_hba.bmbx.dmabuf);
9794 	memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
9795 }
9796 
9797 static const char * const lpfc_topo_to_str[] = {
9798 	"Loop then P2P",
9799 	"Loopback",
9800 	"P2P Only",
9801 	"Unsupported",
9802 	"Loop Only",
9803 	"Unsupported",
9804 	"P2P then Loop",
9805 };
9806 
9807 #define	LINK_FLAGS_DEF	0x0
9808 #define	LINK_FLAGS_P2P	0x1
9809 #define	LINK_FLAGS_LOOP	0x2
9810 /**
9811  * lpfc_map_topology - Map the topology read from READ_CONFIG
9812  * @phba: pointer to lpfc hba data structure.
9813  * @rd_config: pointer to read config data
9814  *
9815  * This routine is invoked to map the topology values as read
9816  * from the read config mailbox command. If the persistent
9817  * topology feature is supported, the firmware will provide the
9818  * saved topology information to be used in INIT_LINK
9819  **/
9820 static void
9821 lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config)
9822 {
9823 	u8 ptv, tf, pt;
9824 
9825 	ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config);
9826 	tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config);
9827 	pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config);
9828 
9829 	lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9830 			"2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x",
9831 			 ptv, tf, pt);
9832 	if (!ptv) {
9833 		lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9834 				"2019 FW does not support persistent topology "
9835 				"Using driver parameter defined value [%s]",
9836 				lpfc_topo_to_str[phba->cfg_topology]);
9837 		return;
9838 	}
9839 	/* FW supports persistent topology - override module parameter value */
9840 	set_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag);
9841 
9842 	/* if ASIC_GEN_NUM >= 0xC) */
9843 	if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
9844 		    LPFC_SLI_INTF_IF_TYPE_6) ||
9845 	    (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
9846 		    LPFC_SLI_INTF_FAMILY_G6)) {
9847 		if (!tf)
9848 			phba->cfg_topology = ((pt == LINK_FLAGS_LOOP)
9849 					? FLAGS_TOPOLOGY_MODE_LOOP
9850 					: FLAGS_TOPOLOGY_MODE_PT_PT);
9851 		else
9852 			clear_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag);
9853 	} else { /* G5 */
9854 		if (tf)
9855 			/* If topology failover set - pt is '0' or '1' */
9856 			phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP :
9857 					      FLAGS_TOPOLOGY_MODE_LOOP_PT);
9858 		else
9859 			phba->cfg_topology = ((pt == LINK_FLAGS_P2P)
9860 					? FLAGS_TOPOLOGY_MODE_PT_PT
9861 					: FLAGS_TOPOLOGY_MODE_LOOP);
9862 	}
9863 	if (test_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag))
9864 		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9865 				"2020 Using persistent topology value [%s]",
9866 				lpfc_topo_to_str[phba->cfg_topology]);
9867 	else
9868 		lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9869 				"2021 Invalid topology values from FW "
9870 				"Using driver parameter defined value [%s]",
9871 				lpfc_topo_to_str[phba->cfg_topology]);
9872 }
9873 
9874 /**
9875  * lpfc_sli4_read_config - Get the config parameters.
9876  * @phba: pointer to lpfc hba data structure.
9877  *
9878  * This routine is invoked to read the configuration parameters from the HBA.
9879  * The configuration parameters are used to set the base and maximum values
9880  * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
9881  * allocation for the port.
9882  *
9883  * Return codes
9884  * 	0 - successful
9885  * 	-ENOMEM - No available memory
9886  *      -EIO - The mailbox failed to complete successfully.
9887  **/
9888 int
9889 lpfc_sli4_read_config(struct lpfc_hba *phba)
9890 {
9891 	LPFC_MBOXQ_t *pmb;
9892 	struct lpfc_mbx_read_config *rd_config;
9893 	union  lpfc_sli4_cfg_shdr *shdr;
9894 	uint32_t shdr_status, shdr_add_status;
9895 	struct lpfc_mbx_get_func_cfg *get_func_cfg;
9896 	struct lpfc_rsrc_desc_fcfcoe *desc;
9897 	char *pdesc_0;
9898 	uint16_t forced_link_speed;
9899 	uint32_t if_type, qmin, fawwpn;
9900 	int length, i, rc = 0, rc2;
9901 
9902 	pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9903 	if (!pmb) {
9904 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9905 				"2011 Unable to allocate memory for issuing "
9906 				"SLI_CONFIG_SPECIAL mailbox command\n");
9907 		return -ENOMEM;
9908 	}
9909 
9910 	lpfc_read_config(phba, pmb);
9911 
9912 	rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9913 	if (rc != MBX_SUCCESS) {
9914 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9915 				"2012 Mailbox failed , mbxCmd x%x "
9916 				"READ_CONFIG, mbxStatus x%x\n",
9917 				bf_get(lpfc_mqe_command, &pmb->u.mqe),
9918 				bf_get(lpfc_mqe_status, &pmb->u.mqe));
9919 		rc = -EIO;
9920 	} else {
9921 		rd_config = &pmb->u.mqe.un.rd_config;
9922 		if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
9923 			phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
9924 			phba->sli4_hba.lnk_info.lnk_tp =
9925 				bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
9926 			phba->sli4_hba.lnk_info.lnk_no =
9927 				bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
9928 			lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9929 					"3081 lnk_type:%d, lnk_numb:%d\n",
9930 					phba->sli4_hba.lnk_info.lnk_tp,
9931 					phba->sli4_hba.lnk_info.lnk_no);
9932 		} else
9933 			lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9934 					"3082 Mailbox (x%x) returned ldv:x0\n",
9935 					bf_get(lpfc_mqe_command, &pmb->u.mqe));
9936 		if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) {
9937 			phba->bbcredit_support = 1;
9938 			phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
9939 		}
9940 
9941 		fawwpn = bf_get(lpfc_mbx_rd_conf_fawwpn, rd_config);
9942 
9943 		if (fawwpn) {
9944 			lpfc_printf_log(phba, KERN_INFO,
9945 					LOG_INIT | LOG_DISCOVERY,
9946 					"2702 READ_CONFIG: FA-PWWN is "
9947 					"configured on\n");
9948 			phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_CONFIG;
9949 		} else {
9950 			/* Clear FW configured flag, preserve driver flag */
9951 			phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_CONFIG;
9952 		}
9953 
9954 		phba->sli4_hba.conf_trunk =
9955 			bf_get(lpfc_mbx_rd_conf_trunk, rd_config);
9956 		phba->sli4_hba.extents_in_use =
9957 			bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
9958 
9959 		phba->sli4_hba.max_cfg_param.max_xri =
9960 			bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
9961 		/* Reduce resource usage in kdump environment */
9962 		if (is_kdump_kernel() &&
9963 		    phba->sli4_hba.max_cfg_param.max_xri > 512)
9964 			phba->sli4_hba.max_cfg_param.max_xri = 512;
9965 		phba->sli4_hba.max_cfg_param.xri_base =
9966 			bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
9967 		phba->sli4_hba.max_cfg_param.max_vpi =
9968 			bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
9969 		/* Limit the max we support */
9970 		if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS)
9971 			phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS;
9972 		phba->sli4_hba.max_cfg_param.vpi_base =
9973 			bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
9974 		phba->sli4_hba.max_cfg_param.max_rpi =
9975 			bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
9976 		phba->sli4_hba.max_cfg_param.rpi_base =
9977 			bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
9978 		phba->sli4_hba.max_cfg_param.max_vfi =
9979 			bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
9980 		phba->sli4_hba.max_cfg_param.vfi_base =
9981 			bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
9982 		phba->sli4_hba.max_cfg_param.max_fcfi =
9983 			bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
9984 		phba->sli4_hba.max_cfg_param.max_eq =
9985 			bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
9986 		phba->sli4_hba.max_cfg_param.max_rq =
9987 			bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
9988 		phba->sli4_hba.max_cfg_param.max_wq =
9989 			bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
9990 		phba->sli4_hba.max_cfg_param.max_cq =
9991 			bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
9992 		phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
9993 		phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
9994 		phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
9995 		phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
9996 		phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
9997 				(phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
9998 		phba->max_vports = phba->max_vpi;
9999 
10000 		if (bf_get(lpfc_mbx_rd_conf_fedif, rd_config))
10001 			phba->sli4_hba.encryption_support = true;
10002 		else
10003 			phba->sli4_hba.encryption_support = false;
10004 
10005 		/* Next decide on FPIN or Signal E2E CGN support
10006 		 * For congestion alarms and warnings valid combination are:
10007 		 * 1. FPIN alarms / FPIN warnings
10008 		 * 2. Signal alarms / Signal warnings
10009 		 * 3. FPIN alarms / Signal warnings
10010 		 * 4. Signal alarms / FPIN warnings
10011 		 *
10012 		 * Initialize the adapter frequency to 100 mSecs
10013 		 */
10014 		phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH;
10015 		phba->cgn_reg_signal = EDC_CG_SIG_NOTSUPPORTED;
10016 		phba->cgn_sig_freq = lpfc_fabric_cgn_frequency;
10017 
10018 		if (lpfc_use_cgn_signal) {
10019 			if (bf_get(lpfc_mbx_rd_conf_wcs, rd_config)) {
10020 				phba->cgn_reg_signal = EDC_CG_SIG_WARN_ONLY;
10021 				phba->cgn_reg_fpin &= ~LPFC_CGN_FPIN_WARN;
10022 			}
10023 			if (bf_get(lpfc_mbx_rd_conf_acs, rd_config)) {
10024 				/* MUST support both alarm and warning
10025 				 * because EDC does not support alarm alone.
10026 				 */
10027 				if (phba->cgn_reg_signal !=
10028 				    EDC_CG_SIG_WARN_ONLY) {
10029 					/* Must support both or none */
10030 					phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH;
10031 					phba->cgn_reg_signal =
10032 						EDC_CG_SIG_NOTSUPPORTED;
10033 				} else {
10034 					phba->cgn_reg_signal =
10035 						EDC_CG_SIG_WARN_ALARM;
10036 					phba->cgn_reg_fpin =
10037 						LPFC_CGN_FPIN_NONE;
10038 				}
10039 			}
10040 		}
10041 
10042 		/* Set the congestion initial signal and fpin values. */
10043 		phba->cgn_init_reg_fpin = phba->cgn_reg_fpin;
10044 		phba->cgn_init_reg_signal = phba->cgn_reg_signal;
10045 
10046 		lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
10047 				"6446 READ_CONFIG reg_sig x%x reg_fpin:x%x\n",
10048 				phba->cgn_reg_signal, phba->cgn_reg_fpin);
10049 
10050 		lpfc_map_topology(phba, rd_config);
10051 		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10052 				"2003 cfg params Extents? %d "
10053 				"XRI(B:%d M:%d), "
10054 				"VPI(B:%d M:%d) "
10055 				"VFI(B:%d M:%d) "
10056 				"RPI(B:%d M:%d) "
10057 				"FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n",
10058 				phba->sli4_hba.extents_in_use,
10059 				phba->sli4_hba.max_cfg_param.xri_base,
10060 				phba->sli4_hba.max_cfg_param.max_xri,
10061 				phba->sli4_hba.max_cfg_param.vpi_base,
10062 				phba->sli4_hba.max_cfg_param.max_vpi,
10063 				phba->sli4_hba.max_cfg_param.vfi_base,
10064 				phba->sli4_hba.max_cfg_param.max_vfi,
10065 				phba->sli4_hba.max_cfg_param.rpi_base,
10066 				phba->sli4_hba.max_cfg_param.max_rpi,
10067 				phba->sli4_hba.max_cfg_param.max_fcfi,
10068 				phba->sli4_hba.max_cfg_param.max_eq,
10069 				phba->sli4_hba.max_cfg_param.max_cq,
10070 				phba->sli4_hba.max_cfg_param.max_wq,
10071 				phba->sli4_hba.max_cfg_param.max_rq,
10072 				phba->lmt);
10073 
10074 		/*
10075 		 * Calculate queue resources based on how
10076 		 * many WQ/CQ/EQs are available.
10077 		 */
10078 		qmin = phba->sli4_hba.max_cfg_param.max_wq;
10079 		if (phba->sli4_hba.max_cfg_param.max_cq < qmin)
10080 			qmin = phba->sli4_hba.max_cfg_param.max_cq;
10081 		/*
10082 		 * Reserve 4 (ELS, NVME LS, MBOX, plus one extra) and
10083 		 * the remainder can be used for NVME / FCP.
10084 		 */
10085 		qmin -= 4;
10086 		if (phba->sli4_hba.max_cfg_param.max_eq < qmin)
10087 			qmin = phba->sli4_hba.max_cfg_param.max_eq;
10088 
10089 		/* Check to see if there is enough for default cfg */
10090 		if ((phba->cfg_irq_chann > qmin) ||
10091 		    (phba->cfg_hdw_queue > qmin)) {
10092 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10093 					"2005 Reducing Queues - "
10094 					"FW resource limitation: "
10095 					"WQ %d CQ %d EQ %d: min %d: "
10096 					"IRQ %d HDWQ %d\n",
10097 					phba->sli4_hba.max_cfg_param.max_wq,
10098 					phba->sli4_hba.max_cfg_param.max_cq,
10099 					phba->sli4_hba.max_cfg_param.max_eq,
10100 					qmin, phba->cfg_irq_chann,
10101 					phba->cfg_hdw_queue);
10102 
10103 			if (phba->cfg_irq_chann > qmin)
10104 				phba->cfg_irq_chann = qmin;
10105 			if (phba->cfg_hdw_queue > qmin)
10106 				phba->cfg_hdw_queue = qmin;
10107 		}
10108 	}
10109 
10110 	if (rc)
10111 		goto read_cfg_out;
10112 
10113 	/* Update link speed if forced link speed is supported */
10114 	if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10115 	if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
10116 		forced_link_speed =
10117 			bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
10118 		if (forced_link_speed) {
10119 			set_bit(HBA_FORCED_LINK_SPEED, &phba->hba_flag);
10120 
10121 			switch (forced_link_speed) {
10122 			case LINK_SPEED_1G:
10123 				phba->cfg_link_speed =
10124 					LPFC_USER_LINK_SPEED_1G;
10125 				break;
10126 			case LINK_SPEED_2G:
10127 				phba->cfg_link_speed =
10128 					LPFC_USER_LINK_SPEED_2G;
10129 				break;
10130 			case LINK_SPEED_4G:
10131 				phba->cfg_link_speed =
10132 					LPFC_USER_LINK_SPEED_4G;
10133 				break;
10134 			case LINK_SPEED_8G:
10135 				phba->cfg_link_speed =
10136 					LPFC_USER_LINK_SPEED_8G;
10137 				break;
10138 			case LINK_SPEED_10G:
10139 				phba->cfg_link_speed =
10140 					LPFC_USER_LINK_SPEED_10G;
10141 				break;
10142 			case LINK_SPEED_16G:
10143 				phba->cfg_link_speed =
10144 					LPFC_USER_LINK_SPEED_16G;
10145 				break;
10146 			case LINK_SPEED_32G:
10147 				phba->cfg_link_speed =
10148 					LPFC_USER_LINK_SPEED_32G;
10149 				break;
10150 			case LINK_SPEED_64G:
10151 				phba->cfg_link_speed =
10152 					LPFC_USER_LINK_SPEED_64G;
10153 				break;
10154 			case 0xffff:
10155 				phba->cfg_link_speed =
10156 					LPFC_USER_LINK_SPEED_AUTO;
10157 				break;
10158 			default:
10159 				lpfc_printf_log(phba, KERN_ERR,
10160 						LOG_TRACE_EVENT,
10161 						"0047 Unrecognized link "
10162 						"speed : %d\n",
10163 						forced_link_speed);
10164 				phba->cfg_link_speed =
10165 					LPFC_USER_LINK_SPEED_AUTO;
10166 			}
10167 		}
10168 	}
10169 
10170 	/* Reset the DFT_HBA_Q_DEPTH to the max xri  */
10171 	length = phba->sli4_hba.max_cfg_param.max_xri -
10172 			lpfc_sli4_get_els_iocb_cnt(phba);
10173 	if (phba->cfg_hba_queue_depth > length) {
10174 		lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10175 				"3361 HBA queue depth changed from %d to %d\n",
10176 				phba->cfg_hba_queue_depth, length);
10177 		phba->cfg_hba_queue_depth = length;
10178 	}
10179 
10180 	if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
10181 	    LPFC_SLI_INTF_IF_TYPE_2)
10182 		goto read_cfg_out;
10183 
10184 	/* get the pf# and vf# for SLI4 if_type 2 port */
10185 	length = (sizeof(struct lpfc_mbx_get_func_cfg) -
10186 		  sizeof(struct lpfc_sli4_cfg_mhdr));
10187 	lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
10188 			 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
10189 			 length, LPFC_SLI4_MBX_EMBED);
10190 
10191 	rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
10192 	shdr = (union lpfc_sli4_cfg_shdr *)
10193 				&pmb->u.mqe.un.sli4_config.header.cfg_shdr;
10194 	shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
10195 	shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
10196 	if (rc2 || shdr_status || shdr_add_status) {
10197 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10198 				"3026 Mailbox failed , mbxCmd x%x "
10199 				"GET_FUNCTION_CONFIG, mbxStatus x%x\n",
10200 				bf_get(lpfc_mqe_command, &pmb->u.mqe),
10201 				bf_get(lpfc_mqe_status, &pmb->u.mqe));
10202 		goto read_cfg_out;
10203 	}
10204 
10205 	/* search for fc_fcoe resrouce descriptor */
10206 	get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
10207 
10208 	pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
10209 	desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
10210 	length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
10211 	if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
10212 		length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
10213 	else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
10214 		goto read_cfg_out;
10215 
10216 	for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
10217 		desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
10218 		if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
10219 		    bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
10220 			phba->sli4_hba.iov.pf_number =
10221 				bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
10222 			phba->sli4_hba.iov.vf_number =
10223 				bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
10224 			break;
10225 		}
10226 	}
10227 
10228 	if (i < LPFC_RSRC_DESC_MAX_NUM)
10229 		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10230 				"3027 GET_FUNCTION_CONFIG: pf_number:%d, "
10231 				"vf_number:%d\n", phba->sli4_hba.iov.pf_number,
10232 				phba->sli4_hba.iov.vf_number);
10233 	else
10234 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10235 				"3028 GET_FUNCTION_CONFIG: failed to find "
10236 				"Resource Descriptor:x%x\n",
10237 				LPFC_RSRC_DESC_TYPE_FCFCOE);
10238 
10239 read_cfg_out:
10240 	mempool_free(pmb, phba->mbox_mem_pool);
10241 	return rc;
10242 }
10243 
10244 /**
10245  * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
10246  * @phba: pointer to lpfc hba data structure.
10247  *
10248  * This routine is invoked to setup the port-side endian order when
10249  * the port if_type is 0.  This routine has no function for other
10250  * if_types.
10251  *
10252  * Return codes
10253  * 	0 - successful
10254  * 	-ENOMEM - No available memory
10255  *      -EIO - The mailbox failed to complete successfully.
10256  **/
10257 static int
10258 lpfc_setup_endian_order(struct lpfc_hba *phba)
10259 {
10260 	LPFC_MBOXQ_t *mboxq;
10261 	uint32_t if_type, rc = 0;
10262 	uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
10263 				      HOST_ENDIAN_HIGH_WORD1};
10264 
10265 	if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10266 	switch (if_type) {
10267 	case LPFC_SLI_INTF_IF_TYPE_0:
10268 		mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
10269 						       GFP_KERNEL);
10270 		if (!mboxq) {
10271 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10272 					"0492 Unable to allocate memory for "
10273 					"issuing SLI_CONFIG_SPECIAL mailbox "
10274 					"command\n");
10275 			return -ENOMEM;
10276 		}
10277 
10278 		/*
10279 		 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
10280 		 * two words to contain special data values and no other data.
10281 		 */
10282 		memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
10283 		memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
10284 		rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10285 		if (rc != MBX_SUCCESS) {
10286 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10287 					"0493 SLI_CONFIG_SPECIAL mailbox "
10288 					"failed with status x%x\n",
10289 					rc);
10290 			rc = -EIO;
10291 		}
10292 		mempool_free(mboxq, phba->mbox_mem_pool);
10293 		break;
10294 	case LPFC_SLI_INTF_IF_TYPE_6:
10295 	case LPFC_SLI_INTF_IF_TYPE_2:
10296 	case LPFC_SLI_INTF_IF_TYPE_1:
10297 	default:
10298 		break;
10299 	}
10300 	return rc;
10301 }
10302 
10303 /**
10304  * lpfc_sli4_queue_verify - Verify and update EQ counts
10305  * @phba: pointer to lpfc hba data structure.
10306  *
10307  * This routine is invoked to check the user settable queue counts for EQs.
10308  * After this routine is called the counts will be set to valid values that
10309  * adhere to the constraints of the system's interrupt vectors and the port's
10310  * queue resources.
10311  *
10312  * Return codes
10313  *      0 - successful
10314  *      -ENOMEM - No available memory
10315  **/
10316 static int
10317 lpfc_sli4_queue_verify(struct lpfc_hba *phba)
10318 {
10319 	/*
10320 	 * Sanity check for configured queue parameters against the run-time
10321 	 * device parameters
10322 	 */
10323 
10324 	if (phba->nvmet_support) {
10325 		if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq)
10326 			phba->cfg_nvmet_mrq = phba->cfg_hdw_queue;
10327 		if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
10328 			phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
10329 	}
10330 
10331 	lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10332 			"2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n",
10333 			phba->cfg_hdw_queue, phba->cfg_irq_chann,
10334 			phba->cfg_nvmet_mrq);
10335 
10336 	/* Get EQ depth from module parameter, fake the default for now */
10337 	phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10338 	phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10339 
10340 	/* Get CQ depth from module parameter, fake the default for now */
10341 	phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10342 	phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10343 	return 0;
10344 }
10345 
10346 static int
10347 lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx)
10348 {
10349 	struct lpfc_queue *qdesc;
10350 	u32 wqesize;
10351 	int cpu;
10352 
10353 	cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ);
10354 	/* Create Fast Path IO CQs */
10355 	if (phba->enab_exp_wqcq_pages)
10356 		/* Increase the CQ size when WQEs contain an embedded cdb */
10357 		qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
10358 					      phba->sli4_hba.cq_esize,
10359 					      LPFC_CQE_EXP_COUNT, cpu);
10360 
10361 	else
10362 		qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10363 					      phba->sli4_hba.cq_esize,
10364 					      phba->sli4_hba.cq_ecount, cpu);
10365 	if (!qdesc) {
10366 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10367 				"0499 Failed allocate fast-path IO CQ (%d)\n",
10368 				idx);
10369 		return 1;
10370 	}
10371 	qdesc->qe_valid = 1;
10372 	qdesc->hdwq = idx;
10373 	qdesc->chann = cpu;
10374 	phba->sli4_hba.hdwq[idx].io_cq = qdesc;
10375 
10376 	/* Create Fast Path IO WQs */
10377 	if (phba->enab_exp_wqcq_pages) {
10378 		/* Increase the WQ size when WQEs contain an embedded cdb */
10379 		wqesize = (phba->fcp_embed_io) ?
10380 			LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
10381 		qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
10382 					      wqesize,
10383 					      LPFC_WQE_EXP_COUNT, cpu);
10384 	} else
10385 		qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10386 					      phba->sli4_hba.wq_esize,
10387 					      phba->sli4_hba.wq_ecount, cpu);
10388 
10389 	if (!qdesc) {
10390 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10391 				"0503 Failed allocate fast-path IO WQ (%d)\n",
10392 				idx);
10393 		return 1;
10394 	}
10395 	qdesc->hdwq = idx;
10396 	qdesc->chann = cpu;
10397 	phba->sli4_hba.hdwq[idx].io_wq = qdesc;
10398 	list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10399 	return 0;
10400 }
10401 
10402 /**
10403  * lpfc_sli4_queue_create - Create all the SLI4 queues
10404  * @phba: pointer to lpfc hba data structure.
10405  *
10406  * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
10407  * operation. For each SLI4 queue type, the parameters such as queue entry
10408  * count (queue depth) shall be taken from the module parameter. For now,
10409  * we just use some constant number as place holder.
10410  *
10411  * Return codes
10412  *      0 - successful
10413  *      -ENOMEM - No availble memory
10414  *      -EIO - The mailbox failed to complete successfully.
10415  **/
10416 int
10417 lpfc_sli4_queue_create(struct lpfc_hba *phba)
10418 {
10419 	struct lpfc_queue *qdesc;
10420 	int idx, cpu, eqcpu;
10421 	struct lpfc_sli4_hdw_queue *qp;
10422 	struct lpfc_vector_map_info *cpup;
10423 	struct lpfc_vector_map_info *eqcpup;
10424 	struct lpfc_eq_intr_info *eqi;
10425 	u32 wqesize;
10426 
10427 	/*
10428 	 * Create HBA Record arrays.
10429 	 * Both NVME and FCP will share that same vectors / EQs
10430 	 */
10431 	phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
10432 	phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
10433 	phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
10434 	phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
10435 	phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
10436 	phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
10437 	phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10438 	phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10439 	phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10440 	phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10441 
10442 	if (!phba->sli4_hba.hdwq) {
10443 		phba->sli4_hba.hdwq = kzalloc_objs(struct lpfc_sli4_hdw_queue,
10444 						   phba->cfg_hdw_queue,
10445 						   GFP_KERNEL);
10446 		if (!phba->sli4_hba.hdwq) {
10447 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10448 					"6427 Failed allocate memory for "
10449 					"fast-path Hardware Queue array\n");
10450 			goto out_error;
10451 		}
10452 		/* Prepare hardware queues to take IO buffers */
10453 		for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10454 			qp = &phba->sli4_hba.hdwq[idx];
10455 			spin_lock_init(&qp->io_buf_list_get_lock);
10456 			spin_lock_init(&qp->io_buf_list_put_lock);
10457 			INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
10458 			INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
10459 			qp->get_io_bufs = 0;
10460 			qp->put_io_bufs = 0;
10461 			qp->total_io_bufs = 0;
10462 			spin_lock_init(&qp->abts_io_buf_list_lock);
10463 			INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list);
10464 			qp->abts_scsi_io_bufs = 0;
10465 			qp->abts_nvme_io_bufs = 0;
10466 			INIT_LIST_HEAD(&qp->sgl_list);
10467 			INIT_LIST_HEAD(&qp->cmd_rsp_buf_list);
10468 			spin_lock_init(&qp->hdwq_lock);
10469 		}
10470 	}
10471 
10472 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10473 		if (phba->nvmet_support) {
10474 			phba->sli4_hba.nvmet_cqset = kzalloc_objs(struct lpfc_queue *,
10475 								  phba->cfg_nvmet_mrq,
10476 								  GFP_KERNEL);
10477 			if (!phba->sli4_hba.nvmet_cqset) {
10478 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10479 					"3121 Fail allocate memory for "
10480 					"fast-path CQ set array\n");
10481 				goto out_error;
10482 			}
10483 			phba->sli4_hba.nvmet_mrq_hdr = kzalloc_objs(struct lpfc_queue *,
10484 								    phba->cfg_nvmet_mrq,
10485 								    GFP_KERNEL);
10486 			if (!phba->sli4_hba.nvmet_mrq_hdr) {
10487 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10488 					"3122 Fail allocate memory for "
10489 					"fast-path RQ set hdr array\n");
10490 				goto out_error;
10491 			}
10492 			phba->sli4_hba.nvmet_mrq_data = kzalloc_objs(struct lpfc_queue *,
10493 								     phba->cfg_nvmet_mrq,
10494 								     GFP_KERNEL);
10495 			if (!phba->sli4_hba.nvmet_mrq_data) {
10496 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10497 					"3124 Fail allocate memory for "
10498 					"fast-path RQ set data array\n");
10499 				goto out_error;
10500 			}
10501 		}
10502 	}
10503 
10504 	INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
10505 
10506 	/* Create HBA Event Queues (EQs) */
10507 	for_each_present_cpu(cpu) {
10508 		/* We only want to create 1 EQ per vector, even though
10509 		 * multiple CPUs might be using that vector. so only
10510 		 * selects the CPUs that are LPFC_CPU_FIRST_IRQ.
10511 		 */
10512 		cpup = &phba->sli4_hba.cpu_map[cpu];
10513 		if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
10514 			continue;
10515 
10516 		/* Get a ptr to the Hardware Queue associated with this CPU */
10517 		qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10518 
10519 		/* Allocate an EQ */
10520 		qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10521 					      phba->sli4_hba.eq_esize,
10522 					      phba->sli4_hba.eq_ecount, cpu);
10523 		if (!qdesc) {
10524 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10525 					"0497 Failed allocate EQ (%d)\n",
10526 					cpup->hdwq);
10527 			goto out_error;
10528 		}
10529 		qdesc->qe_valid = 1;
10530 		qdesc->hdwq = cpup->hdwq;
10531 		qdesc->chann = cpu; /* First CPU this EQ is affinitized to */
10532 		qdesc->last_cpu = qdesc->chann;
10533 
10534 		/* Save the allocated EQ in the Hardware Queue */
10535 		qp->hba_eq = qdesc;
10536 
10537 		eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu);
10538 		list_add(&qdesc->cpu_list, &eqi->list);
10539 	}
10540 
10541 	/* Now we need to populate the other Hardware Queues, that share
10542 	 * an IRQ vector, with the associated EQ ptr.
10543 	 */
10544 	for_each_present_cpu(cpu) {
10545 		cpup = &phba->sli4_hba.cpu_map[cpu];
10546 
10547 		/* Check for EQ already allocated in previous loop */
10548 		if (cpup->flag & LPFC_CPU_FIRST_IRQ)
10549 			continue;
10550 
10551 		/* Check for multiple CPUs per hdwq */
10552 		qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10553 		if (qp->hba_eq)
10554 			continue;
10555 
10556 		/* We need to share an EQ for this hdwq */
10557 		eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ);
10558 		eqcpup = &phba->sli4_hba.cpu_map[eqcpu];
10559 		qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq;
10560 	}
10561 
10562 	/* Allocate IO Path SLI4 CQ/WQs */
10563 	for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10564 		if (lpfc_alloc_io_wq_cq(phba, idx))
10565 			goto out_error;
10566 	}
10567 
10568 	if (phba->nvmet_support) {
10569 		for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
10570 			cpu = lpfc_find_cpu_handle(phba, idx,
10571 						   LPFC_FIND_BY_HDWQ);
10572 			qdesc = lpfc_sli4_queue_alloc(phba,
10573 						      LPFC_DEFAULT_PAGE_SIZE,
10574 						      phba->sli4_hba.cq_esize,
10575 						      phba->sli4_hba.cq_ecount,
10576 						      cpu);
10577 			if (!qdesc) {
10578 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10579 						"3142 Failed allocate NVME "
10580 						"CQ Set (%d)\n", idx);
10581 				goto out_error;
10582 			}
10583 			qdesc->qe_valid = 1;
10584 			qdesc->hdwq = idx;
10585 			qdesc->chann = cpu;
10586 			phba->sli4_hba.nvmet_cqset[idx] = qdesc;
10587 		}
10588 	}
10589 
10590 	/*
10591 	 * Create Slow Path Completion Queues (CQs)
10592 	 */
10593 
10594 	cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ);
10595 	/* Create slow-path Mailbox Command Complete Queue */
10596 	qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10597 				      phba->sli4_hba.cq_esize,
10598 				      phba->sli4_hba.cq_ecount, cpu);
10599 	if (!qdesc) {
10600 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10601 				"0500 Failed allocate slow-path mailbox CQ\n");
10602 		goto out_error;
10603 	}
10604 	qdesc->qe_valid = 1;
10605 	phba->sli4_hba.mbx_cq = qdesc;
10606 
10607 	/* Create slow-path ELS Complete Queue */
10608 	qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10609 				      phba->sli4_hba.cq_esize,
10610 				      phba->sli4_hba.cq_ecount, cpu);
10611 	if (!qdesc) {
10612 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10613 				"0501 Failed allocate slow-path ELS CQ\n");
10614 		goto out_error;
10615 	}
10616 	qdesc->qe_valid = 1;
10617 	qdesc->chann = cpu;
10618 	phba->sli4_hba.els_cq = qdesc;
10619 
10620 
10621 	/*
10622 	 * Create Slow Path Work Queues (WQs)
10623 	 */
10624 
10625 	/* Create Mailbox Command Queue */
10626 
10627 	qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10628 				      phba->sli4_hba.mq_esize,
10629 				      phba->sli4_hba.mq_ecount, cpu);
10630 	if (!qdesc) {
10631 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10632 				"0505 Failed allocate slow-path MQ\n");
10633 		goto out_error;
10634 	}
10635 	qdesc->chann = cpu;
10636 	phba->sli4_hba.mbx_wq = qdesc;
10637 
10638 	/*
10639 	 * Create ELS Work Queues
10640 	 */
10641 
10642 	/*
10643 	 * Create slow-path ELS Work Queue.
10644 	 * Increase the ELS WQ size when WQEs contain an embedded cdb
10645 	 */
10646 	wqesize = (phba->fcp_embed_io) ?
10647 			LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
10648 
10649 	qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10650 				      wqesize,
10651 				      phba->sli4_hba.wq_ecount, cpu);
10652 	if (!qdesc) {
10653 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10654 				"0504 Failed allocate slow-path ELS WQ\n");
10655 		goto out_error;
10656 	}
10657 	qdesc->chann = cpu;
10658 	phba->sli4_hba.els_wq = qdesc;
10659 	list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10660 
10661 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10662 		/* Create NVME LS Complete Queue */
10663 		qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10664 					      phba->sli4_hba.cq_esize,
10665 					      phba->sli4_hba.cq_ecount, cpu);
10666 		if (!qdesc) {
10667 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10668 					"6079 Failed allocate NVME LS CQ\n");
10669 			goto out_error;
10670 		}
10671 		qdesc->chann = cpu;
10672 		qdesc->qe_valid = 1;
10673 		phba->sli4_hba.nvmels_cq = qdesc;
10674 
10675 		/* Create NVME LS Work Queue */
10676 		qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10677 					      phba->sli4_hba.wq_esize,
10678 					      phba->sli4_hba.wq_ecount, cpu);
10679 		if (!qdesc) {
10680 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10681 					"6080 Failed allocate NVME LS WQ\n");
10682 			goto out_error;
10683 		}
10684 		qdesc->chann = cpu;
10685 		phba->sli4_hba.nvmels_wq = qdesc;
10686 		list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10687 	}
10688 
10689 	/*
10690 	 * Create Receive Queue (RQ)
10691 	 */
10692 
10693 	/* Create Receive Queue for header */
10694 	qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10695 				      phba->sli4_hba.rq_esize,
10696 				      phba->sli4_hba.rq_ecount, cpu);
10697 	if (!qdesc) {
10698 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10699 				"0506 Failed allocate receive HRQ\n");
10700 		goto out_error;
10701 	}
10702 	phba->sli4_hba.hdr_rq = qdesc;
10703 
10704 	/* Create Receive Queue for data */
10705 	qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10706 				      phba->sli4_hba.rq_esize,
10707 				      phba->sli4_hba.rq_ecount, cpu);
10708 	if (!qdesc) {
10709 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10710 				"0507 Failed allocate receive DRQ\n");
10711 		goto out_error;
10712 	}
10713 	phba->sli4_hba.dat_rq = qdesc;
10714 
10715 	if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
10716 	    phba->nvmet_support) {
10717 		for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
10718 			cpu = lpfc_find_cpu_handle(phba, idx,
10719 						   LPFC_FIND_BY_HDWQ);
10720 			/* Create NVMET Receive Queue for header */
10721 			qdesc = lpfc_sli4_queue_alloc(phba,
10722 						      LPFC_DEFAULT_PAGE_SIZE,
10723 						      phba->sli4_hba.rq_esize,
10724 						      LPFC_NVMET_RQE_DEF_COUNT,
10725 						      cpu);
10726 			if (!qdesc) {
10727 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10728 						"3146 Failed allocate "
10729 						"receive HRQ\n");
10730 				goto out_error;
10731 			}
10732 			qdesc->hdwq = idx;
10733 			phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
10734 
10735 			/* Only needed for header of RQ pair */
10736 			qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp),
10737 						   GFP_KERNEL,
10738 						   cpu_to_node(cpu));
10739 			if (qdesc->rqbp == NULL) {
10740 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10741 						"6131 Failed allocate "
10742 						"Header RQBP\n");
10743 				goto out_error;
10744 			}
10745 
10746 			/* Put list in known state in case driver load fails. */
10747 			INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
10748 
10749 			/* Create NVMET Receive Queue for data */
10750 			qdesc = lpfc_sli4_queue_alloc(phba,
10751 						      LPFC_DEFAULT_PAGE_SIZE,
10752 						      phba->sli4_hba.rq_esize,
10753 						      LPFC_NVMET_RQE_DEF_COUNT,
10754 						      cpu);
10755 			if (!qdesc) {
10756 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10757 						"3156 Failed allocate "
10758 						"receive DRQ\n");
10759 				goto out_error;
10760 			}
10761 			qdesc->hdwq = idx;
10762 			phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
10763 		}
10764 	}
10765 
10766 	/* Clear NVME stats */
10767 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10768 		for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10769 			memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0,
10770 			       sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat));
10771 		}
10772 	}
10773 
10774 	/* Clear SCSI stats */
10775 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
10776 		for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10777 			memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0,
10778 			       sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat));
10779 		}
10780 	}
10781 
10782 	return 0;
10783 
10784 out_error:
10785 	lpfc_sli4_queue_destroy(phba);
10786 	return -ENOMEM;
10787 }
10788 
10789 static inline void
10790 __lpfc_sli4_release_queue(struct lpfc_queue **qp)
10791 {
10792 	if (*qp != NULL) {
10793 		lpfc_sli4_queue_free(*qp);
10794 		*qp = NULL;
10795 	}
10796 }
10797 
10798 static inline void
10799 lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
10800 {
10801 	int idx;
10802 
10803 	if (*qs == NULL)
10804 		return;
10805 
10806 	for (idx = 0; idx < max; idx++)
10807 		__lpfc_sli4_release_queue(&(*qs)[idx]);
10808 
10809 	kfree(*qs);
10810 	*qs = NULL;
10811 }
10812 
10813 static inline void
10814 lpfc_sli4_release_hdwq(struct lpfc_hba *phba)
10815 {
10816 	struct lpfc_sli4_hdw_queue *hdwq;
10817 	struct lpfc_queue *eq;
10818 	uint32_t idx;
10819 
10820 	hdwq = phba->sli4_hba.hdwq;
10821 
10822 	/* Loop thru all Hardware Queues */
10823 	for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10824 		/* Free the CQ/WQ corresponding to the Hardware Queue */
10825 		lpfc_sli4_queue_free(hdwq[idx].io_cq);
10826 		lpfc_sli4_queue_free(hdwq[idx].io_wq);
10827 		hdwq[idx].hba_eq = NULL;
10828 		hdwq[idx].io_cq = NULL;
10829 		hdwq[idx].io_wq = NULL;
10830 		if (phba->cfg_xpsgl && !phba->nvmet_support)
10831 			lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]);
10832 		lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]);
10833 	}
10834 	/* Loop thru all IRQ vectors */
10835 	for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
10836 		/* Free the EQ corresponding to the IRQ vector */
10837 		eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
10838 		lpfc_sli4_queue_free(eq);
10839 		phba->sli4_hba.hba_eq_hdl[idx].eq = NULL;
10840 	}
10841 }
10842 
10843 /**
10844  * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
10845  * @phba: pointer to lpfc hba data structure.
10846  *
10847  * This routine is invoked to release all the SLI4 queues with the FCoE HBA
10848  * operation.
10849  *
10850  * Return codes
10851  *      0 - successful
10852  *      -ENOMEM - No available memory
10853  *      -EIO - The mailbox failed to complete successfully.
10854  **/
10855 void
10856 lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
10857 {
10858 	/*
10859 	 * Set FREE_INIT before beginning to free the queues.
10860 	 * Wait until the users of queues to acknowledge to
10861 	 * release queues by clearing FREE_WAIT.
10862 	 */
10863 	spin_lock_irq(&phba->hbalock);
10864 	phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT;
10865 	while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) {
10866 		spin_unlock_irq(&phba->hbalock);
10867 		msleep(20);
10868 		spin_lock_irq(&phba->hbalock);
10869 	}
10870 	spin_unlock_irq(&phba->hbalock);
10871 
10872 	lpfc_sli4_cleanup_poll_list(phba);
10873 
10874 	/* Release HBA eqs */
10875 	if (phba->sli4_hba.hdwq)
10876 		lpfc_sli4_release_hdwq(phba);
10877 
10878 	if (phba->nvmet_support) {
10879 		lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
10880 					 phba->cfg_nvmet_mrq);
10881 
10882 		lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
10883 					 phba->cfg_nvmet_mrq);
10884 		lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
10885 					 phba->cfg_nvmet_mrq);
10886 	}
10887 
10888 	/* Release mailbox command work queue */
10889 	__lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
10890 
10891 	/* Release ELS work queue */
10892 	__lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
10893 
10894 	/* Release ELS work queue */
10895 	__lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
10896 
10897 	/* Release unsolicited receive queue */
10898 	__lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
10899 	__lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
10900 
10901 	/* Release ELS complete queue */
10902 	__lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
10903 
10904 	/* Release NVME LS complete queue */
10905 	__lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
10906 
10907 	/* Release mailbox command complete queue */
10908 	__lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
10909 
10910 	/* Everything on this list has been freed */
10911 	INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
10912 
10913 	/* Done with freeing the queues */
10914 	spin_lock_irq(&phba->hbalock);
10915 	phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT;
10916 	spin_unlock_irq(&phba->hbalock);
10917 }
10918 
10919 int
10920 lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
10921 {
10922 	struct lpfc_rqb *rqbp;
10923 	struct lpfc_dmabuf *h_buf;
10924 	struct rqb_dmabuf *rqb_buffer;
10925 
10926 	rqbp = rq->rqbp;
10927 	while (!list_empty(&rqbp->rqb_buffer_list)) {
10928 		list_remove_head(&rqbp->rqb_buffer_list, h_buf,
10929 				 struct lpfc_dmabuf, list);
10930 
10931 		rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
10932 		(rqbp->rqb_free_buffer)(phba, rqb_buffer);
10933 		rqbp->buffer_count--;
10934 	}
10935 	return 1;
10936 }
10937 
10938 static int
10939 lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
10940 	struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
10941 	int qidx, uint32_t qtype)
10942 {
10943 	struct lpfc_sli_ring *pring;
10944 	int rc;
10945 
10946 	if (!eq || !cq || !wq) {
10947 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10948 			"6085 Fast-path %s (%d) not allocated\n",
10949 			((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
10950 		return -ENOMEM;
10951 	}
10952 
10953 	/* create the Cq first */
10954 	rc = lpfc_cq_create(phba, cq, eq,
10955 			(qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
10956 	if (rc) {
10957 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10958 				"6086 Failed setup of CQ (%d), rc = 0x%x\n",
10959 				qidx, (uint32_t)rc);
10960 		return rc;
10961 	}
10962 
10963 	if (qtype != LPFC_MBOX) {
10964 		/* Setup cq_map for fast lookup */
10965 		if (cq_map)
10966 			*cq_map = cq->queue_id;
10967 
10968 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10969 			"6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
10970 			qidx, cq->queue_id, qidx, eq->queue_id);
10971 
10972 		/* create the wq */
10973 		rc = lpfc_wq_create(phba, wq, cq, qtype);
10974 		if (rc) {
10975 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10976 				"4618 Fail setup fastpath WQ (%d), rc = 0x%x\n",
10977 				qidx, (uint32_t)rc);
10978 			/* no need to tear down cq - caller will do so */
10979 			return rc;
10980 		}
10981 
10982 		/* Bind this CQ/WQ to the NVME ring */
10983 		pring = wq->pring;
10984 		pring->sli.sli4.wqp = (void *)wq;
10985 		cq->pring = pring;
10986 
10987 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10988 			"2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
10989 			qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
10990 	} else {
10991 		rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
10992 		if (rc) {
10993 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10994 					"0539 Failed setup of slow-path MQ: "
10995 					"rc = 0x%x\n", rc);
10996 			/* no need to tear down cq - caller will do so */
10997 			return rc;
10998 		}
10999 
11000 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11001 			"2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
11002 			phba->sli4_hba.mbx_wq->queue_id,
11003 			phba->sli4_hba.mbx_cq->queue_id);
11004 	}
11005 
11006 	return 0;
11007 }
11008 
11009 /**
11010  * lpfc_setup_cq_lookup - Setup the CQ lookup table
11011  * @phba: pointer to lpfc hba data structure.
11012  *
11013  * This routine will populate the cq_lookup table by all
11014  * available CQ queue_id's.
11015  **/
11016 static void
11017 lpfc_setup_cq_lookup(struct lpfc_hba *phba)
11018 {
11019 	struct lpfc_queue *eq, *childq;
11020 	int qidx;
11021 
11022 	memset(phba->sli4_hba.cq_lookup, 0,
11023 	       (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1)));
11024 	/* Loop thru all IRQ vectors */
11025 	for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11026 		/* Get the EQ corresponding to the IRQ vector */
11027 		eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11028 		if (!eq)
11029 			continue;
11030 		/* Loop through all CQs associated with that EQ */
11031 		list_for_each_entry(childq, &eq->child_list, list) {
11032 			if (childq->queue_id > phba->sli4_hba.cq_max)
11033 				continue;
11034 			if (childq->subtype == LPFC_IO)
11035 				phba->sli4_hba.cq_lookup[childq->queue_id] =
11036 					childq;
11037 		}
11038 	}
11039 }
11040 
11041 /**
11042  * lpfc_sli4_queue_setup - Set up all the SLI4 queues
11043  * @phba: pointer to lpfc hba data structure.
11044  *
11045  * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
11046  * operation.
11047  *
11048  * Return codes
11049  *      0 - successful
11050  *      -ENOMEM - No available memory
11051  *      -EIO - The mailbox failed to complete successfully.
11052  **/
11053 int
11054 lpfc_sli4_queue_setup(struct lpfc_hba *phba)
11055 {
11056 	uint32_t shdr_status, shdr_add_status;
11057 	union lpfc_sli4_cfg_shdr *shdr;
11058 	struct lpfc_vector_map_info *cpup;
11059 	struct lpfc_sli4_hdw_queue *qp;
11060 	LPFC_MBOXQ_t *mboxq;
11061 	int qidx, cpu;
11062 	uint32_t length, usdelay;
11063 	int rc = -ENOMEM;
11064 
11065 	/* Check for dual-ULP support */
11066 	mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
11067 	if (!mboxq) {
11068 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11069 				"3249 Unable to allocate memory for "
11070 				"QUERY_FW_CFG mailbox command\n");
11071 		return -ENOMEM;
11072 	}
11073 	length = (sizeof(struct lpfc_mbx_query_fw_config) -
11074 		  sizeof(struct lpfc_sli4_cfg_mhdr));
11075 	lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11076 			 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
11077 			 length, LPFC_SLI4_MBX_EMBED);
11078 
11079 	rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11080 
11081 	shdr = (union lpfc_sli4_cfg_shdr *)
11082 			&mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
11083 	shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
11084 	shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
11085 	if (shdr_status || shdr_add_status || rc) {
11086 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11087 				"3250 QUERY_FW_CFG mailbox failed with status "
11088 				"x%x add_status x%x, mbx status x%x\n",
11089 				shdr_status, shdr_add_status, rc);
11090 		mempool_free(mboxq, phba->mbox_mem_pool);
11091 		rc = -ENXIO;
11092 		goto out_error;
11093 	}
11094 
11095 	phba->sli4_hba.fw_func_mode =
11096 			mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
11097 	phba->sli4_hba.physical_port =
11098 			mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
11099 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11100 			"3251 QUERY_FW_CFG: func_mode:x%x\n",
11101 			phba->sli4_hba.fw_func_mode);
11102 
11103 	mempool_free(mboxq, phba->mbox_mem_pool);
11104 
11105 	/*
11106 	 * Set up HBA Event Queues (EQs)
11107 	 */
11108 	qp = phba->sli4_hba.hdwq;
11109 
11110 	/* Set up HBA event queue */
11111 	if (!qp) {
11112 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11113 				"3147 Fast-path EQs not allocated\n");
11114 		rc = -ENOMEM;
11115 		goto out_error;
11116 	}
11117 
11118 	/* Loop thru all IRQ vectors */
11119 	for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11120 		/* Create HBA Event Queues (EQs) in order */
11121 		for_each_present_cpu(cpu) {
11122 			cpup = &phba->sli4_hba.cpu_map[cpu];
11123 
11124 			/* Look for the CPU thats using that vector with
11125 			 * LPFC_CPU_FIRST_IRQ set.
11126 			 */
11127 			if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
11128 				continue;
11129 			if (qidx != cpup->eq)
11130 				continue;
11131 
11132 			/* Create an EQ for that vector */
11133 			rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq,
11134 					    phba->cfg_fcp_imax);
11135 			if (rc) {
11136 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11137 						"0523 Failed setup of fast-path"
11138 						" EQ (%d), rc = 0x%x\n",
11139 						cpup->eq, (uint32_t)rc);
11140 				goto out_destroy;
11141 			}
11142 
11143 			/* Save the EQ for that vector in the hba_eq_hdl */
11144 			phba->sli4_hba.hba_eq_hdl[cpup->eq].eq =
11145 				qp[cpup->hdwq].hba_eq;
11146 
11147 			lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11148 					"2584 HBA EQ setup: queue[%d]-id=%d\n",
11149 					cpup->eq,
11150 					qp[cpup->hdwq].hba_eq->queue_id);
11151 		}
11152 	}
11153 
11154 	/* Loop thru all Hardware Queues */
11155 	for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
11156 		cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ);
11157 		cpup = &phba->sli4_hba.cpu_map[cpu];
11158 
11159 		/* Create the CQ/WQ corresponding to the Hardware Queue */
11160 		rc = lpfc_create_wq_cq(phba,
11161 				       phba->sli4_hba.hdwq[cpup->hdwq].hba_eq,
11162 				       qp[qidx].io_cq,
11163 				       qp[qidx].io_wq,
11164 				       &phba->sli4_hba.hdwq[qidx].io_cq_map,
11165 				       qidx,
11166 				       LPFC_IO);
11167 		if (rc) {
11168 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11169 					"0535 Failed to setup fastpath "
11170 					"IO WQ/CQ (%d), rc = 0x%x\n",
11171 					qidx, (uint32_t)rc);
11172 			goto out_destroy;
11173 		}
11174 	}
11175 
11176 	/*
11177 	 * Set up Slow Path Complete Queues (CQs)
11178 	 */
11179 
11180 	/* Set up slow-path MBOX CQ/MQ */
11181 
11182 	if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
11183 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11184 				"0528 %s not allocated\n",
11185 				phba->sli4_hba.mbx_cq ?
11186 				"Mailbox WQ" : "Mailbox CQ");
11187 		rc = -ENOMEM;
11188 		goto out_destroy;
11189 	}
11190 
11191 	rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11192 			       phba->sli4_hba.mbx_cq,
11193 			       phba->sli4_hba.mbx_wq,
11194 			       NULL, 0, LPFC_MBOX);
11195 	if (rc) {
11196 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11197 			"0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
11198 			(uint32_t)rc);
11199 		goto out_destroy;
11200 	}
11201 	if (phba->nvmet_support) {
11202 		if (!phba->sli4_hba.nvmet_cqset) {
11203 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11204 					"3165 Fast-path NVME CQ Set "
11205 					"array not allocated\n");
11206 			rc = -ENOMEM;
11207 			goto out_destroy;
11208 		}
11209 		if (phba->cfg_nvmet_mrq > 1) {
11210 			rc = lpfc_cq_create_set(phba,
11211 					phba->sli4_hba.nvmet_cqset,
11212 					qp,
11213 					LPFC_WCQ, LPFC_NVMET);
11214 			if (rc) {
11215 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11216 						"3164 Failed setup of NVME CQ "
11217 						"Set, rc = 0x%x\n",
11218 						(uint32_t)rc);
11219 				goto out_destroy;
11220 			}
11221 		} else {
11222 			/* Set up NVMET Receive Complete Queue */
11223 			rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
11224 					    qp[0].hba_eq,
11225 					    LPFC_WCQ, LPFC_NVMET);
11226 			if (rc) {
11227 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11228 						"6089 Failed setup NVMET CQ: "
11229 						"rc = 0x%x\n", (uint32_t)rc);
11230 				goto out_destroy;
11231 			}
11232 			phba->sli4_hba.nvmet_cqset[0]->chann = 0;
11233 
11234 			lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11235 					"6090 NVMET CQ setup: cq-id=%d, "
11236 					"parent eq-id=%d\n",
11237 					phba->sli4_hba.nvmet_cqset[0]->queue_id,
11238 					qp[0].hba_eq->queue_id);
11239 		}
11240 	}
11241 
11242 	/* Set up slow-path ELS WQ/CQ */
11243 	if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
11244 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11245 				"0530 ELS %s not allocated\n",
11246 				phba->sli4_hba.els_cq ? "WQ" : "CQ");
11247 		rc = -ENOMEM;
11248 		goto out_destroy;
11249 	}
11250 	rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11251 			       phba->sli4_hba.els_cq,
11252 			       phba->sli4_hba.els_wq,
11253 			       NULL, 0, LPFC_ELS);
11254 	if (rc) {
11255 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11256 				"0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
11257 				(uint32_t)rc);
11258 		goto out_destroy;
11259 	}
11260 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11261 			"2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
11262 			phba->sli4_hba.els_wq->queue_id,
11263 			phba->sli4_hba.els_cq->queue_id);
11264 
11265 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
11266 		/* Set up NVME LS Complete Queue */
11267 		if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
11268 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11269 					"6091 LS %s not allocated\n",
11270 					phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
11271 			rc = -ENOMEM;
11272 			goto out_destroy;
11273 		}
11274 		rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11275 				       phba->sli4_hba.nvmels_cq,
11276 				       phba->sli4_hba.nvmels_wq,
11277 				       NULL, 0, LPFC_NVME_LS);
11278 		if (rc) {
11279 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11280 					"0526 Failed setup of NVVME LS WQ/CQ: "
11281 					"rc = 0x%x\n", (uint32_t)rc);
11282 			goto out_destroy;
11283 		}
11284 
11285 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11286 				"6096 ELS WQ setup: wq-id=%d, "
11287 				"parent cq-id=%d\n",
11288 				phba->sli4_hba.nvmels_wq->queue_id,
11289 				phba->sli4_hba.nvmels_cq->queue_id);
11290 	}
11291 
11292 	/*
11293 	 * Create NVMET Receive Queue (RQ)
11294 	 */
11295 	if (phba->nvmet_support) {
11296 		if ((!phba->sli4_hba.nvmet_cqset) ||
11297 		    (!phba->sli4_hba.nvmet_mrq_hdr) ||
11298 		    (!phba->sli4_hba.nvmet_mrq_data)) {
11299 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11300 					"6130 MRQ CQ Queues not "
11301 					"allocated\n");
11302 			rc = -ENOMEM;
11303 			goto out_destroy;
11304 		}
11305 		if (phba->cfg_nvmet_mrq > 1) {
11306 			rc = lpfc_mrq_create(phba,
11307 					     phba->sli4_hba.nvmet_mrq_hdr,
11308 					     phba->sli4_hba.nvmet_mrq_data,
11309 					     phba->sli4_hba.nvmet_cqset,
11310 					     LPFC_NVMET);
11311 			if (rc) {
11312 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11313 						"6098 Failed setup of NVMET "
11314 						"MRQ: rc = 0x%x\n",
11315 						(uint32_t)rc);
11316 				goto out_destroy;
11317 			}
11318 
11319 		} else {
11320 			rc = lpfc_rq_create(phba,
11321 					    phba->sli4_hba.nvmet_mrq_hdr[0],
11322 					    phba->sli4_hba.nvmet_mrq_data[0],
11323 					    phba->sli4_hba.nvmet_cqset[0],
11324 					    LPFC_NVMET);
11325 			if (rc) {
11326 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11327 						"6057 Failed setup of NVMET "
11328 						"Receive Queue: rc = 0x%x\n",
11329 						(uint32_t)rc);
11330 				goto out_destroy;
11331 			}
11332 
11333 			lpfc_printf_log(
11334 				phba, KERN_INFO, LOG_INIT,
11335 				"6099 NVMET RQ setup: hdr-rq-id=%d, "
11336 				"dat-rq-id=%d parent cq-id=%d\n",
11337 				phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
11338 				phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
11339 				phba->sli4_hba.nvmet_cqset[0]->queue_id);
11340 
11341 		}
11342 	}
11343 
11344 	if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
11345 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11346 				"0540 Receive Queue not allocated\n");
11347 		rc = -ENOMEM;
11348 		goto out_destroy;
11349 	}
11350 
11351 	rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
11352 			    phba->sli4_hba.els_cq, LPFC_USOL);
11353 	if (rc) {
11354 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11355 				"0541 Failed setup of Receive Queue: "
11356 				"rc = 0x%x\n", (uint32_t)rc);
11357 		goto out_destroy;
11358 	}
11359 
11360 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11361 			"2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
11362 			"parent cq-id=%d\n",
11363 			phba->sli4_hba.hdr_rq->queue_id,
11364 			phba->sli4_hba.dat_rq->queue_id,
11365 			phba->sli4_hba.els_cq->queue_id);
11366 
11367 	if (phba->cfg_fcp_imax)
11368 		usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax;
11369 	else
11370 		usdelay = 0;
11371 
11372 	for (qidx = 0; qidx < phba->cfg_irq_chann;
11373 	     qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
11374 		lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
11375 					 usdelay);
11376 
11377 	if (phba->sli4_hba.cq_max) {
11378 		kfree(phba->sli4_hba.cq_lookup);
11379 		phba->sli4_hba.cq_lookup = kzalloc_objs(struct lpfc_queue *,
11380 							(phba->sli4_hba.cq_max + 1),
11381 							GFP_KERNEL);
11382 		if (!phba->sli4_hba.cq_lookup) {
11383 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11384 					"0549 Failed setup of CQ Lookup table: "
11385 					"size 0x%x\n", phba->sli4_hba.cq_max);
11386 			rc = -ENOMEM;
11387 			goto out_destroy;
11388 		}
11389 		lpfc_setup_cq_lookup(phba);
11390 	}
11391 	return 0;
11392 
11393 out_destroy:
11394 	lpfc_sli4_queue_unset(phba);
11395 out_error:
11396 	return rc;
11397 }
11398 
11399 /**
11400  * lpfc_sli4_queue_unset - Unset all the SLI4 queues
11401  * @phba: pointer to lpfc hba data structure.
11402  *
11403  * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
11404  * operation.
11405  *
11406  * Return codes
11407  *      0 - successful
11408  *      -ENOMEM - No available memory
11409  *      -EIO - The mailbox failed to complete successfully.
11410  **/
11411 void
11412 lpfc_sli4_queue_unset(struct lpfc_hba *phba)
11413 {
11414 	struct lpfc_sli4_hdw_queue *qp;
11415 	struct lpfc_queue *eq;
11416 	int qidx;
11417 
11418 	/* Unset mailbox command work queue */
11419 	if (phba->sli4_hba.mbx_wq)
11420 		lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
11421 
11422 	/* Unset NVME LS work queue */
11423 	if (phba->sli4_hba.nvmels_wq)
11424 		lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
11425 
11426 	/* Unset ELS work queue */
11427 	if (phba->sli4_hba.els_wq)
11428 		lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
11429 
11430 	/* Unset unsolicited receive queue */
11431 	if (phba->sli4_hba.hdr_rq)
11432 		lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
11433 				phba->sli4_hba.dat_rq);
11434 
11435 	/* Unset mailbox command complete queue */
11436 	if (phba->sli4_hba.mbx_cq)
11437 		lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
11438 
11439 	/* Unset ELS complete queue */
11440 	if (phba->sli4_hba.els_cq)
11441 		lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
11442 
11443 	/* Unset NVME LS complete queue */
11444 	if (phba->sli4_hba.nvmels_cq)
11445 		lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
11446 
11447 	if (phba->nvmet_support) {
11448 		/* Unset NVMET MRQ queue */
11449 		if (phba->sli4_hba.nvmet_mrq_hdr) {
11450 			for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
11451 				lpfc_rq_destroy(
11452 					phba,
11453 					phba->sli4_hba.nvmet_mrq_hdr[qidx],
11454 					phba->sli4_hba.nvmet_mrq_data[qidx]);
11455 		}
11456 
11457 		/* Unset NVMET CQ Set complete queue */
11458 		if (phba->sli4_hba.nvmet_cqset) {
11459 			for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
11460 				lpfc_cq_destroy(
11461 					phba, phba->sli4_hba.nvmet_cqset[qidx]);
11462 		}
11463 	}
11464 
11465 	/* Unset fast-path SLI4 queues */
11466 	if (phba->sli4_hba.hdwq) {
11467 		/* Loop thru all Hardware Queues */
11468 		for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
11469 			/* Destroy the CQ/WQ corresponding to Hardware Queue */
11470 			qp = &phba->sli4_hba.hdwq[qidx];
11471 			lpfc_wq_destroy(phba, qp->io_wq);
11472 			lpfc_cq_destroy(phba, qp->io_cq);
11473 		}
11474 		/* Loop thru all IRQ vectors */
11475 		for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11476 			/* Destroy the EQ corresponding to the IRQ vector */
11477 			eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11478 			lpfc_eq_destroy(phba, eq);
11479 		}
11480 	}
11481 
11482 	kfree(phba->sli4_hba.cq_lookup);
11483 	phba->sli4_hba.cq_lookup = NULL;
11484 	phba->sli4_hba.cq_max = 0;
11485 }
11486 
11487 /**
11488  * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
11489  * @phba: pointer to lpfc hba data structure.
11490  *
11491  * This routine is invoked to allocate and set up a pool of completion queue
11492  * events. The body of the completion queue event is a completion queue entry
11493  * CQE. For now, this pool is used for the interrupt service routine to queue
11494  * the following HBA completion queue events for the worker thread to process:
11495  *   - Mailbox asynchronous events
11496  *   - Receive queue completion unsolicited events
11497  * Later, this can be used for all the slow-path events.
11498  *
11499  * Return codes
11500  *      0 - successful
11501  *      -ENOMEM - No available memory
11502  **/
11503 static int
11504 lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
11505 {
11506 	struct lpfc_cq_event *cq_event;
11507 	int i;
11508 
11509 	for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
11510 		cq_event = kmalloc_obj(struct lpfc_cq_event, GFP_KERNEL);
11511 		if (!cq_event)
11512 			goto out_pool_create_fail;
11513 		list_add_tail(&cq_event->list,
11514 			      &phba->sli4_hba.sp_cqe_event_pool);
11515 	}
11516 	return 0;
11517 
11518 out_pool_create_fail:
11519 	lpfc_sli4_cq_event_pool_destroy(phba);
11520 	return -ENOMEM;
11521 }
11522 
11523 /**
11524  * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
11525  * @phba: pointer to lpfc hba data structure.
11526  *
11527  * This routine is invoked to free the pool of completion queue events at
11528  * driver unload time. Note that, it is the responsibility of the driver
11529  * cleanup routine to free all the outstanding completion-queue events
11530  * allocated from this pool back into the pool before invoking this routine
11531  * to destroy the pool.
11532  **/
11533 static void
11534 lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
11535 {
11536 	struct lpfc_cq_event *cq_event, *next_cq_event;
11537 
11538 	list_for_each_entry_safe(cq_event, next_cq_event,
11539 				 &phba->sli4_hba.sp_cqe_event_pool, list) {
11540 		list_del(&cq_event->list);
11541 		kfree(cq_event);
11542 	}
11543 }
11544 
11545 /**
11546  * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
11547  * @phba: pointer to lpfc hba data structure.
11548  *
11549  * This routine is the lock free version of the API invoked to allocate a
11550  * completion-queue event from the free pool.
11551  *
11552  * Return: Pointer to the newly allocated completion-queue event if successful
11553  *         NULL otherwise.
11554  **/
11555 struct lpfc_cq_event *
11556 __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
11557 {
11558 	struct lpfc_cq_event *cq_event = NULL;
11559 
11560 	list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
11561 			 struct lpfc_cq_event, list);
11562 	return cq_event;
11563 }
11564 
11565 /**
11566  * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
11567  * @phba: pointer to lpfc hba data structure.
11568  *
11569  * This routine is the lock version of the API invoked to allocate a
11570  * completion-queue event from the free pool.
11571  *
11572  * Return: Pointer to the newly allocated completion-queue event if successful
11573  *         NULL otherwise.
11574  **/
11575 struct lpfc_cq_event *
11576 lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
11577 {
11578 	struct lpfc_cq_event *cq_event;
11579 	unsigned long iflags;
11580 
11581 	spin_lock_irqsave(&phba->hbalock, iflags);
11582 	cq_event = __lpfc_sli4_cq_event_alloc(phba);
11583 	spin_unlock_irqrestore(&phba->hbalock, iflags);
11584 	return cq_event;
11585 }
11586 
11587 /**
11588  * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
11589  * @phba: pointer to lpfc hba data structure.
11590  * @cq_event: pointer to the completion queue event to be freed.
11591  *
11592  * This routine is the lock free version of the API invoked to release a
11593  * completion-queue event back into the free pool.
11594  **/
11595 void
11596 __lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
11597 			     struct lpfc_cq_event *cq_event)
11598 {
11599 	list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
11600 }
11601 
11602 /**
11603  * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
11604  * @phba: pointer to lpfc hba data structure.
11605  * @cq_event: pointer to the completion queue event to be freed.
11606  *
11607  * This routine is the lock version of the API invoked to release a
11608  * completion-queue event back into the free pool.
11609  **/
11610 void
11611 lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
11612 			   struct lpfc_cq_event *cq_event)
11613 {
11614 	unsigned long iflags;
11615 	spin_lock_irqsave(&phba->hbalock, iflags);
11616 	__lpfc_sli4_cq_event_release(phba, cq_event);
11617 	spin_unlock_irqrestore(&phba->hbalock, iflags);
11618 }
11619 
11620 /**
11621  * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
11622  * @phba: pointer to lpfc hba data structure.
11623  *
11624  * This routine is to free all the pending completion-queue events to the
11625  * back into the free pool for device reset.
11626  **/
11627 static void
11628 lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
11629 {
11630 	LIST_HEAD(cq_event_list);
11631 	struct lpfc_cq_event *cq_event;
11632 	unsigned long iflags;
11633 
11634 	/* Retrieve all the pending WCQEs from pending WCQE lists */
11635 
11636 	/* Pending ELS XRI abort events */
11637 	spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11638 	list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
11639 			 &cq_event_list);
11640 	spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11641 
11642 	/* Pending asynnc events */
11643 	spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
11644 	list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
11645 			 &cq_event_list);
11646 	spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
11647 
11648 	while (!list_empty(&cq_event_list)) {
11649 		list_remove_head(&cq_event_list, cq_event,
11650 				 struct lpfc_cq_event, list);
11651 		lpfc_sli4_cq_event_release(phba, cq_event);
11652 	}
11653 }
11654 
11655 /**
11656  * lpfc_pci_function_reset - Reset pci function.
11657  * @phba: pointer to lpfc hba data structure.
11658  *
11659  * This routine is invoked to request a PCI function reset. It will destroys
11660  * all resources assigned to the PCI function which originates this request.
11661  *
11662  * Return codes
11663  *      0 - successful
11664  *      -ENOMEM - No available memory
11665  *      -EIO - The mailbox failed to complete successfully.
11666  **/
11667 int
11668 lpfc_pci_function_reset(struct lpfc_hba *phba)
11669 {
11670 	LPFC_MBOXQ_t *mboxq;
11671 	uint32_t rc = 0, if_type;
11672 	uint32_t shdr_status, shdr_add_status;
11673 	uint32_t rdy_chk;
11674 	uint32_t port_reset = 0;
11675 	union lpfc_sli4_cfg_shdr *shdr;
11676 	struct lpfc_register reg_data;
11677 	uint16_t devid;
11678 
11679 	if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11680 	switch (if_type) {
11681 	case LPFC_SLI_INTF_IF_TYPE_0:
11682 		mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
11683 						       GFP_KERNEL);
11684 		if (!mboxq) {
11685 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11686 					"0494 Unable to allocate memory for "
11687 					"issuing SLI_FUNCTION_RESET mailbox "
11688 					"command\n");
11689 			return -ENOMEM;
11690 		}
11691 
11692 		/* Setup PCI function reset mailbox-ioctl command */
11693 		lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11694 				 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
11695 				 LPFC_SLI4_MBX_EMBED);
11696 		rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11697 		shdr = (union lpfc_sli4_cfg_shdr *)
11698 			&mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
11699 		shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
11700 		shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
11701 					 &shdr->response);
11702 		mempool_free(mboxq, phba->mbox_mem_pool);
11703 		if (shdr_status || shdr_add_status || rc) {
11704 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11705 					"0495 SLI_FUNCTION_RESET mailbox "
11706 					"failed with status x%x add_status x%x,"
11707 					" mbx status x%x\n",
11708 					shdr_status, shdr_add_status, rc);
11709 			rc = -ENXIO;
11710 		}
11711 		break;
11712 	case LPFC_SLI_INTF_IF_TYPE_2:
11713 	case LPFC_SLI_INTF_IF_TYPE_6:
11714 wait:
11715 		/*
11716 		 * Poll the Port Status Register and wait for RDY for
11717 		 * up to 30 seconds. If the port doesn't respond, treat
11718 		 * it as an error.
11719 		 */
11720 		for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
11721 			if (lpfc_readl(phba->sli4_hba.u.if_type2.
11722 				STATUSregaddr, &reg_data.word0)) {
11723 				rc = -ENODEV;
11724 				goto out;
11725 			}
11726 			if (bf_get(lpfc_sliport_status_rdy, &reg_data))
11727 				break;
11728 			msleep(20);
11729 		}
11730 
11731 		if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
11732 			phba->work_status[0] = readl(
11733 				phba->sli4_hba.u.if_type2.ERR1regaddr);
11734 			phba->work_status[1] = readl(
11735 				phba->sli4_hba.u.if_type2.ERR2regaddr);
11736 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11737 					"2890 Port not ready, port status reg "
11738 					"0x%x error 1=0x%x, error 2=0x%x\n",
11739 					reg_data.word0,
11740 					phba->work_status[0],
11741 					phba->work_status[1]);
11742 			rc = -ENODEV;
11743 			goto out;
11744 		}
11745 
11746 		if (bf_get(lpfc_sliport_status_pldv, &reg_data))
11747 			lpfc_pldv_detect = true;
11748 
11749 		if (!port_reset) {
11750 			/*
11751 			 * Reset the port now
11752 			 */
11753 			reg_data.word0 = 0;
11754 			bf_set(lpfc_sliport_ctrl_end, &reg_data,
11755 			       LPFC_SLIPORT_LITTLE_ENDIAN);
11756 			bf_set(lpfc_sliport_ctrl_ip, &reg_data,
11757 			       LPFC_SLIPORT_INIT_PORT);
11758 			writel(reg_data.word0, phba->sli4_hba.u.if_type2.
11759 			       CTRLregaddr);
11760 			/* flush */
11761 			pci_read_config_word(phba->pcidev,
11762 					     PCI_DEVICE_ID, &devid);
11763 
11764 			port_reset = 1;
11765 			msleep(20);
11766 			goto wait;
11767 		} else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
11768 			rc = -ENODEV;
11769 			goto out;
11770 		}
11771 		break;
11772 
11773 	case LPFC_SLI_INTF_IF_TYPE_1:
11774 	default:
11775 		break;
11776 	}
11777 
11778 out:
11779 	/* Catch the not-ready port failure after a port reset. */
11780 	if (rc) {
11781 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11782 				"3317 HBA not functional: IP Reset Failed "
11783 				"try: echo fw_reset > board_mode\n");
11784 		rc = -ENODEV;
11785 	}
11786 
11787 	return rc;
11788 }
11789 
11790 /**
11791  * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
11792  * @phba: pointer to lpfc hba data structure.
11793  *
11794  * This routine is invoked to set up the PCI device memory space for device
11795  * with SLI-4 interface spec.
11796  *
11797  * Return codes
11798  * 	0 - successful
11799  * 	other values - error
11800  **/
11801 static int
11802 lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
11803 {
11804 	struct pci_dev *pdev = phba->pcidev;
11805 	unsigned long bar0map_len, bar1map_len, bar2map_len;
11806 	int error;
11807 	uint32_t if_type;
11808 
11809 	if (!pdev)
11810 		return -ENODEV;
11811 
11812 	/* Set the device DMA mask size */
11813 	error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
11814 	if (error)
11815 		error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
11816 	if (error)
11817 		return error;
11818 
11819 	/*
11820 	 * The BARs and register set definitions and offset locations are
11821 	 * dependent on the if_type.
11822 	 */
11823 	if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
11824 				  &phba->sli4_hba.sli_intf.word0)) {
11825 		return -ENODEV;
11826 	}
11827 
11828 	/* There is no SLI3 failback for SLI4 devices. */
11829 	if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
11830 	    LPFC_SLI_INTF_VALID) {
11831 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11832 				"2894 SLI_INTF reg contents invalid "
11833 				"sli_intf reg 0x%x\n",
11834 				phba->sli4_hba.sli_intf.word0);
11835 		return -ENODEV;
11836 	}
11837 
11838 	if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11839 	/*
11840 	 * Get the bus address of SLI4 device Bar regions and the
11841 	 * number of bytes required by each mapping. The mapping of the
11842 	 * particular PCI BARs regions is dependent on the type of
11843 	 * SLI4 device.
11844 	 */
11845 	if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
11846 		phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
11847 		bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
11848 
11849 		/*
11850 		 * Map SLI4 PCI Config Space Register base to a kernel virtual
11851 		 * addr
11852 		 */
11853 		phba->sli4_hba.conf_regs_memmap_p =
11854 			ioremap(phba->pci_bar0_map, bar0map_len);
11855 		if (!phba->sli4_hba.conf_regs_memmap_p) {
11856 			dev_printk(KERN_ERR, &pdev->dev,
11857 				   "ioremap failed for SLI4 PCI config "
11858 				   "registers.\n");
11859 			return -ENODEV;
11860 		}
11861 		phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
11862 		/* Set up BAR0 PCI config space register memory map */
11863 		lpfc_sli4_bar0_register_memmap(phba, if_type);
11864 	} else {
11865 		phba->pci_bar0_map = pci_resource_start(pdev, 1);
11866 		bar0map_len = pci_resource_len(pdev, 1);
11867 		if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
11868 			dev_printk(KERN_ERR, &pdev->dev,
11869 			   "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
11870 			return -ENODEV;
11871 		}
11872 		phba->sli4_hba.conf_regs_memmap_p =
11873 				ioremap(phba->pci_bar0_map, bar0map_len);
11874 		if (!phba->sli4_hba.conf_regs_memmap_p) {
11875 			dev_printk(KERN_ERR, &pdev->dev,
11876 				"ioremap failed for SLI4 PCI config "
11877 				"registers.\n");
11878 			return -ENODEV;
11879 		}
11880 		lpfc_sli4_bar0_register_memmap(phba, if_type);
11881 	}
11882 
11883 	if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
11884 		if (pci_resource_start(pdev, PCI_64BIT_BAR2)) {
11885 			/*
11886 			 * Map SLI4 if type 0 HBA Control Register base to a
11887 			 * kernel virtual address and setup the registers.
11888 			 */
11889 			phba->pci_bar1_map = pci_resource_start(pdev,
11890 								PCI_64BIT_BAR2);
11891 			bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
11892 			phba->sli4_hba.ctrl_regs_memmap_p =
11893 					ioremap(phba->pci_bar1_map,
11894 						bar1map_len);
11895 			if (!phba->sli4_hba.ctrl_regs_memmap_p) {
11896 				dev_err(&pdev->dev,
11897 					   "ioremap failed for SLI4 HBA "
11898 					    "control registers.\n");
11899 				error = -ENOMEM;
11900 				goto out_iounmap_conf;
11901 			}
11902 			phba->pci_bar2_memmap_p =
11903 					 phba->sli4_hba.ctrl_regs_memmap_p;
11904 			lpfc_sli4_bar1_register_memmap(phba, if_type);
11905 		} else {
11906 			error = -ENOMEM;
11907 			goto out_iounmap_conf;
11908 		}
11909 	}
11910 
11911 	if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) &&
11912 	    (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
11913 		/*
11914 		 * Map SLI4 if type 6 HBA Doorbell Register base to a kernel
11915 		 * virtual address and setup the registers.
11916 		 */
11917 		phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
11918 		bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
11919 		phba->sli4_hba.drbl_regs_memmap_p =
11920 				ioremap(phba->pci_bar1_map, bar1map_len);
11921 		if (!phba->sli4_hba.drbl_regs_memmap_p) {
11922 			dev_err(&pdev->dev,
11923 			   "ioremap failed for SLI4 HBA doorbell registers.\n");
11924 			error = -ENOMEM;
11925 			goto out_iounmap_conf;
11926 		}
11927 		phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
11928 		lpfc_sli4_bar1_register_memmap(phba, if_type);
11929 	}
11930 
11931 	if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
11932 		if (pci_resource_start(pdev, PCI_64BIT_BAR4)) {
11933 			/*
11934 			 * Map SLI4 if type 0 HBA Doorbell Register base to
11935 			 * a kernel virtual address and setup the registers.
11936 			 */
11937 			phba->pci_bar2_map = pci_resource_start(pdev,
11938 								PCI_64BIT_BAR4);
11939 			bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
11940 			phba->sli4_hba.drbl_regs_memmap_p =
11941 					ioremap(phba->pci_bar2_map,
11942 						bar2map_len);
11943 			if (!phba->sli4_hba.drbl_regs_memmap_p) {
11944 				dev_err(&pdev->dev,
11945 					   "ioremap failed for SLI4 HBA"
11946 					   " doorbell registers.\n");
11947 				error = -ENOMEM;
11948 				goto out_iounmap_ctrl;
11949 			}
11950 			phba->pci_bar4_memmap_p =
11951 					phba->sli4_hba.drbl_regs_memmap_p;
11952 			error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
11953 			if (error)
11954 				goto out_iounmap_all;
11955 		} else {
11956 			error = -ENOMEM;
11957 			goto out_iounmap_ctrl;
11958 		}
11959 	}
11960 
11961 	if (if_type == LPFC_SLI_INTF_IF_TYPE_6 &&
11962 	    pci_resource_start(pdev, PCI_64BIT_BAR4)) {
11963 		/*
11964 		 * Map SLI4 if type 6 HBA DPP Register base to a kernel
11965 		 * virtual address and setup the registers.
11966 		 */
11967 		phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
11968 		bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
11969 		phba->sli4_hba.dpp_regs_memmap_p =
11970 				ioremap(phba->pci_bar2_map, bar2map_len);
11971 		if (!phba->sli4_hba.dpp_regs_memmap_p) {
11972 			dev_err(&pdev->dev,
11973 			   "ioremap failed for SLI4 HBA dpp registers.\n");
11974 			error = -ENOMEM;
11975 			goto out_iounmap_all;
11976 		}
11977 		phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p;
11978 	}
11979 
11980 	/* Set up the EQ/CQ register handeling functions now */
11981 	switch (if_type) {
11982 	case LPFC_SLI_INTF_IF_TYPE_0:
11983 	case LPFC_SLI_INTF_IF_TYPE_2:
11984 		phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr;
11985 		phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db;
11986 		phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db;
11987 		break;
11988 	case LPFC_SLI_INTF_IF_TYPE_6:
11989 		phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr;
11990 		phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db;
11991 		phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db;
11992 		break;
11993 	default:
11994 		break;
11995 	}
11996 
11997 	return 0;
11998 
11999 out_iounmap_all:
12000 	if (phba->sli4_hba.drbl_regs_memmap_p)
12001 		iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12002 out_iounmap_ctrl:
12003 	if (phba->sli4_hba.ctrl_regs_memmap_p)
12004 		iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
12005 out_iounmap_conf:
12006 	iounmap(phba->sli4_hba.conf_regs_memmap_p);
12007 
12008 	return error;
12009 }
12010 
12011 /**
12012  * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
12013  * @phba: pointer to lpfc hba data structure.
12014  *
12015  * This routine is invoked to unset the PCI device memory space for device
12016  * with SLI-4 interface spec.
12017  **/
12018 static void
12019 lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
12020 {
12021 	uint32_t if_type;
12022 	if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12023 
12024 	switch (if_type) {
12025 	case LPFC_SLI_INTF_IF_TYPE_0:
12026 		iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12027 		iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
12028 		iounmap(phba->sli4_hba.conf_regs_memmap_p);
12029 		break;
12030 	case LPFC_SLI_INTF_IF_TYPE_2:
12031 		iounmap(phba->sli4_hba.conf_regs_memmap_p);
12032 		break;
12033 	case LPFC_SLI_INTF_IF_TYPE_6:
12034 		iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12035 		iounmap(phba->sli4_hba.conf_regs_memmap_p);
12036 		if (phba->sli4_hba.dpp_regs_memmap_p)
12037 			iounmap(phba->sli4_hba.dpp_regs_memmap_p);
12038 		break;
12039 	case LPFC_SLI_INTF_IF_TYPE_1:
12040 		break;
12041 	default:
12042 		dev_printk(KERN_ERR, &phba->pcidev->dev,
12043 			   "FATAL - unsupported SLI4 interface type - %d\n",
12044 			   if_type);
12045 		break;
12046 	}
12047 }
12048 
12049 /**
12050  * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
12051  * @phba: pointer to lpfc hba data structure.
12052  *
12053  * This routine is invoked to enable the MSI-X interrupt vectors to device
12054  * with SLI-3 interface specs.
12055  *
12056  * Return codes
12057  *   0 - successful
12058  *   other values - error
12059  **/
12060 static int
12061 lpfc_sli_enable_msix(struct lpfc_hba *phba)
12062 {
12063 	int rc;
12064 	LPFC_MBOXQ_t *pmb;
12065 
12066 	/* Set up MSI-X multi-message vectors */
12067 	rc = pci_alloc_irq_vectors(phba->pcidev,
12068 			LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
12069 	if (rc < 0) {
12070 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12071 				"0420 PCI enable MSI-X failed (%d)\n", rc);
12072 		goto vec_fail_out;
12073 	}
12074 
12075 	/*
12076 	 * Assign MSI-X vectors to interrupt handlers
12077 	 */
12078 
12079 	/* vector-0 is associated to slow-path handler */
12080 	rc = request_irq(pci_irq_vector(phba->pcidev, 0),
12081 			 &lpfc_sli_sp_intr_handler, 0,
12082 			 LPFC_SP_DRIVER_HANDLER_NAME, phba);
12083 	if (rc) {
12084 		lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12085 				"0421 MSI-X slow-path request_irq failed "
12086 				"(%d)\n", rc);
12087 		goto msi_fail_out;
12088 	}
12089 
12090 	/* vector-1 is associated to fast-path handler */
12091 	rc = request_irq(pci_irq_vector(phba->pcidev, 1),
12092 			 &lpfc_sli_fp_intr_handler, 0,
12093 			 LPFC_FP_DRIVER_HANDLER_NAME, phba);
12094 
12095 	if (rc) {
12096 		lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12097 				"0429 MSI-X fast-path request_irq failed "
12098 				"(%d)\n", rc);
12099 		goto irq_fail_out;
12100 	}
12101 
12102 	/*
12103 	 * Configure HBA MSI-X attention conditions to messages
12104 	 */
12105 	pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
12106 
12107 	if (!pmb) {
12108 		rc = -ENOMEM;
12109 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
12110 				"0474 Unable to allocate memory for issuing "
12111 				"MBOX_CONFIG_MSI command\n");
12112 		goto mem_fail_out;
12113 	}
12114 	rc = lpfc_config_msi(phba, pmb);
12115 	if (rc)
12116 		goto mbx_fail_out;
12117 	rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
12118 	if (rc != MBX_SUCCESS) {
12119 		lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
12120 				"0351 Config MSI mailbox command failed, "
12121 				"mbxCmd x%x, mbxStatus x%x\n",
12122 				pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
12123 		goto mbx_fail_out;
12124 	}
12125 
12126 	/* Free memory allocated for mailbox command */
12127 	mempool_free(pmb, phba->mbox_mem_pool);
12128 	return rc;
12129 
12130 mbx_fail_out:
12131 	/* Free memory allocated for mailbox command */
12132 	mempool_free(pmb, phba->mbox_mem_pool);
12133 
12134 mem_fail_out:
12135 	/* free the irq already requested */
12136 	free_irq(pci_irq_vector(phba->pcidev, 1), phba);
12137 
12138 irq_fail_out:
12139 	/* free the irq already requested */
12140 	free_irq(pci_irq_vector(phba->pcidev, 0), phba);
12141 
12142 msi_fail_out:
12143 	/* Unconfigure MSI-X capability structure */
12144 	pci_free_irq_vectors(phba->pcidev);
12145 
12146 vec_fail_out:
12147 	return rc;
12148 }
12149 
12150 /**
12151  * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
12152  * @phba: pointer to lpfc hba data structure.
12153  *
12154  * This routine is invoked to enable the MSI interrupt mode to device with
12155  * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
12156  * enable the MSI vector. The device driver is responsible for calling the
12157  * request_irq() to register MSI vector with a interrupt the handler, which
12158  * is done in this function.
12159  *
12160  * Return codes
12161  * 	0 - successful
12162  * 	other values - error
12163  */
12164 static int
12165 lpfc_sli_enable_msi(struct lpfc_hba *phba)
12166 {
12167 	int rc;
12168 
12169 	rc = pci_enable_msi(phba->pcidev);
12170 	if (!rc)
12171 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12172 				"0012 PCI enable MSI mode success.\n");
12173 	else {
12174 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12175 				"0471 PCI enable MSI mode failed (%d)\n", rc);
12176 		return rc;
12177 	}
12178 
12179 	rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
12180 			 0, LPFC_DRIVER_NAME, phba);
12181 	if (rc) {
12182 		pci_disable_msi(phba->pcidev);
12183 		lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12184 				"0478 MSI request_irq failed (%d)\n", rc);
12185 	}
12186 	return rc;
12187 }
12188 
12189 /**
12190  * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
12191  * @phba: pointer to lpfc hba data structure.
12192  * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
12193  *
12194  * This routine is invoked to enable device interrupt and associate driver's
12195  * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
12196  * spec. Depends on the interrupt mode configured to the driver, the driver
12197  * will try to fallback from the configured interrupt mode to an interrupt
12198  * mode which is supported by the platform, kernel, and device in the order
12199  * of:
12200  * MSI-X -> MSI -> IRQ.
12201  *
12202  * Return codes
12203  *   0 - successful
12204  *   other values - error
12205  **/
12206 static uint32_t
12207 lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
12208 {
12209 	uint32_t intr_mode = LPFC_INTR_ERROR;
12210 	int retval;
12211 
12212 	/* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
12213 	retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
12214 	if (retval)
12215 		return intr_mode;
12216 	clear_bit(HBA_NEEDS_CFG_PORT, &phba->hba_flag);
12217 
12218 	if (cfg_mode == 2) {
12219 		/* Now, try to enable MSI-X interrupt mode */
12220 		retval = lpfc_sli_enable_msix(phba);
12221 		if (!retval) {
12222 			/* Indicate initialization to MSI-X mode */
12223 			phba->intr_type = MSIX;
12224 			intr_mode = 2;
12225 		}
12226 	}
12227 
12228 	/* Fallback to MSI if MSI-X initialization failed */
12229 	if (cfg_mode >= 1 && phba->intr_type == NONE) {
12230 		retval = lpfc_sli_enable_msi(phba);
12231 		if (!retval) {
12232 			/* Indicate initialization to MSI mode */
12233 			phba->intr_type = MSI;
12234 			intr_mode = 1;
12235 		}
12236 	}
12237 
12238 	/* Fallback to INTx if both MSI-X/MSI initalization failed */
12239 	if (phba->intr_type == NONE) {
12240 		retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
12241 				     IRQF_SHARED, LPFC_DRIVER_NAME, phba);
12242 		if (!retval) {
12243 			/* Indicate initialization to INTx mode */
12244 			phba->intr_type = INTx;
12245 			intr_mode = 0;
12246 		}
12247 	}
12248 	return intr_mode;
12249 }
12250 
12251 /**
12252  * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
12253  * @phba: pointer to lpfc hba data structure.
12254  *
12255  * This routine is invoked to disable device interrupt and disassociate the
12256  * driver's interrupt handler(s) from interrupt vector(s) to device with
12257  * SLI-3 interface spec. Depending on the interrupt mode, the driver will
12258  * release the interrupt vector(s) for the message signaled interrupt.
12259  **/
12260 static void
12261 lpfc_sli_disable_intr(struct lpfc_hba *phba)
12262 {
12263 	int nr_irqs, i;
12264 
12265 	if (phba->intr_type == MSIX)
12266 		nr_irqs = LPFC_MSIX_VECTORS;
12267 	else
12268 		nr_irqs = 1;
12269 
12270 	for (i = 0; i < nr_irqs; i++)
12271 		free_irq(pci_irq_vector(phba->pcidev, i), phba);
12272 	pci_free_irq_vectors(phba->pcidev);
12273 
12274 	/* Reset interrupt management states */
12275 	phba->intr_type = NONE;
12276 	phba->sli.slistat.sli_intr = 0;
12277 }
12278 
12279 /**
12280  * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue
12281  * @phba: pointer to lpfc hba data structure.
12282  * @id: EQ vector index or Hardware Queue index
12283  * @match: LPFC_FIND_BY_EQ = match by EQ
12284  *         LPFC_FIND_BY_HDWQ = match by Hardware Queue
12285  * Return the CPU that matches the selection criteria
12286  */
12287 static uint16_t
12288 lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match)
12289 {
12290 	struct lpfc_vector_map_info *cpup;
12291 	int cpu;
12292 
12293 	/* Loop through all CPUs */
12294 	for_each_present_cpu(cpu) {
12295 		cpup = &phba->sli4_hba.cpu_map[cpu];
12296 
12297 		/* If we are matching by EQ, there may be multiple CPUs using
12298 		 * using the same vector, so select the one with
12299 		 * LPFC_CPU_FIRST_IRQ set.
12300 		 */
12301 		if ((match == LPFC_FIND_BY_EQ) &&
12302 		    (cpup->flag & LPFC_CPU_FIRST_IRQ) &&
12303 		    (cpup->eq == id))
12304 			return cpu;
12305 
12306 		/* If matching by HDWQ, select the first CPU that matches */
12307 		if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id))
12308 			return cpu;
12309 	}
12310 	return 0;
12311 }
12312 
12313 #ifdef CONFIG_X86
12314 /**
12315  * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded
12316  * @phba: pointer to lpfc hba data structure.
12317  * @cpu: CPU map index
12318  * @phys_id: CPU package physical id
12319  * @core_id: CPU core id
12320  */
12321 static int
12322 lpfc_find_hyper(struct lpfc_hba *phba, int cpu,
12323 		uint16_t phys_id, uint16_t core_id)
12324 {
12325 	struct lpfc_vector_map_info *cpup;
12326 	int idx;
12327 
12328 	for_each_present_cpu(idx) {
12329 		cpup = &phba->sli4_hba.cpu_map[idx];
12330 		/* Does the cpup match the one we are looking for */
12331 		if ((cpup->phys_id == phys_id) &&
12332 		    (cpup->core_id == core_id) &&
12333 		    (cpu != idx))
12334 			return 1;
12335 	}
12336 	return 0;
12337 }
12338 #endif
12339 
12340 /*
12341  * lpfc_assign_eq_map_info - Assigns eq for vector_map structure
12342  * @phba: pointer to lpfc hba data structure.
12343  * @eqidx: index for eq and irq vector
12344  * @flag: flags to set for vector_map structure
12345  * @cpu: cpu used to index vector_map structure
12346  *
12347  * The routine assigns eq info into vector_map structure
12348  */
12349 static inline void
12350 lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag,
12351 			unsigned int cpu)
12352 {
12353 	struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu];
12354 	struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx);
12355 
12356 	cpup->eq = eqidx;
12357 	cpup->flag |= flag;
12358 
12359 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12360 			"3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n",
12361 			cpu, eqhdl->irq, cpup->eq, cpup->flag);
12362 }
12363 
12364 /**
12365  * lpfc_cpu_map_array_init - Initialize cpu_map structure
12366  * @phba: pointer to lpfc hba data structure.
12367  *
12368  * The routine initializes the cpu_map array structure
12369  */
12370 static void
12371 lpfc_cpu_map_array_init(struct lpfc_hba *phba)
12372 {
12373 	struct lpfc_vector_map_info *cpup;
12374 	struct lpfc_eq_intr_info *eqi;
12375 	int cpu;
12376 
12377 	for_each_possible_cpu(cpu) {
12378 		cpup = &phba->sli4_hba.cpu_map[cpu];
12379 		cpup->phys_id = LPFC_VECTOR_MAP_EMPTY;
12380 		cpup->core_id = LPFC_VECTOR_MAP_EMPTY;
12381 		cpup->hdwq = LPFC_VECTOR_MAP_EMPTY;
12382 		cpup->eq = LPFC_VECTOR_MAP_EMPTY;
12383 		cpup->flag = 0;
12384 		eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu);
12385 		INIT_LIST_HEAD(&eqi->list);
12386 		eqi->icnt = 0;
12387 	}
12388 }
12389 
12390 /**
12391  * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure
12392  * @phba: pointer to lpfc hba data structure.
12393  *
12394  * The routine initializes the hba_eq_hdl array structure
12395  */
12396 static void
12397 lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba)
12398 {
12399 	struct lpfc_hba_eq_hdl *eqhdl;
12400 	int i;
12401 
12402 	for (i = 0; i < phba->cfg_irq_chann; i++) {
12403 		eqhdl = lpfc_get_eq_hdl(i);
12404 		eqhdl->irq = LPFC_IRQ_EMPTY;
12405 		eqhdl->phba = phba;
12406 	}
12407 }
12408 
12409 /**
12410  * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
12411  * @phba: pointer to lpfc hba data structure.
12412  * @vectors: number of msix vectors allocated.
12413  *
12414  * The routine will figure out the CPU affinity assignment for every
12415  * MSI-X vector allocated for the HBA.
12416  * In addition, the CPU to IO channel mapping will be calculated
12417  * and the phba->sli4_hba.cpu_map array will reflect this.
12418  */
12419 static void
12420 lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
12421 {
12422 	int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu;
12423 	int max_phys_id, min_phys_id;
12424 	int max_core_id, min_core_id;
12425 	struct lpfc_vector_map_info *cpup;
12426 	struct lpfc_vector_map_info *new_cpup;
12427 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12428 	struct lpfc_hdwq_stat *c_stat;
12429 #endif
12430 
12431 	max_phys_id = 0;
12432 	min_phys_id = LPFC_VECTOR_MAP_EMPTY;
12433 	max_core_id = 0;
12434 	min_core_id = LPFC_VECTOR_MAP_EMPTY;
12435 
12436 	/* Update CPU map with physical id and core id of each CPU */
12437 	for_each_present_cpu(cpu) {
12438 		cpup = &phba->sli4_hba.cpu_map[cpu];
12439 #ifdef CONFIG_X86
12440 		cpup->phys_id = topology_physical_package_id(cpu);
12441 		cpup->core_id = topology_core_id(cpu);
12442 		if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id))
12443 			cpup->flag |= LPFC_CPU_MAP_HYPER;
12444 #else
12445 		/* No distinction between CPUs for other platforms */
12446 		cpup->phys_id = 0;
12447 		cpup->core_id = cpu;
12448 #endif
12449 
12450 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12451 				"3328 CPU %d physid %d coreid %d flag x%x\n",
12452 				cpu, cpup->phys_id, cpup->core_id, cpup->flag);
12453 
12454 		if (cpup->phys_id > max_phys_id)
12455 			max_phys_id = cpup->phys_id;
12456 		if (cpup->phys_id < min_phys_id)
12457 			min_phys_id = cpup->phys_id;
12458 
12459 		if (cpup->core_id > max_core_id)
12460 			max_core_id = cpup->core_id;
12461 		if (cpup->core_id < min_core_id)
12462 			min_core_id = cpup->core_id;
12463 	}
12464 
12465 	/* After looking at each irq vector assigned to this pcidev, its
12466 	 * possible to see that not ALL CPUs have been accounted for.
12467 	 * Next we will set any unassigned (unaffinitized) cpu map
12468 	 * entries to a IRQ on the same phys_id.
12469 	 */
12470 	first_cpu = cpumask_first(cpu_present_mask);
12471 	start_cpu = first_cpu;
12472 
12473 	for_each_present_cpu(cpu) {
12474 		cpup = &phba->sli4_hba.cpu_map[cpu];
12475 
12476 		/* Is this CPU entry unassigned */
12477 		if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
12478 			/* Mark CPU as IRQ not assigned by the kernel */
12479 			cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
12480 
12481 			/* If so, find a new_cpup that is on the SAME
12482 			 * phys_id as cpup. start_cpu will start where we
12483 			 * left off so all unassigned entries don't get assgined
12484 			 * the IRQ of the first entry.
12485 			 */
12486 			new_cpu = start_cpu;
12487 			for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12488 				new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12489 				if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
12490 				    (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) &&
12491 				    (new_cpup->phys_id == cpup->phys_id))
12492 					goto found_same;
12493 				new_cpu = lpfc_next_present_cpu(new_cpu);
12494 			}
12495 			/* At this point, we leave the CPU as unassigned */
12496 			continue;
12497 found_same:
12498 			/* We found a matching phys_id, so copy the IRQ info */
12499 			cpup->eq = new_cpup->eq;
12500 
12501 			/* Bump start_cpu to the next slot to minmize the
12502 			 * chance of having multiple unassigned CPU entries
12503 			 * selecting the same IRQ.
12504 			 */
12505 			start_cpu = lpfc_next_present_cpu(new_cpu);
12506 
12507 			lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12508 					"3337 Set Affinity: CPU %d "
12509 					"eq %d from peer cpu %d same "
12510 					"phys_id (%d)\n",
12511 					cpu, cpup->eq, new_cpu,
12512 					cpup->phys_id);
12513 		}
12514 	}
12515 
12516 	/* Set any unassigned cpu map entries to a IRQ on any phys_id */
12517 	start_cpu = first_cpu;
12518 
12519 	for_each_present_cpu(cpu) {
12520 		cpup = &phba->sli4_hba.cpu_map[cpu];
12521 
12522 		/* Is this entry unassigned */
12523 		if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
12524 			/* Mark it as IRQ not assigned by the kernel */
12525 			cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
12526 
12527 			/* If so, find a new_cpup thats on ANY phys_id
12528 			 * as the cpup. start_cpu will start where we
12529 			 * left off so all unassigned entries don't get
12530 			 * assigned the IRQ of the first entry.
12531 			 */
12532 			new_cpu = start_cpu;
12533 			for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12534 				new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12535 				if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
12536 				    (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY))
12537 					goto found_any;
12538 				new_cpu = lpfc_next_present_cpu(new_cpu);
12539 			}
12540 			/* We should never leave an entry unassigned */
12541 			lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12542 					"3339 Set Affinity: CPU %d "
12543 					"eq %d UNASSIGNED\n",
12544 					cpup->hdwq, cpup->eq);
12545 			continue;
12546 found_any:
12547 			/* We found an available entry, copy the IRQ info */
12548 			cpup->eq = new_cpup->eq;
12549 
12550 			/* Bump start_cpu to the next slot to minmize the
12551 			 * chance of having multiple unassigned CPU entries
12552 			 * selecting the same IRQ.
12553 			 */
12554 			start_cpu = lpfc_next_present_cpu(new_cpu);
12555 
12556 			lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12557 					"3338 Set Affinity: CPU %d "
12558 					"eq %d from peer cpu %d (%d/%d)\n",
12559 					cpu, cpup->eq, new_cpu,
12560 					new_cpup->phys_id, new_cpup->core_id);
12561 		}
12562 	}
12563 
12564 	/* Assign hdwq indices that are unique across all cpus in the map
12565 	 * that are also FIRST_CPUs.
12566 	 */
12567 	idx = 0;
12568 	for_each_present_cpu(cpu) {
12569 		cpup = &phba->sli4_hba.cpu_map[cpu];
12570 
12571 		/* Only FIRST IRQs get a hdwq index assignment. */
12572 		if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
12573 			continue;
12574 
12575 		/* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */
12576 		cpup->hdwq = idx;
12577 		idx++;
12578 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12579 				"3333 Set Affinity: CPU %d (phys %d core %d): "
12580 				"hdwq %d eq %d flg x%x\n",
12581 				cpu, cpup->phys_id, cpup->core_id,
12582 				cpup->hdwq, cpup->eq, cpup->flag);
12583 	}
12584 	/* Associate a hdwq with each cpu_map entry
12585 	 * This will be 1 to 1 - hdwq to cpu, unless there are less
12586 	 * hardware queues then CPUs. For that case we will just round-robin
12587 	 * the available hardware queues as they get assigned to CPUs.
12588 	 * The next_idx is the idx from the FIRST_CPU loop above to account
12589 	 * for irq_chann < hdwq.  The idx is used for round-robin assignments
12590 	 * and needs to start at 0.
12591 	 */
12592 	next_idx = idx;
12593 	start_cpu = 0;
12594 	idx = 0;
12595 	for_each_present_cpu(cpu) {
12596 		cpup = &phba->sli4_hba.cpu_map[cpu];
12597 
12598 		/* FIRST cpus are already mapped. */
12599 		if (cpup->flag & LPFC_CPU_FIRST_IRQ)
12600 			continue;
12601 
12602 		/* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq
12603 		 * of the unassigned cpus to the next idx so that all
12604 		 * hdw queues are fully utilized.
12605 		 */
12606 		if (next_idx < phba->cfg_hdw_queue) {
12607 			cpup->hdwq = next_idx;
12608 			next_idx++;
12609 			continue;
12610 		}
12611 
12612 		/* Not a First CPU and all hdw_queues are used.  Reuse a
12613 		 * Hardware Queue for another CPU, so be smart about it
12614 		 * and pick one that has its IRQ/EQ mapped to the same phys_id
12615 		 * (CPU package) and core_id.
12616 		 */
12617 		new_cpu = start_cpu;
12618 		for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12619 			new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12620 			if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
12621 			    new_cpup->phys_id == cpup->phys_id &&
12622 			    new_cpup->core_id == cpup->core_id) {
12623 				goto found_hdwq;
12624 			}
12625 			new_cpu = lpfc_next_present_cpu(new_cpu);
12626 		}
12627 
12628 		/* If we can't match both phys_id and core_id,
12629 		 * settle for just a phys_id match.
12630 		 */
12631 		new_cpu = start_cpu;
12632 		for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12633 			new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12634 			if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
12635 			    new_cpup->phys_id == cpup->phys_id)
12636 				goto found_hdwq;
12637 			new_cpu = lpfc_next_present_cpu(new_cpu);
12638 		}
12639 
12640 		/* Otherwise just round robin on cfg_hdw_queue */
12641 		cpup->hdwq = idx % phba->cfg_hdw_queue;
12642 		idx++;
12643 		goto logit;
12644  found_hdwq:
12645 		/* We found an available entry, copy the IRQ info */
12646 		start_cpu = lpfc_next_present_cpu(new_cpu);
12647 		cpup->hdwq = new_cpup->hdwq;
12648  logit:
12649 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12650 				"3335 Set Affinity: CPU %d (phys %d core %d): "
12651 				"hdwq %d eq %d flg x%x\n",
12652 				cpu, cpup->phys_id, cpup->core_id,
12653 				cpup->hdwq, cpup->eq, cpup->flag);
12654 	}
12655 
12656 	/*
12657 	 * Initialize the cpu_map slots for not-present cpus in case
12658 	 * a cpu is hot-added. Perform a simple hdwq round robin assignment.
12659 	 */
12660 	idx = 0;
12661 	for_each_possible_cpu(cpu) {
12662 		cpup = &phba->sli4_hba.cpu_map[cpu];
12663 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12664 		c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu);
12665 		c_stat->hdwq_no = cpup->hdwq;
12666 #endif
12667 		if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY)
12668 			continue;
12669 
12670 		cpup->hdwq = idx++ % phba->cfg_hdw_queue;
12671 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12672 		c_stat->hdwq_no = cpup->hdwq;
12673 #endif
12674 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12675 				"3340 Set Affinity: not present "
12676 				"CPU %d hdwq %d\n",
12677 				cpu, cpup->hdwq);
12678 	}
12679 
12680 	/* The cpu_map array will be used later during initialization
12681 	 * when EQ / CQ / WQs are allocated and configured.
12682 	 */
12683 	return;
12684 }
12685 
12686 /**
12687  * lpfc_cpuhp_get_eq
12688  *
12689  * @phba:   pointer to lpfc hba data structure.
12690  * @cpu:    cpu going offline
12691  * @eqlist: eq list to append to
12692  */
12693 static int
12694 lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu,
12695 		  struct list_head *eqlist)
12696 {
12697 	const struct cpumask *maskp;
12698 	struct lpfc_queue *eq;
12699 	struct cpumask *tmp;
12700 	u16 idx;
12701 
12702 	tmp = kzalloc(cpumask_size(), GFP_KERNEL);
12703 	if (!tmp)
12704 		return -ENOMEM;
12705 
12706 	for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
12707 		maskp = pci_irq_get_affinity(phba->pcidev, idx);
12708 		if (!maskp)
12709 			continue;
12710 		/*
12711 		 * if irq is not affinitized to the cpu going
12712 		 * then we don't need to poll the eq attached
12713 		 * to it.
12714 		 */
12715 		if (!cpumask_and(tmp, maskp, cpumask_of(cpu)))
12716 			continue;
12717 		/* get the cpus that are online and are affini-
12718 		 * tized to this irq vector.  If the count is
12719 		 * more than 1 then cpuhp is not going to shut-
12720 		 * down this vector.  Since this cpu has not
12721 		 * gone offline yet, we need >1.
12722 		 */
12723 		cpumask_and(tmp, maskp, cpu_online_mask);
12724 		if (cpumask_weight(tmp) > 1)
12725 			continue;
12726 
12727 		/* Now that we have an irq to shutdown, get the eq
12728 		 * mapped to this irq.  Note: multiple hdwq's in
12729 		 * the software can share an eq, but eventually
12730 		 * only eq will be mapped to this vector
12731 		 */
12732 		eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
12733 		list_add(&eq->_poll_list, eqlist);
12734 	}
12735 	kfree(tmp);
12736 	return 0;
12737 }
12738 
12739 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba)
12740 {
12741 	if (phba->sli_rev != LPFC_SLI_REV4)
12742 		return;
12743 
12744 	cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state,
12745 					    &phba->cpuhp);
12746 	/*
12747 	 * unregistering the instance doesn't stop the polling
12748 	 * timer. Wait for the poll timer to retire.
12749 	 */
12750 	synchronize_rcu();
12751 	timer_delete_sync(&phba->cpuhp_poll_timer);
12752 }
12753 
12754 static void lpfc_cpuhp_remove(struct lpfc_hba *phba)
12755 {
12756 	if (phba->pport &&
12757 	    test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
12758 		return;
12759 
12760 	__lpfc_cpuhp_remove(phba);
12761 }
12762 
12763 static void lpfc_cpuhp_add(struct lpfc_hba *phba)
12764 {
12765 	if (phba->sli_rev != LPFC_SLI_REV4)
12766 		return;
12767 
12768 	rcu_read_lock();
12769 
12770 	if (!list_empty(&phba->poll_list))
12771 		mod_timer(&phba->cpuhp_poll_timer,
12772 			  jiffies + msecs_to_jiffies(LPFC_POLL_HB));
12773 
12774 	rcu_read_unlock();
12775 
12776 	cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state,
12777 					 &phba->cpuhp);
12778 }
12779 
12780 static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval)
12781 {
12782 	if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
12783 		*retval = -EAGAIN;
12784 		return true;
12785 	}
12786 
12787 	if (phba->sli_rev != LPFC_SLI_REV4) {
12788 		*retval = 0;
12789 		return true;
12790 	}
12791 
12792 	/* proceed with the hotplug */
12793 	return false;
12794 }
12795 
12796 /**
12797  * lpfc_irq_set_aff - set IRQ affinity
12798  * @eqhdl: EQ handle
12799  * @cpu: cpu to set affinity
12800  *
12801  **/
12802 static inline void
12803 lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu)
12804 {
12805 	cpumask_clear(&eqhdl->aff_mask);
12806 	cpumask_set_cpu(cpu, &eqhdl->aff_mask);
12807 	irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
12808 	irq_set_affinity(eqhdl->irq, &eqhdl->aff_mask);
12809 }
12810 
12811 /**
12812  * lpfc_irq_clear_aff - clear IRQ affinity
12813  * @eqhdl: EQ handle
12814  *
12815  **/
12816 static inline void
12817 lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl)
12818 {
12819 	cpumask_clear(&eqhdl->aff_mask);
12820 	irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
12821 }
12822 
12823 /**
12824  * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event
12825  * @phba: pointer to HBA context object.
12826  * @cpu: cpu going offline/online
12827  * @offline: true, cpu is going offline. false, cpu is coming online.
12828  *
12829  * If cpu is going offline, we'll try our best effort to find the next
12830  * online cpu on the phba's original_mask and migrate all offlining IRQ
12831  * affinities.
12832  *
12833  * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu.
12834  *
12835  * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on
12836  *	 PCI_IRQ_AFFINITY to auto-manage IRQ affinity.
12837  *
12838  **/
12839 static void
12840 lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline)
12841 {
12842 	struct lpfc_vector_map_info *cpup;
12843 	struct cpumask *aff_mask;
12844 	unsigned int cpu_select, cpu_next, idx;
12845 	const struct cpumask *orig_mask;
12846 
12847 	if (phba->irq_chann_mode == NORMAL_MODE)
12848 		return;
12849 
12850 	orig_mask = &phba->sli4_hba.irq_aff_mask;
12851 
12852 	if (!cpumask_test_cpu(cpu, orig_mask))
12853 		return;
12854 
12855 	cpup = &phba->sli4_hba.cpu_map[cpu];
12856 
12857 	if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
12858 		return;
12859 
12860 	if (offline) {
12861 		/* Find next online CPU on original mask */
12862 		cpu_next = cpumask_next_wrap(cpu, orig_mask);
12863 		cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next);
12864 
12865 		/* Found a valid CPU */
12866 		if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) {
12867 			/* Go through each eqhdl and ensure offlining
12868 			 * cpu aff_mask is migrated
12869 			 */
12870 			for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
12871 				aff_mask = lpfc_get_aff_mask(idx);
12872 
12873 				/* Migrate affinity */
12874 				if (cpumask_test_cpu(cpu, aff_mask))
12875 					lpfc_irq_set_aff(lpfc_get_eq_hdl(idx),
12876 							 cpu_select);
12877 			}
12878 		} else {
12879 			/* Rely on irqbalance if no online CPUs left on NUMA */
12880 			for (idx = 0; idx < phba->cfg_irq_chann; idx++)
12881 				lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx));
12882 		}
12883 	} else {
12884 		/* Migrate affinity back to this CPU */
12885 		lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu);
12886 	}
12887 }
12888 
12889 static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node)
12890 {
12891 	struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
12892 	struct lpfc_queue *eq, *next;
12893 	LIST_HEAD(eqlist);
12894 	int retval;
12895 
12896 	if (!phba) {
12897 		WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
12898 		return 0;
12899 	}
12900 
12901 	if (__lpfc_cpuhp_checks(phba, &retval))
12902 		return retval;
12903 
12904 	lpfc_irq_rebalance(phba, cpu, true);
12905 
12906 	retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist);
12907 	if (retval)
12908 		return retval;
12909 
12910 	/* start polling on these eq's */
12911 	list_for_each_entry_safe(eq, next, &eqlist, _poll_list) {
12912 		list_del_init(&eq->_poll_list);
12913 		lpfc_sli4_start_polling(eq);
12914 	}
12915 
12916 	return 0;
12917 }
12918 
12919 static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node)
12920 {
12921 	struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
12922 	struct lpfc_queue *eq, *next;
12923 	unsigned int n;
12924 	int retval;
12925 
12926 	if (!phba) {
12927 		WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
12928 		return 0;
12929 	}
12930 
12931 	if (__lpfc_cpuhp_checks(phba, &retval))
12932 		return retval;
12933 
12934 	lpfc_irq_rebalance(phba, cpu, false);
12935 
12936 	list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) {
12937 		n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ);
12938 		if (n == cpu)
12939 			lpfc_sli4_stop_polling(eq);
12940 	}
12941 
12942 	return 0;
12943 }
12944 
12945 /**
12946  * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
12947  * @phba: pointer to lpfc hba data structure.
12948  *
12949  * This routine is invoked to enable the MSI-X interrupt vectors to device
12950  * with SLI-4 interface spec.  It also allocates MSI-X vectors and maps them
12951  * to cpus on the system.
12952  *
12953  * When cfg_irq_numa is enabled, the adapter will only allocate vectors for
12954  * the number of cpus on the same numa node as this adapter.  The vectors are
12955  * allocated without requesting OS affinity mapping.  A vector will be
12956  * allocated and assigned to each online and offline cpu.  If the cpu is
12957  * online, then affinity will be set to that cpu.  If the cpu is offline, then
12958  * affinity will be set to the nearest peer cpu within the numa node that is
12959  * online.  If there are no online cpus within the numa node, affinity is not
12960  * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping
12961  * is consistent with the way cpu online/offline is handled when cfg_irq_numa is
12962  * configured.
12963  *
12964  * If numa mode is not enabled and there is more than 1 vector allocated, then
12965  * the driver relies on the managed irq interface where the OS assigns vector to
12966  * cpu affinity.  The driver will then use that affinity mapping to setup its
12967  * cpu mapping table.
12968  *
12969  * Return codes
12970  * 0 - successful
12971  * other values - error
12972  **/
12973 static int
12974 lpfc_sli4_enable_msix(struct lpfc_hba *phba)
12975 {
12976 	int vectors, rc, index;
12977 	char *name;
12978 	const struct cpumask *aff_mask = NULL;
12979 	unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids;
12980 	struct lpfc_vector_map_info *cpup;
12981 	struct lpfc_hba_eq_hdl *eqhdl;
12982 	const struct cpumask *maskp;
12983 	unsigned int flags = PCI_IRQ_MSIX;
12984 
12985 	/* Set up MSI-X multi-message vectors */
12986 	vectors = phba->cfg_irq_chann;
12987 
12988 	if (phba->irq_chann_mode != NORMAL_MODE)
12989 		aff_mask = &phba->sli4_hba.irq_aff_mask;
12990 
12991 	if (aff_mask) {
12992 		cpu_cnt = cpumask_weight(aff_mask);
12993 		vectors = min(phba->cfg_irq_chann, cpu_cnt);
12994 
12995 		/* cpu: iterates over aff_mask including offline or online
12996 		 * cpu_select: iterates over online aff_mask to set affinity
12997 		 */
12998 		cpu = cpumask_first(aff_mask);
12999 		cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
13000 	} else {
13001 		flags |= PCI_IRQ_AFFINITY;
13002 	}
13003 
13004 	rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags);
13005 	if (rc < 0) {
13006 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13007 				"0484 PCI enable MSI-X failed (%d)\n", rc);
13008 		goto vec_fail_out;
13009 	}
13010 	vectors = rc;
13011 
13012 	/* Assign MSI-X vectors to interrupt handlers */
13013 	for (index = 0; index < vectors; index++) {
13014 		eqhdl = lpfc_get_eq_hdl(index);
13015 		name = eqhdl->handler_name;
13016 		memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
13017 		snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
13018 			 LPFC_DRIVER_HANDLER_NAME"%d", index);
13019 
13020 		eqhdl->idx = index;
13021 		rc = pci_irq_vector(phba->pcidev, index);
13022 		if (rc < 0) {
13023 			lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13024 					"0489 MSI-X fast-path (%d) "
13025 					"pci_irq_vec failed (%d)\n", index, rc);
13026 			goto cfg_fail_out;
13027 		}
13028 		eqhdl->irq = rc;
13029 
13030 		rc = request_threaded_irq(eqhdl->irq,
13031 					  &lpfc_sli4_hba_intr_handler,
13032 					  &lpfc_sli4_hba_intr_handler_th,
13033 					  0, name, eqhdl);
13034 		if (rc) {
13035 			lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13036 					"0486 MSI-X fast-path (%d) "
13037 					"request_irq failed (%d)\n", index, rc);
13038 			goto cfg_fail_out;
13039 		}
13040 
13041 		if (aff_mask) {
13042 			/* If found a neighboring online cpu, set affinity */
13043 			if (cpu_select < nr_cpu_ids)
13044 				lpfc_irq_set_aff(eqhdl, cpu_select);
13045 
13046 			/* Assign EQ to cpu_map */
13047 			lpfc_assign_eq_map_info(phba, index,
13048 						LPFC_CPU_FIRST_IRQ,
13049 						cpu);
13050 
13051 			/* Iterate to next offline or online cpu in aff_mask */
13052 			cpu = cpumask_next(cpu, aff_mask);
13053 
13054 			/* Find next online cpu in aff_mask to set affinity */
13055 			cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
13056 		} else if (vectors == 1) {
13057 			cpu = cpumask_first(cpu_present_mask);
13058 			lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ,
13059 						cpu);
13060 		} else {
13061 			maskp = pci_irq_get_affinity(phba->pcidev, index);
13062 
13063 			/* Loop through all CPUs associated with vector index */
13064 			for_each_cpu_and(cpu, maskp, cpu_present_mask) {
13065 				cpup = &phba->sli4_hba.cpu_map[cpu];
13066 
13067 				/* If this is the first CPU thats assigned to
13068 				 * this vector, set LPFC_CPU_FIRST_IRQ.
13069 				 *
13070 				 * With certain platforms its possible that irq
13071 				 * vectors are affinitized to all the cpu's.
13072 				 * This can result in each cpu_map.eq to be set
13073 				 * to the last vector, resulting in overwrite
13074 				 * of all the previous cpu_map.eq.  Ensure that
13075 				 * each vector receives a place in cpu_map.
13076 				 * Later call to lpfc_cpu_affinity_check will
13077 				 * ensure we are nicely balanced out.
13078 				 */
13079 				if (cpup->eq != LPFC_VECTOR_MAP_EMPTY)
13080 					continue;
13081 				lpfc_assign_eq_map_info(phba, index,
13082 							LPFC_CPU_FIRST_IRQ,
13083 							cpu);
13084 				break;
13085 			}
13086 		}
13087 	}
13088 
13089 	if (vectors != phba->cfg_irq_chann) {
13090 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13091 				"3238 Reducing IO channels to match number of "
13092 				"MSI-X vectors, requested %d got %d\n",
13093 				phba->cfg_irq_chann, vectors);
13094 		if (phba->cfg_irq_chann > vectors)
13095 			phba->cfg_irq_chann = vectors;
13096 	}
13097 
13098 	return rc;
13099 
13100 cfg_fail_out:
13101 	/* free the irq already requested */
13102 	for (--index; index >= 0; index--) {
13103 		eqhdl = lpfc_get_eq_hdl(index);
13104 		lpfc_irq_clear_aff(eqhdl);
13105 		free_irq(eqhdl->irq, eqhdl);
13106 	}
13107 
13108 	/* Unconfigure MSI-X capability structure */
13109 	pci_free_irq_vectors(phba->pcidev);
13110 
13111 vec_fail_out:
13112 	return rc;
13113 }
13114 
13115 /**
13116  * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
13117  * @phba: pointer to lpfc hba data structure.
13118  *
13119  * This routine is invoked to enable the MSI interrupt mode to device with
13120  * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is
13121  * called to enable the MSI vector. The device driver is responsible for
13122  * calling the request_irq() to register MSI vector with a interrupt the
13123  * handler, which is done in this function.
13124  *
13125  * Return codes
13126  * 	0 - successful
13127  * 	other values - error
13128  **/
13129 static int
13130 lpfc_sli4_enable_msi(struct lpfc_hba *phba)
13131 {
13132 	int rc, index;
13133 	unsigned int cpu;
13134 	struct lpfc_hba_eq_hdl *eqhdl;
13135 
13136 	rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1,
13137 				   PCI_IRQ_MSI | PCI_IRQ_AFFINITY);
13138 	if (rc > 0)
13139 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13140 				"0487 PCI enable MSI mode success.\n");
13141 	else {
13142 		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13143 				"0488 PCI enable MSI mode failed (%d)\n", rc);
13144 		return rc ? rc : -1;
13145 	}
13146 
13147 	rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
13148 			 0, LPFC_DRIVER_NAME, phba);
13149 	if (rc) {
13150 		pci_free_irq_vectors(phba->pcidev);
13151 		lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13152 				"0490 MSI request_irq failed (%d)\n", rc);
13153 		return rc;
13154 	}
13155 
13156 	eqhdl = lpfc_get_eq_hdl(0);
13157 	rc = pci_irq_vector(phba->pcidev, 0);
13158 	if (rc < 0) {
13159 		free_irq(phba->pcidev->irq, phba);
13160 		pci_free_irq_vectors(phba->pcidev);
13161 		lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13162 				"0496 MSI pci_irq_vec failed (%d)\n", rc);
13163 		return rc;
13164 	}
13165 	eqhdl->irq = rc;
13166 
13167 	cpu = cpumask_first(cpu_present_mask);
13168 	lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu);
13169 
13170 	for (index = 0; index < phba->cfg_irq_chann; index++) {
13171 		eqhdl = lpfc_get_eq_hdl(index);
13172 		eqhdl->idx = index;
13173 	}
13174 
13175 	return 0;
13176 }
13177 
13178 /**
13179  * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
13180  * @phba: pointer to lpfc hba data structure.
13181  * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
13182  *
13183  * This routine is invoked to enable device interrupt and associate driver's
13184  * interrupt handler(s) to interrupt vector(s) to device with SLI-4
13185  * interface spec. Depends on the interrupt mode configured to the driver,
13186  * the driver will try to fallback from the configured interrupt mode to an
13187  * interrupt mode which is supported by the platform, kernel, and device in
13188  * the order of:
13189  * MSI-X -> MSI -> IRQ.
13190  *
13191  * Return codes
13192  *	Interrupt mode (2, 1, 0) - successful
13193  *	LPFC_INTR_ERROR - error
13194  **/
13195 static uint32_t
13196 lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
13197 {
13198 	uint32_t intr_mode = LPFC_INTR_ERROR;
13199 	int retval, idx;
13200 
13201 	if (cfg_mode == 2) {
13202 		/* Preparation before conf_msi mbox cmd */
13203 		retval = 0;
13204 		if (!retval) {
13205 			/* Now, try to enable MSI-X interrupt mode */
13206 			retval = lpfc_sli4_enable_msix(phba);
13207 			if (!retval) {
13208 				/* Indicate initialization to MSI-X mode */
13209 				phba->intr_type = MSIX;
13210 				intr_mode = 2;
13211 			}
13212 		}
13213 	}
13214 
13215 	/* Fallback to MSI if MSI-X initialization failed */
13216 	if (cfg_mode >= 1 && phba->intr_type == NONE) {
13217 		retval = lpfc_sli4_enable_msi(phba);
13218 		if (!retval) {
13219 			/* Indicate initialization to MSI mode */
13220 			phba->intr_type = MSI;
13221 			intr_mode = 1;
13222 		}
13223 	}
13224 
13225 	/* Fallback to INTx if both MSI-X/MSI initalization failed */
13226 	if (phba->intr_type == NONE) {
13227 		retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
13228 				     IRQF_SHARED, LPFC_DRIVER_NAME, phba);
13229 		if (!retval) {
13230 			struct lpfc_hba_eq_hdl *eqhdl;
13231 			unsigned int cpu;
13232 
13233 			/* Indicate initialization to INTx mode */
13234 			phba->intr_type = INTx;
13235 			intr_mode = 0;
13236 
13237 			eqhdl = lpfc_get_eq_hdl(0);
13238 			retval = pci_irq_vector(phba->pcidev, 0);
13239 			if (retval < 0) {
13240 				free_irq(phba->pcidev->irq, phba);
13241 				lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13242 					"0502 INTR pci_irq_vec failed (%d)\n",
13243 					 retval);
13244 				return LPFC_INTR_ERROR;
13245 			}
13246 			eqhdl->irq = retval;
13247 
13248 			cpu = cpumask_first(cpu_present_mask);
13249 			lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ,
13250 						cpu);
13251 			for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
13252 				eqhdl = lpfc_get_eq_hdl(idx);
13253 				eqhdl->idx = idx;
13254 			}
13255 		}
13256 	}
13257 	return intr_mode;
13258 }
13259 
13260 /**
13261  * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
13262  * @phba: pointer to lpfc hba data structure.
13263  *
13264  * This routine is invoked to disable device interrupt and disassociate
13265  * the driver's interrupt handler(s) from interrupt vector(s) to device
13266  * with SLI-4 interface spec. Depending on the interrupt mode, the driver
13267  * will release the interrupt vector(s) for the message signaled interrupt.
13268  **/
13269 static void
13270 lpfc_sli4_disable_intr(struct lpfc_hba *phba)
13271 {
13272 	/* Disable the currently initialized interrupt mode */
13273 	if (phba->intr_type == MSIX) {
13274 		int index;
13275 		struct lpfc_hba_eq_hdl *eqhdl;
13276 
13277 		/* Free up MSI-X multi-message vectors */
13278 		for (index = 0; index < phba->cfg_irq_chann; index++) {
13279 			eqhdl = lpfc_get_eq_hdl(index);
13280 			lpfc_irq_clear_aff(eqhdl);
13281 			free_irq(eqhdl->irq, eqhdl);
13282 		}
13283 	} else {
13284 		free_irq(phba->pcidev->irq, phba);
13285 	}
13286 
13287 	pci_free_irq_vectors(phba->pcidev);
13288 
13289 	/* Reset interrupt management states */
13290 	phba->intr_type = NONE;
13291 	phba->sli.slistat.sli_intr = 0;
13292 }
13293 
13294 /**
13295  * lpfc_unset_hba - Unset SLI3 hba device initialization
13296  * @phba: pointer to lpfc hba data structure.
13297  *
13298  * This routine is invoked to unset the HBA device initialization steps to
13299  * a device with SLI-3 interface spec.
13300  **/
13301 static void
13302 lpfc_unset_hba(struct lpfc_hba *phba)
13303 {
13304 	set_bit(FC_UNLOADING, &phba->pport->load_flag);
13305 
13306 	kfree(phba->vpi_bmask);
13307 	kfree(phba->vpi_ids);
13308 
13309 	lpfc_stop_hba_timers(phba);
13310 
13311 	phba->pport->work_port_events = 0;
13312 
13313 	lpfc_sli_hba_down(phba);
13314 
13315 	lpfc_sli_brdrestart(phba);
13316 
13317 	lpfc_sli_disable_intr(phba);
13318 
13319 	return;
13320 }
13321 
13322 /**
13323  * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
13324  * @phba: Pointer to HBA context object.
13325  *
13326  * This function is called in the SLI4 code path to wait for completion
13327  * of device's XRIs exchange busy. It will check the XRI exchange busy
13328  * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
13329  * that, it will check the XRI exchange busy on outstanding FCP and ELS
13330  * I/Os every 30 seconds, log error message, and wait forever. Only when
13331  * all XRI exchange busy complete, the driver unload shall proceed with
13332  * invoking the function reset ioctl mailbox command to the CNA and the
13333  * the rest of the driver unload resource release.
13334  **/
13335 static void
13336 lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
13337 {
13338 	struct lpfc_sli4_hdw_queue *qp;
13339 	int idx, ccnt;
13340 	int wait_time = 0;
13341 	int io_xri_cmpl = 1;
13342 	int nvmet_xri_cmpl = 1;
13343 	int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13344 
13345 	/* Driver just aborted IOs during the hba_unset process.  Pause
13346 	 * here to give the HBA time to complete the IO and get entries
13347 	 * into the abts lists.
13348 	 */
13349 	msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5);
13350 
13351 	/* Wait for NVME pending IO to flush back to transport. */
13352 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
13353 		lpfc_nvme_wait_for_io_drain(phba);
13354 
13355 	ccnt = 0;
13356 	for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
13357 		qp = &phba->sli4_hba.hdwq[idx];
13358 		io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list);
13359 		if (!io_xri_cmpl) /* if list is NOT empty */
13360 			ccnt++;
13361 	}
13362 	if (ccnt)
13363 		io_xri_cmpl = 0;
13364 
13365 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13366 		nvmet_xri_cmpl =
13367 			list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13368 	}
13369 
13370 	while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) {
13371 		if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
13372 			if (!nvmet_xri_cmpl)
13373 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13374 						"6424 NVMET XRI exchange busy "
13375 						"wait time: %d seconds.\n",
13376 						wait_time/1000);
13377 			if (!io_xri_cmpl)
13378 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13379 						"6100 IO XRI exchange busy "
13380 						"wait time: %d seconds.\n",
13381 						wait_time/1000);
13382 			if (!els_xri_cmpl)
13383 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13384 						"2878 ELS XRI exchange busy "
13385 						"wait time: %d seconds.\n",
13386 						wait_time/1000);
13387 			msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
13388 			wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
13389 		} else {
13390 			msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
13391 			wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
13392 		}
13393 
13394 		ccnt = 0;
13395 		for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
13396 			qp = &phba->sli4_hba.hdwq[idx];
13397 			io_xri_cmpl = list_empty(
13398 			    &qp->lpfc_abts_io_buf_list);
13399 			if (!io_xri_cmpl) /* if list is NOT empty */
13400 				ccnt++;
13401 		}
13402 		if (ccnt)
13403 			io_xri_cmpl = 0;
13404 
13405 		if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13406 			nvmet_xri_cmpl = list_empty(
13407 				&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13408 		}
13409 		els_xri_cmpl =
13410 			list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13411 
13412 	}
13413 }
13414 
13415 /**
13416  * lpfc_sli4_hba_unset - Unset the fcoe hba
13417  * @phba: Pointer to HBA context object.
13418  *
13419  * This function is called in the SLI4 code path to reset the HBA's FCoE
13420  * function. The caller is not required to hold any lock. This routine
13421  * issues PCI function reset mailbox command to reset the FCoE function.
13422  * At the end of the function, it calls lpfc_hba_down_post function to
13423  * free any pending commands.
13424  **/
13425 static void
13426 lpfc_sli4_hba_unset(struct lpfc_hba *phba)
13427 {
13428 	int wait_cnt = 0;
13429 	LPFC_MBOXQ_t *mboxq;
13430 	struct pci_dev *pdev = phba->pcidev;
13431 
13432 	lpfc_stop_hba_timers(phba);
13433 	hrtimer_cancel(&phba->cmf_stats_timer);
13434 	hrtimer_cancel(&phba->cmf_timer);
13435 
13436 	if (phba->pport)
13437 		phba->sli4_hba.intr_enable = 0;
13438 
13439 	/*
13440 	 * Gracefully wait out the potential current outstanding asynchronous
13441 	 * mailbox command.
13442 	 */
13443 
13444 	/* First, block any pending async mailbox command from posted */
13445 	spin_lock_irq(&phba->hbalock);
13446 	phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
13447 	spin_unlock_irq(&phba->hbalock);
13448 	/* Now, trying to wait it out if we can */
13449 	while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
13450 		msleep(10);
13451 		if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
13452 			break;
13453 	}
13454 	/* Forcefully release the outstanding mailbox command if timed out */
13455 	if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
13456 		spin_lock_irq(&phba->hbalock);
13457 		mboxq = phba->sli.mbox_active;
13458 		mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
13459 		__lpfc_mbox_cmpl_put(phba, mboxq);
13460 		phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13461 		phba->sli.mbox_active = NULL;
13462 		spin_unlock_irq(&phba->hbalock);
13463 	}
13464 
13465 	/* Abort all iocbs associated with the hba */
13466 	lpfc_sli_hba_iocb_abort(phba);
13467 
13468 	if (!pci_channel_offline(phba->pcidev))
13469 		/* Wait for completion of device XRI exchange busy */
13470 		lpfc_sli4_xri_exchange_busy_wait(phba);
13471 
13472 	/* per-phba callback de-registration for hotplug event */
13473 	if (phba->pport)
13474 		lpfc_cpuhp_remove(phba);
13475 
13476 	/* Disable PCI subsystem interrupt */
13477 	lpfc_sli4_disable_intr(phba);
13478 
13479 	/* Disable SR-IOV if enabled */
13480 	if (phba->cfg_sriov_nr_virtfn)
13481 		pci_disable_sriov(pdev);
13482 
13483 	/* Stop kthread signal shall trigger work_done one more time */
13484 	kthread_stop(phba->worker_thread);
13485 
13486 	/* Disable FW logging to host memory */
13487 	lpfc_ras_stop_fwlog(phba);
13488 
13489 	lpfc_sli4_queue_unset(phba);
13490 
13491 	/* Reset SLI4 HBA FCoE function */
13492 	lpfc_pci_function_reset(phba);
13493 
13494 	/* release all queue allocated resources. */
13495 	lpfc_sli4_queue_destroy(phba);
13496 
13497 	/* Free RAS DMA memory */
13498 	if (phba->ras_fwlog.ras_enabled)
13499 		lpfc_sli4_ras_dma_free(phba);
13500 
13501 	/* Stop the SLI4 device port */
13502 	if (phba->pport)
13503 		phba->pport->work_port_events = 0;
13504 }
13505 
13506 static uint32_t
13507 lpfc_cgn_crc32(uint32_t crc, u8 byte)
13508 {
13509 	uint32_t msb = 0;
13510 	uint32_t bit;
13511 
13512 	for (bit = 0; bit < 8; bit++) {
13513 		msb = (crc >> 31) & 1;
13514 		crc <<= 1;
13515 
13516 		if (msb ^ (byte & 1)) {
13517 			crc ^= LPFC_CGN_CRC32_MAGIC_NUMBER;
13518 			crc |= 1;
13519 		}
13520 		byte >>= 1;
13521 	}
13522 	return crc;
13523 }
13524 
13525 static uint32_t
13526 lpfc_cgn_reverse_bits(uint32_t wd)
13527 {
13528 	uint32_t result = 0;
13529 	uint32_t i;
13530 
13531 	for (i = 0; i < 32; i++) {
13532 		result <<= 1;
13533 		result |= (1 & (wd >> i));
13534 	}
13535 	return result;
13536 }
13537 
13538 /*
13539  * The routine corresponds with the algorithm the HBA firmware
13540  * uses to validate the data integrity.
13541  */
13542 uint32_t
13543 lpfc_cgn_calc_crc32(void *ptr, uint32_t byteLen, uint32_t crc)
13544 {
13545 	uint32_t  i;
13546 	uint32_t result;
13547 	uint8_t  *data = (uint8_t *)ptr;
13548 
13549 	for (i = 0; i < byteLen; ++i)
13550 		crc = lpfc_cgn_crc32(crc, data[i]);
13551 
13552 	result = ~lpfc_cgn_reverse_bits(crc);
13553 	return result;
13554 }
13555 
13556 void
13557 lpfc_init_congestion_buf(struct lpfc_hba *phba)
13558 {
13559 	struct lpfc_cgn_info *cp;
13560 	uint16_t size;
13561 	uint32_t crc;
13562 
13563 	lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
13564 			"6235 INIT Congestion Buffer %p\n", phba->cgn_i);
13565 
13566 	if (!phba->cgn_i)
13567 		return;
13568 	cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
13569 
13570 	atomic_set(&phba->cgn_fabric_warn_cnt, 0);
13571 	atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
13572 	atomic_set(&phba->cgn_sync_alarm_cnt, 0);
13573 	atomic_set(&phba->cgn_sync_warn_cnt, 0);
13574 
13575 	atomic_set(&phba->cgn_driver_evt_cnt, 0);
13576 	atomic_set(&phba->cgn_latency_evt_cnt, 0);
13577 	atomic64_set(&phba->cgn_latency_evt, 0);
13578 	phba->cgn_evt_minute = 0;
13579 
13580 	memset(cp, 0xff, offsetof(struct lpfc_cgn_info, cgn_stat));
13581 	cp->cgn_info_size = cpu_to_le16(LPFC_CGN_INFO_SZ);
13582 	cp->cgn_info_version = LPFC_CGN_INFO_V4;
13583 
13584 	/* cgn parameters */
13585 	cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
13586 	cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
13587 	cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
13588 	cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
13589 
13590 	lpfc_cgn_update_tstamp(phba, &cp->base_time);
13591 
13592 	/* Fill in default LUN qdepth */
13593 	if (phba->pport) {
13594 		size = (uint16_t)(phba->pport->cfg_lun_queue_depth);
13595 		cp->cgn_lunq = cpu_to_le16(size);
13596 	}
13597 
13598 	/* last used Index initialized to 0xff already */
13599 
13600 	cp->cgn_warn_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ);
13601 	cp->cgn_alarm_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ);
13602 	crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED);
13603 	cp->cgn_info_crc = cpu_to_le32(crc);
13604 
13605 	phba->cgn_evt_timestamp = jiffies +
13606 		msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN);
13607 }
13608 
13609 void
13610 lpfc_init_congestion_stat(struct lpfc_hba *phba)
13611 {
13612 	struct lpfc_cgn_info *cp;
13613 	uint32_t crc;
13614 
13615 	lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
13616 			"6236 INIT Congestion Stat %p\n", phba->cgn_i);
13617 
13618 	if (!phba->cgn_i)
13619 		return;
13620 
13621 	cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
13622 	memset(&cp->cgn_stat, 0, sizeof(cp->cgn_stat));
13623 
13624 	lpfc_cgn_update_tstamp(phba, &cp->stat_start);
13625 	crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED);
13626 	cp->cgn_info_crc = cpu_to_le32(crc);
13627 }
13628 
13629 /**
13630  * __lpfc_reg_congestion_buf - register congestion info buffer with HBA
13631  * @phba: Pointer to hba context object.
13632  * @reg: flag to determine register or unregister.
13633  */
13634 static int
13635 __lpfc_reg_congestion_buf(struct lpfc_hba *phba, int reg)
13636 {
13637 	struct lpfc_mbx_reg_congestion_buf *reg_congestion_buf;
13638 	union  lpfc_sli4_cfg_shdr *shdr;
13639 	uint32_t shdr_status, shdr_add_status;
13640 	LPFC_MBOXQ_t *mboxq;
13641 	int length, rc;
13642 
13643 	if (!phba->cgn_i)
13644 		return -ENXIO;
13645 
13646 	mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
13647 	if (!mboxq) {
13648 		lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
13649 				"2641 REG_CONGESTION_BUF mbox allocation fail: "
13650 				"HBA state x%x reg %d\n",
13651 				phba->pport->port_state, reg);
13652 		return -ENOMEM;
13653 	}
13654 
13655 	length = (sizeof(struct lpfc_mbx_reg_congestion_buf) -
13656 		sizeof(struct lpfc_sli4_cfg_mhdr));
13657 	lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
13658 			 LPFC_MBOX_OPCODE_REG_CONGESTION_BUF, length,
13659 			 LPFC_SLI4_MBX_EMBED);
13660 	reg_congestion_buf = &mboxq->u.mqe.un.reg_congestion_buf;
13661 	bf_set(lpfc_mbx_reg_cgn_buf_type, reg_congestion_buf, 1);
13662 	if (reg > 0)
13663 		bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 1);
13664 	else
13665 		bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 0);
13666 	reg_congestion_buf->length = sizeof(struct lpfc_cgn_info);
13667 	reg_congestion_buf->addr_lo =
13668 		putPaddrLow(phba->cgn_i->phys);
13669 	reg_congestion_buf->addr_hi =
13670 		putPaddrHigh(phba->cgn_i->phys);
13671 
13672 	rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
13673 	shdr = (union lpfc_sli4_cfg_shdr *)
13674 		&mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
13675 	shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
13676 	shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
13677 				 &shdr->response);
13678 	mempool_free(mboxq, phba->mbox_mem_pool);
13679 	if (shdr_status || shdr_add_status || rc) {
13680 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13681 				"2642 REG_CONGESTION_BUF mailbox "
13682 				"failed with status x%x add_status x%x,"
13683 				" mbx status x%x reg %d\n",
13684 				shdr_status, shdr_add_status, rc, reg);
13685 		return -ENXIO;
13686 	}
13687 	return 0;
13688 }
13689 
13690 int
13691 lpfc_unreg_congestion_buf(struct lpfc_hba *phba)
13692 {
13693 	lpfc_cmf_stop(phba);
13694 	return __lpfc_reg_congestion_buf(phba, 0);
13695 }
13696 
13697 int
13698 lpfc_reg_congestion_buf(struct lpfc_hba *phba)
13699 {
13700 	return __lpfc_reg_congestion_buf(phba, 1);
13701 }
13702 
13703 /**
13704  * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
13705  * @phba: Pointer to HBA context object.
13706  * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
13707  *
13708  * This function is called in the SLI4 code path to read the port's
13709  * sli4 capabilities.
13710  *
13711  * This function may be be called from any context that can block-wait
13712  * for the completion.  The expectation is that this routine is called
13713  * typically from probe_one or from the online routine.
13714  **/
13715 int
13716 lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
13717 {
13718 	int rc;
13719 	struct lpfc_mqe *mqe = &mboxq->u.mqe;
13720 	struct lpfc_pc_sli4_params *sli4_params;
13721 	uint32_t mbox_tmo;
13722 	int length;
13723 	bool exp_wqcq_pages = true;
13724 	struct lpfc_sli4_parameters *mbx_sli4_parameters;
13725 
13726 	/*
13727 	 * By default, the driver assumes the SLI4 port requires RPI
13728 	 * header postings.  The SLI4_PARAM response will correct this
13729 	 * assumption.
13730 	 */
13731 	phba->sli4_hba.rpi_hdrs_in_use = 1;
13732 
13733 	/* Read the port's SLI4 Config Parameters */
13734 	length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
13735 		  sizeof(struct lpfc_sli4_cfg_mhdr));
13736 	lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
13737 			 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
13738 			 length, LPFC_SLI4_MBX_EMBED);
13739 	if (!phba->sli4_hba.intr_enable)
13740 		rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
13741 	else {
13742 		mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
13743 		rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
13744 	}
13745 	if (unlikely(rc))
13746 		return rc;
13747 	sli4_params = &phba->sli4_hba.pc_sli4_params;
13748 	mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
13749 	sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
13750 	sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
13751 	sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
13752 	sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
13753 					     mbx_sli4_parameters);
13754 	sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
13755 					     mbx_sli4_parameters);
13756 	if (bf_get(cfg_phwq, mbx_sli4_parameters))
13757 		phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
13758 	else
13759 		phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
13760 	sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
13761 	sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope,
13762 					   mbx_sli4_parameters);
13763 	sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
13764 	sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
13765 	sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
13766 	sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
13767 	sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
13768 	sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters);
13769 	sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters);
13770 	sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
13771 	sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters);
13772 	sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters);
13773 	sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
13774 					    mbx_sli4_parameters);
13775 	sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
13776 	sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
13777 					   mbx_sli4_parameters);
13778 	phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
13779 	phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
13780 	sli4_params->mi_cap = bf_get(cfg_mi_ver, mbx_sli4_parameters);
13781 
13782 	/* Check for Extended Pre-Registered SGL support */
13783 	phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters);
13784 
13785 	/* Check for firmware nvme support */
13786 	rc = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
13787 		     bf_get(cfg_xib, mbx_sli4_parameters));
13788 
13789 	if (rc) {
13790 		/* Save this to indicate the Firmware supports NVME */
13791 		sli4_params->nvme = 1;
13792 
13793 		/* Firmware NVME support, check driver FC4 NVME support */
13794 		if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) {
13795 			lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
13796 					"6133 Disabling NVME support: "
13797 					"FC4 type not supported: x%x\n",
13798 					phba->cfg_enable_fc4_type);
13799 			goto fcponly;
13800 		}
13801 	} else {
13802 		/* No firmware NVME support, check driver FC4 NVME support */
13803 		sli4_params->nvme = 0;
13804 		if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13805 			lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
13806 					"6101 Disabling NVME support: Not "
13807 					"supported by firmware (%d %d) x%x\n",
13808 					bf_get(cfg_nvme, mbx_sli4_parameters),
13809 					bf_get(cfg_xib, mbx_sli4_parameters),
13810 					phba->cfg_enable_fc4_type);
13811 fcponly:
13812 			phba->nvmet_support = 0;
13813 			phba->cfg_nvmet_mrq = 0;
13814 			phba->cfg_nvme_seg_cnt = 0;
13815 
13816 			/* If no FC4 type support, move to just SCSI support */
13817 			if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
13818 				return -ENODEV;
13819 			phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
13820 		}
13821 	}
13822 
13823 	/* If the NVME FC4 type is enabled, scale the sg_seg_cnt to
13824 	 * accommodate 512K and 1M IOs in a single nvme buf.
13825 	 */
13826 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
13827 		phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
13828 
13829 	/* Enable embedded Payload BDE if support is indicated */
13830 	if (bf_get(cfg_pbde, mbx_sli4_parameters))
13831 		phba->cfg_enable_pbde = 1;
13832 	else
13833 		phba->cfg_enable_pbde = 0;
13834 
13835 	/*
13836 	 * To support Suppress Response feature we must satisfy 3 conditions.
13837 	 * lpfc_suppress_rsp module parameter must be set (default).
13838 	 * In SLI4-Parameters Descriptor:
13839 	 * Extended Inline Buffers (XIB) must be supported.
13840 	 * Suppress Response IU Not Supported (SRIUNS) must NOT be supported
13841 	 * (double negative).
13842 	 */
13843 	if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) &&
13844 	    !(bf_get(cfg_nosr, mbx_sli4_parameters)))
13845 		phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
13846 	else
13847 		phba->cfg_suppress_rsp = 0;
13848 
13849 	if (bf_get(cfg_eqdr, mbx_sli4_parameters))
13850 		phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
13851 
13852 	/* Make sure that sge_supp_len can be handled by the driver */
13853 	if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
13854 		sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
13855 
13856 	dma_set_max_seg_size(&phba->pcidev->dev, sli4_params->sge_supp_len);
13857 
13858 	/*
13859 	 * Check whether the adapter supports an embedded copy of the
13860 	 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order
13861 	 * to use this option, 128-byte WQEs must be used.
13862 	 */
13863 	if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
13864 		phba->fcp_embed_io = 1;
13865 	else
13866 		phba->fcp_embed_io = 0;
13867 
13868 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
13869 			"6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n",
13870 			bf_get(cfg_xib, mbx_sli4_parameters),
13871 			phba->cfg_enable_pbde,
13872 			phba->fcp_embed_io, sli4_params->nvme,
13873 			phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp);
13874 
13875 	if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
13876 	    LPFC_SLI_INTF_IF_TYPE_2) &&
13877 	    (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
13878 		 LPFC_SLI_INTF_FAMILY_LNCR_A0))
13879 		exp_wqcq_pages = false;
13880 
13881 	if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) &&
13882 	    (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) &&
13883 	    exp_wqcq_pages &&
13884 	    (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT))
13885 		phba->enab_exp_wqcq_pages = 1;
13886 	else
13887 		phba->enab_exp_wqcq_pages = 0;
13888 	/*
13889 	 * Check if the SLI port supports MDS Diagnostics
13890 	 */
13891 	if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
13892 		phba->mds_diags_support = 1;
13893 	else
13894 		phba->mds_diags_support = 0;
13895 
13896 	/*
13897 	 * Check if the SLI port supports NSLER
13898 	 */
13899 	if (bf_get(cfg_nsler, mbx_sli4_parameters))
13900 		phba->nsler = 1;
13901 	else
13902 		phba->nsler = 0;
13903 
13904 	return 0;
13905 }
13906 
13907 /**
13908  * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
13909  * @pdev: pointer to PCI device
13910  * @pid: pointer to PCI device identifier
13911  *
13912  * This routine is to be called to attach a device with SLI-3 interface spec
13913  * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
13914  * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
13915  * information of the device and driver to see if the driver state that it can
13916  * support this kind of device. If the match is successful, the driver core
13917  * invokes this routine. If this routine determines it can claim the HBA, it
13918  * does all the initialization that it needs to do to handle the HBA properly.
13919  *
13920  * Return code
13921  * 	0 - driver can claim the device
13922  * 	negative value - driver can not claim the device
13923  **/
13924 static int
13925 lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
13926 {
13927 	struct lpfc_hba   *phba;
13928 	struct lpfc_vport *vport = NULL;
13929 	struct Scsi_Host  *shost = NULL;
13930 	int error;
13931 	uint32_t cfg_mode, intr_mode;
13932 
13933 	/* Allocate memory for HBA structure */
13934 	phba = lpfc_hba_alloc(pdev);
13935 	if (!phba)
13936 		return -ENOMEM;
13937 
13938 	/* Perform generic PCI device enabling operation */
13939 	error = lpfc_enable_pci_dev(phba);
13940 	if (error)
13941 		goto out_free_phba;
13942 
13943 	/* Set up SLI API function jump table for PCI-device group-0 HBAs */
13944 	error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
13945 	if (error)
13946 		goto out_disable_pci_dev;
13947 
13948 	/* Set up SLI-3 specific device PCI memory space */
13949 	error = lpfc_sli_pci_mem_setup(phba);
13950 	if (error) {
13951 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13952 				"1402 Failed to set up pci memory space.\n");
13953 		goto out_disable_pci_dev;
13954 	}
13955 
13956 	/* Set up SLI-3 specific device driver resources */
13957 	error = lpfc_sli_driver_resource_setup(phba);
13958 	if (error) {
13959 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13960 				"1404 Failed to set up driver resource.\n");
13961 		goto out_unset_pci_mem_s3;
13962 	}
13963 
13964 	/* Initialize and populate the iocb list per host */
13965 
13966 	error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
13967 	if (error) {
13968 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13969 				"1405 Failed to initialize iocb list.\n");
13970 		goto out_unset_driver_resource_s3;
13971 	}
13972 
13973 	/* Set up common device driver resources */
13974 	error = lpfc_setup_driver_resource_phase2(phba);
13975 	if (error) {
13976 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13977 				"1406 Failed to set up driver resource.\n");
13978 		goto out_free_iocb_list;
13979 	}
13980 
13981 	/* Get the default values for Model Name and Description */
13982 	lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
13983 
13984 	/* Create SCSI host to the physical port */
13985 	error = lpfc_create_shost(phba);
13986 	if (error) {
13987 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13988 				"1407 Failed to create scsi host.\n");
13989 		goto out_unset_driver_resource;
13990 	}
13991 
13992 	/* Configure sysfs attributes */
13993 	vport = phba->pport;
13994 	error = lpfc_alloc_sysfs_attr(vport);
13995 	if (error) {
13996 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13997 				"1476 Failed to allocate sysfs attr\n");
13998 		goto out_destroy_shost;
13999 	}
14000 
14001 	shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
14002 	/* Now, trying to enable interrupt and bring up the device */
14003 	cfg_mode = phba->cfg_use_msi;
14004 	while (true) {
14005 		/* Put device to a known state before enabling interrupt */
14006 		lpfc_stop_port(phba);
14007 		/* Configure and enable interrupt */
14008 		intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
14009 		if (intr_mode == LPFC_INTR_ERROR) {
14010 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14011 					"0431 Failed to enable interrupt.\n");
14012 			error = -ENODEV;
14013 			goto out_free_sysfs_attr;
14014 		}
14015 		/* SLI-3 HBA setup */
14016 		if (lpfc_sli_hba_setup(phba)) {
14017 			lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14018 					"1477 Failed to set up hba\n");
14019 			error = -ENODEV;
14020 			goto out_remove_device;
14021 		}
14022 
14023 		/* Wait 50ms for the interrupts of previous mailbox commands */
14024 		msleep(50);
14025 		/* Check active interrupts on message signaled interrupts */
14026 		if (intr_mode == 0 ||
14027 		    phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
14028 			/* Log the current active interrupt mode */
14029 			phba->intr_mode = intr_mode;
14030 			lpfc_log_intr_mode(phba, intr_mode);
14031 			break;
14032 		} else {
14033 			lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14034 					"0447 Configure interrupt mode (%d) "
14035 					"failed active interrupt test.\n",
14036 					intr_mode);
14037 			/* Disable the current interrupt mode */
14038 			lpfc_sli_disable_intr(phba);
14039 			/* Try next level of interrupt mode */
14040 			cfg_mode = --intr_mode;
14041 		}
14042 	}
14043 
14044 	/* Perform post initialization setup */
14045 	lpfc_post_init_setup(phba);
14046 
14047 	/* Check if there are static vports to be created. */
14048 	lpfc_create_static_vport(phba);
14049 
14050 	return 0;
14051 
14052 out_remove_device:
14053 	lpfc_unset_hba(phba);
14054 out_free_sysfs_attr:
14055 	lpfc_free_sysfs_attr(vport);
14056 out_destroy_shost:
14057 	lpfc_destroy_shost(phba);
14058 out_unset_driver_resource:
14059 	lpfc_unset_driver_resource_phase2(phba);
14060 out_free_iocb_list:
14061 	lpfc_free_iocb_list(phba);
14062 out_unset_driver_resource_s3:
14063 	lpfc_sli_driver_resource_unset(phba);
14064 out_unset_pci_mem_s3:
14065 	lpfc_sli_pci_mem_unset(phba);
14066 out_disable_pci_dev:
14067 	lpfc_disable_pci_dev(phba);
14068 	if (shost)
14069 		scsi_host_put(shost);
14070 out_free_phba:
14071 	lpfc_hba_free(phba);
14072 	return error;
14073 }
14074 
14075 /**
14076  * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
14077  * @pdev: pointer to PCI device
14078  *
14079  * This routine is to be called to disattach a device with SLI-3 interface
14080  * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
14081  * removed from PCI bus, it performs all the necessary cleanup for the HBA
14082  * device to be removed from the PCI subsystem properly.
14083  **/
14084 static void
14085 lpfc_pci_remove_one_s3(struct pci_dev *pdev)
14086 {
14087 	struct Scsi_Host  *shost = pci_get_drvdata(pdev);
14088 	struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
14089 	struct lpfc_vport **vports;
14090 	struct lpfc_hba   *phba = vport->phba;
14091 	int i;
14092 
14093 	set_bit(FC_UNLOADING, &vport->load_flag);
14094 
14095 	lpfc_free_sysfs_attr(vport);
14096 
14097 	/* Release all the vports against this physical port */
14098 	vports = lpfc_create_vport_work_array(phba);
14099 	if (vports != NULL)
14100 		for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
14101 			if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
14102 				continue;
14103 			fc_vport_terminate(vports[i]->fc_vport);
14104 		}
14105 	lpfc_destroy_vport_work_array(phba, vports);
14106 
14107 	/* Remove FC host with the physical port */
14108 	fc_remove_host(shost);
14109 	scsi_remove_host(shost);
14110 
14111 	/* Clean up all nodes, mailboxes and IOs. */
14112 	lpfc_cleanup(vport);
14113 
14114 	/*
14115 	 * Bring down the SLI Layer. This step disable all interrupts,
14116 	 * clears the rings, discards all mailbox commands, and resets
14117 	 * the HBA.
14118 	 */
14119 
14120 	/* HBA interrupt will be disabled after this call */
14121 	lpfc_sli_hba_down(phba);
14122 	/* Stop kthread signal shall trigger work_done one more time */
14123 	kthread_stop(phba->worker_thread);
14124 	/* Final cleanup of txcmplq and reset the HBA */
14125 	lpfc_sli_brdrestart(phba);
14126 
14127 	kfree(phba->vpi_bmask);
14128 	kfree(phba->vpi_ids);
14129 
14130 	lpfc_stop_hba_timers(phba);
14131 	spin_lock_irq(&phba->port_list_lock);
14132 	list_del_init(&vport->listentry);
14133 	spin_unlock_irq(&phba->port_list_lock);
14134 
14135 	lpfc_debugfs_terminate(vport);
14136 
14137 	/* Disable SR-IOV if enabled */
14138 	if (phba->cfg_sriov_nr_virtfn)
14139 		pci_disable_sriov(pdev);
14140 
14141 	/* Disable interrupt */
14142 	lpfc_sli_disable_intr(phba);
14143 
14144 	scsi_host_put(shost);
14145 
14146 	/*
14147 	 * Call scsi_free before mem_free since scsi bufs are released to their
14148 	 * corresponding pools here.
14149 	 */
14150 	lpfc_scsi_free(phba);
14151 	lpfc_free_iocb_list(phba);
14152 
14153 	lpfc_mem_free_all(phba);
14154 
14155 	dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
14156 			  phba->hbqslimp.virt, phba->hbqslimp.phys);
14157 
14158 	/* Free resources associated with SLI2 interface */
14159 	dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
14160 			  phba->slim2p.virt, phba->slim2p.phys);
14161 
14162 	/* unmap adapter SLIM and Control Registers */
14163 	iounmap(phba->ctrl_regs_memmap_p);
14164 	iounmap(phba->slim_memmap_p);
14165 
14166 	lpfc_hba_free(phba);
14167 
14168 	pci_release_mem_regions(pdev);
14169 	pci_disable_device(pdev);
14170 }
14171 
14172 /**
14173  * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
14174  * @dev_d: pointer to device
14175  *
14176  * This routine is to be called from the kernel's PCI subsystem to support
14177  * system Power Management (PM) to device with SLI-3 interface spec. When
14178  * PM invokes this method, it quiesces the device by stopping the driver's
14179  * worker thread for the device, turning off device's interrupt and DMA,
14180  * and bring the device offline. Note that as the driver implements the
14181  * minimum PM requirements to a power-aware driver's PM support for the
14182  * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
14183  * to the suspend() method call will be treated as SUSPEND and the driver will
14184  * fully reinitialize its device during resume() method call, the driver will
14185  * set device to PCI_D3hot state in PCI config space instead of setting it
14186  * according to the @msg provided by the PM.
14187  *
14188  * Return code
14189  * 	0 - driver suspended the device
14190  * 	Error otherwise
14191  **/
14192 static int __maybe_unused
14193 lpfc_pci_suspend_one_s3(struct device *dev_d)
14194 {
14195 	struct Scsi_Host *shost = dev_get_drvdata(dev_d);
14196 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14197 
14198 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14199 			"0473 PCI device Power Management suspend.\n");
14200 
14201 	/* Bring down the device */
14202 	lpfc_offline_prep(phba, LPFC_MBX_WAIT);
14203 	lpfc_offline(phba);
14204 	kthread_stop(phba->worker_thread);
14205 
14206 	/* Disable interrupt from device */
14207 	lpfc_sli_disable_intr(phba);
14208 
14209 	return 0;
14210 }
14211 
14212 /**
14213  * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
14214  * @dev_d: pointer to device
14215  *
14216  * This routine is to be called from the kernel's PCI subsystem to support
14217  * system Power Management (PM) to device with SLI-3 interface spec. When PM
14218  * invokes this method, it restores the device's PCI config space state and
14219  * fully reinitializes the device and brings it online. Note that as the
14220  * driver implements the minimum PM requirements to a power-aware driver's
14221  * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
14222  * FREEZE) to the suspend() method call will be treated as SUSPEND and the
14223  * driver will fully reinitialize its device during resume() method call,
14224  * the device will be set to PCI_D0 directly in PCI config space before
14225  * restoring the state.
14226  *
14227  * Return code
14228  * 	0 - driver suspended the device
14229  * 	Error otherwise
14230  **/
14231 static int __maybe_unused
14232 lpfc_pci_resume_one_s3(struct device *dev_d)
14233 {
14234 	struct Scsi_Host *shost = dev_get_drvdata(dev_d);
14235 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14236 	uint32_t intr_mode;
14237 	int error;
14238 
14239 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14240 			"0452 PCI device Power Management resume.\n");
14241 
14242 	/* Startup the kernel thread for this host adapter. */
14243 	phba->worker_thread = kthread_run(lpfc_do_work, phba,
14244 					"lpfc_worker_%d", phba->brd_no);
14245 	if (IS_ERR(phba->worker_thread)) {
14246 		error = PTR_ERR(phba->worker_thread);
14247 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14248 				"0434 PM resume failed to start worker "
14249 				"thread: error=x%x.\n", error);
14250 		return error;
14251 	}
14252 
14253 	/* Init cpu_map array */
14254 	lpfc_cpu_map_array_init(phba);
14255 	/* Init hba_eq_hdl array */
14256 	lpfc_hba_eq_hdl_array_init(phba);
14257 	/* Configure and enable interrupt */
14258 	intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
14259 	if (intr_mode == LPFC_INTR_ERROR) {
14260 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14261 				"0430 PM resume Failed to enable interrupt\n");
14262 		return -EIO;
14263 	} else
14264 		phba->intr_mode = intr_mode;
14265 
14266 	/* Restart HBA and bring it online */
14267 	lpfc_sli_brdrestart(phba);
14268 	lpfc_online(phba);
14269 
14270 	/* Log the current active interrupt mode */
14271 	lpfc_log_intr_mode(phba, phba->intr_mode);
14272 
14273 	return 0;
14274 }
14275 
14276 /**
14277  * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
14278  * @phba: pointer to lpfc hba data structure.
14279  *
14280  * This routine is called to prepare the SLI3 device for PCI slot recover. It
14281  * aborts all the outstanding SCSI I/Os to the pci device.
14282  **/
14283 static void
14284 lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
14285 {
14286 	lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14287 			"2723 PCI channel I/O abort preparing for recovery\n");
14288 
14289 	/*
14290 	 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
14291 	 * and let the SCSI mid-layer to retry them to recover.
14292 	 */
14293 	lpfc_sli_abort_fcp_rings(phba);
14294 }
14295 
14296 /**
14297  * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
14298  * @phba: pointer to lpfc hba data structure.
14299  *
14300  * This routine is called to prepare the SLI3 device for PCI slot reset. It
14301  * disables the device interrupt and pci device, and aborts the internal FCP
14302  * pending I/Os.
14303  **/
14304 static void
14305 lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
14306 {
14307 	lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14308 			"2710 PCI channel disable preparing for reset\n");
14309 
14310 	/* Block any management I/Os to the device */
14311 	lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
14312 
14313 	/* Block all SCSI devices' I/Os on the host */
14314 	lpfc_scsi_dev_block(phba);
14315 
14316 	/* Flush all driver's outstanding SCSI I/Os as we are to reset */
14317 	lpfc_sli_flush_io_rings(phba);
14318 
14319 	/* stop all timers */
14320 	lpfc_stop_hba_timers(phba);
14321 
14322 	/* Disable interrupt and pci device */
14323 	lpfc_sli_disable_intr(phba);
14324 	pci_disable_device(phba->pcidev);
14325 }
14326 
14327 /**
14328  * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
14329  * @phba: pointer to lpfc hba data structure.
14330  *
14331  * This routine is called to prepare the SLI3 device for PCI slot permanently
14332  * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
14333  * pending I/Os.
14334  **/
14335 static void
14336 lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
14337 {
14338 	lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14339 			"2711 PCI channel permanent disable for failure\n");
14340 	/* Block all SCSI devices' I/Os on the host */
14341 	lpfc_scsi_dev_block(phba);
14342 	lpfc_sli4_prep_dev_for_reset(phba);
14343 
14344 	/* stop all timers */
14345 	lpfc_stop_hba_timers(phba);
14346 
14347 	/* Clean up all driver's outstanding SCSI I/Os */
14348 	lpfc_sli_flush_io_rings(phba);
14349 }
14350 
14351 /**
14352  * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
14353  * @pdev: pointer to PCI device.
14354  * @state: the current PCI connection state.
14355  *
14356  * This routine is called from the PCI subsystem for I/O error handling to
14357  * device with SLI-3 interface spec. This function is called by the PCI
14358  * subsystem after a PCI bus error affecting this device has been detected.
14359  * When this function is invoked, it will need to stop all the I/Os and
14360  * interrupt(s) to the device. Once that is done, it will return
14361  * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
14362  * as desired.
14363  *
14364  * Return codes
14365  *	PCI_ERS_RESULT_CAN_RECOVER - can be recovered without reset
14366  * 	PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
14367  * 	PCI_ERS_RESULT_DISCONNECT - device could not be recovered
14368  **/
14369 static pci_ers_result_t
14370 lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
14371 {
14372 	struct Scsi_Host *shost = pci_get_drvdata(pdev);
14373 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14374 
14375 	switch (state) {
14376 	case pci_channel_io_normal:
14377 		/* Non-fatal error, prepare for recovery */
14378 		lpfc_sli_prep_dev_for_recover(phba);
14379 		return PCI_ERS_RESULT_CAN_RECOVER;
14380 	case pci_channel_io_frozen:
14381 		/* Fatal error, prepare for slot reset */
14382 		lpfc_sli_prep_dev_for_reset(phba);
14383 		return PCI_ERS_RESULT_NEED_RESET;
14384 	case pci_channel_io_perm_failure:
14385 		/* Permanent failure, prepare for device down */
14386 		lpfc_sli_prep_dev_for_perm_failure(phba);
14387 		return PCI_ERS_RESULT_DISCONNECT;
14388 	default:
14389 		/* Unknown state, prepare and request slot reset */
14390 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14391 				"0472 Unknown PCI error state: x%x\n", state);
14392 		lpfc_sli_prep_dev_for_reset(phba);
14393 		return PCI_ERS_RESULT_NEED_RESET;
14394 	}
14395 }
14396 
14397 /**
14398  * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
14399  * @pdev: pointer to PCI device.
14400  *
14401  * This routine is called from the PCI subsystem for error handling to
14402  * device with SLI-3 interface spec. This is called after PCI bus has been
14403  * reset to restart the PCI card from scratch, as if from a cold-boot.
14404  * During the PCI subsystem error recovery, after driver returns
14405  * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
14406  * recovery and then call this routine before calling the .resume method
14407  * to recover the device. This function will initialize the HBA device,
14408  * enable the interrupt, but it will just put the HBA to offline state
14409  * without passing any I/O traffic.
14410  *
14411  * Return codes
14412  * 	PCI_ERS_RESULT_RECOVERED - the device has been recovered
14413  * 	PCI_ERS_RESULT_DISCONNECT - device could not be recovered
14414  */
14415 static pci_ers_result_t
14416 lpfc_io_slot_reset_s3(struct pci_dev *pdev)
14417 {
14418 	struct Scsi_Host *shost = pci_get_drvdata(pdev);
14419 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14420 	struct lpfc_sli *psli = &phba->sli;
14421 	uint32_t intr_mode;
14422 
14423 	dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
14424 	if (pci_enable_device_mem(pdev)) {
14425 		printk(KERN_ERR "lpfc: Cannot re-enable "
14426 			"PCI device after reset.\n");
14427 		return PCI_ERS_RESULT_DISCONNECT;
14428 	}
14429 
14430 	pci_restore_state(pdev);
14431 
14432 	if (pdev->is_busmaster)
14433 		pci_set_master(pdev);
14434 
14435 	spin_lock_irq(&phba->hbalock);
14436 	psli->sli_flag &= ~LPFC_SLI_ACTIVE;
14437 	spin_unlock_irq(&phba->hbalock);
14438 
14439 	/* Configure and enable interrupt */
14440 	intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
14441 	if (intr_mode == LPFC_INTR_ERROR) {
14442 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14443 				"0427 Cannot re-enable interrupt after "
14444 				"slot reset.\n");
14445 		return PCI_ERS_RESULT_DISCONNECT;
14446 	} else
14447 		phba->intr_mode = intr_mode;
14448 
14449 	/* Take device offline, it will perform cleanup */
14450 	lpfc_offline_prep(phba, LPFC_MBX_WAIT);
14451 	lpfc_offline(phba);
14452 	lpfc_sli_brdrestart(phba);
14453 
14454 	/* Log the current active interrupt mode */
14455 	lpfc_log_intr_mode(phba, phba->intr_mode);
14456 
14457 	return PCI_ERS_RESULT_RECOVERED;
14458 }
14459 
14460 /**
14461  * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
14462  * @pdev: pointer to PCI device
14463  *
14464  * This routine is called from the PCI subsystem for error handling to device
14465  * with SLI-3 interface spec. It is called when kernel error recovery tells
14466  * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
14467  * error recovery. After this call, traffic can start to flow from this device
14468  * again.
14469  */
14470 static void
14471 lpfc_io_resume_s3(struct pci_dev *pdev)
14472 {
14473 	struct Scsi_Host *shost = pci_get_drvdata(pdev);
14474 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14475 
14476 	/* Bring device online, it will be no-op for non-fatal error resume */
14477 	lpfc_online(phba);
14478 }
14479 
14480 /**
14481  * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
14482  * @phba: pointer to lpfc hba data structure.
14483  *
14484  * returns the number of ELS/CT IOCBs to reserve
14485  **/
14486 int
14487 lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
14488 {
14489 	int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
14490 
14491 	if (phba->sli_rev == LPFC_SLI_REV4) {
14492 		if (max_xri <= 100)
14493 			return 10;
14494 		else if (max_xri <= 256)
14495 			return 25;
14496 		else if (max_xri <= 512)
14497 			return 50;
14498 		else if (max_xri <= 1024)
14499 			return 100;
14500 		else if (max_xri <= 1536)
14501 			return 150;
14502 		else if (max_xri <= 2048)
14503 			return 200;
14504 		else
14505 			return 250;
14506 	} else
14507 		return 0;
14508 }
14509 
14510 /**
14511  * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
14512  * @phba: pointer to lpfc hba data structure.
14513  *
14514  * returns the number of ELS/CT + NVMET IOCBs to reserve
14515  **/
14516 int
14517 lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
14518 {
14519 	int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
14520 
14521 	if (phba->nvmet_support)
14522 		max_xri += LPFC_NVMET_BUF_POST;
14523 	return max_xri;
14524 }
14525 
14526 
14527 static int
14528 lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset,
14529 	uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize,
14530 	const struct firmware *fw)
14531 {
14532 	int rc;
14533 	u8 sli_family;
14534 
14535 	sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf);
14536 	/* Three cases:  (1) FW was not supported on the detected adapter.
14537 	 * (2) FW update has been locked out administratively.
14538 	 * (3) Some other error during FW update.
14539 	 * In each case, an unmaskable message is written to the console
14540 	 * for admin diagnosis.
14541 	 */
14542 	if (offset == ADD_STATUS_FW_NOT_SUPPORTED ||
14543 	    (sli_family == LPFC_SLI_INTF_FAMILY_G6 &&
14544 	     magic_number != MAGIC_NUMBER_G6) ||
14545 	    (sli_family == LPFC_SLI_INTF_FAMILY_G7 &&
14546 	     magic_number != MAGIC_NUMBER_G7) ||
14547 	    (sli_family == LPFC_SLI_INTF_FAMILY_G7P &&
14548 	     magic_number != MAGIC_NUMBER_G7P)) {
14549 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14550 				"3030 This firmware version is not supported on"
14551 				" this HBA model. Device:%x Magic:%x Type:%x "
14552 				"ID:%x Size %d %zd\n",
14553 				phba->pcidev->device, magic_number, ftype, fid,
14554 				fsize, fw->size);
14555 		rc = -EINVAL;
14556 	} else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) {
14557 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14558 				"3021 Firmware downloads have been prohibited "
14559 				"by a system configuration setting on "
14560 				"Device:%x Magic:%x Type:%x ID:%x Size %d "
14561 				"%zd\n",
14562 				phba->pcidev->device, magic_number, ftype, fid,
14563 				fsize, fw->size);
14564 		rc = -EACCES;
14565 	} else {
14566 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14567 				"3022 FW Download failed. Add Status x%x "
14568 				"Device:%x Magic:%x Type:%x ID:%x Size %d "
14569 				"%zd\n",
14570 				offset, phba->pcidev->device, magic_number,
14571 				ftype, fid, fsize, fw->size);
14572 		rc = -EIO;
14573 	}
14574 	return rc;
14575 }
14576 
14577 /**
14578  * lpfc_write_firmware - attempt to write a firmware image to the port
14579  * @fw: pointer to firmware image returned from request_firmware.
14580  * @context: pointer to firmware image returned from request_firmware.
14581  *
14582  **/
14583 static void
14584 lpfc_write_firmware(const struct firmware *fw, void *context)
14585 {
14586 	struct lpfc_hba *phba = (struct lpfc_hba *)context;
14587 	char fwrev[FW_REV_STR_SIZE];
14588 	struct lpfc_grp_hdr *image;
14589 	struct list_head dma_buffer_list;
14590 	int i, rc = 0;
14591 	struct lpfc_dmabuf *dmabuf, *next;
14592 	uint32_t offset = 0, temp_offset = 0;
14593 	uint32_t magic_number, ftype, fid, fsize;
14594 
14595 	/* It can be null in no-wait mode, sanity check */
14596 	if (!fw) {
14597 		rc = -ENXIO;
14598 		goto out;
14599 	}
14600 	image = (struct lpfc_grp_hdr *)fw->data;
14601 
14602 	magic_number = be32_to_cpu(image->magic_number);
14603 	ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
14604 	fid = bf_get_be32(lpfc_grp_hdr_id, image);
14605 	fsize = be32_to_cpu(image->size);
14606 
14607 	INIT_LIST_HEAD(&dma_buffer_list);
14608 	lpfc_decode_firmware_rev(phba, fwrev, 1);
14609 	if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
14610 		lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14611 			     "3023 Updating Firmware, Current Version:%s "
14612 			     "New Version:%s\n",
14613 			     fwrev, image->revision);
14614 		for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
14615 			dmabuf = kzalloc_obj(struct lpfc_dmabuf, GFP_KERNEL);
14616 			if (!dmabuf) {
14617 				rc = -ENOMEM;
14618 				goto release_out;
14619 			}
14620 			dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
14621 							  SLI4_PAGE_SIZE,
14622 							  &dmabuf->phys,
14623 							  GFP_KERNEL);
14624 			if (!dmabuf->virt) {
14625 				kfree(dmabuf);
14626 				rc = -ENOMEM;
14627 				goto release_out;
14628 			}
14629 			list_add_tail(&dmabuf->list, &dma_buffer_list);
14630 		}
14631 		while (offset < fw->size) {
14632 			temp_offset = offset;
14633 			list_for_each_entry(dmabuf, &dma_buffer_list, list) {
14634 				if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
14635 					memcpy(dmabuf->virt,
14636 					       fw->data + temp_offset,
14637 					       fw->size - temp_offset);
14638 					temp_offset = fw->size;
14639 					break;
14640 				}
14641 				memcpy(dmabuf->virt, fw->data + temp_offset,
14642 				       SLI4_PAGE_SIZE);
14643 				temp_offset += SLI4_PAGE_SIZE;
14644 			}
14645 			rc = lpfc_wr_object(phba, &dma_buffer_list,
14646 				    (fw->size - offset), &offset);
14647 			if (rc) {
14648 				rc = lpfc_log_write_firmware_error(phba, offset,
14649 								   magic_number,
14650 								   ftype,
14651 								   fid,
14652 								   fsize,
14653 								   fw);
14654 				goto release_out;
14655 			}
14656 		}
14657 		rc = offset;
14658 	} else
14659 		lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14660 			     "3029 Skipped Firmware update, Current "
14661 			     "Version:%s New Version:%s\n",
14662 			     fwrev, image->revision);
14663 
14664 release_out:
14665 	list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
14666 		list_del(&dmabuf->list);
14667 		dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
14668 				  dmabuf->virt, dmabuf->phys);
14669 		kfree(dmabuf);
14670 	}
14671 	release_firmware(fw);
14672 out:
14673 	if (rc < 0)
14674 		lpfc_log_msg(phba, KERN_ERR, LOG_INIT | LOG_SLI,
14675 			     "3062 Firmware update error, status %d.\n", rc);
14676 	else
14677 		lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14678 			     "3024 Firmware update success: size %d.\n", rc);
14679 }
14680 
14681 /**
14682  * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
14683  * @phba: pointer to lpfc hba data structure.
14684  * @fw_upgrade: which firmware to update.
14685  *
14686  * This routine is called to perform Linux generic firmware upgrade on device
14687  * that supports such feature.
14688  **/
14689 int
14690 lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
14691 {
14692 	char file_name[ELX_FW_NAME_SIZE] = {0};
14693 	int ret;
14694 	const struct firmware *fw;
14695 
14696 	/* Only supported on SLI4 interface type 2 for now */
14697 	if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
14698 	    LPFC_SLI_INTF_IF_TYPE_2)
14699 		return -EPERM;
14700 
14701 	scnprintf(file_name, sizeof(file_name), "%s.grp", phba->ModelName);
14702 
14703 	if (fw_upgrade == INT_FW_UPGRADE) {
14704 		ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT,
14705 					file_name, &phba->pcidev->dev,
14706 					GFP_KERNEL, (void *)phba,
14707 					lpfc_write_firmware);
14708 	} else if (fw_upgrade == RUN_FW_UPGRADE) {
14709 		ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
14710 		if (!ret)
14711 			lpfc_write_firmware(fw, (void *)phba);
14712 	} else {
14713 		ret = -EINVAL;
14714 	}
14715 
14716 	return ret;
14717 }
14718 
14719 /**
14720  * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
14721  * @pdev: pointer to PCI device
14722  * @pid: pointer to PCI device identifier
14723  *
14724  * This routine is called from the kernel's PCI subsystem to device with
14725  * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
14726  * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
14727  * information of the device and driver to see if the driver state that it
14728  * can support this kind of device. If the match is successful, the driver
14729  * core invokes this routine. If this routine determines it can claim the HBA,
14730  * it does all the initialization that it needs to do to handle the HBA
14731  * properly.
14732  *
14733  * Return code
14734  * 	0 - driver can claim the device
14735  * 	negative value - driver can not claim the device
14736  **/
14737 static int
14738 lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
14739 {
14740 	struct lpfc_hba   *phba;
14741 	struct lpfc_vport *vport = NULL;
14742 	struct Scsi_Host  *shost = NULL;
14743 	int error;
14744 	uint32_t cfg_mode, intr_mode;
14745 
14746 	/* Allocate memory for HBA structure */
14747 	phba = lpfc_hba_alloc(pdev);
14748 	if (!phba)
14749 		return -ENOMEM;
14750 
14751 	INIT_LIST_HEAD(&phba->poll_list);
14752 
14753 	/* Perform generic PCI device enabling operation */
14754 	error = lpfc_enable_pci_dev(phba);
14755 	if (error)
14756 		goto out_free_phba;
14757 
14758 	/* Set up SLI API function jump table for PCI-device group-1 HBAs */
14759 	error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
14760 	if (error)
14761 		goto out_disable_pci_dev;
14762 
14763 	/* Set up SLI-4 specific device PCI memory space */
14764 	error = lpfc_sli4_pci_mem_setup(phba);
14765 	if (error) {
14766 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14767 				"1410 Failed to set up pci memory space.\n");
14768 		goto out_disable_pci_dev;
14769 	}
14770 
14771 	/* Set up SLI-4 Specific device driver resources */
14772 	error = lpfc_sli4_driver_resource_setup(phba);
14773 	if (error) {
14774 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14775 				"1412 Failed to set up driver resource.\n");
14776 		goto out_unset_pci_mem_s4;
14777 	}
14778 
14779 	spin_lock_init(&phba->rrq_list_lock);
14780 	INIT_LIST_HEAD(&phba->active_rrq_list);
14781 	INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
14782 
14783 	/* Set up common device driver resources */
14784 	error = lpfc_setup_driver_resource_phase2(phba);
14785 	if (error) {
14786 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14787 				"1414 Failed to set up driver resource.\n");
14788 		goto out_unset_driver_resource_s4;
14789 	}
14790 
14791 	/* Get the default values for Model Name and Description */
14792 	lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
14793 
14794 	/* Now, trying to enable interrupt and bring up the device */
14795 	cfg_mode = phba->cfg_use_msi;
14796 
14797 	/* Put device to a known state before enabling interrupt */
14798 	phba->pport = NULL;
14799 	lpfc_stop_port(phba);
14800 
14801 	/* Init cpu_map array */
14802 	lpfc_cpu_map_array_init(phba);
14803 
14804 	/* Init hba_eq_hdl array */
14805 	lpfc_hba_eq_hdl_array_init(phba);
14806 
14807 	/* Configure and enable interrupt */
14808 	intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
14809 	if (intr_mode == LPFC_INTR_ERROR) {
14810 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14811 				"0426 Failed to enable interrupt.\n");
14812 		error = -ENODEV;
14813 		goto out_unset_driver_resource;
14814 	}
14815 	/* Default to single EQ for non-MSI-X */
14816 	if (phba->intr_type != MSIX) {
14817 		phba->cfg_irq_chann = 1;
14818 		if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
14819 			if (phba->nvmet_support)
14820 				phba->cfg_nvmet_mrq = 1;
14821 		}
14822 	}
14823 	lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
14824 
14825 	/* Create SCSI host to the physical port */
14826 	error = lpfc_create_shost(phba);
14827 	if (error) {
14828 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14829 				"1415 Failed to create scsi host.\n");
14830 		goto out_disable_intr;
14831 	}
14832 	vport = phba->pport;
14833 	shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
14834 
14835 	/* Configure sysfs attributes */
14836 	error = lpfc_alloc_sysfs_attr(vport);
14837 	if (error) {
14838 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14839 				"1416 Failed to allocate sysfs attr\n");
14840 		goto out_destroy_shost;
14841 	}
14842 
14843 	/* Set up SLI-4 HBA */
14844 	if (lpfc_sli4_hba_setup(phba)) {
14845 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14846 				"1421 Failed to set up hba\n");
14847 		error = -ENODEV;
14848 		goto out_free_sysfs_attr;
14849 	}
14850 
14851 	/* Log the current active interrupt mode */
14852 	phba->intr_mode = intr_mode;
14853 	lpfc_log_intr_mode(phba, intr_mode);
14854 
14855 	/* Perform post initialization setup */
14856 	lpfc_post_init_setup(phba);
14857 
14858 	/* NVME support in FW earlier in the driver load corrects the
14859 	 * FC4 type making a check for nvme_support unnecessary.
14860 	 */
14861 	if (phba->nvmet_support == 0) {
14862 		if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
14863 			/* Create NVME binding with nvme_fc_transport. This
14864 			 * ensures the vport is initialized.  If the localport
14865 			 * create fails, it should not unload the driver to
14866 			 * support field issues.
14867 			 */
14868 			error = lpfc_nvme_create_localport(vport);
14869 			if (error) {
14870 				lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14871 						"6004 NVME registration "
14872 						"failed, error x%x\n",
14873 						error);
14874 			}
14875 		}
14876 	}
14877 
14878 	/* check for firmware upgrade or downgrade */
14879 	if (phba->cfg_request_firmware_upgrade)
14880 		lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
14881 
14882 	/* Check if there are static vports to be created. */
14883 	lpfc_create_static_vport(phba);
14884 
14885 	timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0);
14886 	cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp);
14887 
14888 	return 0;
14889 
14890 out_free_sysfs_attr:
14891 	lpfc_free_sysfs_attr(vport);
14892 out_destroy_shost:
14893 	lpfc_destroy_shost(phba);
14894 out_disable_intr:
14895 	lpfc_sli4_disable_intr(phba);
14896 out_unset_driver_resource:
14897 	lpfc_unset_driver_resource_phase2(phba);
14898 out_unset_driver_resource_s4:
14899 	lpfc_sli4_driver_resource_unset(phba);
14900 out_unset_pci_mem_s4:
14901 	lpfc_sli4_pci_mem_unset(phba);
14902 out_disable_pci_dev:
14903 	lpfc_disable_pci_dev(phba);
14904 	if (shost)
14905 		scsi_host_put(shost);
14906 out_free_phba:
14907 	lpfc_hba_free(phba);
14908 	return error;
14909 }
14910 
14911 /**
14912  * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
14913  * @pdev: pointer to PCI device
14914  *
14915  * This routine is called from the kernel's PCI subsystem to device with
14916  * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
14917  * removed from PCI bus, it performs all the necessary cleanup for the HBA
14918  * device to be removed from the PCI subsystem properly.
14919  **/
14920 static void
14921 lpfc_pci_remove_one_s4(struct pci_dev *pdev)
14922 {
14923 	struct Scsi_Host *shost = pci_get_drvdata(pdev);
14924 	struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
14925 	struct lpfc_vport **vports;
14926 	struct lpfc_hba *phba = vport->phba;
14927 	int i;
14928 
14929 	/* Mark the device unloading flag */
14930 	set_bit(FC_UNLOADING, &vport->load_flag);
14931 	if (phba->cgn_i)
14932 		lpfc_unreg_congestion_buf(phba);
14933 
14934 	lpfc_free_sysfs_attr(vport);
14935 
14936 	/* Release all the vports against this physical port */
14937 	vports = lpfc_create_vport_work_array(phba);
14938 	if (vports != NULL)
14939 		for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
14940 			if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
14941 				continue;
14942 			fc_vport_terminate(vports[i]->fc_vport);
14943 		}
14944 	lpfc_destroy_vport_work_array(phba, vports);
14945 
14946 	/* Remove FC host with the physical port */
14947 	fc_remove_host(shost);
14948 	scsi_remove_host(shost);
14949 
14950 	/* Perform ndlp cleanup on the physical port.  The nvme and nvmet
14951 	 * localports are destroyed after to cleanup all transport memory.
14952 	 */
14953 	lpfc_cleanup(vport);
14954 	lpfc_nvmet_destroy_targetport(phba);
14955 	lpfc_nvme_destroy_localport(vport);
14956 
14957 	/* De-allocate multi-XRI pools */
14958 	if (phba->cfg_xri_rebalancing)
14959 		lpfc_destroy_multixri_pools(phba);
14960 
14961 	/*
14962 	 * Bring down the SLI Layer. This step disables all interrupts,
14963 	 * clears the rings, discards all mailbox commands, and resets
14964 	 * the HBA FCoE function.
14965 	 */
14966 	lpfc_debugfs_terminate(vport);
14967 
14968 	lpfc_stop_hba_timers(phba);
14969 	spin_lock_irq(&phba->port_list_lock);
14970 	list_del_init(&vport->listentry);
14971 	spin_unlock_irq(&phba->port_list_lock);
14972 
14973 	/* Perform scsi free before driver resource_unset since scsi
14974 	 * buffers are released to their corresponding pools here.
14975 	 */
14976 	lpfc_io_free(phba);
14977 	lpfc_free_iocb_list(phba);
14978 	lpfc_sli4_hba_unset(phba);
14979 
14980 	lpfc_unset_driver_resource_phase2(phba);
14981 	lpfc_sli4_driver_resource_unset(phba);
14982 
14983 	/* Unmap adapter Control and Doorbell registers */
14984 	lpfc_sli4_pci_mem_unset(phba);
14985 
14986 	/* Release PCI resources and disable device's PCI function */
14987 	scsi_host_put(shost);
14988 	lpfc_disable_pci_dev(phba);
14989 
14990 	/* Finally, free the driver's device data structure */
14991 	lpfc_hba_free(phba);
14992 
14993 	return;
14994 }
14995 
14996 /**
14997  * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
14998  * @dev_d: pointer to device
14999  *
15000  * This routine is called from the kernel's PCI subsystem to support system
15001  * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
15002  * this method, it quiesces the device by stopping the driver's worker
15003  * thread for the device, turning off device's interrupt and DMA, and bring
15004  * the device offline. Note that as the driver implements the minimum PM
15005  * requirements to a power-aware driver's PM support for suspend/resume -- all
15006  * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
15007  * method call will be treated as SUSPEND and the driver will fully
15008  * reinitialize its device during resume() method call, the driver will set
15009  * device to PCI_D3hot state in PCI config space instead of setting it
15010  * according to the @msg provided by the PM.
15011  *
15012  * Return code
15013  * 	0 - driver suspended the device
15014  * 	Error otherwise
15015  **/
15016 static int __maybe_unused
15017 lpfc_pci_suspend_one_s4(struct device *dev_d)
15018 {
15019 	struct Scsi_Host *shost = dev_get_drvdata(dev_d);
15020 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15021 
15022 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15023 			"2843 PCI device Power Management suspend.\n");
15024 
15025 	/* Bring down the device */
15026 	lpfc_offline_prep(phba, LPFC_MBX_WAIT);
15027 	lpfc_offline(phba);
15028 	kthread_stop(phba->worker_thread);
15029 
15030 	/* Disable interrupt from device */
15031 	lpfc_sli4_disable_intr(phba);
15032 	lpfc_sli4_queue_destroy(phba);
15033 
15034 	return 0;
15035 }
15036 
15037 /**
15038  * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
15039  * @dev_d: pointer to device
15040  *
15041  * This routine is called from the kernel's PCI subsystem to support system
15042  * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
15043  * this method, it restores the device's PCI config space state and fully
15044  * reinitializes the device and brings it online. Note that as the driver
15045  * implements the minimum PM requirements to a power-aware driver's PM for
15046  * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
15047  * to the suspend() method call will be treated as SUSPEND and the driver
15048  * will fully reinitialize its device during resume() method call, the device
15049  * will be set to PCI_D0 directly in PCI config space before restoring the
15050  * state.
15051  *
15052  * Return code
15053  * 	0 - driver suspended the device
15054  * 	Error otherwise
15055  **/
15056 static int __maybe_unused
15057 lpfc_pci_resume_one_s4(struct device *dev_d)
15058 {
15059 	struct Scsi_Host *shost = dev_get_drvdata(dev_d);
15060 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15061 	uint32_t intr_mode;
15062 	int error;
15063 
15064 	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15065 			"0292 PCI device Power Management resume.\n");
15066 
15067 	 /* Startup the kernel thread for this host adapter. */
15068 	phba->worker_thread = kthread_run(lpfc_do_work, phba,
15069 					"lpfc_worker_%d", phba->brd_no);
15070 	if (IS_ERR(phba->worker_thread)) {
15071 		error = PTR_ERR(phba->worker_thread);
15072 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15073 				"0293 PM resume failed to start worker "
15074 				"thread: error=x%x.\n", error);
15075 		return error;
15076 	}
15077 
15078 	/* Configure and enable interrupt */
15079 	intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
15080 	if (intr_mode == LPFC_INTR_ERROR) {
15081 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15082 				"0294 PM resume Failed to enable interrupt\n");
15083 		return -EIO;
15084 	} else
15085 		phba->intr_mode = intr_mode;
15086 
15087 	/* Restart HBA and bring it online */
15088 	lpfc_sli_brdrestart(phba);
15089 	lpfc_online(phba);
15090 
15091 	/* Log the current active interrupt mode */
15092 	lpfc_log_intr_mode(phba, phba->intr_mode);
15093 
15094 	return 0;
15095 }
15096 
15097 /**
15098  * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
15099  * @phba: pointer to lpfc hba data structure.
15100  *
15101  * This routine is called to prepare the SLI4 device for PCI slot recover. It
15102  * aborts all the outstanding SCSI I/Os to the pci device.
15103  **/
15104 static void
15105 lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
15106 {
15107 	lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15108 			"2828 PCI channel I/O abort preparing for recovery\n");
15109 	/*
15110 	 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
15111 	 * and let the SCSI mid-layer to retry them to recover.
15112 	 */
15113 	lpfc_sli_abort_fcp_rings(phba);
15114 }
15115 
15116 /**
15117  * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
15118  * @phba: pointer to lpfc hba data structure.
15119  *
15120  * This routine is called to prepare the SLI4 device for PCI slot reset. It
15121  * disables the device interrupt and pci device, and aborts the internal FCP
15122  * pending I/Os.
15123  **/
15124 static void
15125 lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
15126 {
15127 	int offline =  pci_channel_offline(phba->pcidev);
15128 
15129 	lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15130 			"2826 PCI channel disable preparing for reset offline"
15131 			" %d\n", offline);
15132 
15133 	/* Block any management I/Os to the device */
15134 	lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
15135 
15136 
15137 	/* HBA_PCI_ERR was set in io_error_detect */
15138 	lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
15139 	/* Flush all driver's outstanding I/Os as we are to reset */
15140 	lpfc_sli_flush_io_rings(phba);
15141 	lpfc_offline(phba);
15142 
15143 	/* stop all timers */
15144 	lpfc_stop_hba_timers(phba);
15145 
15146 	lpfc_sli4_queue_destroy(phba);
15147 	/* Disable interrupt and pci device */
15148 	lpfc_sli4_disable_intr(phba);
15149 	pci_disable_device(phba->pcidev);
15150 }
15151 
15152 /**
15153  * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
15154  * @phba: pointer to lpfc hba data structure.
15155  *
15156  * This routine is called to prepare the SLI4 device for PCI slot permanently
15157  * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
15158  * pending I/Os.
15159  **/
15160 static void
15161 lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
15162 {
15163 	lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15164 			"2827 PCI channel permanent disable for failure\n");
15165 
15166 	/* Block all SCSI devices' I/Os on the host */
15167 	lpfc_scsi_dev_block(phba);
15168 
15169 	/* stop all timers */
15170 	lpfc_stop_hba_timers(phba);
15171 
15172 	/* Clean up all driver's outstanding I/Os */
15173 	lpfc_sli_flush_io_rings(phba);
15174 }
15175 
15176 /**
15177  * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
15178  * @pdev: pointer to PCI device.
15179  * @state: the current PCI connection state.
15180  *
15181  * This routine is called from the PCI subsystem for error handling to device
15182  * with SLI-4 interface spec. This function is called by the PCI subsystem
15183  * after a PCI bus error affecting this device has been detected. When this
15184  * function is invoked, it will need to stop all the I/Os and interrupt(s)
15185  * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
15186  * for the PCI subsystem to perform proper recovery as desired.
15187  *
15188  * Return codes
15189  * 	PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
15190  * 	PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15191  **/
15192 static pci_ers_result_t
15193 lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
15194 {
15195 	struct Scsi_Host *shost = pci_get_drvdata(pdev);
15196 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15197 	bool hba_pci_err;
15198 
15199 	switch (state) {
15200 	case pci_channel_io_normal:
15201 		/* Non-fatal error, prepare for recovery */
15202 		lpfc_sli4_prep_dev_for_recover(phba);
15203 		return PCI_ERS_RESULT_CAN_RECOVER;
15204 	case pci_channel_io_frozen:
15205 		hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags);
15206 		/* Fatal error, prepare for slot reset */
15207 		if (!hba_pci_err)
15208 			lpfc_sli4_prep_dev_for_reset(phba);
15209 		else
15210 			lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15211 					"2832  Already handling PCI error "
15212 					"state: x%x\n", state);
15213 		return PCI_ERS_RESULT_NEED_RESET;
15214 	case pci_channel_io_perm_failure:
15215 		set_bit(HBA_PCI_ERR, &phba->bit_flags);
15216 		/* Permanent failure, prepare for device down */
15217 		lpfc_sli4_prep_dev_for_perm_failure(phba);
15218 		return PCI_ERS_RESULT_DISCONNECT;
15219 	default:
15220 		hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags);
15221 		if (!hba_pci_err)
15222 			lpfc_sli4_prep_dev_for_reset(phba);
15223 		/* Unknown state, prepare and request slot reset */
15224 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15225 				"2825 Unknown PCI error state: x%x\n", state);
15226 		lpfc_sli4_prep_dev_for_reset(phba);
15227 		return PCI_ERS_RESULT_NEED_RESET;
15228 	}
15229 }
15230 
15231 /**
15232  * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
15233  * @pdev: pointer to PCI device.
15234  *
15235  * This routine is called from the PCI subsystem for error handling to device
15236  * with SLI-4 interface spec. It is called after PCI bus has been reset to
15237  * restart the PCI card from scratch, as if from a cold-boot. During the
15238  * PCI subsystem error recovery, after the driver returns
15239  * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
15240  * recovery and then call this routine before calling the .resume method to
15241  * recover the device. This function will initialize the HBA device, enable
15242  * the interrupt, but it will just put the HBA to offline state without
15243  * passing any I/O traffic.
15244  *
15245  * Return codes
15246  * 	PCI_ERS_RESULT_RECOVERED - the device has been recovered
15247  * 	PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15248  */
15249 static pci_ers_result_t
15250 lpfc_io_slot_reset_s4(struct pci_dev *pdev)
15251 {
15252 	struct Scsi_Host *shost = pci_get_drvdata(pdev);
15253 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15254 	struct lpfc_sli *psli = &phba->sli;
15255 	uint32_t intr_mode;
15256 	bool hba_pci_err;
15257 
15258 	dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
15259 	if (pci_enable_device_mem(pdev)) {
15260 		printk(KERN_ERR "lpfc: Cannot re-enable "
15261 		       "PCI device after reset.\n");
15262 		return PCI_ERS_RESULT_DISCONNECT;
15263 	}
15264 
15265 	pci_restore_state(pdev);
15266 
15267 	hba_pci_err = test_and_clear_bit(HBA_PCI_ERR, &phba->bit_flags);
15268 	if (!hba_pci_err)
15269 		dev_info(&pdev->dev,
15270 			 "hba_pci_err was not set, recovering slot reset.\n");
15271 	/*
15272 	 * As the new kernel behavior of pci_restore_state() API call clears
15273 	 * device saved_state flag, need to save the restored state again.
15274 	 */
15275 	pci_save_state(pdev);
15276 
15277 	if (pdev->is_busmaster)
15278 		pci_set_master(pdev);
15279 
15280 	spin_lock_irq(&phba->hbalock);
15281 	psli->sli_flag &= ~LPFC_SLI_ACTIVE;
15282 	spin_unlock_irq(&phba->hbalock);
15283 
15284 	/* Init cpu_map array */
15285 	lpfc_cpu_map_array_init(phba);
15286 	/* Configure and enable interrupt */
15287 	intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
15288 	if (intr_mode == LPFC_INTR_ERROR) {
15289 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15290 				"2824 Cannot re-enable interrupt after "
15291 				"slot reset.\n");
15292 		return PCI_ERS_RESULT_DISCONNECT;
15293 	} else
15294 		phba->intr_mode = intr_mode;
15295 	lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
15296 
15297 	/* Log the current active interrupt mode */
15298 	lpfc_log_intr_mode(phba, phba->intr_mode);
15299 
15300 	return PCI_ERS_RESULT_RECOVERED;
15301 }
15302 
15303 /**
15304  * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
15305  * @pdev: pointer to PCI device
15306  *
15307  * This routine is called from the PCI subsystem for error handling to device
15308  * with SLI-4 interface spec. It is called when kernel error recovery tells
15309  * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
15310  * error recovery. After this call, traffic can start to flow from this device
15311  * again.
15312  **/
15313 static void
15314 lpfc_io_resume_s4(struct pci_dev *pdev)
15315 {
15316 	struct Scsi_Host *shost = pci_get_drvdata(pdev);
15317 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15318 
15319 	/*
15320 	 * In case of slot reset, as function reset is performed through
15321 	 * mailbox command which needs DMA to be enabled, this operation
15322 	 * has to be moved to the io resume phase. Taking device offline
15323 	 * will perform the necessary cleanup.
15324 	 */
15325 	if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
15326 		/* Perform device reset */
15327 		lpfc_sli_brdrestart(phba);
15328 		/* Bring the device back online */
15329 		lpfc_online(phba);
15330 	}
15331 }
15332 
15333 /**
15334  * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
15335  * @pdev: pointer to PCI device
15336  * @pid: pointer to PCI device identifier
15337  *
15338  * This routine is to be registered to the kernel's PCI subsystem. When an
15339  * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
15340  * at PCI device-specific information of the device and driver to see if the
15341  * driver state that it can support this kind of device. If the match is
15342  * successful, the driver core invokes this routine. This routine dispatches
15343  * the action to the proper SLI-3 or SLI-4 device probing routine, which will
15344  * do all the initialization that it needs to do to handle the HBA device
15345  * properly.
15346  *
15347  * Return code
15348  * 	0 - driver can claim the device
15349  * 	negative value - driver can not claim the device
15350  **/
15351 static int
15352 lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
15353 {
15354 	int rc;
15355 	struct lpfc_sli_intf intf;
15356 
15357 	if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
15358 		return -ENODEV;
15359 
15360 	if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
15361 	    (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
15362 		rc = lpfc_pci_probe_one_s4(pdev, pid);
15363 	else
15364 		rc = lpfc_pci_probe_one_s3(pdev, pid);
15365 
15366 	return rc;
15367 }
15368 
15369 /**
15370  * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
15371  * @pdev: pointer to PCI device
15372  *
15373  * This routine is to be registered to the kernel's PCI subsystem. When an
15374  * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
15375  * This routine dispatches the action to the proper SLI-3 or SLI-4 device
15376  * remove routine, which will perform all the necessary cleanup for the
15377  * device to be removed from the PCI subsystem properly.
15378  **/
15379 static void
15380 lpfc_pci_remove_one(struct pci_dev *pdev)
15381 {
15382 	struct Scsi_Host *shost = pci_get_drvdata(pdev);
15383 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15384 
15385 	switch (phba->pci_dev_grp) {
15386 	case LPFC_PCI_DEV_LP:
15387 		lpfc_pci_remove_one_s3(pdev);
15388 		break;
15389 	case LPFC_PCI_DEV_OC:
15390 		lpfc_pci_remove_one_s4(pdev);
15391 		break;
15392 	default:
15393 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15394 				"1424 Invalid PCI device group: 0x%x\n",
15395 				phba->pci_dev_grp);
15396 		break;
15397 	}
15398 	return;
15399 }
15400 
15401 /**
15402  * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
15403  * @dev: pointer to device
15404  *
15405  * This routine is to be registered to the kernel's PCI subsystem to support
15406  * system Power Management (PM). When PM invokes this method, it dispatches
15407  * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
15408  * suspend the device.
15409  *
15410  * Return code
15411  * 	0 - driver suspended the device
15412  * 	Error otherwise
15413  **/
15414 static int __maybe_unused
15415 lpfc_pci_suspend_one(struct device *dev)
15416 {
15417 	struct Scsi_Host *shost = dev_get_drvdata(dev);
15418 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15419 	int rc = -ENODEV;
15420 
15421 	switch (phba->pci_dev_grp) {
15422 	case LPFC_PCI_DEV_LP:
15423 		rc = lpfc_pci_suspend_one_s3(dev);
15424 		break;
15425 	case LPFC_PCI_DEV_OC:
15426 		rc = lpfc_pci_suspend_one_s4(dev);
15427 		break;
15428 	default:
15429 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15430 				"1425 Invalid PCI device group: 0x%x\n",
15431 				phba->pci_dev_grp);
15432 		break;
15433 	}
15434 	return rc;
15435 }
15436 
15437 /**
15438  * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
15439  * @dev: pointer to device
15440  *
15441  * This routine is to be registered to the kernel's PCI subsystem to support
15442  * system Power Management (PM). When PM invokes this method, it dispatches
15443  * the action to the proper SLI-3 or SLI-4 device resume routine, which will
15444  * resume the device.
15445  *
15446  * Return code
15447  * 	0 - driver suspended the device
15448  * 	Error otherwise
15449  **/
15450 static int __maybe_unused
15451 lpfc_pci_resume_one(struct device *dev)
15452 {
15453 	struct Scsi_Host *shost = dev_get_drvdata(dev);
15454 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15455 	int rc = -ENODEV;
15456 
15457 	switch (phba->pci_dev_grp) {
15458 	case LPFC_PCI_DEV_LP:
15459 		rc = lpfc_pci_resume_one_s3(dev);
15460 		break;
15461 	case LPFC_PCI_DEV_OC:
15462 		rc = lpfc_pci_resume_one_s4(dev);
15463 		break;
15464 	default:
15465 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15466 				"1426 Invalid PCI device group: 0x%x\n",
15467 				phba->pci_dev_grp);
15468 		break;
15469 	}
15470 	return rc;
15471 }
15472 
15473 /**
15474  * lpfc_io_error_detected - lpfc method for handling PCI I/O error
15475  * @pdev: pointer to PCI device.
15476  * @state: the current PCI connection state.
15477  *
15478  * This routine is registered to the PCI subsystem for error handling. This
15479  * function is called by the PCI subsystem after a PCI bus error affecting
15480  * this device has been detected. When this routine is invoked, it dispatches
15481  * the action to the proper SLI-3 or SLI-4 device error detected handling
15482  * routine, which will perform the proper error detected operation.
15483  *
15484  * Return codes
15485  * 	PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
15486  * 	PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15487  **/
15488 static pci_ers_result_t
15489 lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
15490 {
15491 	struct Scsi_Host *shost = pci_get_drvdata(pdev);
15492 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15493 	pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
15494 
15495 	if (phba->link_state == LPFC_HBA_ERROR &&
15496 	    test_bit(HBA_IOQ_FLUSH, &phba->hba_flag))
15497 		return PCI_ERS_RESULT_NEED_RESET;
15498 
15499 	switch (phba->pci_dev_grp) {
15500 	case LPFC_PCI_DEV_LP:
15501 		rc = lpfc_io_error_detected_s3(pdev, state);
15502 		break;
15503 	case LPFC_PCI_DEV_OC:
15504 		rc = lpfc_io_error_detected_s4(pdev, state);
15505 		break;
15506 	default:
15507 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15508 				"1427 Invalid PCI device group: 0x%x\n",
15509 				phba->pci_dev_grp);
15510 		break;
15511 	}
15512 	return rc;
15513 }
15514 
15515 /**
15516  * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
15517  * @pdev: pointer to PCI device.
15518  *
15519  * This routine is registered to the PCI subsystem for error handling. This
15520  * function is called after PCI bus has been reset to restart the PCI card
15521  * from scratch, as if from a cold-boot. When this routine is invoked, it
15522  * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
15523  * routine, which will perform the proper device reset.
15524  *
15525  * Return codes
15526  * 	PCI_ERS_RESULT_RECOVERED - the device has been recovered
15527  * 	PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15528  **/
15529 static pci_ers_result_t
15530 lpfc_io_slot_reset(struct pci_dev *pdev)
15531 {
15532 	struct Scsi_Host *shost = pci_get_drvdata(pdev);
15533 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15534 	pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
15535 
15536 	switch (phba->pci_dev_grp) {
15537 	case LPFC_PCI_DEV_LP:
15538 		rc = lpfc_io_slot_reset_s3(pdev);
15539 		break;
15540 	case LPFC_PCI_DEV_OC:
15541 		rc = lpfc_io_slot_reset_s4(pdev);
15542 		break;
15543 	default:
15544 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15545 				"1428 Invalid PCI device group: 0x%x\n",
15546 				phba->pci_dev_grp);
15547 		break;
15548 	}
15549 	return rc;
15550 }
15551 
15552 /**
15553  * lpfc_io_resume - lpfc method for resuming PCI I/O operation
15554  * @pdev: pointer to PCI device
15555  *
15556  * This routine is registered to the PCI subsystem for error handling. It
15557  * is called when kernel error recovery tells the lpfc driver that it is
15558  * OK to resume normal PCI operation after PCI bus error recovery. When
15559  * this routine is invoked, it dispatches the action to the proper SLI-3
15560  * or SLI-4 device io_resume routine, which will resume the device operation.
15561  **/
15562 static void
15563 lpfc_io_resume(struct pci_dev *pdev)
15564 {
15565 	struct Scsi_Host *shost = pci_get_drvdata(pdev);
15566 	struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15567 
15568 	switch (phba->pci_dev_grp) {
15569 	case LPFC_PCI_DEV_LP:
15570 		lpfc_io_resume_s3(pdev);
15571 		break;
15572 	case LPFC_PCI_DEV_OC:
15573 		lpfc_io_resume_s4(pdev);
15574 		break;
15575 	default:
15576 		lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15577 				"1429 Invalid PCI device group: 0x%x\n",
15578 				phba->pci_dev_grp);
15579 		break;
15580 	}
15581 	return;
15582 }
15583 
15584 /**
15585  * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
15586  * @phba: pointer to lpfc hba data structure.
15587  *
15588  * This routine checks to see if OAS is supported for this adapter. If
15589  * supported, the configure Flash Optimized Fabric flag is set.  Otherwise,
15590  * the enable oas flag is cleared and the pool created for OAS device data
15591  * is destroyed.
15592  *
15593  **/
15594 static void
15595 lpfc_sli4_oas_verify(struct lpfc_hba *phba)
15596 {
15597 
15598 	if (!phba->cfg_EnableXLane)
15599 		return;
15600 
15601 	if (phba->sli4_hba.pc_sli4_params.oas_supported) {
15602 		phba->cfg_fof = 1;
15603 	} else {
15604 		phba->cfg_fof = 0;
15605 		mempool_destroy(phba->device_data_mem_pool);
15606 		phba->device_data_mem_pool = NULL;
15607 	}
15608 
15609 	return;
15610 }
15611 
15612 /**
15613  * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter
15614  * @phba: pointer to lpfc hba data structure.
15615  *
15616  * This routine checks to see if RAS is supported by the adapter. Check the
15617  * function through which RAS support enablement is to be done.
15618  **/
15619 void
15620 lpfc_sli4_ras_init(struct lpfc_hba *phba)
15621 {
15622 	/* if ASIC_GEN_NUM >= 0xC) */
15623 	if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
15624 		    LPFC_SLI_INTF_IF_TYPE_6) ||
15625 	    (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
15626 		    LPFC_SLI_INTF_FAMILY_G6)) {
15627 		phba->ras_fwlog.ras_hwsupport = true;
15628 		if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) &&
15629 		    phba->cfg_ras_fwlog_buffsize)
15630 			phba->ras_fwlog.ras_enabled = true;
15631 		else
15632 			phba->ras_fwlog.ras_enabled = false;
15633 	} else {
15634 		phba->ras_fwlog.ras_hwsupport = false;
15635 	}
15636 }
15637 
15638 
15639 MODULE_DEVICE_TABLE(pci, lpfc_id_table);
15640 
15641 static const struct pci_error_handlers lpfc_err_handler = {
15642 	.error_detected = lpfc_io_error_detected,
15643 	.slot_reset = lpfc_io_slot_reset,
15644 	.resume = lpfc_io_resume,
15645 };
15646 
15647 static SIMPLE_DEV_PM_OPS(lpfc_pci_pm_ops_one,
15648 			 lpfc_pci_suspend_one,
15649 			 lpfc_pci_resume_one);
15650 
15651 static struct pci_driver lpfc_driver = {
15652 	.name		= LPFC_DRIVER_NAME,
15653 	.id_table	= lpfc_id_table,
15654 	.probe		= lpfc_pci_probe_one,
15655 	.remove		= lpfc_pci_remove_one,
15656 	.shutdown	= lpfc_pci_remove_one,
15657 	.driver.pm	= &lpfc_pci_pm_ops_one,
15658 	.err_handler    = &lpfc_err_handler,
15659 };
15660 
15661 static const struct file_operations lpfc_mgmt_fop = {
15662 	.owner = THIS_MODULE,
15663 };
15664 
15665 static struct miscdevice lpfc_mgmt_dev = {
15666 	.minor = MISC_DYNAMIC_MINOR,
15667 	.name = "lpfcmgmt",
15668 	.fops = &lpfc_mgmt_fop,
15669 };
15670 
15671 /**
15672  * lpfc_init - lpfc module initialization routine
15673  *
15674  * This routine is to be invoked when the lpfc module is loaded into the
15675  * kernel. The special kernel macro module_init() is used to indicate the
15676  * role of this routine to the kernel as lpfc module entry point.
15677  *
15678  * Return codes
15679  *   0 - successful
15680  *   -ENOMEM - FC attach transport failed
15681  *   all others - failed
15682  */
15683 static int __init
15684 lpfc_init(void)
15685 {
15686 	int error = 0;
15687 
15688 	pr_info(LPFC_MODULE_DESC "\n");
15689 	pr_info(LPFC_COPYRIGHT "\n");
15690 
15691 	error = misc_register(&lpfc_mgmt_dev);
15692 	if (error)
15693 		printk(KERN_ERR "Could not register lpfcmgmt device, "
15694 			"misc_register returned with status %d", error);
15695 
15696 	error = -ENOMEM;
15697 	lpfc_transport_functions.vport_create = lpfc_vport_create;
15698 	lpfc_transport_functions.vport_delete = lpfc_vport_delete;
15699 	lpfc_transport_template =
15700 				fc_attach_transport(&lpfc_transport_functions);
15701 	if (lpfc_transport_template == NULL)
15702 		goto unregister;
15703 	lpfc_vport_transport_template =
15704 		fc_attach_transport(&lpfc_vport_transport_functions);
15705 	if (lpfc_vport_transport_template == NULL) {
15706 		fc_release_transport(lpfc_transport_template);
15707 		goto unregister;
15708 	}
15709 	lpfc_wqe_cmd_template();
15710 	lpfc_nvmet_cmd_template();
15711 
15712 	/* Initialize in case vector mapping is needed */
15713 	lpfc_present_cpu = num_present_cpus();
15714 
15715 	lpfc_pldv_detect = false;
15716 
15717 	error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN,
15718 					"lpfc/sli4:online",
15719 					lpfc_cpu_online, lpfc_cpu_offline);
15720 	if (error < 0)
15721 		goto cpuhp_failure;
15722 	lpfc_cpuhp_state = error;
15723 
15724 	error = pci_register_driver(&lpfc_driver);
15725 	if (error)
15726 		goto unwind;
15727 
15728 	return error;
15729 
15730 unwind:
15731 	cpuhp_remove_multi_state(lpfc_cpuhp_state);
15732 cpuhp_failure:
15733 	fc_release_transport(lpfc_transport_template);
15734 	fc_release_transport(lpfc_vport_transport_template);
15735 unregister:
15736 	misc_deregister(&lpfc_mgmt_dev);
15737 
15738 	return error;
15739 }
15740 
15741 void lpfc_dmp_dbg(struct lpfc_hba *phba)
15742 {
15743 	unsigned int start_idx;
15744 	unsigned int dbg_cnt;
15745 	unsigned int temp_idx;
15746 	int i;
15747 	int j = 0;
15748 	unsigned long rem_nsec;
15749 
15750 	if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0)
15751 		return;
15752 
15753 	start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ;
15754 	dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt);
15755 	if (!dbg_cnt)
15756 		goto out;
15757 	temp_idx = start_idx;
15758 	if (dbg_cnt >= DBG_LOG_SZ) {
15759 		dbg_cnt = DBG_LOG_SZ;
15760 		temp_idx -= 1;
15761 	} else {
15762 		if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) {
15763 			temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ;
15764 		} else {
15765 			if (start_idx < dbg_cnt)
15766 				start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx);
15767 			else
15768 				start_idx -= dbg_cnt;
15769 		}
15770 	}
15771 	dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n",
15772 		 start_idx, temp_idx, dbg_cnt);
15773 
15774 	for (i = 0; i < dbg_cnt; i++) {
15775 		if ((start_idx + i) < DBG_LOG_SZ)
15776 			temp_idx = (start_idx + i) % DBG_LOG_SZ;
15777 		else
15778 			temp_idx = j++;
15779 		rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC);
15780 		dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s",
15781 			 temp_idx,
15782 			 (unsigned long)phba->dbg_log[temp_idx].t_ns,
15783 			 rem_nsec / 1000,
15784 			 phba->dbg_log[temp_idx].log);
15785 	}
15786 out:
15787 	atomic_set(&phba->dbg_log_cnt, 0);
15788 	atomic_set(&phba->dbg_log_dmping, 0);
15789 }
15790 
15791 __printf(2, 3)
15792 void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...)
15793 {
15794 	unsigned int idx;
15795 	va_list args;
15796 	int dbg_dmping = atomic_read(&phba->dbg_log_dmping);
15797 	struct va_format vaf;
15798 
15799 
15800 	va_start(args, fmt);
15801 	if (unlikely(dbg_dmping)) {
15802 		vaf.fmt = fmt;
15803 		vaf.va = &args;
15804 		dev_info(&phba->pcidev->dev, "%pV", &vaf);
15805 		va_end(args);
15806 		return;
15807 	}
15808 	idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) %
15809 		DBG_LOG_SZ;
15810 
15811 	atomic_inc(&phba->dbg_log_cnt);
15812 
15813 	vscnprintf(phba->dbg_log[idx].log,
15814 		   sizeof(phba->dbg_log[idx].log), fmt, args);
15815 	va_end(args);
15816 
15817 	phba->dbg_log[idx].t_ns = local_clock();
15818 }
15819 
15820 /**
15821  * lpfc_exit - lpfc module removal routine
15822  *
15823  * This routine is invoked when the lpfc module is removed from the kernel.
15824  * The special kernel macro module_exit() is used to indicate the role of
15825  * this routine to the kernel as lpfc module exit point.
15826  */
15827 static void __exit
15828 lpfc_exit(void)
15829 {
15830 	misc_deregister(&lpfc_mgmt_dev);
15831 	pci_unregister_driver(&lpfc_driver);
15832 	cpuhp_remove_multi_state(lpfc_cpuhp_state);
15833 	fc_release_transport(lpfc_transport_template);
15834 	fc_release_transport(lpfc_vport_transport_template);
15835 	idr_destroy(&lpfc_hba_index);
15836 }
15837 
15838 module_init(lpfc_init);
15839 module_exit(lpfc_exit);
15840 MODULE_LICENSE("GPL");
15841 MODULE_DESCRIPTION(LPFC_MODULE_DESC);
15842 MODULE_AUTHOR("Broadcom");
15843 MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
15844