1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * IBM Accelerator Family 'GenWQE'
4 *
5 * (C) Copyright IBM Corp. 2013
6 *
7 * Author: Frank Haverkamp <haver@linux.vnet.ibm.com>
8 * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
9 * Author: Michael Jung <mijung@gmx.net>
10 * Author: Michael Ruettger <michael@ibmra.de>
11 */
12
13 /*
14 * Module initialization and PCIe setup. Card health monitoring and
15 * recovery functionality. Character device creation and deletion are
16 * controlled from here.
17 */
18
19 #include <linux/types.h>
20 #include <linux/pci.h>
21 #include <linux/err.h>
22 #include <linux/string.h>
23 #include <linux/sched.h>
24 #include <linux/wait.h>
25 #include <linux/delay.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/module.h>
28 #include <linux/notifier.h>
29 #include <linux/device.h>
30 #include <linux/log2.h>
31
32 #include "card_base.h"
33 #include "card_ddcb.h"
34
35 MODULE_AUTHOR("Frank Haverkamp <haver@linux.vnet.ibm.com>");
36 MODULE_AUTHOR("Michael Ruettger <michael@ibmra.de>");
37 MODULE_AUTHOR("Joerg-Stephan Vogt <jsvogt@de.ibm.com>");
38 MODULE_AUTHOR("Michael Jung <mijung@gmx.net>");
39
40 MODULE_DESCRIPTION("GenWQE Card");
41 MODULE_VERSION(DRV_VERSION);
42 MODULE_LICENSE("GPL");
43
44 static char genwqe_driver_name[] = GENWQE_DEVNAME;
45
46 static struct dentry *debugfs_genwqe;
47 static struct genwqe_dev *genwqe_devices[GENWQE_CARD_NO_MAX];
48
49 /* PCI structure for identifying device by PCI vendor and device ID */
50 static const struct pci_device_id genwqe_device_table[] = {
51 { .vendor = PCI_VENDOR_ID_IBM,
52 .device = PCI_DEVICE_GENWQE,
53 .subvendor = PCI_SUBVENDOR_ID_IBM,
54 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5,
55 .class = (PCI_CLASSCODE_GENWQE5 << 8),
56 .class_mask = ~0,
57 .driver_data = 0 },
58
59 /* Initial SR-IOV bring-up image */
60 { .vendor = PCI_VENDOR_ID_IBM,
61 .device = PCI_DEVICE_GENWQE,
62 .subvendor = PCI_SUBVENDOR_ID_IBM_SRIOV,
63 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5_SRIOV,
64 .class = (PCI_CLASSCODE_GENWQE5_SRIOV << 8),
65 .class_mask = ~0,
66 .driver_data = 0 },
67
68 { .vendor = PCI_VENDOR_ID_IBM, /* VF Vendor ID */
69 .device = 0x0000, /* VF Device ID */
70 .subvendor = PCI_SUBVENDOR_ID_IBM_SRIOV,
71 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5_SRIOV,
72 .class = (PCI_CLASSCODE_GENWQE5_SRIOV << 8),
73 .class_mask = ~0,
74 .driver_data = 0 },
75
76 /* Fixed up image */
77 { .vendor = PCI_VENDOR_ID_IBM,
78 .device = PCI_DEVICE_GENWQE,
79 .subvendor = PCI_SUBVENDOR_ID_IBM_SRIOV,
80 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5,
81 .class = (PCI_CLASSCODE_GENWQE5_SRIOV << 8),
82 .class_mask = ~0,
83 .driver_data = 0 },
84
85 { .vendor = PCI_VENDOR_ID_IBM, /* VF Vendor ID */
86 .device = 0x0000, /* VF Device ID */
87 .subvendor = PCI_SUBVENDOR_ID_IBM_SRIOV,
88 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5,
89 .class = (PCI_CLASSCODE_GENWQE5_SRIOV << 8),
90 .class_mask = ~0,
91 .driver_data = 0 },
92
93 /* Even one more ... */
94 { .vendor = PCI_VENDOR_ID_IBM,
95 .device = PCI_DEVICE_GENWQE,
96 .subvendor = PCI_SUBVENDOR_ID_IBM,
97 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5_NEW,
98 .class = (PCI_CLASSCODE_GENWQE5 << 8),
99 .class_mask = ~0,
100 .driver_data = 0 },
101
102 { 0, } /* 0 terminated list. */
103 };
104
105 MODULE_DEVICE_TABLE(pci, genwqe_device_table);
106
107 /**
108 * genwqe_devnode() - Set default access mode for genwqe devices.
109 * @dev: Pointer to device (unused)
110 * @mode: Carrier to pass-back given mode (permissions)
111 *
112 * Default mode should be rw for everybody. Do not change default
113 * device name.
114 */
genwqe_devnode(const struct device * dev,umode_t * mode)115 static char *genwqe_devnode(const struct device *dev, umode_t *mode)
116 {
117 if (mode)
118 *mode = 0666;
119 return NULL;
120 }
121
122 static const struct class class_genwqe = {
123 .name = GENWQE_DEVNAME,
124 .devnode = genwqe_devnode,
125 };
126
127 /**
128 * genwqe_dev_alloc() - Create and prepare a new card descriptor
129 *
130 * Return: Pointer to card descriptor, or ERR_PTR(err) on error
131 */
genwqe_dev_alloc(void)132 static struct genwqe_dev *genwqe_dev_alloc(void)
133 {
134 unsigned int i = 0, j;
135 struct genwqe_dev *cd;
136
137 for (i = 0; i < GENWQE_CARD_NO_MAX; i++) {
138 if (genwqe_devices[i] == NULL)
139 break;
140 }
141 if (i >= GENWQE_CARD_NO_MAX)
142 return ERR_PTR(-ENODEV);
143
144 cd = kzalloc_obj(struct genwqe_dev);
145 if (!cd)
146 return ERR_PTR(-ENOMEM);
147
148 cd->card_idx = i;
149 cd->class_genwqe = &class_genwqe;
150 cd->debugfs_genwqe = debugfs_genwqe;
151
152 /*
153 * This comes from kernel config option and can be overritten via
154 * debugfs.
155 */
156 cd->use_platform_recovery = CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY;
157
158 init_waitqueue_head(&cd->queue_waitq);
159
160 spin_lock_init(&cd->file_lock);
161 INIT_LIST_HEAD(&cd->file_list);
162
163 cd->card_state = GENWQE_CARD_UNUSED;
164 spin_lock_init(&cd->print_lock);
165
166 cd->ddcb_software_timeout = GENWQE_DDCB_SOFTWARE_TIMEOUT;
167 cd->kill_timeout = GENWQE_KILL_TIMEOUT;
168
169 for (j = 0; j < GENWQE_MAX_VFS; j++)
170 cd->vf_jobtimeout_msec[j] = GENWQE_VF_JOBTIMEOUT_MSEC;
171
172 genwqe_devices[i] = cd;
173 return cd;
174 }
175
genwqe_dev_free(struct genwqe_dev * cd)176 static void genwqe_dev_free(struct genwqe_dev *cd)
177 {
178 if (!cd)
179 return;
180
181 genwqe_devices[cd->card_idx] = NULL;
182 kfree(cd);
183 }
184
185 /**
186 * genwqe_bus_reset() - Card recovery
187 * @cd: GenWQE device information
188 *
189 * pci_reset_function() will recover the device and ensure that the
190 * registers are accessible again when it completes with success. If
191 * not, the card will stay dead and registers will be unaccessible
192 * still.
193 */
genwqe_bus_reset(struct genwqe_dev * cd)194 static int genwqe_bus_reset(struct genwqe_dev *cd)
195 {
196 int rc = 0;
197 struct pci_dev *pci_dev = cd->pci_dev;
198 void __iomem *mmio;
199
200 if (cd->err_inject & GENWQE_INJECT_BUS_RESET_FAILURE)
201 return -EIO;
202
203 mmio = cd->mmio;
204 cd->mmio = NULL;
205 pci_iounmap(pci_dev, mmio);
206
207 pci_release_mem_regions(pci_dev);
208
209 /*
210 * Firmware/BIOS might change memory mapping during bus reset.
211 * Settings like enable bus-mastering, ... are backuped and
212 * restored by the pci_reset_function().
213 */
214 dev_dbg(&pci_dev->dev, "[%s] pci_reset function ...\n", __func__);
215 rc = pci_reset_function(pci_dev);
216 if (rc) {
217 dev_err(&pci_dev->dev,
218 "[%s] err: failed reset func (rc %d)\n", __func__, rc);
219 return rc;
220 }
221 dev_dbg(&pci_dev->dev, "[%s] done with rc=%d\n", __func__, rc);
222
223 /*
224 * Here is the right spot to clear the register read
225 * failure. pci_bus_reset() does this job in real systems.
226 */
227 cd->err_inject &= ~(GENWQE_INJECT_HARDWARE_FAILURE |
228 GENWQE_INJECT_GFIR_FATAL |
229 GENWQE_INJECT_GFIR_INFO);
230
231 rc = pci_request_mem_regions(pci_dev, genwqe_driver_name);
232 if (rc) {
233 dev_err(&pci_dev->dev,
234 "[%s] err: request bars failed (%d)\n", __func__, rc);
235 return -EIO;
236 }
237
238 cd->mmio = pci_iomap(pci_dev, 0, 0);
239 if (cd->mmio == NULL) {
240 dev_err(&pci_dev->dev,
241 "[%s] err: mapping BAR0 failed\n", __func__);
242 return -ENOMEM;
243 }
244 return 0;
245 }
246
247 /*
248 * Hardware circumvention section. Certain bitstreams in our test-lab
249 * had different kinds of problems. Here is where we adjust those
250 * bitstreams to function will with this version of our device driver.
251 *
252 * Thise circumventions are applied to the physical function only.
253 * The magical numbers below are identifying development/manufacturing
254 * versions of the bitstream used on the card.
255 *
256 * Turn off error reporting for old/manufacturing images.
257 */
258
genwqe_need_err_masking(struct genwqe_dev * cd)259 bool genwqe_need_err_masking(struct genwqe_dev *cd)
260 {
261 return (cd->slu_unitcfg & 0xFFFF0ull) < 0x32170ull;
262 }
263
genwqe_tweak_hardware(struct genwqe_dev * cd)264 static void genwqe_tweak_hardware(struct genwqe_dev *cd)
265 {
266 struct pci_dev *pci_dev = cd->pci_dev;
267
268 /* Mask FIRs for development images */
269 if (((cd->slu_unitcfg & 0xFFFF0ull) >= 0x32000ull) &&
270 ((cd->slu_unitcfg & 0xFFFF0ull) <= 0x33250ull)) {
271 dev_warn(&pci_dev->dev,
272 "FIRs masked due to bitstream %016llx.%016llx\n",
273 cd->slu_unitcfg, cd->app_unitcfg);
274
275 __genwqe_writeq(cd, IO_APP_SEC_LEM_DEBUG_OVR,
276 0xFFFFFFFFFFFFFFFFull);
277
278 __genwqe_writeq(cd, IO_APP_ERR_ACT_MASK,
279 0x0000000000000000ull);
280 }
281 }
282
283 /**
284 * genwqe_recovery_on_fatal_gfir_required() - Version depended actions
285 * @cd: GenWQE device information
286 *
287 * Bitstreams older than 2013-02-17 have a bug where fatal GFIRs must
288 * be ignored. This is e.g. true for the bitstream we gave to the card
289 * manufacturer, but also for some old bitstreams we released to our
290 * test-lab.
291 */
genwqe_recovery_on_fatal_gfir_required(struct genwqe_dev * cd)292 int genwqe_recovery_on_fatal_gfir_required(struct genwqe_dev *cd)
293 {
294 return (cd->slu_unitcfg & 0xFFFF0ull) >= 0x32170ull;
295 }
296
genwqe_flash_readback_fails(struct genwqe_dev * cd)297 int genwqe_flash_readback_fails(struct genwqe_dev *cd)
298 {
299 return (cd->slu_unitcfg & 0xFFFF0ull) < 0x32170ull;
300 }
301
302 /**
303 * genwqe_T_psec() - Calculate PF/VF timeout register content
304 * @cd: GenWQE device information
305 *
306 * Note: From a design perspective it turned out to be a bad idea to
307 * use codes here to specifiy the frequency/speed values. An old
308 * driver cannot understand new codes and is therefore always a
309 * problem. Better is to measure out the value or put the
310 * speed/frequency directly into a register which is always a valid
311 * value for old as well as for new software.
312 */
313 /* T = 1/f */
genwqe_T_psec(struct genwqe_dev * cd)314 static int genwqe_T_psec(struct genwqe_dev *cd)
315 {
316 u16 speed; /* 1/f -> 250, 200, 166, 175 */
317 static const int T[] = { 4000, 5000, 6000, 5714 };
318
319 speed = (u16)((cd->slu_unitcfg >> 28) & 0x0full);
320 if (speed >= ARRAY_SIZE(T))
321 return -1; /* illegal value */
322
323 return T[speed];
324 }
325
326 /**
327 * genwqe_setup_pf_jtimer() - Setup PF hardware timeouts for DDCB execution
328 * @cd: GenWQE device information
329 *
330 * Do this _after_ card_reset() is called. Otherwise the values will
331 * vanish. The settings need to be done when the queues are inactive.
332 *
333 * The max. timeout value is 2^(10+x) * T (6ns for 166MHz) * 15/16.
334 * The min. timeout value is 2^(10+x) * T (6ns for 166MHz) * 14/16.
335 */
genwqe_setup_pf_jtimer(struct genwqe_dev * cd)336 static bool genwqe_setup_pf_jtimer(struct genwqe_dev *cd)
337 {
338 u32 T = genwqe_T_psec(cd);
339 u64 x;
340
341 if (GENWQE_PF_JOBTIMEOUT_MSEC == 0)
342 return false;
343
344 /* PF: large value needed, flash update 2sec per block */
345 x = ilog2(GENWQE_PF_JOBTIMEOUT_MSEC *
346 16000000000uL/(T * 15)) - 10;
347
348 genwqe_write_vreg(cd, IO_SLC_VF_APPJOB_TIMEOUT,
349 0xff00 | (x & 0xff), 0);
350 return true;
351 }
352
353 /**
354 * genwqe_setup_vf_jtimer() - Setup VF hardware timeouts for DDCB execution
355 * @cd: GenWQE device information
356 */
genwqe_setup_vf_jtimer(struct genwqe_dev * cd)357 static bool genwqe_setup_vf_jtimer(struct genwqe_dev *cd)
358 {
359 struct pci_dev *pci_dev = cd->pci_dev;
360 unsigned int vf;
361 u32 T = genwqe_T_psec(cd);
362 u64 x;
363 int totalvfs;
364
365 totalvfs = pci_sriov_get_totalvfs(pci_dev);
366 if (totalvfs <= 0)
367 return false;
368
369 for (vf = 0; vf < totalvfs; vf++) {
370
371 if (cd->vf_jobtimeout_msec[vf] == 0)
372 continue;
373
374 x = ilog2(cd->vf_jobtimeout_msec[vf] *
375 16000000000uL/(T * 15)) - 10;
376
377 genwqe_write_vreg(cd, IO_SLC_VF_APPJOB_TIMEOUT,
378 0xff00 | (x & 0xff), vf + 1);
379 }
380 return true;
381 }
382
genwqe_ffdc_buffs_alloc(struct genwqe_dev * cd)383 static int genwqe_ffdc_buffs_alloc(struct genwqe_dev *cd)
384 {
385 unsigned int type, e = 0;
386
387 for (type = 0; type < GENWQE_DBG_UNITS; type++) {
388 switch (type) {
389 case GENWQE_DBG_UNIT0:
390 e = genwqe_ffdc_buff_size(cd, 0);
391 break;
392 case GENWQE_DBG_UNIT1:
393 e = genwqe_ffdc_buff_size(cd, 1);
394 break;
395 case GENWQE_DBG_UNIT2:
396 e = genwqe_ffdc_buff_size(cd, 2);
397 break;
398 case GENWQE_DBG_REGS:
399 e = GENWQE_FFDC_REGS;
400 break;
401 }
402
403 /* currently support only the debug units mentioned here */
404 cd->ffdc[type].entries = e;
405 cd->ffdc[type].regs =
406 kmalloc_objs(struct genwqe_reg, e);
407 /*
408 * regs == NULL is ok, the using code treats this as no regs,
409 * Printing warning is ok in this case.
410 */
411 }
412 return 0;
413 }
414
genwqe_ffdc_buffs_free(struct genwqe_dev * cd)415 static void genwqe_ffdc_buffs_free(struct genwqe_dev *cd)
416 {
417 unsigned int type;
418
419 for (type = 0; type < GENWQE_DBG_UNITS; type++) {
420 kfree(cd->ffdc[type].regs);
421 cd->ffdc[type].regs = NULL;
422 }
423 }
424
genwqe_read_ids(struct genwqe_dev * cd)425 static int genwqe_read_ids(struct genwqe_dev *cd)
426 {
427 int err = 0;
428 int slu_id;
429 struct pci_dev *pci_dev = cd->pci_dev;
430
431 cd->slu_unitcfg = __genwqe_readq(cd, IO_SLU_UNITCFG);
432 if (cd->slu_unitcfg == IO_ILLEGAL_VALUE) {
433 dev_err(&pci_dev->dev,
434 "err: SLUID=%016llx\n", cd->slu_unitcfg);
435 err = -EIO;
436 goto out_err;
437 }
438
439 slu_id = genwqe_get_slu_id(cd);
440 if (slu_id < GENWQE_SLU_ARCH_REQ || slu_id == 0xff) {
441 dev_err(&pci_dev->dev,
442 "err: incompatible SLU Architecture %u\n", slu_id);
443 err = -ENOENT;
444 goto out_err;
445 }
446
447 cd->app_unitcfg = __genwqe_readq(cd, IO_APP_UNITCFG);
448 if (cd->app_unitcfg == IO_ILLEGAL_VALUE) {
449 dev_err(&pci_dev->dev,
450 "err: APPID=%016llx\n", cd->app_unitcfg);
451 err = -EIO;
452 goto out_err;
453 }
454 genwqe_read_app_id(cd, cd->app_name, sizeof(cd->app_name));
455
456 /*
457 * Is access to all registers possible? If we are a VF the
458 * answer is obvious. If we run fully virtualized, we need to
459 * check if we can access all registers. If we do not have
460 * full access we will cause an UR and some informational FIRs
461 * in the PF, but that should not harm.
462 */
463 if (pci_dev->is_virtfn)
464 cd->is_privileged = 0;
465 else
466 cd->is_privileged = (__genwqe_readq(cd, IO_SLU_BITSTREAM)
467 != IO_ILLEGAL_VALUE);
468
469 out_err:
470 return err;
471 }
472
genwqe_start(struct genwqe_dev * cd)473 static int genwqe_start(struct genwqe_dev *cd)
474 {
475 int err;
476 struct pci_dev *pci_dev = cd->pci_dev;
477
478 err = genwqe_read_ids(cd);
479 if (err)
480 return err;
481
482 if (genwqe_is_privileged(cd)) {
483 /* do this after the tweaks. alloc fail is acceptable */
484 genwqe_ffdc_buffs_alloc(cd);
485 genwqe_stop_traps(cd);
486
487 /* Collect registers e.g. FIRs, UNITIDs, traces ... */
488 genwqe_read_ffdc_regs(cd, cd->ffdc[GENWQE_DBG_REGS].regs,
489 cd->ffdc[GENWQE_DBG_REGS].entries, 0);
490
491 genwqe_ffdc_buff_read(cd, GENWQE_DBG_UNIT0,
492 cd->ffdc[GENWQE_DBG_UNIT0].regs,
493 cd->ffdc[GENWQE_DBG_UNIT0].entries);
494
495 genwqe_ffdc_buff_read(cd, GENWQE_DBG_UNIT1,
496 cd->ffdc[GENWQE_DBG_UNIT1].regs,
497 cd->ffdc[GENWQE_DBG_UNIT1].entries);
498
499 genwqe_ffdc_buff_read(cd, GENWQE_DBG_UNIT2,
500 cd->ffdc[GENWQE_DBG_UNIT2].regs,
501 cd->ffdc[GENWQE_DBG_UNIT2].entries);
502
503 genwqe_start_traps(cd);
504
505 if (cd->card_state == GENWQE_CARD_FATAL_ERROR) {
506 dev_warn(&pci_dev->dev,
507 "[%s] chip reload/recovery!\n", __func__);
508
509 /*
510 * Stealth Mode: Reload chip on either hot
511 * reset or PERST.
512 */
513 cd->softreset = 0x7Cull;
514 __genwqe_writeq(cd, IO_SLC_CFGREG_SOFTRESET,
515 cd->softreset);
516
517 err = genwqe_bus_reset(cd);
518 if (err != 0) {
519 dev_err(&pci_dev->dev,
520 "[%s] err: bus reset failed!\n",
521 __func__);
522 goto out;
523 }
524
525 /*
526 * Re-read the IDs because
527 * it could happen that the bitstream load
528 * failed!
529 */
530 err = genwqe_read_ids(cd);
531 if (err)
532 goto out;
533 }
534 }
535
536 err = genwqe_setup_service_layer(cd); /* does a reset to the card */
537 if (err != 0) {
538 dev_err(&pci_dev->dev,
539 "[%s] err: could not setup servicelayer!\n", __func__);
540 err = -ENODEV;
541 goto out;
542 }
543
544 if (genwqe_is_privileged(cd)) { /* code is running _after_ reset */
545 genwqe_tweak_hardware(cd);
546
547 genwqe_setup_pf_jtimer(cd);
548 genwqe_setup_vf_jtimer(cd);
549 }
550
551 err = genwqe_device_create(cd);
552 if (err < 0) {
553 dev_err(&pci_dev->dev,
554 "err: chdev init failed! (err=%d)\n", err);
555 goto out_release_service_layer;
556 }
557 return 0;
558
559 out_release_service_layer:
560 genwqe_release_service_layer(cd);
561 out:
562 if (genwqe_is_privileged(cd))
563 genwqe_ffdc_buffs_free(cd);
564 return -EIO;
565 }
566
567 /**
568 * genwqe_stop() - Stop card operation
569 * @cd: GenWQE device information
570 *
571 * Recovery notes:
572 * As long as genwqe_thread runs we might access registers during
573 * error data capture. Same is with the genwqe_health_thread.
574 * When genwqe_bus_reset() fails this function might called two times:
575 * first by the genwqe_health_thread() and later by genwqe_remove() to
576 * unbind the device. We must be able to survive that.
577 *
578 * This function must be robust enough to be called twice.
579 */
genwqe_stop(struct genwqe_dev * cd)580 static int genwqe_stop(struct genwqe_dev *cd)
581 {
582 genwqe_finish_queue(cd); /* no register access */
583 genwqe_device_remove(cd); /* device removed, procs killed */
584 genwqe_release_service_layer(cd); /* here genwqe_thread is stopped */
585
586 if (genwqe_is_privileged(cd)) {
587 pci_disable_sriov(cd->pci_dev); /* access pci config space */
588 genwqe_ffdc_buffs_free(cd);
589 }
590
591 return 0;
592 }
593
594 /**
595 * genwqe_recover_card() - Try to recover the card if it is possible
596 * @cd: GenWQE device information
597 * @fatal_err: Indicate whether to attempt soft reset
598 *
599 * If fatal_err is set no register access is possible anymore. It is
600 * likely that genwqe_start fails in that situation. Proper error
601 * handling is required in this case.
602 *
603 * genwqe_bus_reset() will cause the pci code to call genwqe_remove()
604 * and later genwqe_probe() for all virtual functions.
605 */
genwqe_recover_card(struct genwqe_dev * cd,int fatal_err)606 static int genwqe_recover_card(struct genwqe_dev *cd, int fatal_err)
607 {
608 int rc;
609 struct pci_dev *pci_dev = cd->pci_dev;
610
611 genwqe_stop(cd);
612
613 /*
614 * Make sure chip is not reloaded to maintain FFDC. Write SLU
615 * Reset Register, CPLDReset field to 0.
616 */
617 if (!fatal_err) {
618 cd->softreset = 0x70ull;
619 __genwqe_writeq(cd, IO_SLC_CFGREG_SOFTRESET, cd->softreset);
620 }
621
622 rc = genwqe_bus_reset(cd);
623 if (rc != 0) {
624 dev_err(&pci_dev->dev,
625 "[%s] err: card recovery impossible!\n", __func__);
626 return rc;
627 }
628
629 rc = genwqe_start(cd);
630 if (rc < 0) {
631 dev_err(&pci_dev->dev,
632 "[%s] err: failed to launch device!\n", __func__);
633 return rc;
634 }
635 return 0;
636 }
637
genwqe_health_check_cond(struct genwqe_dev * cd,u64 * gfir)638 static int genwqe_health_check_cond(struct genwqe_dev *cd, u64 *gfir)
639 {
640 *gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR);
641 return (*gfir & GFIR_ERR_TRIGGER) &&
642 genwqe_recovery_on_fatal_gfir_required(cd);
643 }
644
645 /**
646 * genwqe_fir_checking() - Check the fault isolation registers of the card
647 * @cd: GenWQE device information
648 *
649 * If this code works ok, can be tried out with help of the genwqe_poke tool:
650 * sudo ./tools/genwqe_poke 0x8 0xfefefefefef
651 *
652 * Now the relevant FIRs/sFIRs should be printed out and the driver should
653 * invoke recovery (devices are removed and readded).
654 */
genwqe_fir_checking(struct genwqe_dev * cd)655 static u64 genwqe_fir_checking(struct genwqe_dev *cd)
656 {
657 int j, iterations = 0;
658 u64 mask, fir, fec, uid, gfir, gfir_masked, sfir, sfec;
659 u32 fir_addr, fir_clr_addr, fec_addr, sfir_addr, sfec_addr;
660 struct pci_dev *pci_dev = cd->pci_dev;
661
662 healthMonitor:
663 iterations++;
664 if (iterations > 16) {
665 dev_err(&pci_dev->dev, "* exit looping after %d times\n",
666 iterations);
667 goto fatal_error;
668 }
669
670 gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR);
671 if (gfir != 0x0)
672 dev_err(&pci_dev->dev, "* 0x%08x 0x%016llx\n",
673 IO_SLC_CFGREG_GFIR, gfir);
674 if (gfir == IO_ILLEGAL_VALUE)
675 goto fatal_error;
676
677 /*
678 * Avoid printing when to GFIR bit is on prevents contignous
679 * printout e.g. for the following bug:
680 * FIR set without a 2ndary FIR/FIR cannot be cleared
681 * Comment out the following if to get the prints:
682 */
683 if (gfir == 0)
684 return 0;
685
686 gfir_masked = gfir & GFIR_ERR_TRIGGER; /* fatal errors */
687
688 for (uid = 0; uid < GENWQE_MAX_UNITS; uid++) { /* 0..2 in zEDC */
689
690 /* read the primary FIR (pfir) */
691 fir_addr = (uid << 24) + 0x08;
692 fir = __genwqe_readq(cd, fir_addr);
693 if (fir == 0x0)
694 continue; /* no error in this unit */
695
696 dev_err(&pci_dev->dev, "* 0x%08x 0x%016llx\n", fir_addr, fir);
697 if (fir == IO_ILLEGAL_VALUE)
698 goto fatal_error;
699
700 /* read primary FEC */
701 fec_addr = (uid << 24) + 0x18;
702 fec = __genwqe_readq(cd, fec_addr);
703
704 dev_err(&pci_dev->dev, "* 0x%08x 0x%016llx\n", fec_addr, fec);
705 if (fec == IO_ILLEGAL_VALUE)
706 goto fatal_error;
707
708 for (j = 0, mask = 1ULL; j < 64; j++, mask <<= 1) {
709
710 /* secondary fir empty, skip it */
711 if ((fir & mask) == 0x0)
712 continue;
713
714 sfir_addr = (uid << 24) + 0x100 + 0x08 * j;
715 sfir = __genwqe_readq(cd, sfir_addr);
716
717 if (sfir == IO_ILLEGAL_VALUE)
718 goto fatal_error;
719 dev_err(&pci_dev->dev,
720 "* 0x%08x 0x%016llx\n", sfir_addr, sfir);
721
722 sfec_addr = (uid << 24) + 0x300 + 0x08 * j;
723 sfec = __genwqe_readq(cd, sfec_addr);
724
725 if (sfec == IO_ILLEGAL_VALUE)
726 goto fatal_error;
727 dev_err(&pci_dev->dev,
728 "* 0x%08x 0x%016llx\n", sfec_addr, sfec);
729
730 gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR);
731 if (gfir == IO_ILLEGAL_VALUE)
732 goto fatal_error;
733
734 /* gfir turned on during routine! get out and
735 start over. */
736 if ((gfir_masked == 0x0) &&
737 (gfir & GFIR_ERR_TRIGGER)) {
738 goto healthMonitor;
739 }
740
741 /* do not clear if we entered with a fatal gfir */
742 if (gfir_masked == 0x0) {
743
744 /* NEW clear by mask the logged bits */
745 sfir_addr = (uid << 24) + 0x100 + 0x08 * j;
746 __genwqe_writeq(cd, sfir_addr, sfir);
747
748 dev_dbg(&pci_dev->dev,
749 "[HM] Clearing 2ndary FIR 0x%08x with 0x%016llx\n",
750 sfir_addr, sfir);
751
752 /*
753 * note, these cannot be error-Firs
754 * since gfir_masked is 0 after sfir
755 * was read. Also, it is safe to do
756 * this write if sfir=0. Still need to
757 * clear the primary. This just means
758 * there is no secondary FIR.
759 */
760
761 /* clear by mask the logged bit. */
762 fir_clr_addr = (uid << 24) + 0x10;
763 __genwqe_writeq(cd, fir_clr_addr, mask);
764
765 dev_dbg(&pci_dev->dev,
766 "[HM] Clearing primary FIR 0x%08x with 0x%016llx\n",
767 fir_clr_addr, mask);
768 }
769 }
770 }
771 gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR);
772 if (gfir == IO_ILLEGAL_VALUE)
773 goto fatal_error;
774
775 if ((gfir_masked == 0x0) && (gfir & GFIR_ERR_TRIGGER)) {
776 /*
777 * Check once more that it didn't go on after all the
778 * FIRS were cleared.
779 */
780 dev_dbg(&pci_dev->dev, "ACK! Another FIR! Recursing %d!\n",
781 iterations);
782 goto healthMonitor;
783 }
784 return gfir_masked;
785
786 fatal_error:
787 return IO_ILLEGAL_VALUE;
788 }
789
790 /**
791 * genwqe_pci_fundamental_reset() - trigger a PCIe fundamental reset on the slot
792 * @pci_dev: PCI device information struct
793 *
794 * Note: pci_set_pcie_reset_state() is not implemented on all archs, so this
795 * reset method will not work in all cases.
796 *
797 * Return: 0 on success or error code from pci_set_pcie_reset_state()
798 */
genwqe_pci_fundamental_reset(struct pci_dev * pci_dev)799 static int genwqe_pci_fundamental_reset(struct pci_dev *pci_dev)
800 {
801 int rc;
802
803 /*
804 * lock pci config space access from userspace,
805 * save state and issue PCIe fundamental reset
806 */
807 pci_cfg_access_lock(pci_dev);
808 pci_save_state(pci_dev);
809 rc = pci_set_pcie_reset_state(pci_dev, pcie_warm_reset);
810 if (!rc) {
811 /* keep PCIe reset asserted for 250ms */
812 msleep(250);
813 pci_set_pcie_reset_state(pci_dev, pcie_deassert_reset);
814 /* Wait for 2s to reload flash and train the link */
815 msleep(2000);
816 }
817 pci_restore_state(pci_dev);
818 pci_cfg_access_unlock(pci_dev);
819 return rc;
820 }
821
822
genwqe_platform_recovery(struct genwqe_dev * cd)823 static int genwqe_platform_recovery(struct genwqe_dev *cd)
824 {
825 struct pci_dev *pci_dev = cd->pci_dev;
826 int rc;
827
828 dev_info(&pci_dev->dev,
829 "[%s] resetting card for error recovery\n", __func__);
830
831 /* Clear out error injection flags */
832 cd->err_inject &= ~(GENWQE_INJECT_HARDWARE_FAILURE |
833 GENWQE_INJECT_GFIR_FATAL |
834 GENWQE_INJECT_GFIR_INFO);
835
836 genwqe_stop(cd);
837
838 /* Try recoverying the card with fundamental reset */
839 rc = genwqe_pci_fundamental_reset(pci_dev);
840 if (!rc) {
841 rc = genwqe_start(cd);
842 if (!rc)
843 dev_info(&pci_dev->dev,
844 "[%s] card recovered\n", __func__);
845 else
846 dev_err(&pci_dev->dev,
847 "[%s] err: cannot start card services! (err=%d)\n",
848 __func__, rc);
849 } else {
850 dev_err(&pci_dev->dev,
851 "[%s] card reset failed\n", __func__);
852 }
853
854 return rc;
855 }
856
857 /**
858 * genwqe_reload_bistream() - reload card bitstream
859 * @cd: GenWQE device information
860 *
861 * Set the appropriate register and call fundamental reset to reaload the card
862 * bitstream.
863 *
864 * Return: 0 on success, error code otherwise
865 */
genwqe_reload_bistream(struct genwqe_dev * cd)866 static int genwqe_reload_bistream(struct genwqe_dev *cd)
867 {
868 struct pci_dev *pci_dev = cd->pci_dev;
869 int rc;
870
871 dev_info(&pci_dev->dev,
872 "[%s] resetting card for bitstream reload\n",
873 __func__);
874
875 genwqe_stop(cd);
876
877 /*
878 * Cause a CPLD reprogram with the 'next_bitstream'
879 * partition on PCIe hot or fundamental reset
880 */
881 __genwqe_writeq(cd, IO_SLC_CFGREG_SOFTRESET,
882 (cd->softreset & 0xcull) | 0x70ull);
883
884 rc = genwqe_pci_fundamental_reset(pci_dev);
885 if (rc) {
886 /*
887 * A fundamental reset failure can be caused
888 * by lack of support on the arch, so we just
889 * log the error and try to start the card
890 * again.
891 */
892 dev_err(&pci_dev->dev,
893 "[%s] err: failed to reset card for bitstream reload\n",
894 __func__);
895 }
896
897 rc = genwqe_start(cd);
898 if (rc) {
899 dev_err(&pci_dev->dev,
900 "[%s] err: cannot start card services! (err=%d)\n",
901 __func__, rc);
902 return rc;
903 }
904 dev_info(&pci_dev->dev,
905 "[%s] card reloaded\n", __func__);
906 return 0;
907 }
908
909
910 /**
911 * genwqe_health_thread() - Health checking thread
912 * @data: GenWQE device information
913 *
914 * This thread is only started for the PF of the card.
915 *
916 * This thread monitors the health of the card. A critical situation
917 * is when we read registers which contain -1 (IO_ILLEGAL_VALUE). In
918 * this case we need to be recovered from outside. Writing to
919 * registers will very likely not work either.
920 *
921 * This thread must only exit if kthread_should_stop() becomes true.
922 *
923 * Condition for the health-thread to trigger:
924 * a) when a kthread_stop() request comes in or
925 * b) a critical GFIR occured
926 *
927 * Informational GFIRs are checked and potentially printed in
928 * GENWQE_HEALTH_CHECK_INTERVAL seconds.
929 */
genwqe_health_thread(void * data)930 static int genwqe_health_thread(void *data)
931 {
932 int rc, should_stop = 0;
933 struct genwqe_dev *cd = data;
934 struct pci_dev *pci_dev = cd->pci_dev;
935 u64 gfir, gfir_masked, slu_unitcfg, app_unitcfg;
936
937 health_thread_begin:
938 while (!kthread_should_stop()) {
939 rc = wait_event_interruptible_timeout(cd->health_waitq,
940 (genwqe_health_check_cond(cd, &gfir) ||
941 (should_stop = kthread_should_stop())),
942 GENWQE_HEALTH_CHECK_INTERVAL * HZ);
943
944 if (should_stop)
945 break;
946
947 if (gfir == IO_ILLEGAL_VALUE) {
948 dev_err(&pci_dev->dev,
949 "[%s] GFIR=%016llx\n", __func__, gfir);
950 goto fatal_error;
951 }
952
953 slu_unitcfg = __genwqe_readq(cd, IO_SLU_UNITCFG);
954 if (slu_unitcfg == IO_ILLEGAL_VALUE) {
955 dev_err(&pci_dev->dev,
956 "[%s] SLU_UNITCFG=%016llx\n",
957 __func__, slu_unitcfg);
958 goto fatal_error;
959 }
960
961 app_unitcfg = __genwqe_readq(cd, IO_APP_UNITCFG);
962 if (app_unitcfg == IO_ILLEGAL_VALUE) {
963 dev_err(&pci_dev->dev,
964 "[%s] APP_UNITCFG=%016llx\n",
965 __func__, app_unitcfg);
966 goto fatal_error;
967 }
968
969 gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR);
970 if (gfir == IO_ILLEGAL_VALUE) {
971 dev_err(&pci_dev->dev,
972 "[%s] %s: GFIR=%016llx\n", __func__,
973 (gfir & GFIR_ERR_TRIGGER) ? "err" : "info",
974 gfir);
975 goto fatal_error;
976 }
977
978 gfir_masked = genwqe_fir_checking(cd);
979 if (gfir_masked == IO_ILLEGAL_VALUE)
980 goto fatal_error;
981
982 /*
983 * GFIR ErrorTrigger bits set => reset the card!
984 * Never do this for old/manufacturing images!
985 */
986 if ((gfir_masked) && !cd->skip_recovery &&
987 genwqe_recovery_on_fatal_gfir_required(cd)) {
988
989 cd->card_state = GENWQE_CARD_FATAL_ERROR;
990
991 rc = genwqe_recover_card(cd, 0);
992 if (rc < 0) {
993 /* FIXME Card is unusable and needs unbind! */
994 goto fatal_error;
995 }
996 }
997
998 if (cd->card_state == GENWQE_CARD_RELOAD_BITSTREAM) {
999 /* Userspace requested card bitstream reload */
1000 rc = genwqe_reload_bistream(cd);
1001 if (rc)
1002 goto fatal_error;
1003 }
1004
1005 cd->last_gfir = gfir;
1006 cond_resched();
1007 }
1008
1009 return 0;
1010
1011 fatal_error:
1012 if (cd->use_platform_recovery) {
1013 /*
1014 * Since we use raw accessors, EEH errors won't be detected
1015 * by the platform until we do a non-raw MMIO or config space
1016 * read
1017 */
1018 readq(cd->mmio + IO_SLC_CFGREG_GFIR);
1019
1020 /* We do nothing if the card is going over PCI recovery */
1021 if (pci_channel_offline(pci_dev))
1022 return -EIO;
1023
1024 /*
1025 * If it's supported by the platform, we try a fundamental reset
1026 * to recover from a fatal error. Otherwise, we continue to wait
1027 * for an external recovery procedure to take care of it.
1028 */
1029 rc = genwqe_platform_recovery(cd);
1030 if (!rc)
1031 goto health_thread_begin;
1032 }
1033
1034 dev_err(&pci_dev->dev,
1035 "[%s] card unusable. Please trigger unbind!\n", __func__);
1036
1037 /* Bring down logical devices to inform user space via udev remove. */
1038 cd->card_state = GENWQE_CARD_FATAL_ERROR;
1039 genwqe_stop(cd);
1040
1041 /* genwqe_bus_reset failed(). Now wait for genwqe_remove(). */
1042 while (!kthread_should_stop())
1043 cond_resched();
1044
1045 return -EIO;
1046 }
1047
genwqe_health_check_start(struct genwqe_dev * cd)1048 static int genwqe_health_check_start(struct genwqe_dev *cd)
1049 {
1050 int rc;
1051
1052 if (GENWQE_HEALTH_CHECK_INTERVAL <= 0)
1053 return 0; /* valid for disabling the service */
1054
1055 /* moved before request_irq() */
1056 /* init_waitqueue_head(&cd->health_waitq); */
1057
1058 cd->health_thread = kthread_run(genwqe_health_thread, cd,
1059 GENWQE_DEVNAME "%d_health",
1060 cd->card_idx);
1061 if (IS_ERR(cd->health_thread)) {
1062 rc = PTR_ERR(cd->health_thread);
1063 cd->health_thread = NULL;
1064 return rc;
1065 }
1066 return 0;
1067 }
1068
genwqe_health_thread_running(struct genwqe_dev * cd)1069 static int genwqe_health_thread_running(struct genwqe_dev *cd)
1070 {
1071 return cd->health_thread != NULL;
1072 }
1073
genwqe_health_check_stop(struct genwqe_dev * cd)1074 static int genwqe_health_check_stop(struct genwqe_dev *cd)
1075 {
1076 if (!genwqe_health_thread_running(cd))
1077 return -EIO;
1078
1079 kthread_stop(cd->health_thread);
1080 cd->health_thread = NULL;
1081 return 0;
1082 }
1083
1084 /**
1085 * genwqe_pci_setup() - Allocate PCIe related resources for our card
1086 * @cd: GenWQE device information
1087 */
genwqe_pci_setup(struct genwqe_dev * cd)1088 static int genwqe_pci_setup(struct genwqe_dev *cd)
1089 {
1090 int err;
1091 struct pci_dev *pci_dev = cd->pci_dev;
1092
1093 err = pci_enable_device_mem(pci_dev);
1094 if (err) {
1095 dev_err(&pci_dev->dev,
1096 "err: failed to enable pci memory (err=%d)\n", err);
1097 goto err_out;
1098 }
1099
1100 /* Reserve PCI I/O and memory resources */
1101 err = pci_request_mem_regions(pci_dev, genwqe_driver_name);
1102 if (err) {
1103 dev_err(&pci_dev->dev,
1104 "[%s] err: request bars failed (%d)\n", __func__, err);
1105 err = -EIO;
1106 goto err_disable_device;
1107 }
1108
1109 /* check for 64-bit DMA address supported (DAC) */
1110 /* check for 32-bit DMA address supported (SAC) */
1111 if (dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(64)) &&
1112 dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32))) {
1113 dev_err(&pci_dev->dev,
1114 "err: neither DMA32 nor DMA64 supported\n");
1115 err = -EIO;
1116 goto out_release_resources;
1117 }
1118
1119 pci_set_master(pci_dev);
1120
1121 /* EEH recovery requires PCIe fundamental reset */
1122 pci_dev->needs_freset = 1;
1123
1124 /* request complete BAR-0 space (length = 0) */
1125 cd->mmio_len = pci_resource_len(pci_dev, 0);
1126 cd->mmio = pci_iomap(pci_dev, 0, 0);
1127 if (cd->mmio == NULL) {
1128 dev_err(&pci_dev->dev,
1129 "[%s] err: mapping BAR0 failed\n", __func__);
1130 err = -ENOMEM;
1131 goto out_release_resources;
1132 }
1133
1134 cd->num_vfs = pci_sriov_get_totalvfs(pci_dev);
1135 if (cd->num_vfs < 0)
1136 cd->num_vfs = 0;
1137
1138 err = genwqe_read_ids(cd);
1139 if (err)
1140 goto out_iounmap;
1141
1142 return 0;
1143
1144 out_iounmap:
1145 pci_iounmap(pci_dev, cd->mmio);
1146 out_release_resources:
1147 pci_release_mem_regions(pci_dev);
1148 err_disable_device:
1149 pci_disable_device(pci_dev);
1150 err_out:
1151 return err;
1152 }
1153
1154 /**
1155 * genwqe_pci_remove() - Free PCIe related resources for our card
1156 * @cd: GenWQE device information
1157 */
genwqe_pci_remove(struct genwqe_dev * cd)1158 static void genwqe_pci_remove(struct genwqe_dev *cd)
1159 {
1160 struct pci_dev *pci_dev = cd->pci_dev;
1161
1162 if (cd->mmio)
1163 pci_iounmap(pci_dev, cd->mmio);
1164
1165 pci_release_mem_regions(pci_dev);
1166 pci_disable_device(pci_dev);
1167 }
1168
1169 /**
1170 * genwqe_probe() - Device initialization
1171 * @pci_dev: PCI device information struct
1172 * @id: PCI device ID
1173 *
1174 * Callable for multiple cards. This function is called on bind.
1175 *
1176 * Return: 0 if succeeded, < 0 when failed
1177 */
genwqe_probe(struct pci_dev * pci_dev,const struct pci_device_id * id)1178 static int genwqe_probe(struct pci_dev *pci_dev,
1179 const struct pci_device_id *id)
1180 {
1181 int err;
1182 struct genwqe_dev *cd;
1183
1184 genwqe_init_crc32();
1185
1186 cd = genwqe_dev_alloc();
1187 if (IS_ERR(cd)) {
1188 dev_err(&pci_dev->dev, "err: could not alloc mem (err=%d)!\n",
1189 (int)PTR_ERR(cd));
1190 return PTR_ERR(cd);
1191 }
1192
1193 dev_set_drvdata(&pci_dev->dev, cd);
1194 cd->pci_dev = pci_dev;
1195
1196 err = genwqe_pci_setup(cd);
1197 if (err < 0) {
1198 dev_err(&pci_dev->dev,
1199 "err: problems with PCI setup (err=%d)\n", err);
1200 goto out_free_dev;
1201 }
1202
1203 err = genwqe_start(cd);
1204 if (err < 0) {
1205 dev_err(&pci_dev->dev,
1206 "err: cannot start card services! (err=%d)\n", err);
1207 goto out_pci_remove;
1208 }
1209
1210 if (genwqe_is_privileged(cd)) {
1211 err = genwqe_health_check_start(cd);
1212 if (err < 0) {
1213 dev_err(&pci_dev->dev,
1214 "err: cannot start health checking! (err=%d)\n",
1215 err);
1216 goto out_stop_services;
1217 }
1218 }
1219 return 0;
1220
1221 out_stop_services:
1222 genwqe_stop(cd);
1223 out_pci_remove:
1224 genwqe_pci_remove(cd);
1225 out_free_dev:
1226 genwqe_dev_free(cd);
1227 return err;
1228 }
1229
1230 /**
1231 * genwqe_remove() - Called when device is removed (hot-plugable)
1232 * @pci_dev: PCI device information struct
1233 *
1234 * Or when driver is unloaded respecitively when unbind is done.
1235 */
genwqe_remove(struct pci_dev * pci_dev)1236 static void genwqe_remove(struct pci_dev *pci_dev)
1237 {
1238 struct genwqe_dev *cd = dev_get_drvdata(&pci_dev->dev);
1239
1240 genwqe_health_check_stop(cd);
1241
1242 /*
1243 * genwqe_stop() must survive if it is called twice
1244 * sequentially. This happens when the health thread calls it
1245 * and fails on genwqe_bus_reset().
1246 */
1247 genwqe_stop(cd);
1248 genwqe_pci_remove(cd);
1249 genwqe_dev_free(cd);
1250 }
1251
1252 /**
1253 * genwqe_err_error_detected() - Error detection callback
1254 * @pci_dev: PCI device information struct
1255 * @state: PCI channel state
1256 *
1257 * This callback is called by the PCI subsystem whenever a PCI bus
1258 * error is detected.
1259 */
genwqe_err_error_detected(struct pci_dev * pci_dev,pci_channel_state_t state)1260 static pci_ers_result_t genwqe_err_error_detected(struct pci_dev *pci_dev,
1261 pci_channel_state_t state)
1262 {
1263 struct genwqe_dev *cd;
1264
1265 dev_err(&pci_dev->dev, "[%s] state=%d\n", __func__, state);
1266
1267 cd = dev_get_drvdata(&pci_dev->dev);
1268 if (cd == NULL)
1269 return PCI_ERS_RESULT_DISCONNECT;
1270
1271 /* Stop the card */
1272 genwqe_health_check_stop(cd);
1273 genwqe_stop(cd);
1274
1275 /*
1276 * On permanent failure, the PCI code will call device remove
1277 * after the return of this function.
1278 * genwqe_stop() can be called twice.
1279 */
1280 if (state == pci_channel_io_perm_failure) {
1281 return PCI_ERS_RESULT_DISCONNECT;
1282 } else {
1283 genwqe_pci_remove(cd);
1284 return PCI_ERS_RESULT_NEED_RESET;
1285 }
1286 }
1287
genwqe_err_slot_reset(struct pci_dev * pci_dev)1288 static pci_ers_result_t genwqe_err_slot_reset(struct pci_dev *pci_dev)
1289 {
1290 int rc;
1291 struct genwqe_dev *cd = dev_get_drvdata(&pci_dev->dev);
1292
1293 rc = genwqe_pci_setup(cd);
1294 if (!rc) {
1295 return PCI_ERS_RESULT_RECOVERED;
1296 } else {
1297 dev_err(&pci_dev->dev,
1298 "err: problems with PCI setup (err=%d)\n", rc);
1299 return PCI_ERS_RESULT_DISCONNECT;
1300 }
1301 }
1302
genwqe_err_result_none(struct pci_dev * dev)1303 static pci_ers_result_t genwqe_err_result_none(struct pci_dev *dev)
1304 {
1305 return PCI_ERS_RESULT_NONE;
1306 }
1307
genwqe_err_resume(struct pci_dev * pci_dev)1308 static void genwqe_err_resume(struct pci_dev *pci_dev)
1309 {
1310 int rc;
1311 struct genwqe_dev *cd = dev_get_drvdata(&pci_dev->dev);
1312
1313 rc = genwqe_start(cd);
1314 if (!rc) {
1315 rc = genwqe_health_check_start(cd);
1316 if (rc)
1317 dev_err(&pci_dev->dev,
1318 "err: cannot start health checking! (err=%d)\n",
1319 rc);
1320 } else {
1321 dev_err(&pci_dev->dev,
1322 "err: cannot start card services! (err=%d)\n", rc);
1323 }
1324 }
1325
genwqe_sriov_configure(struct pci_dev * dev,int numvfs)1326 static int genwqe_sriov_configure(struct pci_dev *dev, int numvfs)
1327 {
1328 int rc;
1329 struct genwqe_dev *cd = dev_get_drvdata(&dev->dev);
1330
1331 if (numvfs > 0) {
1332 genwqe_setup_vf_jtimer(cd);
1333 rc = pci_enable_sriov(dev, numvfs);
1334 if (rc < 0)
1335 return rc;
1336 return numvfs;
1337 }
1338 if (numvfs == 0) {
1339 pci_disable_sriov(dev);
1340 return 0;
1341 }
1342 return 0;
1343 }
1344
1345 static const struct pci_error_handlers genwqe_err_handler = {
1346 .error_detected = genwqe_err_error_detected,
1347 .mmio_enabled = genwqe_err_result_none,
1348 .slot_reset = genwqe_err_slot_reset,
1349 .resume = genwqe_err_resume,
1350 };
1351
1352 static struct pci_driver genwqe_driver = {
1353 .name = genwqe_driver_name,
1354 .id_table = genwqe_device_table,
1355 .probe = genwqe_probe,
1356 .remove = genwqe_remove,
1357 .sriov_configure = genwqe_sriov_configure,
1358 .err_handler = &genwqe_err_handler,
1359 };
1360
1361 /**
1362 * genwqe_init_module() - Driver registration and initialization
1363 */
genwqe_init_module(void)1364 static int __init genwqe_init_module(void)
1365 {
1366 int rc;
1367
1368 rc = class_register(&class_genwqe);
1369 if (rc) {
1370 pr_err("[%s] create class failed\n", __func__);
1371 return -ENOMEM;
1372 }
1373
1374 debugfs_genwqe = debugfs_create_dir(GENWQE_DEVNAME, NULL);
1375
1376 rc = pci_register_driver(&genwqe_driver);
1377 if (rc != 0) {
1378 pr_err("[%s] pci_reg_driver (rc=%d)\n", __func__, rc);
1379 goto err_out0;
1380 }
1381
1382 return rc;
1383
1384 err_out0:
1385 debugfs_remove(debugfs_genwqe);
1386 class_unregister(&class_genwqe);
1387 return rc;
1388 }
1389
1390 /**
1391 * genwqe_exit_module() - Driver exit
1392 */
genwqe_exit_module(void)1393 static void __exit genwqe_exit_module(void)
1394 {
1395 pci_unregister_driver(&genwqe_driver);
1396 debugfs_remove(debugfs_genwqe);
1397 class_unregister(&class_genwqe);
1398 }
1399
1400 module_init(genwqe_init_module);
1401 module_exit(genwqe_exit_module);
1402