1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * opt3001.c - Texas Instruments OPT3001 Light Sensor 4 * 5 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com 6 * 7 * Author: Andreas Dannenberg <dannenberg@ti.com> 8 * Based on previous work from: Felipe Balbi <balbi@ti.com> 9 */ 10 11 #include <linux/array_size.h> 12 #include <linux/bits.h> 13 #include <linux/cleanup.h> 14 #include <linux/delay.h> 15 #include <linux/dev_printk.h> 16 #include <linux/errno.h> 17 #include <linux/i2c.h> 18 #include <linux/interrupt.h> 19 #include <linux/jiffies.h> 20 #include <linux/module.h> 21 #include <linux/mutex.h> 22 #include <linux/types.h> 23 #include <linux/wait.h> 24 25 #include <linux/iio/events.h> 26 #include <linux/iio/iio.h> 27 #include <linux/iio/sysfs.h> 28 29 #define OPT3001_RESULT 0x00 30 #define OPT3001_CONFIGURATION 0x01 31 #define OPT3001_LOW_LIMIT 0x02 32 #define OPT3001_HIGH_LIMIT 0x03 33 #define OPT3001_MANUFACTURER_ID 0x7e 34 #define OPT3001_DEVICE_ID 0x7f 35 36 #define OPT3001_CONFIGURATION_RN_MASK GENMASK(15, 12) 37 #define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12) 38 39 #define OPT3001_CONFIGURATION_CT BIT(11) 40 41 #define OPT3001_CONFIGURATION_M_MASK GENMASK(10, 9) 42 #define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9) 43 #define OPT3001_CONFIGURATION_M_SINGLE (1 << 9) 44 #define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */ 45 46 #define OPT3001_CONFIGURATION_CRF BIT(7) 47 #define OPT3001_CONFIGURATION_FH BIT(6) 48 #define OPT3001_CONFIGURATION_FL BIT(5) 49 #define OPT3001_CONFIGURATION_L BIT(4) 50 #define OPT3001_CONFIGURATION_POL BIT(3) 51 #define OPT3001_CONFIGURATION_ME BIT(2) 52 53 #define OPT3001_CONFIGURATION_FC_MASK GENMASK(1, 0) 54 55 /* The end-of-conversion enable is located in the low-limit register */ 56 #define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000 57 58 #define OPT3001_REG_EXPONENT(n) ((n) >> 12) 59 #define OPT3001_REG_MANTISSA(n) ((n) & 0xfff) 60 61 #define OPT3001_INT_TIME_LONG 800000 62 #define OPT3001_INT_TIME_SHORT 100000 63 64 /* 65 * Time to wait for conversion result to be ready. The device datasheet 66 * sect. 6.5 states results are ready after total integration time plus 3ms. 67 * This results in worst-case max values of 113ms or 883ms, respectively. 68 * Add some slack to be on the safe side. 69 */ 70 #define OPT3001_RESULT_READY_SHORT 150 71 #define OPT3001_RESULT_READY_LONG 1000 72 73 struct opt3001_scale { 74 int val; 75 int val2; 76 }; 77 78 struct opt3001_chip_info { 79 const struct iio_chan_spec (*channels)[2]; 80 enum iio_chan_type chan_type; 81 int num_channels; 82 83 const struct opt3001_scale (*scales)[12]; 84 /* 85 * Factor as specified by conversion equation in datasheet. 86 * eg. 0.01 (scaled to integer 10) for opt3001. 87 */ 88 int factor_whole; 89 /* 90 * Factor to compensate for potentially scaled factor_whole. 91 */ 92 int factor_integer; 93 /* 94 * Factor used to align decimal part of processed value to six decimal 95 * places. 96 */ 97 int factor_decimal; 98 99 bool has_id; 100 }; 101 102 struct opt3001 { 103 struct i2c_client *client; 104 105 /* 106 * Ensure data capture and read-modify-write sequences are 107 * not interrupted. 108 */ 109 struct mutex lock; 110 111 /* Allows for IRQs to bypass locking mechanism */ 112 bool ok_to_ignore_lock; 113 bool result_ready; 114 wait_queue_head_t result_ready_queue; 115 u16 result; 116 const struct opt3001_chip_info *chip_info; 117 118 u32 int_time; 119 u32 mode; 120 121 u16 high_thresh_mantissa; 122 u16 low_thresh_mantissa; 123 124 u8 high_thresh_exp; 125 u8 low_thresh_exp; 126 127 bool use_irq; 128 }; 129 130 static const struct opt3001_scale opt3001_scales[] = { 131 { 132 .val = 40, 133 .val2 = 950000, 134 }, 135 { 136 .val = 81, 137 .val2 = 900000, 138 }, 139 { 140 .val = 163, 141 .val2 = 800000, 142 }, 143 { 144 .val = 327, 145 .val2 = 600000, 146 }, 147 { 148 .val = 655, 149 .val2 = 200000, 150 }, 151 { 152 .val = 1310, 153 .val2 = 400000, 154 }, 155 { 156 .val = 2620, 157 .val2 = 800000, 158 }, 159 { 160 .val = 5241, 161 .val2 = 600000, 162 }, 163 { 164 .val = 10483, 165 .val2 = 200000, 166 }, 167 { 168 .val = 20966, 169 .val2 = 400000, 170 }, 171 { 172 .val = 41932, 173 .val2 = 800000, 174 }, 175 { 176 .val = 83865, 177 .val2 = 600000, 178 }, 179 }; 180 181 static const struct opt3001_scale opt3002_scales[] = { 182 { 183 .val = 4914, 184 .val2 = 0, 185 }, 186 { 187 .val = 9828, 188 .val2 = 0, 189 }, 190 { 191 .val = 19656, 192 .val2 = 0, 193 }, 194 { 195 .val = 39312, 196 .val2 = 0, 197 }, 198 { 199 .val = 78624, 200 .val2 = 0, 201 }, 202 { 203 .val = 157248, 204 .val2 = 0, 205 }, 206 { 207 .val = 314496, 208 .val2 = 0, 209 }, 210 { 211 .val = 628992, 212 .val2 = 0, 213 }, 214 { 215 .val = 1257984, 216 .val2 = 0, 217 }, 218 { 219 .val = 2515968, 220 .val2 = 0, 221 }, 222 { 223 .val = 5031936, 224 .val2 = 0, 225 }, 226 { 227 .val = 10063872, 228 .val2 = 0, 229 }, 230 }; 231 232 static int opt3001_find_scale(const struct opt3001 *opt, int val, int val2, 233 u8 *exponent) 234 { 235 for (unsigned int i = 0; i < ARRAY_SIZE(*opt->chip_info->scales); i++) { 236 const struct opt3001_scale *scale = &(*opt->chip_info->scales)[i]; 237 /* 238 * Compare the integer and micro parts to determine value scale. 239 */ 240 if (val < scale->val || 241 (val == scale->val && val2 <= scale->val2)) { 242 *exponent = i; 243 return 0; 244 } 245 } 246 247 return -EINVAL; 248 } 249 250 static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent, u16 mantissa, 251 int *val, int *val2) 252 { 253 int ret; 254 int whole = opt->chip_info->factor_whole; 255 int integer = opt->chip_info->factor_integer; 256 int decimal = opt->chip_info->factor_decimal; 257 258 ret = whole * (mantissa << exponent); 259 *val = ret / integer; 260 *val2 = (ret - (*val * integer)) * decimal; 261 } 262 263 static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode) 264 { 265 *reg &= ~OPT3001_CONFIGURATION_M_MASK; 266 *reg |= mode; 267 opt->mode = mode; 268 } 269 270 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8"); 271 272 static struct attribute *opt3001_attributes[] = { 273 &iio_const_attr_integration_time_available.dev_attr.attr, 274 NULL 275 }; 276 277 static const struct attribute_group opt3001_attribute_group = { 278 .attrs = opt3001_attributes, 279 }; 280 281 static const struct iio_event_spec opt3001_event_spec[] = { 282 { 283 .type = IIO_EV_TYPE_THRESH, 284 .dir = IIO_EV_DIR_RISING, 285 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 286 BIT(IIO_EV_INFO_ENABLE), 287 }, 288 { 289 .type = IIO_EV_TYPE_THRESH, 290 .dir = IIO_EV_DIR_FALLING, 291 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 292 BIT(IIO_EV_INFO_ENABLE), 293 }, 294 }; 295 296 static const struct iio_chan_spec opt3001_channels[] = { 297 { 298 .type = IIO_LIGHT, 299 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | 300 BIT(IIO_CHAN_INFO_INT_TIME), 301 .event_spec = opt3001_event_spec, 302 .num_event_specs = ARRAY_SIZE(opt3001_event_spec), 303 }, 304 IIO_CHAN_SOFT_TIMESTAMP(1), 305 }; 306 307 static const struct iio_chan_spec opt3002_channels[] = { 308 { 309 .type = IIO_INTENSITY, 310 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 311 BIT(IIO_CHAN_INFO_INT_TIME), 312 .event_spec = opt3001_event_spec, 313 .num_event_specs = ARRAY_SIZE(opt3001_event_spec), 314 }, 315 IIO_CHAN_SOFT_TIMESTAMP(1), 316 }; 317 318 static int opt3001_start_conversion(struct opt3001 *opt) 319 { 320 struct i2c_client *client = opt->client; 321 struct device *dev = &client->dev; 322 u16 reg; 323 int ret; 324 325 /* Reset data-ready indicator flag */ 326 opt->result_ready = false; 327 328 /* Configure for single-conversion mode and start a new conversion */ 329 ret = i2c_smbus_read_word_swapped(client, OPT3001_CONFIGURATION); 330 if (ret < 0) { 331 dev_err(dev, "failed to read register %02x\n", 332 OPT3001_CONFIGURATION); 333 return ret; 334 } 335 336 reg = ret; 337 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SINGLE); 338 339 ret = i2c_smbus_write_word_swapped(client, OPT3001_CONFIGURATION, reg); 340 if (ret) 341 dev_err(dev, "failed to write register %02x\n", 342 OPT3001_CONFIGURATION); 343 344 return ret; 345 } 346 347 static int opt3001_get_processed_irq(struct opt3001 *opt) 348 { 349 struct i2c_client *client = opt->client; 350 struct device *dev = &client->dev; 351 u16 value; 352 int ret; 353 354 /* 355 * Enable the end-of-conversion interrupt mechanism. Note that doing so 356 * will overwrite the low-level limit value however we will restore this 357 * value later on. 358 */ 359 ret = i2c_smbus_write_word_swapped(client, 360 OPT3001_LOW_LIMIT, 361 OPT3001_LOW_LIMIT_EOC_ENABLE); 362 if (ret < 0) { 363 dev_err(dev, "failed to write register %02x\n", 364 OPT3001_LOW_LIMIT); 365 return ret; 366 } 367 368 /* Allow IRQ to access the device despite lock being set */ 369 opt->ok_to_ignore_lock = true; 370 371 ret = opt3001_start_conversion(opt); 372 if (ret) 373 goto err; 374 375 if (wait_event_timeout(opt->result_ready_queue, opt->result_ready, 376 msecs_to_jiffies(OPT3001_RESULT_READY_LONG))) 377 ret = 0; 378 else 379 ret = -ETIMEDOUT; 380 381 err: 382 opt->ok_to_ignore_lock = false; 383 384 if (ret < 0) 385 return ret; 386 387 /* 388 * Disable the end-of-conversion interrupt mechanism by restoring the 389 * low-level limit value (clearing OPT3001_LOW_LIMIT_EOC_ENABLE). Note 390 * that selectively clearing those enable bits would affect the actual 391 * limit value due to bit-overlap and therefore can't be done. 392 */ 393 value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa; 394 ret = i2c_smbus_write_word_swapped(client, OPT3001_LOW_LIMIT, value); 395 if (ret) 396 dev_err(dev, "failed to write register %02x\n", 397 OPT3001_LOW_LIMIT); 398 399 return ret; 400 } 401 402 static int opt3001_get_processed_noirq(struct opt3001 *opt) 403 { 404 struct i2c_client *client = opt->client; 405 struct device *dev = &client->dev; 406 int ret; 407 408 ret = opt3001_start_conversion(opt); 409 if (ret) 410 return ret; 411 412 if (opt->int_time == OPT3001_INT_TIME_SHORT) 413 msleep(OPT3001_RESULT_READY_SHORT); 414 else 415 msleep(OPT3001_RESULT_READY_LONG); 416 417 /* Check result ready flag */ 418 ret = i2c_smbus_read_word_swapped(client, OPT3001_CONFIGURATION); 419 if (ret < 0) { 420 dev_err(dev, "failed to read register %02x\n", 421 OPT3001_CONFIGURATION); 422 return ret; 423 } 424 425 if (!(ret & OPT3001_CONFIGURATION_CRF)) 426 return -ETIMEDOUT; 427 428 /* Obtain value */ 429 ret = i2c_smbus_read_word_swapped(client, OPT3001_RESULT); 430 if (ret < 0) { 431 dev_err(dev, "failed to read register %02x\n", 432 OPT3001_RESULT); 433 return ret; 434 } 435 436 opt->result = ret; 437 opt->result_ready = true; 438 439 return 0; 440 } 441 442 static int opt3001_get_processed(struct opt3001 *opt, int *val, int *val2) 443 { 444 u16 mantissa; 445 u8 exponent; 446 int ret; 447 448 if (opt->use_irq) 449 ret = opt3001_get_processed_irq(opt); 450 else 451 ret = opt3001_get_processed_noirq(opt); 452 if (ret) 453 return ret; 454 455 exponent = OPT3001_REG_EXPONENT(opt->result); 456 mantissa = OPT3001_REG_MANTISSA(opt->result); 457 458 opt3001_to_iio_ret(opt, exponent, mantissa, val, val2); 459 460 return IIO_VAL_INT_PLUS_MICRO; 461 } 462 463 static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2) 464 { 465 *val = 0; 466 *val2 = opt->int_time; 467 468 return IIO_VAL_INT_PLUS_MICRO; 469 } 470 471 static int opt3001_set_int_time(struct opt3001 *opt, int time) 472 { 473 struct i2c_client *client = opt->client; 474 struct device *dev = &client->dev; 475 int ret; 476 u16 reg; 477 478 ret = i2c_smbus_read_word_swapped(client, OPT3001_CONFIGURATION); 479 if (ret < 0) { 480 dev_err(dev, "failed to read register %02x\n", 481 OPT3001_CONFIGURATION); 482 return ret; 483 } 484 485 reg = ret; 486 487 switch (time) { 488 case OPT3001_INT_TIME_SHORT: 489 reg &= ~OPT3001_CONFIGURATION_CT; 490 opt->int_time = OPT3001_INT_TIME_SHORT; 491 break; 492 case OPT3001_INT_TIME_LONG: 493 reg |= OPT3001_CONFIGURATION_CT; 494 opt->int_time = OPT3001_INT_TIME_LONG; 495 break; 496 default: 497 return -EINVAL; 498 } 499 500 return i2c_smbus_write_word_swapped(client, OPT3001_CONFIGURATION, reg); 501 } 502 503 static int opt3001_read_raw(struct iio_dev *iio, 504 struct iio_chan_spec const *chan, 505 int *val, int *val2, long mask) 506 { 507 struct opt3001 *opt = iio_priv(iio); 508 509 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 510 return -EBUSY; 511 512 if (chan->type != opt->chip_info->chan_type) 513 return -EINVAL; 514 515 guard(mutex)(&opt->lock); 516 517 switch (mask) { 518 case IIO_CHAN_INFO_RAW: 519 case IIO_CHAN_INFO_PROCESSED: 520 return opt3001_get_processed(opt, val, val2); 521 case IIO_CHAN_INFO_INT_TIME: 522 return opt3001_get_int_time(opt, val, val2); 523 default: 524 return -EINVAL; 525 } 526 } 527 528 static int opt3001_write_raw(struct iio_dev *iio, 529 struct iio_chan_spec const *chan, 530 int val, int val2, long mask) 531 { 532 struct opt3001 *opt = iio_priv(iio); 533 534 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 535 return -EBUSY; 536 537 if (chan->type != opt->chip_info->chan_type) 538 return -EINVAL; 539 540 if (mask != IIO_CHAN_INFO_INT_TIME) 541 return -EINVAL; 542 543 if (val != 0) 544 return -EINVAL; 545 546 guard(mutex)(&opt->lock); 547 548 return opt3001_set_int_time(opt, val2); 549 } 550 551 static int opt3001_read_event_value(struct iio_dev *iio, 552 const struct iio_chan_spec *chan, 553 enum iio_event_type type, 554 enum iio_event_direction dir, 555 enum iio_event_info info, 556 int *val, int *val2) 557 { 558 struct opt3001 *opt = iio_priv(iio); 559 560 guard(mutex)(&opt->lock); 561 562 switch (dir) { 563 case IIO_EV_DIR_RISING: 564 opt3001_to_iio_ret(opt, opt->high_thresh_exp, 565 opt->high_thresh_mantissa, val, val2); 566 return IIO_VAL_INT_PLUS_MICRO; 567 case IIO_EV_DIR_FALLING: 568 opt3001_to_iio_ret(opt, opt->low_thresh_exp, 569 opt->low_thresh_mantissa, val, val2); 570 return IIO_VAL_INT_PLUS_MICRO; 571 default: 572 return -EINVAL; 573 } 574 } 575 576 static int opt3001_write_event_value(struct iio_dev *iio, 577 const struct iio_chan_spec *chan, 578 enum iio_event_type type, 579 enum iio_event_direction dir, 580 enum iio_event_info info, 581 int val, int val2) 582 { 583 struct opt3001 *opt = iio_priv(iio); 584 struct i2c_client *client = opt->client; 585 struct device *dev = &client->dev; 586 int ret; 587 int whole; 588 int integer; 589 int decimal; 590 591 u16 mantissa; 592 u16 value; 593 u16 reg; 594 595 u8 exponent; 596 597 if (val < 0) 598 return -EINVAL; 599 600 guard(mutex)(&opt->lock); 601 602 ret = opt3001_find_scale(opt, val, val2, &exponent); 603 if (ret < 0) { 604 dev_err(dev, "can't find scale for %d.%06u\n", val, val2); 605 return ret; 606 } 607 608 whole = opt->chip_info->factor_whole; 609 integer = opt->chip_info->factor_integer; 610 decimal = opt->chip_info->factor_decimal; 611 612 mantissa = (((val * integer) + (val2 / decimal)) / whole) >> exponent; 613 614 value = (exponent << 12) | mantissa; 615 616 switch (dir) { 617 case IIO_EV_DIR_RISING: 618 reg = OPT3001_HIGH_LIMIT; 619 opt->high_thresh_mantissa = mantissa; 620 opt->high_thresh_exp = exponent; 621 break; 622 case IIO_EV_DIR_FALLING: 623 reg = OPT3001_LOW_LIMIT; 624 opt->low_thresh_mantissa = mantissa; 625 opt->low_thresh_exp = exponent; 626 break; 627 default: 628 return -EINVAL; 629 } 630 631 ret = i2c_smbus_write_word_swapped(client, reg, value); 632 if (ret < 0) { 633 dev_err(dev, "failed to write register %02x\n", reg); 634 return ret; 635 } 636 637 return 0; 638 } 639 640 static int opt3001_read_event_config(struct iio_dev *iio, 641 const struct iio_chan_spec *chan, 642 enum iio_event_type type, 643 enum iio_event_direction dir) 644 { 645 struct opt3001 *opt = iio_priv(iio); 646 647 return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS; 648 } 649 650 static int opt3001_write_event_config(struct iio_dev *iio, 651 const struct iio_chan_spec *chan, 652 enum iio_event_type type, 653 enum iio_event_direction dir, 654 bool state) 655 { 656 struct opt3001 *opt = iio_priv(iio); 657 struct i2c_client *client = opt->client; 658 struct device *dev = &client->dev; 659 int ret; 660 u16 mode; 661 u16 reg; 662 663 if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 664 return 0; 665 666 if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN) 667 return 0; 668 669 guard(mutex)(&opt->lock); 670 671 mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS 672 : OPT3001_CONFIGURATION_M_SHUTDOWN; 673 674 ret = i2c_smbus_read_word_swapped(client, OPT3001_CONFIGURATION); 675 if (ret < 0) { 676 dev_err(dev, "failed to read register %02x\n", 677 OPT3001_CONFIGURATION); 678 return ret; 679 } 680 681 reg = ret; 682 opt3001_set_mode(opt, ®, mode); 683 684 ret = i2c_smbus_write_word_swapped(client, OPT3001_CONFIGURATION, reg); 685 if (ret < 0) { 686 dev_err(dev, "failed to write register %02x\n", 687 OPT3001_CONFIGURATION); 688 return ret; 689 } 690 691 return 0; 692 } 693 694 static const struct iio_info opt3001_info = { 695 .attrs = &opt3001_attribute_group, 696 .read_raw = opt3001_read_raw, 697 .write_raw = opt3001_write_raw, 698 .read_event_value = opt3001_read_event_value, 699 .write_event_value = opt3001_write_event_value, 700 .read_event_config = opt3001_read_event_config, 701 .write_event_config = opt3001_write_event_config, 702 }; 703 704 static int opt3001_read_id(struct opt3001 *opt) 705 { 706 struct i2c_client *client = opt->client; 707 struct device *dev = &client->dev; 708 char manufacturer[2]; 709 u16 device_id; 710 int ret; 711 712 ret = i2c_smbus_read_word_swapped(client, OPT3001_MANUFACTURER_ID); 713 if (ret < 0) 714 return dev_err_probe(dev, ret, "failed to read register %02x\n", 715 OPT3001_MANUFACTURER_ID); 716 717 manufacturer[0] = ret >> 8; 718 manufacturer[1] = ret & 0xff; 719 720 ret = i2c_smbus_read_word_swapped(client, OPT3001_DEVICE_ID); 721 if (ret < 0) 722 return dev_err_probe(dev, ret, "failed to read register %02x\n", 723 OPT3001_DEVICE_ID); 724 725 device_id = ret; 726 727 dev_info(dev, "Found %c%c OPT%04x\n", manufacturer[0], manufacturer[1], 728 device_id); 729 730 return 0; 731 } 732 733 static void opt3001_power_off(void *data) 734 { 735 struct opt3001 *opt = data; 736 struct i2c_client *client = opt->client; 737 struct device *dev = &client->dev; 738 u16 reg_val; 739 int ret; 740 741 ret = i2c_smbus_read_word_swapped(client, OPT3001_CONFIGURATION); 742 if (ret < 0) { 743 dev_err(dev, "failed to read register %02x\n", 744 OPT3001_CONFIGURATION); 745 return; 746 } 747 748 reg_val = ret; 749 opt3001_set_mode(opt, ®_val, OPT3001_CONFIGURATION_M_SHUTDOWN); 750 751 ret = i2c_smbus_write_word_swapped(client, OPT3001_CONFIGURATION, reg_val); 752 if (ret < 0) 753 dev_err(dev, "failed to write to register %02x\n", 754 OPT3001_CONFIGURATION); 755 } 756 757 static int opt3001_configure(struct opt3001 *opt) 758 { 759 struct i2c_client *client = opt->client; 760 struct device *dev = &client->dev; 761 int ret; 762 u16 reg; 763 764 ret = i2c_smbus_read_word_swapped(client, OPT3001_CONFIGURATION); 765 if (ret < 0) 766 return dev_err_probe(dev, ret, "failed to read register %02x\n", 767 OPT3001_CONFIGURATION); 768 769 reg = ret; 770 771 /* Enable automatic full-scale setting mode */ 772 reg &= ~OPT3001_CONFIGURATION_RN_MASK; 773 reg |= OPT3001_CONFIGURATION_RN_AUTO; 774 775 /* Reflect status of the device's integration time setting */ 776 if (reg & OPT3001_CONFIGURATION_CT) 777 opt->int_time = OPT3001_INT_TIME_LONG; 778 else 779 opt->int_time = OPT3001_INT_TIME_SHORT; 780 781 /* Ensure device is in shutdown initially */ 782 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN); 783 784 /* Configure for latched window-style comparison operation */ 785 reg |= OPT3001_CONFIGURATION_L; 786 reg &= ~OPT3001_CONFIGURATION_POL; 787 reg &= ~OPT3001_CONFIGURATION_ME; 788 reg &= ~OPT3001_CONFIGURATION_FC_MASK; 789 790 ret = i2c_smbus_write_word_swapped(client, OPT3001_CONFIGURATION, reg); 791 if (ret < 0) 792 return dev_err_probe(dev, ret, "failed to write register %02x\n", 793 OPT3001_CONFIGURATION); 794 795 ret = devm_add_action_or_reset(dev, opt3001_power_off, opt); 796 if (ret) 797 return dev_err_probe(dev, ret, 798 "failed to register power off function\n"); 799 800 ret = i2c_smbus_read_word_swapped(client, OPT3001_LOW_LIMIT); 801 if (ret < 0) 802 return dev_err_probe(dev, ret, "failed to read register %02x\n", 803 OPT3001_LOW_LIMIT); 804 805 opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 806 opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret); 807 808 ret = i2c_smbus_read_word_swapped(client, OPT3001_HIGH_LIMIT); 809 if (ret < 0) 810 return dev_err_probe(dev, ret, "failed to read register %02x\n", 811 OPT3001_HIGH_LIMIT); 812 813 opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 814 opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret); 815 816 return 0; 817 } 818 819 static irqreturn_t opt3001_irq(int irq, void *_iio) 820 { 821 struct iio_dev *iio = _iio; 822 struct opt3001 *opt = iio_priv(iio); 823 struct i2c_client *client = opt->client; 824 struct device *dev = &client->dev; 825 int ret; 826 bool wake_result_ready_queue = false; 827 enum iio_chan_type chan_type = opt->chip_info->chan_type; 828 bool ok_to_ignore_lock = opt->ok_to_ignore_lock; 829 830 if (!ok_to_ignore_lock) 831 mutex_lock(&opt->lock); 832 833 ret = i2c_smbus_read_word_swapped(client, OPT3001_CONFIGURATION); 834 if (ret < 0) { 835 dev_err(dev, "failed to read register %02x\n", 836 OPT3001_CONFIGURATION); 837 goto out; 838 } 839 840 if ((ret & OPT3001_CONFIGURATION_M_MASK) == 841 OPT3001_CONFIGURATION_M_CONTINUOUS) { 842 if (ret & OPT3001_CONFIGURATION_FH) 843 iio_push_event(iio, 844 IIO_UNMOD_EVENT_CODE(chan_type, 0, 845 IIO_EV_TYPE_THRESH, 846 IIO_EV_DIR_RISING), 847 iio_get_time_ns(iio)); 848 if (ret & OPT3001_CONFIGURATION_FL) 849 iio_push_event(iio, 850 IIO_UNMOD_EVENT_CODE(chan_type, 0, 851 IIO_EV_TYPE_THRESH, 852 IIO_EV_DIR_FALLING), 853 iio_get_time_ns(iio)); 854 } else if (ret & OPT3001_CONFIGURATION_CRF) { 855 ret = i2c_smbus_read_word_swapped(client, OPT3001_RESULT); 856 if (ret < 0) { 857 dev_err(dev, "failed to read register %02x\n", 858 OPT3001_RESULT); 859 goto out; 860 } 861 opt->result = ret; 862 opt->result_ready = true; 863 wake_result_ready_queue = true; 864 } 865 866 out: 867 if (!ok_to_ignore_lock) 868 mutex_unlock(&opt->lock); 869 870 if (wake_result_ready_queue) 871 wake_up(&opt->result_ready_queue); 872 873 return IRQ_HANDLED; 874 } 875 876 static int opt3001_probe(struct i2c_client *client) 877 { 878 struct device *dev = &client->dev; 879 880 struct iio_dev *iio; 881 struct opt3001 *opt; 882 int irq = client->irq; 883 int ret; 884 885 iio = devm_iio_device_alloc(dev, sizeof(*opt)); 886 if (!iio) 887 return -ENOMEM; 888 889 opt = iio_priv(iio); 890 opt->client = client; 891 opt->chip_info = i2c_get_match_data(client); 892 893 ret = devm_mutex_init(dev, &opt->lock); 894 if (ret) 895 return ret; 896 897 init_waitqueue_head(&opt->result_ready_queue); 898 899 if (opt->chip_info->has_id) { 900 ret = opt3001_read_id(opt); 901 if (ret) 902 return ret; 903 } 904 905 ret = opt3001_configure(opt); 906 if (ret) 907 return ret; 908 909 iio->name = client->name; 910 iio->channels = *opt->chip_info->channels; 911 iio->num_channels = opt->chip_info->num_channels; 912 iio->modes = INDIO_DIRECT_MODE; 913 iio->info = &opt3001_info; 914 915 /* Make use of INT pin only if valid IRQ no. is given */ 916 if (irq > 0) { 917 ret = devm_request_threaded_irq(dev, irq, NULL, opt3001_irq, 918 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 919 "opt3001", iio); 920 if (ret) 921 return ret; 922 923 opt->use_irq = true; 924 } else { 925 dev_dbg(dev, "enabling interrupt-less operation\n"); 926 } 927 928 return devm_iio_device_register(dev, iio); 929 } 930 931 static const struct opt3001_chip_info opt3001_chip_information = { 932 .channels = &opt3001_channels, 933 .chan_type = IIO_LIGHT, 934 .num_channels = ARRAY_SIZE(opt3001_channels), 935 .scales = &opt3001_scales, 936 .factor_whole = 10, 937 .factor_integer = 1000, 938 .factor_decimal = 1000, 939 .has_id = true, 940 }; 941 942 static const struct opt3001_chip_info opt3002_chip_information = { 943 .channels = &opt3002_channels, 944 .chan_type = IIO_INTENSITY, 945 .num_channels = ARRAY_SIZE(opt3002_channels), 946 .scales = &opt3002_scales, 947 .factor_whole = 12, 948 .factor_integer = 10, 949 .factor_decimal = 100000, 950 .has_id = false, 951 }; 952 953 static const struct i2c_device_id opt3001_id[] = { 954 { .name = "opt3001", .driver_data = (kernel_ulong_t)&opt3001_chip_information }, 955 { .name = "opt3002", .driver_data = (kernel_ulong_t)&opt3002_chip_information }, 956 { } /* Terminating Entry */ 957 }; 958 MODULE_DEVICE_TABLE(i2c, opt3001_id); 959 960 static const struct of_device_id opt3001_of_match[] = { 961 { .compatible = "ti,opt3001", .data = &opt3001_chip_information }, 962 { .compatible = "ti,opt3002", .data = &opt3002_chip_information }, 963 { } 964 }; 965 MODULE_DEVICE_TABLE(of, opt3001_of_match); 966 967 static struct i2c_driver opt3001_driver = { 968 .probe = opt3001_probe, 969 .id_table = opt3001_id, 970 971 .driver = { 972 .name = "opt3001", 973 .of_match_table = opt3001_of_match, 974 }, 975 }; 976 977 module_i2c_driver(opt3001_driver); 978 979 MODULE_LICENSE("GPL v2"); 980 MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>"); 981 MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver"); 982