1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * das6402.c 4 * Comedi driver for DAS6402 compatible boards 5 * Copyright(c) 2014 H Hartley Sweeten <hsweeten@visionengravers.com> 6 * 7 * Rewrite of an experimental driver by: 8 * Copyright (C) 1999 Oystein Svendsen <svendsen@pvv.org> 9 */ 10 11 /* 12 * Driver: das6402 13 * Description: Keithley Metrabyte DAS6402 (& compatibles) 14 * Devices: [Keithley Metrabyte] DAS6402-12 (das6402-12), 15 * DAS6402-16 (das6402-16) 16 * Author: H Hartley Sweeten <hsweeten@visionengravers.com> 17 * Updated: Fri, 14 Mar 2014 10:18:43 -0700 18 * Status: unknown 19 * 20 * Configuration Options: 21 * [0] - I/O base address 22 * [1] - IRQ (optional, needed for async command support) 23 */ 24 25 #include <linux/module.h> 26 #include <linux/interrupt.h> 27 #include <linux/comedi/comedidev.h> 28 #include <linux/comedi/comedi_8254.h> 29 30 /* 31 * Register I/O map 32 */ 33 #define DAS6402_AI_DATA_REG 0x00 34 #define DAS6402_AI_MUX_REG 0x02 35 #define DAS6402_AI_MUX_LO(x) (((x) & 0x3f) << 0) 36 #define DAS6402_AI_MUX_HI(x) (((x) & 0x3f) << 8) 37 #define DAS6402_DI_DO_REG 0x03 38 #define DAS6402_AO_DATA_REG(x) (0x04 + ((x) * 2)) 39 #define DAS6402_AO_LSB_REG(x) (0x04 + ((x) * 2)) 40 #define DAS6402_AO_MSB_REG(x) (0x05 + ((x) * 2)) 41 #define DAS6402_STATUS_REG 0x08 42 #define DAS6402_STATUS_FFNE BIT(0) 43 #define DAS6402_STATUS_FHALF BIT(1) 44 #define DAS6402_STATUS_FFULL BIT(2) 45 #define DAS6402_STATUS_XINT BIT(3) 46 #define DAS6402_STATUS_INT BIT(4) 47 #define DAS6402_STATUS_XTRIG BIT(5) 48 #define DAS6402_STATUS_INDGT BIT(6) 49 #define DAS6402_STATUS_10MHZ BIT(7) 50 #define DAS6402_STATUS_W_CLRINT BIT(0) 51 #define DAS6402_STATUS_W_CLRXTR BIT(1) 52 #define DAS6402_STATUS_W_CLRXIN BIT(2) 53 #define DAS6402_STATUS_W_EXTEND BIT(4) 54 #define DAS6402_STATUS_W_ARMED BIT(5) 55 #define DAS6402_STATUS_W_POSTMODE BIT(6) 56 #define DAS6402_STATUS_W_10MHZ BIT(7) 57 #define DAS6402_CTRL_REG 0x09 58 #define DAS6402_CTRL_TRIG(x) ((x) << 0) 59 #define DAS6402_CTRL_SOFT_TRIG DAS6402_CTRL_TRIG(0) 60 #define DAS6402_CTRL_EXT_FALL_TRIG DAS6402_CTRL_TRIG(1) 61 #define DAS6402_CTRL_EXT_RISE_TRIG DAS6402_CTRL_TRIG(2) 62 #define DAS6402_CTRL_PACER_TRIG DAS6402_CTRL_TRIG(3) 63 #define DAS6402_CTRL_BURSTEN BIT(2) 64 #define DAS6402_CTRL_XINTE BIT(3) 65 #define DAS6402_CTRL_IRQ(x) ((x) << 4) 66 #define DAS6402_CTRL_INTE BIT(7) 67 #define DAS6402_TRIG_REG 0x0a 68 #define DAS6402_TRIG_TGEN BIT(0) 69 #define DAS6402_TRIG_TGSEL BIT(1) 70 #define DAS6402_TRIG_TGPOL BIT(2) 71 #define DAS6402_TRIG_PRETRIG BIT(3) 72 #define DAS6402_AO_RANGE(_chan, _range) ((_range) << ((_chan) ? 6 : 4)) 73 #define DAS6402_AO_RANGE_MASK(_chan) (3 << ((_chan) ? 6 : 4)) 74 #define DAS6402_MODE_REG 0x0b 75 #define DAS6402_MODE_RANGE(x) ((x) << 2) 76 #define DAS6402_MODE_POLLED DAS6402_MODE_RANGE(0) 77 #define DAS6402_MODE_FIFONEPTY DAS6402_MODE_RANGE(1) 78 #define DAS6402_MODE_FIFOHFULL DAS6402_MODE_RANGE(2) 79 #define DAS6402_MODE_EOB DAS6402_MODE_RANGE(3) 80 #define DAS6402_MODE_ENHANCED BIT(4) 81 #define DAS6402_MODE_SE BIT(5) 82 #define DAS6402_MODE_UNI BIT(6) 83 #define DAS6402_MODE_DMA(x) ((x) << 7) 84 #define DAS6402_MODE_DMA1 DAS6402_MODE_DMA(0) 85 #define DAS6402_MODE_DMA3 DAS6402_MODE_DMA(1) 86 #define DAS6402_TIMER_BASE 0x0c 87 88 static const struct comedi_lrange das6402_ai_ranges = { 89 8, { 90 BIP_RANGE(10), 91 BIP_RANGE(5), 92 BIP_RANGE(2.5), 93 BIP_RANGE(1.25), 94 UNI_RANGE(10), 95 UNI_RANGE(5), 96 UNI_RANGE(2.5), 97 UNI_RANGE(1.25) 98 } 99 }; 100 101 /* 102 * Analog output ranges are programmable on the DAS6402/12. 103 * For the DAS6402/16 the range bits have no function, the 104 * DAC ranges are selected by switches on the board. 105 */ 106 static const struct comedi_lrange das6402_ao_ranges = { 107 4, { 108 BIP_RANGE(5), 109 BIP_RANGE(10), 110 UNI_RANGE(5), 111 UNI_RANGE(10) 112 } 113 }; 114 115 struct das6402_boardinfo { 116 const char *name; 117 unsigned int maxdata; 118 }; 119 120 static struct das6402_boardinfo das6402_boards[] = { 121 { 122 .name = "das6402-12", 123 .maxdata = 0x0fff, 124 }, { 125 .name = "das6402-16", 126 .maxdata = 0xffff, 127 }, 128 }; 129 130 struct das6402_private { 131 unsigned int irq; 132 unsigned int ao_range; 133 }; 134 135 static void das6402_set_mode(struct comedi_device *dev, 136 unsigned int mode) 137 { 138 outb(DAS6402_MODE_ENHANCED | mode, dev->iobase + DAS6402_MODE_REG); 139 } 140 141 static void das6402_set_extended(struct comedi_device *dev, 142 unsigned int val) 143 { 144 outb(DAS6402_STATUS_W_EXTEND, dev->iobase + DAS6402_STATUS_REG); 145 outb(DAS6402_STATUS_W_EXTEND | val, dev->iobase + DAS6402_STATUS_REG); 146 outb(val, dev->iobase + DAS6402_STATUS_REG); 147 } 148 149 static void das6402_clear_all_interrupts(struct comedi_device *dev) 150 { 151 outb(DAS6402_STATUS_W_CLRINT | 152 DAS6402_STATUS_W_CLRXTR | 153 DAS6402_STATUS_W_CLRXIN, dev->iobase + DAS6402_STATUS_REG); 154 } 155 156 static void das6402_ai_clear_eoc(struct comedi_device *dev) 157 { 158 outb(DAS6402_STATUS_W_CLRINT, dev->iobase + DAS6402_STATUS_REG); 159 } 160 161 static unsigned int das6402_ai_read_sample(struct comedi_device *dev, 162 struct comedi_subdevice *s) 163 { 164 unsigned int val; 165 166 val = inw(dev->iobase + DAS6402_AI_DATA_REG); 167 if (s->maxdata == 0x0fff) 168 val >>= 4; 169 return val; 170 } 171 172 static irqreturn_t das6402_interrupt(int irq, void *d) 173 { 174 struct comedi_device *dev = d; 175 struct comedi_subdevice *s = dev->read_subdev; 176 struct comedi_async *async; 177 struct comedi_cmd *cmd; 178 unsigned int status; 179 180 if (!dev->attached) 181 return IRQ_NONE; 182 183 async = s->async; 184 cmd = &async->cmd; 185 186 status = inb(dev->iobase + DAS6402_STATUS_REG); 187 if ((status & DAS6402_STATUS_INT) == 0) 188 return IRQ_NONE; 189 190 if (status & DAS6402_STATUS_FFULL) { 191 async->events |= COMEDI_CB_OVERFLOW; 192 } else if (status & DAS6402_STATUS_FFNE) { 193 unsigned short val; 194 195 val = das6402_ai_read_sample(dev, s); 196 comedi_buf_write_samples(s, &val, 1); 197 198 if (cmd->stop_src == TRIG_COUNT && 199 async->scans_done >= cmd->stop_arg) 200 async->events |= COMEDI_CB_EOA; 201 } 202 203 das6402_clear_all_interrupts(dev); 204 205 comedi_handle_events(dev, s); 206 207 return IRQ_HANDLED; 208 } 209 210 static void das6402_ai_set_mode(struct comedi_device *dev, 211 struct comedi_subdevice *s, 212 unsigned int chanspec, 213 unsigned int mode) 214 { 215 unsigned int range = CR_RANGE(chanspec); 216 unsigned int aref = CR_AREF(chanspec); 217 218 mode |= DAS6402_MODE_RANGE(range); 219 if (aref == AREF_GROUND) 220 mode |= DAS6402_MODE_SE; 221 if (comedi_range_is_unipolar(s, range)) 222 mode |= DAS6402_MODE_UNI; 223 224 das6402_set_mode(dev, mode); 225 } 226 227 static int das6402_ai_cmd(struct comedi_device *dev, 228 struct comedi_subdevice *s) 229 { 230 struct das6402_private *devpriv = dev->private; 231 struct comedi_cmd *cmd = &s->async->cmd; 232 unsigned int chan_lo = CR_CHAN(cmd->chanlist[0]); 233 unsigned int chan_hi = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]); 234 235 das6402_ai_set_mode(dev, s, cmd->chanlist[0], DAS6402_MODE_FIFONEPTY); 236 237 /* load the mux for chanlist conversion */ 238 outw(DAS6402_AI_MUX_HI(chan_hi) | DAS6402_AI_MUX_LO(chan_lo), 239 dev->iobase + DAS6402_AI_MUX_REG); 240 241 comedi_8254_update_divisors(dev->pacer); 242 comedi_8254_pacer_enable(dev->pacer, 1, 2, true); 243 244 /* enable interrupt and pacer trigger */ 245 outb(DAS6402_CTRL_INTE | 246 DAS6402_CTRL_IRQ(devpriv->irq) | 247 DAS6402_CTRL_PACER_TRIG, dev->iobase + DAS6402_CTRL_REG); 248 249 return 0; 250 } 251 252 static int das6402_ai_check_chanlist(struct comedi_device *dev, 253 struct comedi_subdevice *s, 254 struct comedi_cmd *cmd) 255 { 256 unsigned int chan0 = CR_CHAN(cmd->chanlist[0]); 257 unsigned int range0 = CR_RANGE(cmd->chanlist[0]); 258 unsigned int aref0 = CR_AREF(cmd->chanlist[0]); 259 int i; 260 261 for (i = 1; i < cmd->chanlist_len; i++) { 262 unsigned int chan = CR_CHAN(cmd->chanlist[i]); 263 unsigned int range = CR_RANGE(cmd->chanlist[i]); 264 unsigned int aref = CR_AREF(cmd->chanlist[i]); 265 266 if (chan != chan0 + i) { 267 dev_dbg(dev->class_dev, 268 "chanlist must be consecutive\n"); 269 return -EINVAL; 270 } 271 272 if (range != range0) { 273 dev_dbg(dev->class_dev, 274 "chanlist must have the same range\n"); 275 return -EINVAL; 276 } 277 278 if (aref != aref0) { 279 dev_dbg(dev->class_dev, 280 "chanlist must have the same reference\n"); 281 return -EINVAL; 282 } 283 284 if (aref0 == AREF_DIFF && chan > (s->n_chan / 2)) { 285 dev_dbg(dev->class_dev, 286 "chanlist differential channel too large\n"); 287 return -EINVAL; 288 } 289 } 290 return 0; 291 } 292 293 static int das6402_ai_cmdtest(struct comedi_device *dev, 294 struct comedi_subdevice *s, 295 struct comedi_cmd *cmd) 296 { 297 int err = 0; 298 unsigned int arg; 299 300 /* Step 1 : check if triggers are trivially valid */ 301 302 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW); 303 err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW); 304 err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_TIMER); 305 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT); 306 err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE); 307 308 if (err) 309 return 1; 310 311 /* Step 2a : make sure trigger sources are unique */ 312 313 err |= comedi_check_trigger_is_unique(cmd->stop_src); 314 315 /* Step 2b : and mutually compatible */ 316 317 if (err) 318 return 2; 319 320 /* Step 3: check if arguments are trivially valid */ 321 322 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0); 323 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0); 324 err |= comedi_check_trigger_arg_min(&cmd->convert_arg, 10000); 325 err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1); 326 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg, 327 cmd->chanlist_len); 328 329 if (cmd->stop_src == TRIG_COUNT) 330 err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1); 331 else /* TRIG_NONE */ 332 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0); 333 334 if (err) 335 return 3; 336 337 /* step 4: fix up any arguments */ 338 339 arg = cmd->convert_arg; 340 comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags); 341 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg); 342 343 if (err) 344 return 4; 345 346 /* Step 5: check channel list if it exists */ 347 if (cmd->chanlist && cmd->chanlist_len > 0) 348 err |= das6402_ai_check_chanlist(dev, s, cmd); 349 350 if (err) 351 return 5; 352 353 return 0; 354 } 355 356 static int das6402_ai_cancel(struct comedi_device *dev, 357 struct comedi_subdevice *s) 358 { 359 outb(DAS6402_CTRL_SOFT_TRIG, dev->iobase + DAS6402_CTRL_REG); 360 361 return 0; 362 } 363 364 static void das6402_ai_soft_trig(struct comedi_device *dev) 365 { 366 outw(0, dev->iobase + DAS6402_AI_DATA_REG); 367 } 368 369 static int das6402_ai_eoc(struct comedi_device *dev, 370 struct comedi_subdevice *s, 371 struct comedi_insn *insn, 372 unsigned long context) 373 { 374 unsigned int status; 375 376 status = inb(dev->iobase + DAS6402_STATUS_REG); 377 if (status & DAS6402_STATUS_FFNE) 378 return 0; 379 return -EBUSY; 380 } 381 382 static int das6402_ai_insn_read(struct comedi_device *dev, 383 struct comedi_subdevice *s, 384 struct comedi_insn *insn, 385 unsigned int *data) 386 { 387 unsigned int chan = CR_CHAN(insn->chanspec); 388 unsigned int aref = CR_AREF(insn->chanspec); 389 int ret; 390 int i; 391 392 if (aref == AREF_DIFF && chan > (s->n_chan / 2)) 393 return -EINVAL; 394 395 /* enable software conversion trigger */ 396 outb(DAS6402_CTRL_SOFT_TRIG, dev->iobase + DAS6402_CTRL_REG); 397 398 das6402_ai_set_mode(dev, s, insn->chanspec, DAS6402_MODE_POLLED); 399 400 /* load the mux for single channel conversion */ 401 outw(DAS6402_AI_MUX_HI(chan) | DAS6402_AI_MUX_LO(chan), 402 dev->iobase + DAS6402_AI_MUX_REG); 403 404 for (i = 0; i < insn->n; i++) { 405 das6402_ai_clear_eoc(dev); 406 das6402_ai_soft_trig(dev); 407 408 ret = comedi_timeout(dev, s, insn, das6402_ai_eoc, 0); 409 if (ret) 410 break; 411 412 data[i] = das6402_ai_read_sample(dev, s); 413 } 414 415 das6402_ai_clear_eoc(dev); 416 417 return insn->n; 418 } 419 420 static int das6402_ao_insn_write(struct comedi_device *dev, 421 struct comedi_subdevice *s, 422 struct comedi_insn *insn, 423 unsigned int *data) 424 { 425 struct das6402_private *devpriv = dev->private; 426 unsigned int chan = CR_CHAN(insn->chanspec); 427 unsigned int range = CR_RANGE(insn->chanspec); 428 unsigned int val; 429 int i; 430 431 /* set the range for this channel */ 432 val = devpriv->ao_range; 433 val &= ~DAS6402_AO_RANGE_MASK(chan); 434 val |= DAS6402_AO_RANGE(chan, range); 435 if (val != devpriv->ao_range) { 436 devpriv->ao_range = val; 437 outb(val, dev->iobase + DAS6402_TRIG_REG); 438 } 439 440 /* 441 * The DAS6402/16 has a jumper to select either individual 442 * update (UPDATE) or simultaneous updating (XFER) of both 443 * DAC's. In UPDATE mode, when the MSB is written, that DAC 444 * is updated. In XFER mode, after both DAC's are loaded, 445 * a read cycle of any DAC register will update both DAC's 446 * simultaneously. 447 * 448 * If you have XFER mode enabled a (*insn_read) will need 449 * to be performed in order to update the DAC's with the 450 * last value written. 451 */ 452 for (i = 0; i < insn->n; i++) { 453 val = data[i]; 454 455 s->readback[chan] = val; 456 457 if (s->maxdata == 0x0fff) { 458 /* 459 * DAS6402/12 has the two 8-bit DAC registers, left 460 * justified (the 4 LSB bits are don't care). Data 461 * can be written as one word. 462 */ 463 val <<= 4; 464 outw(val, dev->iobase + DAS6402_AO_DATA_REG(chan)); 465 } else { 466 /* 467 * DAS6402/16 uses both 8-bit DAC registers and needs 468 * to be written LSB then MSB. 469 */ 470 outb(val & 0xff, 471 dev->iobase + DAS6402_AO_LSB_REG(chan)); 472 outb((val >> 8) & 0xff, 473 dev->iobase + DAS6402_AO_LSB_REG(chan)); 474 } 475 } 476 477 return insn->n; 478 } 479 480 static int das6402_ao_insn_read(struct comedi_device *dev, 481 struct comedi_subdevice *s, 482 struct comedi_insn *insn, 483 unsigned int *data) 484 { 485 unsigned int chan = CR_CHAN(insn->chanspec); 486 487 /* 488 * If XFER mode is enabled, reading any DAC register 489 * will update both DAC's simultaneously. 490 */ 491 inw(dev->iobase + DAS6402_AO_LSB_REG(chan)); 492 493 return comedi_readback_insn_read(dev, s, insn, data); 494 } 495 496 static int das6402_di_insn_bits(struct comedi_device *dev, 497 struct comedi_subdevice *s, 498 struct comedi_insn *insn, 499 unsigned int *data) 500 { 501 data[1] = inb(dev->iobase + DAS6402_DI_DO_REG); 502 503 return insn->n; 504 } 505 506 static int das6402_do_insn_bits(struct comedi_device *dev, 507 struct comedi_subdevice *s, 508 struct comedi_insn *insn, 509 unsigned int *data) 510 { 511 if (comedi_dio_update_state(s, data)) 512 outb(s->state, dev->iobase + DAS6402_DI_DO_REG); 513 514 data[1] = s->state; 515 516 return insn->n; 517 } 518 519 static void das6402_reset(struct comedi_device *dev) 520 { 521 struct das6402_private *devpriv = dev->private; 522 523 /* enable "Enhanced" mode */ 524 outb(DAS6402_MODE_ENHANCED, dev->iobase + DAS6402_MODE_REG); 525 526 /* enable 10MHz pacer clock */ 527 das6402_set_extended(dev, DAS6402_STATUS_W_10MHZ); 528 529 /* enable software conversion trigger */ 530 outb(DAS6402_CTRL_SOFT_TRIG, dev->iobase + DAS6402_CTRL_REG); 531 532 /* default ADC to single-ended unipolar 10V inputs */ 533 das6402_set_mode(dev, DAS6402_MODE_RANGE(0) | 534 DAS6402_MODE_POLLED | 535 DAS6402_MODE_SE | 536 DAS6402_MODE_UNI); 537 538 /* default mux for single channel conversion (channel 0) */ 539 outw(DAS6402_AI_MUX_HI(0) | DAS6402_AI_MUX_LO(0), 540 dev->iobase + DAS6402_AI_MUX_REG); 541 542 /* set both DAC's for unipolar 5V output range */ 543 devpriv->ao_range = DAS6402_AO_RANGE(0, 2) | DAS6402_AO_RANGE(1, 2); 544 outb(devpriv->ao_range, dev->iobase + DAS6402_TRIG_REG); 545 546 /* set both DAC's to 0V */ 547 outw(0, dev->iobase + DAS6402_AO_DATA_REG(0)); 548 outw(0, dev->iobase + DAS6402_AO_DATA_REG(0)); 549 inw(dev->iobase + DAS6402_AO_LSB_REG(0)); 550 551 /* set all digital outputs low */ 552 outb(0, dev->iobase + DAS6402_DI_DO_REG); 553 554 das6402_clear_all_interrupts(dev); 555 } 556 557 static int das6402_attach(struct comedi_device *dev, 558 struct comedi_devconfig *it) 559 { 560 const struct das6402_boardinfo *board = dev->board_ptr; 561 struct das6402_private *devpriv; 562 struct comedi_subdevice *s; 563 int ret; 564 565 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv)); 566 if (!devpriv) 567 return -ENOMEM; 568 569 ret = comedi_check_request_region(dev, it->options[0], 0x10, 570 0, 0x3ff, 16); 571 if (ret) 572 return ret; 573 574 das6402_reset(dev); 575 576 /* IRQs 2,3,5,6,7, 10,11,15 are valid for "enhanced" mode */ 577 if (it->options[1] > 0 && it->options[1] < 16 && 578 (1 << it->options[1]) & 0x8cec) { 579 ret = request_irq(it->options[1], das6402_interrupt, 0, 580 dev->board_name, dev); 581 if (ret == 0) { 582 dev->irq = it->options[1]; 583 584 switch (dev->irq) { 585 case 10: 586 devpriv->irq = 4; 587 break; 588 case 11: 589 devpriv->irq = 1; 590 break; 591 case 15: 592 devpriv->irq = 6; 593 break; 594 default: 595 devpriv->irq = dev->irq; 596 break; 597 } 598 } 599 } 600 601 dev->pacer = comedi_8254_io_alloc(dev->iobase + DAS6402_TIMER_BASE, 602 I8254_OSC_BASE_10MHZ, I8254_IO8, 0); 603 if (IS_ERR(dev->pacer)) 604 return PTR_ERR(dev->pacer); 605 606 ret = comedi_alloc_subdevices(dev, 4); 607 if (ret) 608 return ret; 609 610 /* Analog Input subdevice */ 611 s = &dev->subdevices[0]; 612 s->type = COMEDI_SUBD_AI; 613 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF; 614 s->n_chan = 64; 615 s->maxdata = board->maxdata; 616 s->range_table = &das6402_ai_ranges; 617 s->insn_read = das6402_ai_insn_read; 618 if (dev->irq) { 619 dev->read_subdev = s; 620 s->subdev_flags |= SDF_CMD_READ; 621 s->len_chanlist = s->n_chan; 622 s->do_cmdtest = das6402_ai_cmdtest; 623 s->do_cmd = das6402_ai_cmd; 624 s->cancel = das6402_ai_cancel; 625 } 626 627 /* Analog Output subdevice */ 628 s = &dev->subdevices[1]; 629 s->type = COMEDI_SUBD_AO; 630 s->subdev_flags = SDF_WRITABLE; 631 s->n_chan = 2; 632 s->maxdata = board->maxdata; 633 s->range_table = &das6402_ao_ranges; 634 s->insn_write = das6402_ao_insn_write; 635 s->insn_read = das6402_ao_insn_read; 636 637 ret = comedi_alloc_subdev_readback(s); 638 if (ret) 639 return ret; 640 641 /* Digital Input subdevice */ 642 s = &dev->subdevices[2]; 643 s->type = COMEDI_SUBD_DI; 644 s->subdev_flags = SDF_READABLE; 645 s->n_chan = 8; 646 s->maxdata = 1; 647 s->range_table = &range_digital; 648 s->insn_bits = das6402_di_insn_bits; 649 650 /* Digital Input subdevice */ 651 s = &dev->subdevices[3]; 652 s->type = COMEDI_SUBD_DO; 653 s->subdev_flags = SDF_WRITABLE; 654 s->n_chan = 8; 655 s->maxdata = 1; 656 s->range_table = &range_digital; 657 s->insn_bits = das6402_do_insn_bits; 658 659 return 0; 660 } 661 662 static struct comedi_driver das6402_driver = { 663 .driver_name = "das6402", 664 .module = THIS_MODULE, 665 .attach = das6402_attach, 666 .detach = comedi_legacy_detach, 667 .board_name = &das6402_boards[0].name, 668 .num_names = ARRAY_SIZE(das6402_boards), 669 .offset = sizeof(struct das6402_boardinfo), 670 }; 671 module_comedi_driver(das6402_driver) 672 673 MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>"); 674 MODULE_DESCRIPTION("Comedi driver for DAS6402 compatible boards"); 675 MODULE_LICENSE("GPL"); 676