1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2017 Free Electrons 4 */ 5 6 #include <linux/delay.h> 7 #include <linux/gpio/consumer.h> 8 #include <linux/module.h> 9 #include <linux/regulator/consumer.h> 10 #include <linux/spi/spi.h> 11 12 #include <video/mipi_display.h> 13 #include <linux/media-bus-format.h> 14 15 #include <drm/drm_device.h> 16 #include <drm/drm_modes.h> 17 #include <drm/drm_of.h> 18 #include <drm/drm_panel.h> 19 20 #define ST7789V_RAMCTRL_CMD 0xb0 21 #define ST7789V_RAMCTRL_RM_RGB BIT(4) 22 #define ST7789V_RAMCTRL_DM_RGB BIT(0) 23 #define ST7789V_RAMCTRL_MAGIC (3 << 6) 24 #define ST7789V_RAMCTRL_EPF(n) (((n) & 3) << 4) 25 26 #define ST7789V_RGBCTRL_CMD 0xb1 27 #define ST7789V_RGBCTRL_WO BIT(7) 28 #define ST7789V_RGBCTRL_RCM(n) (((n) & 3) << 5) 29 #define ST7789V_RGBCTRL_VSYNC_HIGH BIT(3) 30 #define ST7789V_RGBCTRL_HSYNC_HIGH BIT(2) 31 #define ST7789V_RGBCTRL_PCLK_FALLING BIT(1) 32 #define ST7789V_RGBCTRL_DE_LOW BIT(0) 33 #define ST7789V_RGBCTRL_VBP(n) ((n) & 0x7f) 34 #define ST7789V_RGBCTRL_HBP(n) ((n) & 0x1f) 35 36 #define ST7789V_PORCTRL_CMD 0xb2 37 #define ST7789V_PORCTRL_IDLE_BP(n) (((n) & 0xf) << 4) 38 #define ST7789V_PORCTRL_IDLE_FP(n) ((n) & 0xf) 39 #define ST7789V_PORCTRL_PARTIAL_BP(n) (((n) & 0xf) << 4) 40 #define ST7789V_PORCTRL_PARTIAL_FP(n) ((n) & 0xf) 41 42 #define ST7789V_GCTRL_CMD 0xb7 43 #define ST7789V_GCTRL_VGHS(n) (((n) & 7) << 4) 44 #define ST7789V_GCTRL_VGLS(n) ((n) & 7) 45 46 #define ST7789V_VCOMS_CMD 0xbb 47 48 #define ST7789V_LCMCTRL_CMD 0xc0 49 #define ST7789V_LCMCTRL_XBGR BIT(5) 50 #define ST7789V_LCMCTRL_XMX BIT(3) 51 #define ST7789V_LCMCTRL_XMH BIT(2) 52 53 #define ST7789V_VDVVRHEN_CMD 0xc2 54 #define ST7789V_VDVVRHEN_CMDEN BIT(0) 55 56 #define ST7789V_VRHS_CMD 0xc3 57 58 #define ST7789V_VDVS_CMD 0xc4 59 60 #define ST7789V_FRCTRL2_CMD 0xc6 61 62 #define ST7789V_PWCTRL1_CMD 0xd0 63 #define ST7789V_PWCTRL1_MAGIC 0xa4 64 #define ST7789V_PWCTRL1_AVDD(n) (((n) & 3) << 6) 65 #define ST7789V_PWCTRL1_AVCL(n) (((n) & 3) << 4) 66 #define ST7789V_PWCTRL1_VDS(n) ((n) & 3) 67 68 #define ST7789V_PVGAMCTRL_CMD 0xe0 69 #define ST7789V_PVGAMCTRL_JP0(n) (((n) & 3) << 4) 70 #define ST7789V_PVGAMCTRL_JP1(n) (((n) & 3) << 4) 71 #define ST7789V_PVGAMCTRL_VP0(n) ((n) & 0xf) 72 #define ST7789V_PVGAMCTRL_VP1(n) ((n) & 0x3f) 73 #define ST7789V_PVGAMCTRL_VP2(n) ((n) & 0x3f) 74 #define ST7789V_PVGAMCTRL_VP4(n) ((n) & 0x1f) 75 #define ST7789V_PVGAMCTRL_VP6(n) ((n) & 0x1f) 76 #define ST7789V_PVGAMCTRL_VP13(n) ((n) & 0xf) 77 #define ST7789V_PVGAMCTRL_VP20(n) ((n) & 0x7f) 78 #define ST7789V_PVGAMCTRL_VP27(n) ((n) & 7) 79 #define ST7789V_PVGAMCTRL_VP36(n) (((n) & 7) << 4) 80 #define ST7789V_PVGAMCTRL_VP43(n) ((n) & 0x7f) 81 #define ST7789V_PVGAMCTRL_VP50(n) ((n) & 0xf) 82 #define ST7789V_PVGAMCTRL_VP57(n) ((n) & 0x1f) 83 #define ST7789V_PVGAMCTRL_VP59(n) ((n) & 0x1f) 84 #define ST7789V_PVGAMCTRL_VP61(n) ((n) & 0x3f) 85 #define ST7789V_PVGAMCTRL_VP62(n) ((n) & 0x3f) 86 #define ST7789V_PVGAMCTRL_VP63(n) (((n) & 0xf) << 4) 87 88 #define ST7789V_NVGAMCTRL_CMD 0xe1 89 #define ST7789V_NVGAMCTRL_JN0(n) (((n) & 3) << 4) 90 #define ST7789V_NVGAMCTRL_JN1(n) (((n) & 3) << 4) 91 #define ST7789V_NVGAMCTRL_VN0(n) ((n) & 0xf) 92 #define ST7789V_NVGAMCTRL_VN1(n) ((n) & 0x3f) 93 #define ST7789V_NVGAMCTRL_VN2(n) ((n) & 0x3f) 94 #define ST7789V_NVGAMCTRL_VN4(n) ((n) & 0x1f) 95 #define ST7789V_NVGAMCTRL_VN6(n) ((n) & 0x1f) 96 #define ST7789V_NVGAMCTRL_VN13(n) ((n) & 0xf) 97 #define ST7789V_NVGAMCTRL_VN20(n) ((n) & 0x7f) 98 #define ST7789V_NVGAMCTRL_VN27(n) ((n) & 7) 99 #define ST7789V_NVGAMCTRL_VN36(n) (((n) & 7) << 4) 100 #define ST7789V_NVGAMCTRL_VN43(n) ((n) & 0x7f) 101 #define ST7789V_NVGAMCTRL_VN50(n) ((n) & 0xf) 102 #define ST7789V_NVGAMCTRL_VN57(n) ((n) & 0x1f) 103 #define ST7789V_NVGAMCTRL_VN59(n) ((n) & 0x1f) 104 #define ST7789V_NVGAMCTRL_VN61(n) ((n) & 0x3f) 105 #define ST7789V_NVGAMCTRL_VN62(n) ((n) & 0x3f) 106 #define ST7789V_NVGAMCTRL_VN63(n) (((n) & 0xf) << 4) 107 108 #define ST7789V_TEST(val, func) \ 109 do { \ 110 if ((val = (func))) \ 111 return val; \ 112 } while (0) 113 114 #define ST7789V_IDS { 0x85, 0x85, 0x52 } 115 #define ST7789V_IDS_SIZE 3 116 117 struct st7789_panel_info { 118 const struct drm_display_mode *mode; 119 u32 bus_format; 120 u32 bus_flags; 121 bool invert_mode; 122 bool partial_mode; 123 u16 partial_start; 124 u16 partial_end; 125 }; 126 127 struct st7789v { 128 struct drm_panel panel; 129 const struct st7789_panel_info *info; 130 struct spi_device *spi; 131 struct gpio_desc *reset; 132 struct regulator *power; 133 enum drm_panel_orientation orientation; 134 }; 135 136 enum st7789v_prefix { 137 ST7789V_COMMAND = 0, 138 ST7789V_DATA = 1, 139 }; 140 141 static inline struct st7789v *panel_to_st7789v(struct drm_panel *panel) 142 { 143 return container_of(panel, struct st7789v, panel); 144 } 145 146 static int st7789v_spi_write(struct st7789v *ctx, enum st7789v_prefix prefix, 147 u8 data) 148 { 149 struct spi_transfer xfer = { }; 150 u16 txbuf = ((prefix & 1) << 8) | data; 151 152 xfer.tx_buf = &txbuf; 153 xfer.len = sizeof(txbuf); 154 155 return spi_sync_transfer(ctx->spi, &xfer, 1); 156 } 157 158 static int st7789v_write_command(struct st7789v *ctx, u8 cmd) 159 { 160 return st7789v_spi_write(ctx, ST7789V_COMMAND, cmd); 161 } 162 163 static int st7789v_write_data(struct st7789v *ctx, u8 cmd) 164 { 165 return st7789v_spi_write(ctx, ST7789V_DATA, cmd); 166 } 167 168 static int st7789v_read_data(struct st7789v *ctx, u8 cmd, u8 *buf, 169 unsigned int len) 170 { 171 struct spi_transfer xfer[2] = { }; 172 struct spi_message msg; 173 u16 txbuf = ((ST7789V_COMMAND & 1) << 8) | cmd; 174 u16 rxbuf[4] = {}; 175 u8 bit9 = 0; 176 int ret, i; 177 178 switch (len) { 179 case 1: 180 case 3: 181 case 4: 182 break; 183 default: 184 return -EOPNOTSUPP; 185 } 186 187 spi_message_init(&msg); 188 189 xfer[0].tx_buf = &txbuf; 190 xfer[0].len = sizeof(txbuf); 191 spi_message_add_tail(&xfer[0], &msg); 192 193 xfer[1].rx_buf = rxbuf; 194 xfer[1].len = len * 2; 195 spi_message_add_tail(&xfer[1], &msg); 196 197 ret = spi_sync(ctx->spi, &msg); 198 if (ret) 199 return ret; 200 201 for (i = 0; i < len; i++) { 202 buf[i] = rxbuf[i] >> i | (bit9 << (9 - i)); 203 if (i) 204 bit9 = rxbuf[i] & GENMASK(i - 1, 0); 205 } 206 207 return 0; 208 } 209 210 static int st7789v_check_id(struct drm_panel *panel) 211 { 212 const u8 st7789v_ids[ST7789V_IDS_SIZE] = ST7789V_IDS; 213 struct st7789v *ctx = panel_to_st7789v(panel); 214 bool invalid_ids = false; 215 int ret, i; 216 u8 ids[3]; 217 218 if (ctx->spi->mode & SPI_NO_RX) 219 return 0; 220 221 ret = st7789v_read_data(ctx, MIPI_DCS_GET_DISPLAY_ID, ids, ST7789V_IDS_SIZE); 222 if (ret) 223 return ret; 224 225 for (i = 0; i < ST7789V_IDS_SIZE; i++) { 226 if (ids[i] != st7789v_ids[i]) { 227 invalid_ids = true; 228 break; 229 } 230 } 231 232 if (invalid_ids) 233 return -EIO; 234 235 return 0; 236 } 237 238 static const struct drm_display_mode default_mode = { 239 .clock = 7000, 240 .hdisplay = 240, 241 .hsync_start = 240 + 38, 242 .hsync_end = 240 + 38 + 10, 243 .htotal = 240 + 38 + 10 + 10, 244 .vdisplay = 320, 245 .vsync_start = 320 + 8, 246 .vsync_end = 320 + 8 + 4, 247 .vtotal = 320 + 8 + 4 + 4, 248 .width_mm = 61, 249 .height_mm = 103, 250 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 251 }; 252 253 /* 254 * The mode data for this panel has been reverse engineered without access 255 * to the panel datasheet / manual. Using DRM_MODE_FLAG_PHSYNC like all 256 * other panels results in garbage data on the display. 257 */ 258 static const struct drm_display_mode t28cp45tn89_mode = { 259 .clock = 6008, 260 .hdisplay = 240, 261 .hsync_start = 240 + 38, 262 .hsync_end = 240 + 38 + 10, 263 .htotal = 240 + 38 + 10 + 10, 264 .vdisplay = 320, 265 .vsync_start = 320 + 8, 266 .vsync_end = 320 + 8 + 4, 267 .vtotal = 320 + 8 + 4 + 4, 268 .width_mm = 43, 269 .height_mm = 57, 270 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC, 271 }; 272 273 static const struct drm_display_mode et028013dma_mode = { 274 .clock = 3000, 275 .hdisplay = 240, 276 .hsync_start = 240 + 38, 277 .hsync_end = 240 + 38 + 10, 278 .htotal = 240 + 38 + 10 + 10, 279 .vdisplay = 320, 280 .vsync_start = 320 + 8, 281 .vsync_end = 320 + 8 + 4, 282 .vtotal = 320 + 8 + 4 + 4, 283 .width_mm = 43, 284 .height_mm = 58, 285 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 286 }; 287 288 static const struct drm_display_mode jt240mhqs_hwt_ek_e3_mode = { 289 .clock = 6000, 290 .hdisplay = 240, 291 .hsync_start = 240 + 38, 292 .hsync_end = 240 + 38 + 10, 293 .htotal = 240 + 38 + 10 + 10, 294 .vdisplay = 280, 295 .vsync_start = 280 + 48, 296 .vsync_end = 280 + 48 + 4, 297 .vtotal = 280 + 48 + 4 + 4, 298 .width_mm = 37, 299 .height_mm = 43, 300 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 301 }; 302 303 static const struct st7789_panel_info default_panel = { 304 .mode = &default_mode, 305 .invert_mode = true, 306 .bus_format = MEDIA_BUS_FMT_RGB666_1X18, 307 .bus_flags = DRM_BUS_FLAG_DE_HIGH | 308 DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE, 309 }; 310 311 static const struct st7789_panel_info t28cp45tn89_panel = { 312 .mode = &t28cp45tn89_mode, 313 .invert_mode = false, 314 .bus_format = MEDIA_BUS_FMT_RGB565_1X16, 315 .bus_flags = DRM_BUS_FLAG_DE_HIGH | 316 DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, 317 }; 318 319 static const struct st7789_panel_info et028013dma_panel = { 320 .mode = &et028013dma_mode, 321 .invert_mode = true, 322 .bus_format = MEDIA_BUS_FMT_RGB666_1X18, 323 .bus_flags = DRM_BUS_FLAG_DE_HIGH | 324 DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, 325 }; 326 327 static const struct st7789_panel_info jt240mhqs_hwt_ek_e3_panel = { 328 .mode = &jt240mhqs_hwt_ek_e3_mode, 329 .invert_mode = true, 330 .bus_format = MEDIA_BUS_FMT_RGB666_1X18, 331 .bus_flags = DRM_BUS_FLAG_DE_HIGH | 332 DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE, 333 .partial_mode = true, 334 .partial_start = 38, 335 .partial_end = 318, 336 }; 337 338 static int st7789v_get_modes(struct drm_panel *panel, 339 struct drm_connector *connector) 340 { 341 struct st7789v *ctx = panel_to_st7789v(panel); 342 struct drm_display_mode *mode; 343 344 mode = drm_mode_duplicate(connector->dev, ctx->info->mode); 345 if (!mode) { 346 dev_err(panel->dev, "failed to add mode %ux%u@%u\n", 347 ctx->info->mode->hdisplay, ctx->info->mode->vdisplay, 348 drm_mode_vrefresh(ctx->info->mode)); 349 return -ENOMEM; 350 } 351 352 drm_mode_set_name(mode); 353 354 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 355 drm_mode_probed_add(connector, mode); 356 357 connector->display_info.bpc = 6; 358 connector->display_info.width_mm = ctx->info->mode->width_mm; 359 connector->display_info.height_mm = ctx->info->mode->height_mm; 360 connector->display_info.bus_flags = ctx->info->bus_flags; 361 drm_display_info_set_bus_formats(&connector->display_info, 362 &ctx->info->bus_format, 1); 363 364 /* 365 * TODO: Remove once all drm drivers call 366 * drm_connector_set_orientation_from_panel() 367 */ 368 drm_connector_set_panel_orientation(connector, ctx->orientation); 369 370 return 1; 371 } 372 373 static enum drm_panel_orientation st7789v_get_orientation(struct drm_panel *p) 374 { 375 struct st7789v *ctx = panel_to_st7789v(p); 376 377 return ctx->orientation; 378 } 379 380 static int st7789v_prepare(struct drm_panel *panel) 381 { 382 struct st7789v *ctx = panel_to_st7789v(panel); 383 u8 mode, pixel_fmt, polarity; 384 int ret; 385 386 if (!ctx->info->partial_mode) 387 mode = ST7789V_RGBCTRL_WO; 388 else 389 mode = 0; 390 391 switch (ctx->info->bus_format) { 392 case MEDIA_BUS_FMT_RGB666_1X18: 393 pixel_fmt = MIPI_DCS_PIXEL_FMT_18BIT; 394 break; 395 case MEDIA_BUS_FMT_RGB565_1X16: 396 pixel_fmt = MIPI_DCS_PIXEL_FMT_16BIT; 397 break; 398 default: 399 dev_err(panel->dev, "unsupported bus format: %d\n", 400 ctx->info->bus_format); 401 return -EINVAL; 402 } 403 404 pixel_fmt = (pixel_fmt << 4) | pixel_fmt; 405 406 polarity = 0; 407 if (ctx->info->mode->flags & DRM_MODE_FLAG_PVSYNC) 408 polarity |= ST7789V_RGBCTRL_VSYNC_HIGH; 409 if (ctx->info->mode->flags & DRM_MODE_FLAG_PHSYNC) 410 polarity |= ST7789V_RGBCTRL_HSYNC_HIGH; 411 if (ctx->info->bus_flags & DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE) 412 polarity |= ST7789V_RGBCTRL_PCLK_FALLING; 413 if (ctx->info->bus_flags & DRM_BUS_FLAG_DE_LOW) 414 polarity |= ST7789V_RGBCTRL_DE_LOW; 415 416 ret = regulator_enable(ctx->power); 417 if (ret) 418 return ret; 419 420 gpiod_set_value(ctx->reset, 1); 421 msleep(30); 422 gpiod_set_value(ctx->reset, 0); 423 msleep(120); 424 425 /* 426 * Avoid failing if the IDs are invalid in case the Rx bus width 427 * description is missing. 428 */ 429 ret = st7789v_check_id(panel); 430 if (ret) 431 dev_warn(panel->dev, "Unrecognized panel IDs"); 432 433 ST7789V_TEST(ret, st7789v_write_command(ctx, MIPI_DCS_EXIT_SLEEP_MODE)); 434 435 /* We need to wait 120ms after a sleep out command */ 436 msleep(120); 437 438 ST7789V_TEST(ret, st7789v_write_command(ctx, 439 MIPI_DCS_SET_ADDRESS_MODE)); 440 ST7789V_TEST(ret, st7789v_write_data(ctx, 0)); 441 442 ST7789V_TEST(ret, st7789v_write_command(ctx, 443 MIPI_DCS_SET_PIXEL_FORMAT)); 444 ST7789V_TEST(ret, st7789v_write_data(ctx, pixel_fmt)); 445 446 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_PORCTRL_CMD)); 447 ST7789V_TEST(ret, st7789v_write_data(ctx, 0xc)); 448 ST7789V_TEST(ret, st7789v_write_data(ctx, 0xc)); 449 ST7789V_TEST(ret, st7789v_write_data(ctx, 0)); 450 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PORCTRL_IDLE_BP(3) | 451 ST7789V_PORCTRL_IDLE_FP(3))); 452 ST7789V_TEST(ret, st7789v_write_data(ctx, 453 ST7789V_PORCTRL_PARTIAL_BP(3) | 454 ST7789V_PORCTRL_PARTIAL_FP(3))); 455 456 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_GCTRL_CMD)); 457 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_GCTRL_VGLS(5) | 458 ST7789V_GCTRL_VGHS(3))); 459 460 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VCOMS_CMD)); 461 ST7789V_TEST(ret, st7789v_write_data(ctx, 0x2b)); 462 463 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_LCMCTRL_CMD)); 464 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_LCMCTRL_XMH | 465 ST7789V_LCMCTRL_XMX | 466 ST7789V_LCMCTRL_XBGR)); 467 468 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VDVVRHEN_CMD)); 469 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_VDVVRHEN_CMDEN)); 470 471 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VRHS_CMD)); 472 ST7789V_TEST(ret, st7789v_write_data(ctx, 0xf)); 473 474 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VDVS_CMD)); 475 ST7789V_TEST(ret, st7789v_write_data(ctx, 0x20)); 476 477 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_FRCTRL2_CMD)); 478 ST7789V_TEST(ret, st7789v_write_data(ctx, 0xf)); 479 480 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_PWCTRL1_CMD)); 481 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PWCTRL1_MAGIC)); 482 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PWCTRL1_AVDD(2) | 483 ST7789V_PWCTRL1_AVCL(2) | 484 ST7789V_PWCTRL1_VDS(1))); 485 486 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_PVGAMCTRL_CMD)); 487 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP63(0xd))); 488 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP1(0xca))); 489 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP2(0xe))); 490 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP4(8))); 491 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP6(9))); 492 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP13(7))); 493 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP20(0x2d))); 494 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP27(0xb) | 495 ST7789V_PVGAMCTRL_VP36(3))); 496 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP43(0x3d))); 497 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_JP1(3) | 498 ST7789V_PVGAMCTRL_VP50(4))); 499 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP57(0xa))); 500 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP59(0xa))); 501 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP61(0x1b))); 502 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP62(0x28))); 503 504 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_NVGAMCTRL_CMD)); 505 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN63(0xd))); 506 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN1(0xca))); 507 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN2(0xf))); 508 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN4(8))); 509 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN6(8))); 510 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN13(7))); 511 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN20(0x2e))); 512 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN27(0xc) | 513 ST7789V_NVGAMCTRL_VN36(5))); 514 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN43(0x40))); 515 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_JN1(3) | 516 ST7789V_NVGAMCTRL_VN50(4))); 517 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN57(9))); 518 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN59(0xb))); 519 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN61(0x1b))); 520 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN62(0x28))); 521 522 if (ctx->info->invert_mode) { 523 ST7789V_TEST(ret, st7789v_write_command(ctx, 524 MIPI_DCS_ENTER_INVERT_MODE)); 525 } else { 526 ST7789V_TEST(ret, st7789v_write_command(ctx, 527 MIPI_DCS_EXIT_INVERT_MODE)); 528 } 529 530 if (ctx->info->partial_mode) { 531 u8 area_data[4] = { 532 (ctx->info->partial_start >> 8) & 0xff, 533 (ctx->info->partial_start >> 0) & 0xff, 534 ((ctx->info->partial_end - 1) >> 8) & 0xff, 535 ((ctx->info->partial_end - 1) >> 0) & 0xff, 536 }; 537 538 /* Caution: if userspace ever pushes a mode different from the 539 * expected one (i.e., the one advertised by get_modes), we'll 540 * add margins. 541 */ 542 543 ST7789V_TEST(ret, st7789v_write_command( 544 ctx, MIPI_DCS_ENTER_PARTIAL_MODE)); 545 546 ST7789V_TEST(ret, st7789v_write_command( 547 ctx, MIPI_DCS_SET_PAGE_ADDRESS)); 548 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[0])); 549 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[1])); 550 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[2])); 551 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[3])); 552 553 ST7789V_TEST(ret, st7789v_write_command( 554 ctx, MIPI_DCS_SET_PARTIAL_ROWS)); 555 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[0])); 556 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[1])); 557 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[2])); 558 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[3])); 559 } 560 561 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_RAMCTRL_CMD)); 562 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RAMCTRL_DM_RGB | 563 ST7789V_RAMCTRL_RM_RGB)); 564 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RAMCTRL_EPF(3) | 565 ST7789V_RAMCTRL_MAGIC)); 566 567 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_RGBCTRL_CMD)); 568 ST7789V_TEST(ret, st7789v_write_data(ctx, mode | 569 ST7789V_RGBCTRL_RCM(2) | 570 polarity)); 571 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RGBCTRL_VBP(8))); 572 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RGBCTRL_HBP(20))); 573 574 return 0; 575 } 576 577 static int st7789v_enable(struct drm_panel *panel) 578 { 579 struct st7789v *ctx = panel_to_st7789v(panel); 580 581 return st7789v_write_command(ctx, MIPI_DCS_SET_DISPLAY_ON); 582 } 583 584 static int st7789v_disable(struct drm_panel *panel) 585 { 586 struct st7789v *ctx = panel_to_st7789v(panel); 587 int ret; 588 589 ST7789V_TEST(ret, st7789v_write_command(ctx, MIPI_DCS_SET_DISPLAY_OFF)); 590 591 return 0; 592 } 593 594 static int st7789v_unprepare(struct drm_panel *panel) 595 { 596 struct st7789v *ctx = panel_to_st7789v(panel); 597 int ret; 598 599 ST7789V_TEST(ret, st7789v_write_command(ctx, MIPI_DCS_ENTER_SLEEP_MODE)); 600 601 regulator_disable(ctx->power); 602 603 return 0; 604 } 605 606 static const struct drm_panel_funcs st7789v_drm_funcs = { 607 .disable = st7789v_disable, 608 .enable = st7789v_enable, 609 .get_modes = st7789v_get_modes, 610 .get_orientation = st7789v_get_orientation, 611 .prepare = st7789v_prepare, 612 .unprepare = st7789v_unprepare, 613 }; 614 615 static int st7789v_probe(struct spi_device *spi) 616 { 617 struct device *dev = &spi->dev; 618 struct st7789v *ctx; 619 int ret; 620 621 ctx = devm_drm_panel_alloc(dev, struct st7789v, panel, 622 &st7789v_drm_funcs, DRM_MODE_CONNECTOR_DPI); 623 if (IS_ERR(ctx)) 624 return PTR_ERR(ctx); 625 626 spi_set_drvdata(spi, ctx); 627 ctx->spi = spi; 628 629 spi->bits_per_word = 9; 630 ret = spi_setup(spi); 631 if (ret < 0) 632 return dev_err_probe(&spi->dev, ret, "Failed to setup spi\n"); 633 634 ctx->info = device_get_match_data(&spi->dev); 635 636 ctx->power = devm_regulator_get(dev, "power"); 637 ret = PTR_ERR_OR_ZERO(ctx->power); 638 if (ret) 639 return dev_err_probe(dev, ret, "Failed to get regulator\n"); 640 641 ctx->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); 642 ret = PTR_ERR_OR_ZERO(ctx->reset); 643 if (ret) 644 return dev_err_probe(dev, ret, "Failed to get reset line\n"); 645 646 ret = drm_panel_of_backlight(&ctx->panel); 647 if (ret) 648 return dev_err_probe(dev, ret, "Failed to get backlight\n"); 649 650 ret = drm_of_get_panel_orientation(spi->dev.of_node, &ctx->orientation); 651 if (ret) 652 return dev_err_probe(&spi->dev, ret, "Failed to get orientation\n"); 653 654 drm_panel_add(&ctx->panel); 655 656 return 0; 657 } 658 659 static void st7789v_remove(struct spi_device *spi) 660 { 661 struct st7789v *ctx = spi_get_drvdata(spi); 662 663 drm_panel_remove(&ctx->panel); 664 } 665 666 static const struct spi_device_id st7789v_spi_id[] = { 667 { "st7789v", (unsigned long) &default_panel }, 668 { "t28cp45tn89-v17", (unsigned long) &t28cp45tn89_panel }, 669 { "et028013dma", (unsigned long) &et028013dma_panel }, 670 { "jt240mhqs-hwt-ek-e3", (unsigned long) &jt240mhqs_hwt_ek_e3_panel }, 671 { } 672 }; 673 MODULE_DEVICE_TABLE(spi, st7789v_spi_id); 674 675 static const struct of_device_id st7789v_of_match[] = { 676 { .compatible = "sitronix,st7789v", .data = &default_panel }, 677 { .compatible = "inanbo,t28cp45tn89-v17", .data = &t28cp45tn89_panel }, 678 { .compatible = "edt,et028013dma", .data = &et028013dma_panel }, 679 { .compatible = "jasonic,jt240mhqs-hwt-ek-e3", 680 .data = &jt240mhqs_hwt_ek_e3_panel }, 681 { } 682 }; 683 MODULE_DEVICE_TABLE(of, st7789v_of_match); 684 685 static struct spi_driver st7789v_driver = { 686 .probe = st7789v_probe, 687 .remove = st7789v_remove, 688 .id_table = st7789v_spi_id, 689 .driver = { 690 .name = "st7789v", 691 .of_match_table = st7789v_of_match, 692 }, 693 }; 694 module_spi_driver(st7789v_driver); 695 696 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); 697 MODULE_DESCRIPTION("Sitronix st7789v LCD Driver"); 698 MODULE_LICENSE("GPL v2"); 699