1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2005-2014, 2018-2023, 2025-2026 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #include <linux/types.h> 8 #include <linux/fips.h> 9 #include <linux/slab.h> 10 #include <linux/export.h> 11 #include <linux/etherdevice.h> 12 #include <linux/pci.h> 13 #include <linux/firmware.h> 14 15 #include "iwl-drv.h" 16 #include "iwl-modparams.h" 17 #include "iwl-nvm-parse.h" 18 #include "iwl-prph.h" 19 #include "iwl-io.h" 20 #include "iwl-csr.h" 21 #include "fw/api/nvm-reg.h" 22 #include "fw/api/commands.h" 23 #include "fw/api/cmdhdr.h" 24 #include "fw/img.h" 25 #include "fw/dbg.h" 26 27 #include "mei/iwl-mei.h" 28 29 /* NVM offsets (in words) definitions */ 30 enum nvm_offsets { 31 /* NVM HW-Section offset (in words) definitions */ 32 SUBSYSTEM_ID = 0x0A, 33 HW_ADDR = 0x15, 34 35 /* NVM SW-Section offset (in words) definitions */ 36 NVM_SW_SECTION = 0x1C0, 37 NVM_VERSION = 0, 38 RADIO_CFG = 1, 39 SKU = 2, 40 N_HW_ADDRS = 3, 41 NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION, 42 43 /* NVM REGULATORY -Section offset (in words) definitions */ 44 NVM_CHANNELS_SDP = 0, 45 }; 46 47 enum ext_nvm_offsets { 48 /* NVM HW-Section offset (in words) definitions */ 49 50 MAC_ADDRESS_OVERRIDE_EXT_NVM = 1, 51 52 /* NVM SW-Section offset (in words) definitions */ 53 NVM_VERSION_EXT_NVM = 0, 54 N_HW_ADDRS_FAMILY_8000 = 3, 55 56 /* NVM PHY_SKU-Section offset (in words) definitions */ 57 RADIO_CFG_FAMILY_EXT_NVM = 0, 58 SKU_FAMILY_8000 = 2, 59 60 /* NVM REGULATORY -Section offset (in words) definitions */ 61 NVM_CHANNELS_EXTENDED = 0, 62 NVM_LAR_OFFSET_OLD = 0x4C7, 63 NVM_LAR_OFFSET = 0x507, 64 NVM_LAR_ENABLED = 0x7, 65 }; 66 67 /* SKU Capabilities (actual values from NVM definition) */ 68 enum nvm_sku_bits { 69 NVM_SKU_CAP_BAND_24GHZ = BIT(0), 70 NVM_SKU_CAP_BAND_52GHZ = BIT(1), 71 NVM_SKU_CAP_11N_ENABLE = BIT(2), 72 NVM_SKU_CAP_11AC_ENABLE = BIT(3), 73 NVM_SKU_CAP_MIMO_DISABLE = BIT(5), 74 }; 75 76 /* 77 * These are the channel numbers in the order that they are stored in the NVM 78 */ 79 static const u16 iwl_nvm_channels[] = { 80 /* 2.4 GHz */ 81 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 82 /* 5 GHz */ 83 36, 40, 44, 48, 52, 56, 60, 64, 84 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 85 149, 153, 157, 161, 165 86 }; 87 88 static const u16 iwl_unii9_nvm_channels[] = { 89 /* 2.4 GHz */ 90 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 91 /* 5 GHz */ 92 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92, 93 96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 94 149, 153, 157, 161, 165, 169, 173, 177, 181, 95 /* 6-7 GHz */ 96 1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45, 49, 53, 57, 61, 65, 69, 97 73, 77, 81, 85, 89, 93, 97, 101, 105, 109, 113, 117, 121, 125, 129, 98 133, 137, 141, 145, 149, 153, 157, 161, 165, 169, 173, 177, 181, 185, 99 189, 193, 197, 201, 205, 209, 213, 217, 221, 225, 229, 233, 100 101 /* UNII-9 */ 102 237, 241, 245, 249, 253 103 }; 104 105 #define IWL_NVM_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels) 106 #define IWL_NVM_NUM_CHANNELS_EXT 51 107 #define IWL_NVM_NUM_CHANNELS_UHB 110 108 #define IWL_NVM_NUM_CHANNELS_UNII9 ARRAY_SIZE(iwl_unii9_nvm_channels) 109 #define NUM_2GHZ_CHANNELS 14 110 #define NUM_5GHZ_CHANNELS 37 111 #define FIRST_2GHZ_HT_MINUS 5 112 #define LAST_2GHZ_HT_PLUS 9 113 #define N_HW_ADDR_MASK 0xF 114 115 /* rate data (static) */ 116 static struct ieee80211_rate iwl_cfg80211_rates[] = { 117 { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, }, 118 { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1, 119 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 120 { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2, 121 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 122 { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3, 123 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 124 { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, }, 125 { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, }, 126 { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, }, 127 { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, }, 128 { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, }, 129 { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, }, 130 { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, }, 131 { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, }, 132 }; 133 #define RATES_24_OFFS 0 134 #define N_RATES_24 ARRAY_SIZE(iwl_cfg80211_rates) 135 #define RATES_52_OFFS 4 136 #define N_RATES_52 (N_RATES_24 - RATES_52_OFFS) 137 138 /** 139 * enum iwl_reg_capa_flags_v1 - global flags applied for the whole regulatory 140 * domain. 141 * @REG_CAPA_V1_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the 142 * 2.4Ghz band is allowed. 143 * @REG_CAPA_V1_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the 144 * 5Ghz band is allowed. 145 * @REG_CAPA_V1_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed 146 * for this regulatory domain (valid only in 5Ghz). 147 * @REG_CAPA_V1_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed 148 * for this regulatory domain (valid only in 5Ghz). 149 * @REG_CAPA_V1_MCS_8_ALLOWED: 11ac with MCS 8 is allowed. 150 * @REG_CAPA_V1_MCS_9_ALLOWED: 11ac with MCS 9 is allowed. 151 * @REG_CAPA_V1_40MHZ_FORBIDDEN: 11n channel with a width of 40Mhz is forbidden 152 * for this regulatory domain (valid only in 5Ghz). 153 * @REG_CAPA_V1_DC_HIGH_ENABLED: DC HIGH allowed. 154 * @REG_CAPA_V1_11AX_DISABLED: 11ax is forbidden for this regulatory domain. 155 */ 156 enum iwl_reg_capa_flags_v1 { 157 REG_CAPA_V1_BF_CCD_LOW_BAND = BIT(0), 158 REG_CAPA_V1_BF_CCD_HIGH_BAND = BIT(1), 159 REG_CAPA_V1_160MHZ_ALLOWED = BIT(2), 160 REG_CAPA_V1_80MHZ_ALLOWED = BIT(3), 161 REG_CAPA_V1_MCS_8_ALLOWED = BIT(4), 162 REG_CAPA_V1_MCS_9_ALLOWED = BIT(5), 163 REG_CAPA_V1_40MHZ_FORBIDDEN = BIT(7), 164 REG_CAPA_V1_DC_HIGH_ENABLED = BIT(9), 165 REG_CAPA_V1_11AX_DISABLED = BIT(10), 166 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_1 */ 167 168 /** 169 * enum iwl_reg_capa_flags_v2 - global flags applied for the whole regulatory 170 * domain (version 2). 171 * @REG_CAPA_V2_STRADDLE_DISABLED: Straddle channels (144, 142, 138) are 172 * disabled. 173 * @REG_CAPA_V2_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the 174 * 2.4Ghz band is allowed. 175 * @REG_CAPA_V2_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the 176 * 5Ghz band is allowed. 177 * @REG_CAPA_V2_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed 178 * for this regulatory domain (valid only in 5Ghz). 179 * @REG_CAPA_V2_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed 180 * for this regulatory domain (valid only in 5Ghz). 181 * @REG_CAPA_V2_MCS_8_ALLOWED: 11ac with MCS 8 is allowed. 182 * @REG_CAPA_V2_MCS_9_ALLOWED: 11ac with MCS 9 is allowed. 183 * @REG_CAPA_V2_WEATHER_DISABLED: Weather radar channels (120, 124, 128, 118, 184 * 126, 122) are disabled. 185 * @REG_CAPA_V2_40MHZ_ALLOWED: 11n channel with a width of 40Mhz is allowed 186 * for this regulatory domain (uvalid only in 5Ghz). 187 * @REG_CAPA_V2_11AX_DISABLED: 11ax is forbidden for this regulatory domain. 188 */ 189 enum iwl_reg_capa_flags_v2 { 190 REG_CAPA_V2_STRADDLE_DISABLED = BIT(0), 191 REG_CAPA_V2_BF_CCD_LOW_BAND = BIT(1), 192 REG_CAPA_V2_BF_CCD_HIGH_BAND = BIT(2), 193 REG_CAPA_V2_160MHZ_ALLOWED = BIT(3), 194 REG_CAPA_V2_80MHZ_ALLOWED = BIT(4), 195 REG_CAPA_V2_MCS_8_ALLOWED = BIT(5), 196 REG_CAPA_V2_MCS_9_ALLOWED = BIT(6), 197 REG_CAPA_V2_WEATHER_DISABLED = BIT(7), 198 REG_CAPA_V2_40MHZ_ALLOWED = BIT(8), 199 REG_CAPA_V2_11AX_DISABLED = BIT(10), 200 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_2 */ 201 202 /** 203 * enum iwl_reg_capa_flags_v5 - global flags applied for the whole regulatory 204 * domain. 205 * @REG_CAPA_V5_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed 206 * for this regulatory domain (valid only in 5Ghz). 207 * @REG_CAPA_V5_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed 208 * for this regulatory domain (valid only in 5Ghz). 209 * @REG_CAPA_V5_MCS_12_ALLOWED: 11ac with MCS 12 is allowed. 210 * @REG_CAPA_V5_MCS_13_ALLOWED: 11ac with MCS 13 is allowed. 211 * @REG_CAPA_V5_11BE_DISABLED: 11be is forbidden for this regulatory domain. 212 * @REG_CAPA_V5_11AX_DISABLED: 11ax is forbidden for this regulatory domain. 213 * @REG_CAPA_V5_320MHZ_ALLOWED: 11be channel with a width of 320Mhz is allowed 214 * for this regulatory domain (valid only in 5GHz). 215 * @REG_CAPA_V5_11BN_DISABLED: UHR is not allowed for this regulatory domain 216 */ 217 enum iwl_reg_capa_flags_v5 { 218 REG_CAPA_V5_160MHZ_ALLOWED = BIT(3), 219 REG_CAPA_V5_80MHZ_ALLOWED = BIT(4), 220 REG_CAPA_V5_MCS_12_ALLOWED = BIT(5), 221 REG_CAPA_V5_MCS_13_ALLOWED = BIT(6), 222 REG_CAPA_V5_11BE_DISABLED = BIT(8), 223 REG_CAPA_V5_11AX_DISABLED = BIT(13), 224 REG_CAPA_V5_320MHZ_ALLOWED = BIT(16), 225 REG_CAPA_V5_11BN_DISABLED = BIT(17), 226 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_4, 5 */ 227 228 /** 229 * enum iwl_reg_capa_flags_v6 - global capability flags, 230 * applicable from MCC response version 10 onwards. 231 * Response v6 includes all members of iwl_reg_capa_flags_v5; only v6-specific 232 * additions are listed here. 233 * @REG_CAPA_V6_EHT_PUNCTURING_ENABLED: EHT puncturing is enabled for this 234 * regulatory domain. 235 */ 236 enum iwl_reg_capa_flags_v6 { 237 REG_CAPA_V6_EHT_PUNCTURING_ENABLED = BIT(18), 238 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_6 */ 239 240 /* 241 * API v2 for reg_capa_flags is relevant from version 6 and onwards of the 242 * MCC update command response. 243 */ 244 #define REG_CAPA_V2_RESP_VER 6 245 246 /* API v4 for reg_capa_flags is relevant from version 8 and onwards of the 247 * MCC update command response. 248 */ 249 #define REG_CAPA_V4_RESP_VER 8 250 251 /* API v6 for reg_capa_flags is relevant from version 10 and onwards of the 252 * MCC update command response. 253 */ 254 #define REG_CAPA_V6_RESP_VER 10 255 256 static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level, 257 int chan, u32 flags) 258 { 259 #define CHECK_AND_PRINT_I(x) \ 260 ((flags & NVM_CHANNEL_##x) ? " " #x : "") 261 262 if (!(flags & NVM_CHANNEL_VALID)) { 263 IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n", 264 chan, flags); 265 return; 266 } 267 268 /* Note: already can print up to 101 characters, 110 is the limit! */ 269 IWL_DEBUG_DEV(dev, level, 270 "Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", 271 chan, flags, 272 CHECK_AND_PRINT_I(VALID), 273 CHECK_AND_PRINT_I(IBSS), 274 CHECK_AND_PRINT_I(ACTIVE), 275 CHECK_AND_PRINT_I(RADAR), 276 CHECK_AND_PRINT_I(INDOOR_ONLY), 277 CHECK_AND_PRINT_I(GO_CONCURRENT), 278 CHECK_AND_PRINT_I(UNIFORM), 279 CHECK_AND_PRINT_I(20MHZ), 280 CHECK_AND_PRINT_I(40MHZ), 281 CHECK_AND_PRINT_I(80MHZ), 282 CHECK_AND_PRINT_I(160MHZ), 283 CHECK_AND_PRINT_I(DC_HIGH), 284 CHECK_AND_PRINT_I(VLP), 285 CHECK_AND_PRINT_I(AFC)); 286 #undef CHECK_AND_PRINT_I 287 } 288 289 static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, enum nl80211_band band, 290 u32 nvm_flags, const struct iwl_rf_cfg *cfg) 291 { 292 u32 flags = IEEE80211_CHAN_NO_HT40; 293 294 if (band == NL80211_BAND_2GHZ && (nvm_flags & NVM_CHANNEL_40MHZ)) { 295 if (ch_num <= LAST_2GHZ_HT_PLUS) 296 flags &= ~IEEE80211_CHAN_NO_HT40PLUS; 297 if (ch_num >= FIRST_2GHZ_HT_MINUS) 298 flags &= ~IEEE80211_CHAN_NO_HT40MINUS; 299 } else if (nvm_flags & NVM_CHANNEL_40MHZ) { 300 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0) 301 flags &= ~IEEE80211_CHAN_NO_HT40PLUS; 302 else 303 flags &= ~IEEE80211_CHAN_NO_HT40MINUS; 304 } 305 if (!(nvm_flags & NVM_CHANNEL_80MHZ)) 306 flags |= IEEE80211_CHAN_NO_80MHZ; 307 if (!(nvm_flags & NVM_CHANNEL_160MHZ)) 308 flags |= IEEE80211_CHAN_NO_160MHZ; 309 310 if (!(nvm_flags & NVM_CHANNEL_IBSS)) 311 flags |= IEEE80211_CHAN_NO_IR; 312 313 if (!(nvm_flags & NVM_CHANNEL_ACTIVE)) 314 flags |= IEEE80211_CHAN_NO_IR; 315 316 if (nvm_flags & NVM_CHANNEL_RADAR) 317 flags |= IEEE80211_CHAN_RADAR; 318 319 if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY) 320 flags |= IEEE80211_CHAN_INDOOR_ONLY; 321 322 /* Set the GO concurrent flag only in case that NO_IR is set. 323 * Otherwise it is meaningless 324 */ 325 if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) && 326 (flags & IEEE80211_CHAN_NO_IR)) 327 flags |= IEEE80211_CHAN_IR_CONCURRENT; 328 329 /* Set the AP type for the UHB case. */ 330 if (nvm_flags & NVM_CHANNEL_VLP) 331 flags |= IEEE80211_CHAN_ALLOW_6GHZ_VLP_AP; 332 else 333 flags |= IEEE80211_CHAN_NO_6GHZ_VLP_CLIENT; 334 if (!(nvm_flags & NVM_CHANNEL_AFC)) 335 flags |= IEEE80211_CHAN_NO_6GHZ_AFC_CLIENT; 336 337 return flags; 338 } 339 340 static enum nl80211_band iwl_nl80211_band_from_channel_idx(int ch_idx) 341 { 342 if (ch_idx >= NUM_2GHZ_CHANNELS + NUM_5GHZ_CHANNELS) { 343 return NL80211_BAND_6GHZ; 344 } 345 346 if (ch_idx >= NUM_2GHZ_CHANNELS) 347 return NL80211_BAND_5GHZ; 348 return NL80211_BAND_2GHZ; 349 } 350 351 static int iwl_init_channel_map(struct iwl_trans *trans, 352 const struct iwl_fw *fw, 353 struct iwl_nvm_data *data, 354 const void * const nvm_ch_flags, 355 u32 sbands_flags, bool v4) 356 { 357 const struct iwl_rf_cfg *cfg = trans->cfg; 358 struct device *dev = trans->dev; 359 int ch_idx; 360 int n_channels = 0; 361 struct ieee80211_channel *channel; 362 u32 ch_flags; 363 int num_of_ch; 364 const u16 *nvm_chan; 365 366 if (cfg->unii9_supported) { 367 num_of_ch = IWL_NVM_NUM_CHANNELS_UNII9; 368 nvm_chan = iwl_unii9_nvm_channels; 369 } else if (cfg->uhb_supported) { 370 num_of_ch = IWL_NVM_NUM_CHANNELS_UHB; 371 nvm_chan = iwl_unii9_nvm_channels; 372 } else if (cfg->nvm_type == IWL_NVM_EXT) { 373 num_of_ch = IWL_NVM_NUM_CHANNELS_EXT; 374 nvm_chan = iwl_unii9_nvm_channels; 375 } else { 376 num_of_ch = IWL_NVM_NUM_CHANNELS; 377 nvm_chan = iwl_nvm_channels; 378 } 379 380 for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) { 381 enum nl80211_band band = 382 iwl_nl80211_band_from_channel_idx(ch_idx); 383 384 if (v4) 385 ch_flags = 386 __le32_to_cpup((const __le32 *)nvm_ch_flags + ch_idx); 387 else 388 ch_flags = 389 __le16_to_cpup((const __le16 *)nvm_ch_flags + ch_idx); 390 391 if (band == NL80211_BAND_5GHZ && 392 !data->sku_cap_band_52ghz_enable) 393 continue; 394 395 /* workaround to disable wide channels in 5GHz */ 396 if ((sbands_flags & IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ) && 397 band == NL80211_BAND_5GHZ) { 398 ch_flags &= ~(NVM_CHANNEL_40MHZ | 399 NVM_CHANNEL_80MHZ | 400 NVM_CHANNEL_160MHZ); 401 } 402 403 if (ch_flags & NVM_CHANNEL_160MHZ) 404 data->vht160_supported = true; 405 406 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR) && 407 !(ch_flags & NVM_CHANNEL_VALID)) { 408 /* 409 * Channels might become valid later if lar is 410 * supported, hence we still want to add them to 411 * the list of supported channels to cfg80211. 412 */ 413 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM, 414 nvm_chan[ch_idx], ch_flags); 415 continue; 416 } 417 418 channel = &data->channels[n_channels]; 419 n_channels++; 420 421 channel->hw_value = nvm_chan[ch_idx]; 422 channel->band = band; 423 channel->center_freq = 424 ieee80211_channel_to_frequency( 425 channel->hw_value, channel->band); 426 427 /* Initialize regulatory-based run-time data */ 428 429 /* 430 * Default value - highest tx power value. max_power 431 * is not used in mvm, and is used for backwards compatibility 432 */ 433 channel->max_power = IWL_DEFAULT_MAX_TX_POWER; 434 435 /* don't put limitations in case we're using LAR */ 436 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR)) 437 channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx], 438 ch_idx, band, 439 ch_flags, cfg); 440 else 441 channel->flags = 0; 442 443 if (fw_has_capa(&fw->ucode_capa, 444 IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS)) 445 channel->flags |= IEEE80211_CHAN_CAN_MONITOR; 446 447 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM, 448 channel->hw_value, ch_flags); 449 IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n", 450 channel->hw_value, channel->max_power); 451 } 452 453 return n_channels; 454 } 455 456 static void iwl_init_vht_hw_capab(struct iwl_trans *trans, 457 struct iwl_nvm_data *data, 458 struct ieee80211_sta_vht_cap *vht_cap, 459 u8 tx_chains, u8 rx_chains) 460 { 461 const struct iwl_rf_cfg *cfg = trans->cfg; 462 int num_rx_ants = num_of_ant(rx_chains); 463 int num_tx_ants = num_of_ant(tx_chains); 464 465 vht_cap->vht_supported = true; 466 467 vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 | 468 IEEE80211_VHT_CAP_RXSTBC_1 | 469 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE | 470 3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT | 471 IEEE80211_VHT_MAX_AMPDU_1024K << 472 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT; 473 474 if (!trans->cfg->ht_params.stbc) 475 vht_cap->cap &= ~IEEE80211_VHT_CAP_RXSTBC_MASK; 476 477 if (data->vht160_supported) 478 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ | 479 IEEE80211_VHT_CAP_SHORT_GI_160; 480 481 if (cfg->vht_mu_mimo_supported) 482 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE; 483 484 if (cfg->ht_params.ldpc) 485 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC; 486 487 if (data->sku_cap_mimo_disabled) { 488 num_rx_ants = 1; 489 num_tx_ants = 1; 490 } 491 492 if (trans->cfg->ht_params.stbc && num_tx_ants > 1) 493 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC; 494 else 495 vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN; 496 497 /* 498 * With fips_enabled crypto is done by software, so the HW cannot 499 * split up A-MSDUs and the real limit that was set applies. 500 * Note that EHT doesn't honour this (HE copies the VHT value), 501 * but EHT is also entirely disabled for fips_enabled. 502 */ 503 switch (iwlwifi_mod_params.amsdu_size) { 504 case IWL_AMSDU_DEF: 505 if (trans->mac_cfg->mq_rx_supported && !fips_enabled) 506 vht_cap->cap |= 507 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 508 else 509 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 510 break; 511 case IWL_AMSDU_2K: 512 if (trans->mac_cfg->mq_rx_supported && !fips_enabled) 513 vht_cap->cap |= 514 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 515 else 516 WARN(1, "RB size of 2K is not supported by this device\n"); 517 break; 518 case IWL_AMSDU_4K: 519 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 520 break; 521 case IWL_AMSDU_8K: 522 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 523 break; 524 case IWL_AMSDU_12K: 525 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 526 break; 527 default: 528 break; 529 } 530 531 vht_cap->vht_mcs.rx_mcs_map = 532 cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 | 533 IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 | 534 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 | 535 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 | 536 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 | 537 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 | 538 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 | 539 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14); 540 541 if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) { 542 vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN; 543 /* this works because NOT_SUPPORTED == 3 */ 544 vht_cap->vht_mcs.rx_mcs_map |= 545 cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2); 546 } 547 548 vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map; 549 550 vht_cap->vht_mcs.tx_highest |= 551 cpu_to_le16(IEEE80211_VHT_EXT_NSS_BW_CAPABLE); 552 } 553 554 static const u8 iwl_vendor_caps[] = { 555 0xdd, /* vendor element */ 556 0x06, /* length */ 557 0x00, 0x17, 0x35, /* Intel OUI */ 558 0x08, /* type (Intel Capabilities) */ 559 /* followed by 16 bits of capabilities */ 560 #define IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE BIT(0) 561 IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE, 562 0x00 563 }; 564 565 static const struct ieee80211_sband_iftype_data iwl_iftype_cap[] = { 566 { 567 .types_mask = BIT(NL80211_IFTYPE_STATION) | 568 BIT(NL80211_IFTYPE_P2P_CLIENT), 569 .he_cap = { 570 .has_he = true, 571 .he_cap_elem = { 572 .mac_cap_info[0] = 573 IEEE80211_HE_MAC_CAP0_HTC_HE, 574 .mac_cap_info[1] = 575 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US | 576 IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8, 577 .mac_cap_info[2] = 578 IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP, 579 .mac_cap_info[3] = 580 IEEE80211_HE_MAC_CAP3_OMI_CONTROL | 581 IEEE80211_HE_MAC_CAP3_RX_CTRL_FRAME_TO_MULTIBSS, 582 .mac_cap_info[4] = 583 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU | 584 IEEE80211_HE_MAC_CAP4_MULTI_TID_AGG_TX_QOS_B39, 585 .mac_cap_info[5] = 586 IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B40 | 587 IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B41 | 588 IEEE80211_HE_MAC_CAP5_UL_2x996_TONE_RU | 589 IEEE80211_HE_MAC_CAP5_HE_DYNAMIC_SM_PS | 590 IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX, 591 .phy_cap_info[1] = 592 IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK | 593 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A | 594 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD, 595 .phy_cap_info[2] = 596 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US | 597 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ, 598 .phy_cap_info[3] = 599 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK | 600 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 | 601 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK | 602 IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1, 603 .phy_cap_info[4] = 604 IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | 605 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_8 | 606 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_8, 607 .phy_cap_info[6] = 608 IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 609 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB | 610 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT, 611 .phy_cap_info[7] = 612 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP | 613 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI, 614 .phy_cap_info[8] = 615 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI | 616 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G | 617 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU | 618 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU | 619 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242, 620 .phy_cap_info[9] = 621 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB | 622 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB | 623 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 624 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU | 625 (IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED << 626 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_POS), 627 .phy_cap_info[10] = 628 IEEE80211_HE_PHY_CAP10_HE_MU_M1RU_MAX_LTF, 629 }, 630 /* 631 * Set default Tx/Rx HE MCS NSS Support field. 632 * Indicate support for up to 2 spatial streams and all 633 * MCS, without any special cases 634 */ 635 .he_mcs_nss_supp = { 636 .rx_mcs_80 = cpu_to_le16(0xfffa), 637 .tx_mcs_80 = cpu_to_le16(0xfffa), 638 .rx_mcs_160 = cpu_to_le16(0xfffa), 639 .tx_mcs_160 = cpu_to_le16(0xfffa), 640 .rx_mcs_80p80 = cpu_to_le16(0xffff), 641 .tx_mcs_80p80 = cpu_to_le16(0xffff), 642 }, 643 /* 644 * Set default PPE thresholds, with PPET16 set to 0, 645 * PPET8 set to 7 646 */ 647 .ppe_thres = {0x61, 0x1c, 0xc7, 0x71}, 648 }, 649 .eht_cap = { 650 .has_eht = true, 651 .eht_cap_elem = { 652 .mac_cap_info[0] = 653 IEEE80211_EHT_MAC_CAP0_OM_CONTROL, 654 .phy_cap_info[0] = 655 IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ | 656 IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI | 657 IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE | 658 IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK, 659 .phy_cap_info[1] = 660 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK | 661 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK, 662 .phy_cap_info[3] = 663 IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK, 664 665 .phy_cap_info[4] = 666 IEEE80211_EHT_PHY_CAP4_EHT_MU_PPDU_4_EHT_LTF_08_GI, 667 .phy_cap_info[5] = 668 FIELD_PREP_CONST(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK, 669 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_16US) | 670 IEEE80211_EHT_PHY_CAP5_TX_LESS_242_TONE_RU_SUPP | 671 IEEE80211_EHT_PHY_CAP5_RX_LESS_242_TONE_RU_SUPP | 672 IEEE80211_EHT_PHY_CAP5_SUPP_EXTRA_EHT_LTF, 673 .phy_cap_info[8] = 674 IEEE80211_EHT_PHY_CAP8_RX_1024QAM_WIDER_BW_DL_OFDMA | 675 IEEE80211_EHT_PHY_CAP8_RX_4096QAM_WIDER_BW_DL_OFDMA, 676 }, 677 678 /* For all MCS and bandwidth, set 2 NSS for both Tx and 679 * Rx - note we don't set the only_20mhz, but due to this 680 * being a union, it gets set correctly anyway. 681 */ 682 .eht_mcs_nss_supp = { 683 .bw._80 = { 684 .rx_tx_mcs9_max_nss = 0x22, 685 .rx_tx_mcs11_max_nss = 0x22, 686 .rx_tx_mcs13_max_nss = 0x22, 687 }, 688 .bw._160 = { 689 .rx_tx_mcs9_max_nss = 0x22, 690 .rx_tx_mcs11_max_nss = 0x22, 691 .rx_tx_mcs13_max_nss = 0x22, 692 }, 693 .bw._320 = { 694 .rx_tx_mcs9_max_nss = 0x22, 695 .rx_tx_mcs11_max_nss = 0x22, 696 .rx_tx_mcs13_max_nss = 0x22, 697 }, 698 }, 699 700 /* 701 * PPE thresholds for NSS = 2, and RU index bitmap set 702 * to 0xc. 703 * Note: just for stating what we want, not present in 704 * the transmitted data due to not including 705 * IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT. 706 */ 707 .eht_ppe_thres = {0xc1, 0x0e, 0xe0 } 708 }, 709 .uhr_cap = { 710 .has_uhr = true, 711 /* Note: asymmetry is fixed later */ 712 .phy.cap = cpu_to_le32(IEEE80211_UHR_PHY_CAP_ELR_RX | 713 IEEE80211_UHR_PHY_CAP_ELR_TX), 714 .mac.mac_cap = { 715 [0] = IEEE80211_UHR_MAC_CAP0_NPCA_SUPP | 716 IEEE80211_UHR_MAC_CAP0_DPS_SUPP, 717 [1] = IEEE80211_UHR_MAC_CAP1_DUO_SUPP | 718 IEEE80211_UHR_MAC_CAP1_DBE_SUPP, 719 }, 720 }, 721 }, 722 { 723 .types_mask = BIT(NL80211_IFTYPE_AP) | 724 BIT(NL80211_IFTYPE_P2P_GO), 725 .he_cap = { 726 .has_he = true, 727 .he_cap_elem = { 728 .mac_cap_info[0] = 729 IEEE80211_HE_MAC_CAP0_HTC_HE, 730 .mac_cap_info[1] = 731 IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8, 732 .mac_cap_info[3] = 733 IEEE80211_HE_MAC_CAP3_OMI_CONTROL, 734 .phy_cap_info[1] = 735 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD, 736 .phy_cap_info[2] = 737 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ | 738 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US, 739 .phy_cap_info[3] = 740 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK | 741 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 | 742 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK | 743 IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1, 744 .phy_cap_info[6] = 745 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT, 746 .phy_cap_info[7] = 747 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI, 748 .phy_cap_info[8] = 749 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI | 750 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242, 751 .phy_cap_info[9] = 752 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 753 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED 754 << IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_POS, 755 }, 756 /* 757 * Set default Tx/Rx HE MCS NSS Support field. 758 * Indicate support for up to 2 spatial streams and all 759 * MCS, without any special cases 760 */ 761 .he_mcs_nss_supp = { 762 .rx_mcs_80 = cpu_to_le16(0xfffa), 763 .tx_mcs_80 = cpu_to_le16(0xfffa), 764 .rx_mcs_160 = cpu_to_le16(0xfffa), 765 .tx_mcs_160 = cpu_to_le16(0xfffa), 766 .rx_mcs_80p80 = cpu_to_le16(0xffff), 767 .tx_mcs_80p80 = cpu_to_le16(0xffff), 768 }, 769 /* 770 * Set default PPE thresholds, with PPET16 set to 0, 771 * PPET8 set to 7 772 */ 773 .ppe_thres = {0x61, 0x1c, 0xc7, 0x71}, 774 }, 775 .eht_cap = { 776 .has_eht = true, 777 .eht_cap_elem = { 778 .mac_cap_info[0] = 779 IEEE80211_EHT_MAC_CAP0_OM_CONTROL, 780 .phy_cap_info[0] = 781 IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ | 782 IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI, 783 .phy_cap_info[5] = 784 FIELD_PREP_CONST(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK, 785 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_16US), 786 }, 787 788 /* For all MCS and bandwidth, set 2 NSS for both Tx and 789 * Rx - note we don't set the only_20mhz, but due to this 790 * being a union, it gets set correctly anyway. 791 */ 792 .eht_mcs_nss_supp = { 793 .bw._80 = { 794 .rx_tx_mcs9_max_nss = 0x22, 795 .rx_tx_mcs11_max_nss = 0x22, 796 .rx_tx_mcs13_max_nss = 0x22, 797 }, 798 .bw._160 = { 799 .rx_tx_mcs9_max_nss = 0x22, 800 .rx_tx_mcs11_max_nss = 0x22, 801 .rx_tx_mcs13_max_nss = 0x22, 802 }, 803 .bw._320 = { 804 .rx_tx_mcs9_max_nss = 0x22, 805 .rx_tx_mcs11_max_nss = 0x22, 806 .rx_tx_mcs13_max_nss = 0x22, 807 }, 808 }, 809 810 /* 811 * PPE thresholds for NSS = 2, and RU index bitmap set 812 * to 0xc. 813 * Note: just for stating what we want, not present in 814 * the transmitted data due to not including 815 * IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT. 816 */ 817 .eht_ppe_thres = {0xc1, 0x0e, 0xe0 } 818 }, 819 .uhr_cap = { 820 .has_uhr = true, 821 /* Note: asymmetry is fixed later */ 822 .phy.cap = cpu_to_le32(IEEE80211_UHR_PHY_CAP_ELR_RX | 823 IEEE80211_UHR_PHY_CAP_ELR_TX), 824 }, 825 }, 826 }; 827 828 static void iwl_init_he_6ghz_capa(struct iwl_trans *trans, 829 struct iwl_nvm_data *data, 830 struct ieee80211_supported_band *sband, 831 u8 tx_chains, u8 rx_chains) 832 { 833 struct ieee80211_sta_ht_cap ht_cap; 834 struct ieee80211_sta_vht_cap vht_cap = {}; 835 struct ieee80211_sband_iftype_data *iftype_data; 836 u16 he_6ghz_capa = 0; 837 u32 exp; 838 int i; 839 840 if (sband->band != NL80211_BAND_6GHZ) 841 return; 842 843 /* grab HT/VHT capabilities and calculate HE 6 GHz capabilities */ 844 iwl_init_ht_hw_capab(trans, data, &ht_cap, NL80211_BAND_5GHZ, 845 tx_chains, rx_chains); 846 WARN_ON(!ht_cap.ht_supported); 847 iwl_init_vht_hw_capab(trans, data, &vht_cap, tx_chains, rx_chains); 848 WARN_ON(!vht_cap.vht_supported); 849 850 he_6ghz_capa |= 851 u16_encode_bits(ht_cap.ampdu_density, 852 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START); 853 exp = u32_get_bits(vht_cap.cap, 854 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK); 855 he_6ghz_capa |= 856 u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 857 exp = u32_get_bits(vht_cap.cap, IEEE80211_VHT_CAP_MAX_MPDU_MASK); 858 he_6ghz_capa |= 859 u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN); 860 /* we don't support extended_ht_cap_info anywhere, so no RD_RESPONDER */ 861 if (vht_cap.cap & IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN) 862 he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS; 863 if (vht_cap.cap & IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN) 864 he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS; 865 866 IWL_DEBUG_EEPROM(trans->dev, "he_6ghz_capa=0x%x\n", he_6ghz_capa); 867 868 /* we know it's writable - we set it before ourselves */ 869 iftype_data = (void *)(uintptr_t)sband->iftype_data; 870 for (i = 0; i < sband->n_iftype_data; i++) 871 iftype_data[i].he_6ghz_capa.capa = cpu_to_le16(he_6ghz_capa); 872 } 873 874 static void 875 iwl_nvm_fixup_sband_iftd(struct iwl_trans *trans, 876 struct iwl_nvm_data *data, 877 struct ieee80211_supported_band *sband, 878 struct ieee80211_sband_iftype_data *iftype_data, 879 u8 tx_chains, u8 rx_chains, 880 const struct iwl_fw *fw) 881 { 882 bool is_ap = iftype_data->types_mask & (BIT(NL80211_IFTYPE_AP) | 883 BIT(NL80211_IFTYPE_P2P_GO)); 884 bool slow_pcie = (!trans->mac_cfg->integrated && 885 trans->info.pcie_link_speed < PCI_EXP_LNKSTA_CLS_8_0GB); 886 887 /* EHT needs WPA3/MFP so cannot do it for fips_enabled */ 888 if (!data->sku_cap_11be_enable || iwlwifi_mod_params.disable_11be || 889 fips_enabled) 890 iftype_data->eht_cap.has_eht = false; 891 892 if (!data->sku_cap_11bn_enable || !iftype_data->eht_cap.has_eht) 893 iftype_data->uhr_cap.has_uhr = false; 894 895 /* Advertise an A-MPDU exponent extension based on 896 * operating band 897 */ 898 if (sband->band == NL80211_BAND_6GHZ && iftype_data->eht_cap.has_eht) 899 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |= 900 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2; 901 else if (sband->band != NL80211_BAND_2GHZ) 902 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |= 903 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_1; 904 else 905 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |= 906 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3; 907 908 switch (sband->band) { 909 case NL80211_BAND_2GHZ: 910 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] |= 911 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G; 912 iftype_data->eht_cap.eht_cap_elem.mac_cap_info[0] |= 913 u8_encode_bits(IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_11454, 914 IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_MASK); 915 break; 916 case NL80211_BAND_6GHZ: 917 if (!trans->reduced_cap_sku && 918 (!trans->cfg->bw_limit || trans->cfg->bw_limit >= 320)) { 919 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[0] |= 920 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 921 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[1] |= 922 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK; 923 } 924 fallthrough; 925 case NL80211_BAND_5GHZ: 926 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] |= 927 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 928 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G; 929 break; 930 default: 931 WARN_ON(1); 932 break; 933 } 934 935 if ((tx_chains & rx_chains) == ANT_AB) { 936 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] |= 937 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ; 938 iftype_data->he_cap.he_cap_elem.phy_cap_info[5] |= 939 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_2 | 940 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_2; 941 if (!is_ap) { 942 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |= 943 IEEE80211_HE_PHY_CAP7_MAX_NC_2; 944 945 if (iftype_data->eht_cap.has_eht) { 946 /* 947 * Set the number of sounding dimensions for each 948 * bandwidth to 1 to indicate the maximal supported 949 * value of TXVECTOR parameter NUM_STS of 2 950 */ 951 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[2] |= 0x49; 952 953 /* 954 * Set the MAX NC to 1 to indicate sounding feedback of 955 * 2 supported by the beamfomee. 956 */ 957 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[4] |= 0x10; 958 } 959 } 960 961 if (slow_pcie) { 962 struct ieee80211_eht_mcs_nss_supp *mcs_nss = 963 &iftype_data->eht_cap.eht_mcs_nss_supp; 964 965 mcs_nss->bw._320.rx_tx_mcs11_max_nss = 0; 966 mcs_nss->bw._320.rx_tx_mcs13_max_nss = 0; 967 } 968 } else { 969 struct ieee80211_he_mcs_nss_supp *he_mcs_nss_supp = 970 &iftype_data->he_cap.he_mcs_nss_supp; 971 972 if (iftype_data->eht_cap.has_eht) { 973 struct ieee80211_eht_mcs_nss_supp *mcs_nss = 974 &iftype_data->eht_cap.eht_mcs_nss_supp; 975 976 memset(mcs_nss, 0x11, sizeof(*mcs_nss)); 977 } 978 979 if (!is_ap) { 980 /* If not 2x2, we need to indicate 1x1 in the 981 * Midamble RX Max NSTS - but not for AP mode 982 */ 983 iftype_data->he_cap.he_cap_elem.phy_cap_info[1] &= 984 ~IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS; 985 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] &= 986 ~IEEE80211_HE_PHY_CAP2_MIDAMBLE_RX_TX_MAX_NSTS; 987 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |= 988 IEEE80211_HE_PHY_CAP7_MAX_NC_1; 989 } 990 991 he_mcs_nss_supp->rx_mcs_80 |= 992 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 993 he_mcs_nss_supp->tx_mcs_80 |= 994 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 995 he_mcs_nss_supp->rx_mcs_160 |= 996 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 997 he_mcs_nss_supp->tx_mcs_160 |= 998 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 999 he_mcs_nss_supp->rx_mcs_80p80 |= 1000 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1001 he_mcs_nss_supp->tx_mcs_80p80 |= 1002 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1003 } 1004 1005 /* prior RFs don't have HE, HR RF doesn't have this, later have it */ 1006 if (CSR_HW_RFID_TYPE(trans->info.hw_rf_id) == IWL_CFG_RF_TYPE_HR1 || 1007 CSR_HW_RFID_TYPE(trans->info.hw_rf_id) == IWL_CFG_RF_TYPE_HR2) 1008 iftype_data->he_cap.he_cap_elem.phy_cap_info[9] &= 1009 ~(IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 1010 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU); 1011 1012 if (trans->mac_cfg->device_family >= IWL_DEVICE_FAMILY_AX210 && !is_ap) 1013 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] |= 1014 IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO; 1015 1016 if (trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_22000 && 1017 !is_ap) { 1018 iftype_data->vendor_elems.data = iwl_vendor_caps; 1019 iftype_data->vendor_elems.len = ARRAY_SIZE(iwl_vendor_caps); 1020 } 1021 1022 if (!trans->cfg->ht_params.stbc) { 1023 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] &= 1024 ~IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ; 1025 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] &= 1026 ~IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ; 1027 } 1028 1029 if (trans->step_urm) { 1030 iftype_data->eht_cap.eht_mcs_nss_supp.bw._320.rx_tx_mcs11_max_nss = 0; 1031 iftype_data->eht_cap.eht_mcs_nss_supp.bw._320.rx_tx_mcs13_max_nss = 0; 1032 } 1033 1034 if (trans->cfg->bw_limit && trans->cfg->bw_limit < 160) 1035 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] &= 1036 ~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G; 1037 1038 if ((trans->cfg->bw_limit && trans->cfg->bw_limit < 320) || 1039 trans->reduced_cap_sku) { 1040 memset(&iftype_data->eht_cap.eht_mcs_nss_supp.bw._320, 0, 1041 sizeof(iftype_data->eht_cap.eht_mcs_nss_supp.bw._320)); 1042 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[2] &= 1043 ~IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK; 1044 } 1045 1046 if (trans->reduced_cap_sku) { 1047 iftype_data->eht_cap.eht_mcs_nss_supp.bw._80.rx_tx_mcs13_max_nss = 0; 1048 iftype_data->eht_cap.eht_mcs_nss_supp.bw._160.rx_tx_mcs13_max_nss = 0; 1049 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[8] &= 1050 ~IEEE80211_EHT_PHY_CAP8_RX_4096QAM_WIDER_BW_DL_OFDMA; 1051 } 1052 } 1053 1054 static void iwl_init_he_hw_capab(struct iwl_trans *trans, 1055 struct iwl_nvm_data *data, 1056 struct ieee80211_supported_band *sband, 1057 u8 tx_chains, u8 rx_chains, 1058 const struct iwl_fw *fw) 1059 { 1060 struct ieee80211_sband_iftype_data *iftype_data; 1061 int i; 1062 1063 BUILD_BUG_ON(sizeof(data->iftd.low) != sizeof(iwl_iftype_cap)); 1064 BUILD_BUG_ON(sizeof(data->iftd.high) != sizeof(iwl_iftype_cap)); 1065 BUILD_BUG_ON(sizeof(data->iftd.uhb) != sizeof(iwl_iftype_cap)); 1066 1067 switch (sband->band) { 1068 case NL80211_BAND_2GHZ: 1069 iftype_data = data->iftd.low; 1070 break; 1071 case NL80211_BAND_5GHZ: 1072 iftype_data = data->iftd.high; 1073 break; 1074 case NL80211_BAND_6GHZ: 1075 iftype_data = data->iftd.uhb; 1076 break; 1077 default: 1078 WARN_ON(1); 1079 return; 1080 } 1081 1082 memcpy(iftype_data, iwl_iftype_cap, sizeof(iwl_iftype_cap)); 1083 1084 _ieee80211_set_sband_iftype_data(sband, iftype_data, 1085 ARRAY_SIZE(iwl_iftype_cap)); 1086 1087 for (i = 0; i < sband->n_iftype_data; i++) 1088 iwl_nvm_fixup_sband_iftd(trans, data, sband, &iftype_data[i], 1089 tx_chains, rx_chains, fw); 1090 1091 iwl_init_he_6ghz_capa(trans, data, sband, tx_chains, rx_chains); 1092 } 1093 1094 static void 1095 iwl_init_nan_phy_capa(const struct iwl_fw *fw, struct iwl_nvm_data *data) 1096 { 1097 const struct ieee80211_sta_he_cap *he_cap; 1098 1099 if (!fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_NAN_SYNC_SUPPORT)) 1100 return; 1101 1102 data->nan_phy_capa.ht = data->bands[NL80211_BAND_2GHZ].ht_cap; 1103 data->nan_phy_capa.vht = data->bands[NL80211_BAND_5GHZ].vht_cap; 1104 1105 he_cap = ieee80211_get_he_iftype_cap(&data->bands[NL80211_BAND_2GHZ], 1106 NL80211_IFTYPE_STATION); 1107 if (he_cap) { 1108 data->nan_phy_capa.he = *he_cap; 1109 data->nan_phy_capa.he.he_cap_elem.phy_cap_info[0] |= 1110 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 1111 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G; 1112 } 1113 1114 /* 1115 * FIXME: we copied HE capabilities from the 2.4 GHz band, 1116 * but there are bits that are band-dependent: 1117 * 1118 * IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_1 - 2.4 GHz - set 1119 * IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3 - 5 GHz - not set 1120 * IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G - set 1121 * IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G - set 1122 * IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G - set 1123 * 1124 * We copied from STA iftype - so we have the following bits set: 1125 * IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS 1126 * IEEE80211_HE_PHY_CAP2_MIDAMBLE_RX_TX_MAX_NSTS 1127 * IEEE80211_HE_PHY_CAP7_MAX_NC_1 1128 * IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO 1129 * 1130 * Need to check which one should actually be set for NAN. 1131 */ 1132 } 1133 1134 void iwl_reinit_cab(struct iwl_trans *trans, struct iwl_nvm_data *data, 1135 u8 tx_chains, u8 rx_chains, const struct iwl_fw *fw) 1136 { 1137 struct ieee80211_supported_band *sband; 1138 1139 sband = &data->bands[NL80211_BAND_2GHZ]; 1140 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ, 1141 tx_chains, rx_chains); 1142 1143 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1144 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1145 fw); 1146 1147 sband = &data->bands[NL80211_BAND_5GHZ]; 1148 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ, 1149 tx_chains, rx_chains); 1150 if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac) 1151 iwl_init_vht_hw_capab(trans, data, &sband->vht_cap, 1152 tx_chains, rx_chains); 1153 1154 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1155 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1156 fw); 1157 1158 sband = &data->bands[NL80211_BAND_6GHZ]; 1159 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1160 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1161 fw); 1162 1163 iwl_init_nan_phy_capa(fw, data); 1164 } 1165 IWL_EXPORT_SYMBOL(iwl_reinit_cab); 1166 1167 static void iwl_init_sbands(struct iwl_trans *trans, 1168 struct iwl_nvm_data *data, 1169 const void *nvm_ch_flags, u8 tx_chains, 1170 u8 rx_chains, u32 sbands_flags, bool v4, 1171 const struct iwl_fw *fw) 1172 { 1173 struct device *dev = trans->dev; 1174 int n_channels; 1175 int n_used = 0; 1176 struct ieee80211_supported_band *sband; 1177 1178 n_channels = iwl_init_channel_map(trans, fw, data, nvm_ch_flags, 1179 sbands_flags, v4); 1180 sband = &data->bands[NL80211_BAND_2GHZ]; 1181 sband->band = NL80211_BAND_2GHZ; 1182 sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS]; 1183 sband->n_bitrates = N_RATES_24; 1184 n_used += iwl_init_sband_channels(data, sband, n_channels, 1185 NL80211_BAND_2GHZ); 1186 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ, 1187 tx_chains, rx_chains); 1188 1189 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1190 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1191 fw); 1192 1193 sband = &data->bands[NL80211_BAND_5GHZ]; 1194 sband->band = NL80211_BAND_5GHZ; 1195 sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS]; 1196 sband->n_bitrates = N_RATES_52; 1197 n_used += iwl_init_sband_channels(data, sband, n_channels, 1198 NL80211_BAND_5GHZ); 1199 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ, 1200 tx_chains, rx_chains); 1201 if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac) 1202 iwl_init_vht_hw_capab(trans, data, &sband->vht_cap, 1203 tx_chains, rx_chains); 1204 1205 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1206 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1207 fw); 1208 1209 /* 6GHz band. */ 1210 sband = &data->bands[NL80211_BAND_6GHZ]; 1211 sband->band = NL80211_BAND_6GHZ; 1212 /* use the same rates as 5GHz band */ 1213 sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS]; 1214 sband->n_bitrates = N_RATES_52; 1215 n_used += iwl_init_sband_channels(data, sband, n_channels, 1216 NL80211_BAND_6GHZ); 1217 1218 /* 1219 * 6 GHz requires WPA3 which requires MFP, which FW cannot do 1220 * when fips_enabled, so don't advertise any 6 GHz channels to 1221 * avoid spending time on scanning those channels and perhaps 1222 * even finding APs there that cannot be used. 1223 */ 1224 if (!fips_enabled && data->sku_cap_11ax_enable && 1225 !iwlwifi_mod_params.disable_11ax) 1226 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1227 fw); 1228 else 1229 sband->n_channels = 0; 1230 1231 if (n_channels != n_used) 1232 IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n", 1233 n_used, n_channels); 1234 } 1235 1236 static int iwl_get_sku(const struct iwl_rf_cfg *cfg, const __le16 *nvm_sw, 1237 const __le16 *phy_sku) 1238 { 1239 if (cfg->nvm_type != IWL_NVM_EXT) 1240 return le16_to_cpup(nvm_sw + SKU); 1241 1242 return le32_to_cpup((const __le32 *)(phy_sku + SKU_FAMILY_8000)); 1243 } 1244 1245 static int iwl_get_nvm_version(const struct iwl_rf_cfg *cfg, const __le16 *nvm_sw) 1246 { 1247 if (cfg->nvm_type != IWL_NVM_EXT) 1248 return le16_to_cpup(nvm_sw + NVM_VERSION); 1249 else 1250 return le32_to_cpup((const __le32 *)(nvm_sw + 1251 NVM_VERSION_EXT_NVM)); 1252 } 1253 1254 static int iwl_get_radio_cfg(const struct iwl_rf_cfg *cfg, const __le16 *nvm_sw, 1255 const __le16 *phy_sku) 1256 { 1257 if (cfg->nvm_type != IWL_NVM_EXT) 1258 return le16_to_cpup(nvm_sw + RADIO_CFG); 1259 1260 return le32_to_cpup((const __le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM)); 1261 1262 } 1263 1264 static int iwl_get_n_hw_addrs(const struct iwl_rf_cfg *cfg, const __le16 *nvm_sw) 1265 { 1266 int n_hw_addr; 1267 1268 if (cfg->nvm_type != IWL_NVM_EXT) 1269 return le16_to_cpup(nvm_sw + N_HW_ADDRS); 1270 1271 n_hw_addr = le32_to_cpup((const __le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000)); 1272 1273 return n_hw_addr & N_HW_ADDR_MASK; 1274 } 1275 1276 static void iwl_set_radio_cfg(const struct iwl_rf_cfg *cfg, 1277 struct iwl_nvm_data *data, 1278 u32 radio_cfg) 1279 { 1280 if (cfg->nvm_type != IWL_NVM_EXT) { 1281 data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg); 1282 data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg); 1283 data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg); 1284 data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg); 1285 return; 1286 } 1287 1288 /* set the radio configuration for family 8000 */ 1289 data->radio_cfg_type = EXT_NVM_RF_CFG_TYPE_MSK(radio_cfg); 1290 data->radio_cfg_step = EXT_NVM_RF_CFG_STEP_MSK(radio_cfg); 1291 data->radio_cfg_dash = EXT_NVM_RF_CFG_DASH_MSK(radio_cfg); 1292 data->radio_cfg_pnum = EXT_NVM_RF_CFG_FLAVOR_MSK(radio_cfg); 1293 data->valid_tx_ant = EXT_NVM_RF_CFG_TX_ANT_MSK(radio_cfg); 1294 data->valid_rx_ant = EXT_NVM_RF_CFG_RX_ANT_MSK(radio_cfg); 1295 } 1296 1297 static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest) 1298 { 1299 const u8 *hw_addr; 1300 1301 hw_addr = (const u8 *)&mac_addr0; 1302 dest[0] = hw_addr[3]; 1303 dest[1] = hw_addr[2]; 1304 dest[2] = hw_addr[1]; 1305 dest[3] = hw_addr[0]; 1306 1307 hw_addr = (const u8 *)&mac_addr1; 1308 dest[4] = hw_addr[1]; 1309 dest[5] = hw_addr[0]; 1310 } 1311 1312 static void iwl_set_hw_address_from_csr(struct iwl_trans *trans, 1313 struct iwl_nvm_data *data) 1314 { 1315 __le32 mac_addr0 = cpu_to_le32(iwl_read32(trans, 1316 CSR_MAC_ADDR0_STRAP(trans))); 1317 __le32 mac_addr1 = cpu_to_le32(iwl_read32(trans, 1318 CSR_MAC_ADDR1_STRAP(trans))); 1319 1320 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); 1321 /* 1322 * If the OEM fused a valid address, use it instead of the one in the 1323 * OTP 1324 */ 1325 if (is_valid_ether_addr(data->hw_addr)) 1326 return; 1327 1328 mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_OTP(trans))); 1329 mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_OTP(trans))); 1330 1331 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); 1332 } 1333 1334 static void iwl_set_hw_address_family_8000(struct iwl_trans *trans, 1335 const struct iwl_rf_cfg *cfg, 1336 struct iwl_nvm_data *data, 1337 const __le16 *mac_override, 1338 const __be16 *nvm_hw) 1339 { 1340 const u8 *hw_addr; 1341 1342 if (mac_override) { 1343 static const u8 reserved_mac[] = { 1344 0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00 1345 }; 1346 1347 hw_addr = (const u8 *)(mac_override + 1348 MAC_ADDRESS_OVERRIDE_EXT_NVM); 1349 1350 /* 1351 * Store the MAC address from MAO section. 1352 * No byte swapping is required in MAO section 1353 */ 1354 memcpy(data->hw_addr, hw_addr, ETH_ALEN); 1355 1356 /* 1357 * Force the use of the OTP MAC address in case of reserved MAC 1358 * address in the NVM, or if address is given but invalid. 1359 */ 1360 if (is_valid_ether_addr(data->hw_addr) && 1361 memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0) 1362 return; 1363 1364 IWL_ERR(trans, 1365 "mac address from nvm override section is not valid\n"); 1366 } 1367 1368 if (nvm_hw) { 1369 /* read the mac address from WFMP registers */ 1370 __le32 mac_addr0 = cpu_to_le32(iwl_trans_read_prph(trans, 1371 WFMP_MAC_ADDR_0)); 1372 __le32 mac_addr1 = cpu_to_le32(iwl_trans_read_prph(trans, 1373 WFMP_MAC_ADDR_1)); 1374 1375 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); 1376 1377 return; 1378 } 1379 1380 IWL_ERR(trans, "mac address is not found\n"); 1381 } 1382 1383 static int iwl_set_hw_address(struct iwl_trans *trans, 1384 const struct iwl_rf_cfg *cfg, 1385 struct iwl_nvm_data *data, const __be16 *nvm_hw, 1386 const __le16 *mac_override) 1387 { 1388 const struct iwl_mac_cfg *mac_cfg = trans->mac_cfg; 1389 if (mac_cfg->base->mac_addr_from_csr) { 1390 iwl_set_hw_address_from_csr(trans, data); 1391 } else if (cfg->nvm_type != IWL_NVM_EXT) { 1392 const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR); 1393 1394 /* The byte order is little endian 16 bit, meaning 214365 */ 1395 data->hw_addr[0] = hw_addr[1]; 1396 data->hw_addr[1] = hw_addr[0]; 1397 data->hw_addr[2] = hw_addr[3]; 1398 data->hw_addr[3] = hw_addr[2]; 1399 data->hw_addr[4] = hw_addr[5]; 1400 data->hw_addr[5] = hw_addr[4]; 1401 } else { 1402 iwl_set_hw_address_family_8000(trans, cfg, data, 1403 mac_override, nvm_hw); 1404 } 1405 1406 if (!is_valid_ether_addr(data->hw_addr)) { 1407 IWL_ERR(trans, "no valid mac address was found\n"); 1408 return -EINVAL; 1409 } 1410 1411 if (!trans->csme_own) 1412 IWL_INFO(trans, "base HW address: %pM, OTP minor version: 0x%x\n", 1413 data->hw_addr, iwl_read_prph(trans, REG_OTP_MINOR)); 1414 1415 return 0; 1416 } 1417 1418 static bool 1419 iwl_nvm_no_wide_in_5ghz(struct iwl_trans *trans, const struct iwl_rf_cfg *cfg, 1420 const __be16 *nvm_hw) 1421 { 1422 /* 1423 * Workaround a bug in Indonesia SKUs where the regulatory in 1424 * some 7000-family OTPs erroneously allow wide channels in 1425 * 5GHz. To check for Indonesia, we take the SKU value from 1426 * bits 1-4 in the subsystem ID and check if it is either 5 or 1427 * 9. In those cases, we need to force-disable wide channels 1428 * in 5GHz otherwise the FW will throw a sysassert when we try 1429 * to use them. 1430 */ 1431 if (trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_7000) { 1432 /* 1433 * Unlike the other sections in the NVM, the hw 1434 * section uses big-endian. 1435 */ 1436 u16 subsystem_id = be16_to_cpup(nvm_hw + SUBSYSTEM_ID); 1437 u8 sku = (subsystem_id & 0x1e) >> 1; 1438 1439 if (sku == 5 || sku == 9) { 1440 IWL_DEBUG_EEPROM(trans->dev, 1441 "disabling wide channels in 5GHz (0x%0x %d)\n", 1442 subsystem_id, sku); 1443 return true; 1444 } 1445 } 1446 1447 return false; 1448 } 1449 1450 struct iwl_nvm_data * 1451 iwl_parse_mei_nvm_data(struct iwl_trans *trans, const struct iwl_rf_cfg *cfg, 1452 const struct iwl_mei_nvm *mei_nvm, 1453 const struct iwl_fw *fw, u8 tx_ant, u8 rx_ant) 1454 { 1455 struct iwl_nvm_data *data; 1456 u32 sbands_flags = 0; 1457 u8 rx_chains = fw->valid_rx_ant; 1458 u8 tx_chains = fw->valid_rx_ant; 1459 1460 if (cfg->unii9_supported) 1461 data = kzalloc_flex(*data, channels, IWL_NVM_NUM_CHANNELS_UNII9); 1462 else if (cfg->uhb_supported) 1463 data = kzalloc_flex(*data, channels, IWL_NVM_NUM_CHANNELS_UHB); 1464 else 1465 data = kzalloc_flex(*data, channels, IWL_NVM_NUM_CHANNELS_EXT); 1466 if (!data) 1467 return NULL; 1468 1469 BUILD_BUG_ON(ARRAY_SIZE(mei_nvm->channels) != 1470 IWL_NVM_NUM_CHANNELS_UHB); 1471 data->nvm_version = mei_nvm->nvm_version; 1472 1473 iwl_set_radio_cfg(cfg, data, mei_nvm->radio_cfg); 1474 if (data->valid_tx_ant) 1475 tx_chains &= data->valid_tx_ant; 1476 if (data->valid_rx_ant) 1477 rx_chains &= data->valid_rx_ant; 1478 if (tx_ant) 1479 tx_chains &= tx_ant; 1480 if (rx_ant) 1481 rx_chains &= rx_ant; 1482 1483 data->sku_cap_mimo_disabled = false; 1484 data->sku_cap_band_24ghz_enable = true; 1485 data->sku_cap_band_52ghz_enable = true; 1486 data->sku_cap_11n_enable = 1487 !(iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL); 1488 data->sku_cap_11ac_enable = true; 1489 data->sku_cap_11ax_enable = 1490 mei_nvm->caps & MEI_NVM_CAPS_11AX_SUPPORT; 1491 1492 data->lar_enabled = mei_nvm->caps & MEI_NVM_CAPS_LARI_SUPPORT; 1493 1494 data->n_hw_addrs = mei_nvm->n_hw_addrs; 1495 /* If no valid mac address was found - bail out */ 1496 if (iwl_set_hw_address(trans, cfg, data, NULL, NULL)) { 1497 kfree(data); 1498 return NULL; 1499 } 1500 1501 if (data->lar_enabled && 1502 fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) 1503 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR; 1504 1505 iwl_init_sbands(trans, data, mei_nvm->channels, tx_chains, rx_chains, 1506 sbands_flags, true, fw); 1507 1508 return data; 1509 } 1510 IWL_EXPORT_SYMBOL(iwl_parse_mei_nvm_data); 1511 1512 struct iwl_nvm_data * 1513 iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_rf_cfg *cfg, 1514 const struct iwl_fw *fw, 1515 const __be16 *nvm_hw, const __le16 *nvm_sw, 1516 const __le16 *nvm_calib, const __le16 *regulatory, 1517 const __le16 *mac_override, const __le16 *phy_sku, 1518 u8 tx_chains, u8 rx_chains) 1519 { 1520 struct iwl_nvm_data *data; 1521 bool lar_enabled; 1522 u32 sku, radio_cfg; 1523 u32 sbands_flags = 0; 1524 u16 lar_config; 1525 const __le16 *ch_section; 1526 1527 if (cfg->unii9_supported) 1528 data = kzalloc_flex(*data, channels, IWL_NVM_NUM_CHANNELS_UNII9); 1529 else if (cfg->uhb_supported) 1530 data = kzalloc_flex(*data, channels, IWL_NVM_NUM_CHANNELS_UHB); 1531 else if (cfg->nvm_type != IWL_NVM_EXT) 1532 data = kzalloc_flex(*data, channels, IWL_NVM_NUM_CHANNELS); 1533 else 1534 data = kzalloc_flex(*data, channels, IWL_NVM_NUM_CHANNELS_EXT); 1535 if (!data) 1536 return NULL; 1537 1538 data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw); 1539 1540 radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku); 1541 iwl_set_radio_cfg(cfg, data, radio_cfg); 1542 if (data->valid_tx_ant) 1543 tx_chains &= data->valid_tx_ant; 1544 if (data->valid_rx_ant) 1545 rx_chains &= data->valid_rx_ant; 1546 1547 sku = iwl_get_sku(cfg, nvm_sw, phy_sku); 1548 data->sku_cap_band_24ghz_enable = sku & NVM_SKU_CAP_BAND_24GHZ; 1549 data->sku_cap_band_52ghz_enable = sku & NVM_SKU_CAP_BAND_52GHZ; 1550 data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE; 1551 if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL) 1552 data->sku_cap_11n_enable = false; 1553 data->sku_cap_11ac_enable = data->sku_cap_11n_enable && 1554 (sku & NVM_SKU_CAP_11AC_ENABLE); 1555 data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE; 1556 1557 data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw); 1558 1559 if (cfg->nvm_type != IWL_NVM_EXT) { 1560 /* Checking for required sections */ 1561 if (!nvm_calib) { 1562 IWL_ERR(trans, 1563 "Can't parse empty Calib NVM sections\n"); 1564 kfree(data); 1565 return NULL; 1566 } 1567 1568 ch_section = cfg->nvm_type == IWL_NVM_SDP ? 1569 ®ulatory[NVM_CHANNELS_SDP] : 1570 &nvm_sw[NVM_CHANNELS]; 1571 1572 lar_enabled = true; 1573 } else { 1574 u16 lar_offset = data->nvm_version < 0xE39 ? 1575 NVM_LAR_OFFSET_OLD : 1576 NVM_LAR_OFFSET; 1577 1578 lar_config = le16_to_cpup(regulatory + lar_offset); 1579 data->lar_enabled = !!(lar_config & 1580 NVM_LAR_ENABLED); 1581 lar_enabled = data->lar_enabled; 1582 ch_section = ®ulatory[NVM_CHANNELS_EXTENDED]; 1583 } 1584 1585 /* If no valid mac address was found - bail out */ 1586 if (iwl_set_hw_address(trans, cfg, data, nvm_hw, mac_override)) { 1587 kfree(data); 1588 return NULL; 1589 } 1590 1591 if (lar_enabled && 1592 fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) 1593 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR; 1594 1595 if (iwl_nvm_no_wide_in_5ghz(trans, cfg, nvm_hw)) 1596 sbands_flags |= IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ; 1597 1598 iwl_init_sbands(trans, data, ch_section, tx_chains, rx_chains, 1599 sbands_flags, false, fw); 1600 data->calib_version = 255; 1601 1602 return data; 1603 } 1604 IWL_EXPORT_SYMBOL(iwl_parse_nvm_data); 1605 1606 VISIBLE_IF_IWLWIFI_KUNIT 1607 u32 iwl_nvm_get_regdom_bw_flags(const u16 *nvm_chan, 1608 int ch_idx, u16 nvm_flags, 1609 struct iwl_reg_capa reg_capa) 1610 { 1611 u32 flags = NL80211_RRF_NO_HT40; 1612 1613 if (ch_idx < NUM_2GHZ_CHANNELS && 1614 (nvm_flags & NVM_CHANNEL_40MHZ)) { 1615 if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS) 1616 flags &= ~NL80211_RRF_NO_HT40PLUS; 1617 if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS) 1618 flags &= ~NL80211_RRF_NO_HT40MINUS; 1619 } else if (ch_idx < NUM_2GHZ_CHANNELS + NUM_5GHZ_CHANNELS && 1620 nvm_flags & NVM_CHANNEL_40MHZ) { 1621 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0) 1622 flags &= ~NL80211_RRF_NO_HT40PLUS; 1623 else 1624 flags &= ~NL80211_RRF_NO_HT40MINUS; 1625 } else if (nvm_flags & NVM_CHANNEL_40MHZ) { 1626 flags &= ~NL80211_RRF_NO_HT40PLUS; 1627 flags &= ~NL80211_RRF_NO_HT40MINUS; 1628 } 1629 1630 if (!(nvm_flags & NVM_CHANNEL_80MHZ)) 1631 flags |= NL80211_RRF_NO_80MHZ; 1632 if (!(nvm_flags & NVM_CHANNEL_160MHZ)) 1633 flags |= NL80211_RRF_NO_160MHZ; 1634 1635 if (!(nvm_flags & NVM_CHANNEL_ACTIVE)) 1636 flags |= NL80211_RRF_NO_IR; 1637 1638 if (nvm_flags & NVM_CHANNEL_RADAR) 1639 flags |= NL80211_RRF_DFS; 1640 1641 if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY) 1642 flags |= NL80211_RRF_NO_OUTDOOR; 1643 1644 if (nvm_flags & NVM_CHANNEL_ALLOW_20MHZ_ACTIVITY && 1645 flags & NL80211_RRF_NO_IR) 1646 flags |= NL80211_RRF_ALLOW_20MHZ_ACTIVITY; 1647 1648 /* Set the GO concurrent flag only in case that NO_IR is set. 1649 * Otherwise it is meaningless 1650 */ 1651 if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT)) { 1652 if (flags & NL80211_RRF_NO_IR) 1653 flags |= NL80211_RRF_GO_CONCURRENT; 1654 if (flags & NL80211_RRF_DFS) { 1655 flags |= NL80211_RRF_DFS_CONCURRENT; 1656 /* Our device doesn't set active bit for DFS channels 1657 * however, once marked as DFS no-ir is not needed. 1658 */ 1659 flags &= ~NL80211_RRF_NO_IR; 1660 } 1661 } 1662 1663 /* Set the AP type for the UHB case. */ 1664 if (nvm_flags & NVM_CHANNEL_VLP) { 1665 if (!(nvm_flags & NVM_CHANNEL_VLP_AP_NOT_ALLOWED)) 1666 flags |= NL80211_RRF_ALLOW_6GHZ_VLP_AP; 1667 } else { 1668 flags |= NL80211_RRF_NO_6GHZ_VLP_CLIENT; 1669 } 1670 1671 if (!(nvm_flags & NVM_CHANNEL_AFC)) 1672 flags |= NL80211_RRF_NO_6GHZ_AFC_CLIENT; 1673 1674 /* 1675 * reg_capa is per regulatory domain so apply it for every channel 1676 */ 1677 if (ch_idx >= NUM_2GHZ_CHANNELS) { 1678 if (!reg_capa.allow_40mhz) 1679 flags |= NL80211_RRF_NO_HT40; 1680 1681 if (!reg_capa.allow_80mhz) 1682 flags |= NL80211_RRF_NO_80MHZ; 1683 1684 if (!reg_capa.allow_160mhz) 1685 flags |= NL80211_RRF_NO_160MHZ; 1686 1687 if (!reg_capa.allow_320mhz) 1688 flags |= NL80211_RRF_NO_320MHZ; 1689 } 1690 1691 if (reg_capa.disable_11ax) 1692 flags |= NL80211_RRF_NO_HE; 1693 1694 if (reg_capa.disable_11be) 1695 flags |= NL80211_RRF_NO_EHT; 1696 1697 if (reg_capa.disable_11bn) 1698 flags |= NL80211_RRF_NO_UHR; 1699 1700 return flags; 1701 } 1702 EXPORT_SYMBOL_IF_IWLWIFI_KUNIT(iwl_nvm_get_regdom_bw_flags); 1703 1704 static struct iwl_reg_capa iwl_get_reg_capa(u32 flags, u8 resp_ver) 1705 { 1706 struct iwl_reg_capa reg_capa = {}; 1707 1708 if (resp_ver >= REG_CAPA_V6_RESP_VER) { 1709 if (flags & REG_CAPA_V6_EHT_PUNCTURING_ENABLED) 1710 reg_capa.puncturing_status = IWL_PUNCTURING_STATUS_ENABLED; 1711 else 1712 reg_capa.puncturing_status = IWL_PUNCTURING_STATUS_DISABLED; 1713 } 1714 1715 if (resp_ver >= REG_CAPA_V4_RESP_VER) { 1716 reg_capa.allow_40mhz = true; 1717 reg_capa.allow_80mhz = flags & REG_CAPA_V5_80MHZ_ALLOWED; 1718 reg_capa.allow_160mhz = flags & REG_CAPA_V5_160MHZ_ALLOWED; 1719 reg_capa.allow_320mhz = flags & REG_CAPA_V5_320MHZ_ALLOWED; 1720 reg_capa.disable_11ax = flags & REG_CAPA_V5_11AX_DISABLED; 1721 reg_capa.disable_11be = flags & REG_CAPA_V5_11BE_DISABLED; 1722 /* can check: was reserved and irrelevant for pre-UHR devices */ 1723 reg_capa.disable_11bn = flags & REG_CAPA_V5_11BN_DISABLED; 1724 } else if (resp_ver >= REG_CAPA_V2_RESP_VER) { 1725 reg_capa.allow_40mhz = flags & REG_CAPA_V2_40MHZ_ALLOWED; 1726 reg_capa.allow_80mhz = flags & REG_CAPA_V2_80MHZ_ALLOWED; 1727 reg_capa.allow_160mhz = flags & REG_CAPA_V2_160MHZ_ALLOWED; 1728 reg_capa.disable_11ax = flags & REG_CAPA_V2_11AX_DISABLED; 1729 } else { 1730 reg_capa.allow_40mhz = !(flags & REG_CAPA_V1_40MHZ_FORBIDDEN); 1731 reg_capa.allow_80mhz = flags & REG_CAPA_V1_80MHZ_ALLOWED; 1732 reg_capa.allow_160mhz = flags & REG_CAPA_V1_160MHZ_ALLOWED; 1733 reg_capa.disable_11ax = flags & REG_CAPA_V1_11AX_DISABLED; 1734 } 1735 return reg_capa; 1736 } 1737 1738 struct ieee80211_regdomain * 1739 iwl_parse_nvm_mcc_info(struct iwl_trans *trans, 1740 int num_of_ch, __le32 *channels, u16 fw_mcc, 1741 u16 geo_info, u32 cap, u8 resp_ver, 1742 enum iwl_puncturing_status *puncturing_status) 1743 { 1744 const struct iwl_rf_cfg *cfg = trans->cfg; 1745 struct device *dev = trans->dev; 1746 int ch_idx; 1747 u16 ch_flags; 1748 u32 reg_rule_flags, prev_reg_rule_flags = 0; 1749 const u16 *nvm_chan; 1750 struct ieee80211_regdomain *regd, *copy_rd; 1751 struct ieee80211_reg_rule *rule; 1752 int center_freq, prev_center_freq = 0; 1753 int valid_rules = 0; 1754 bool new_rule; 1755 int max_num_ch; 1756 struct iwl_reg_capa reg_capa; 1757 1758 if (cfg->unii9_supported) { 1759 max_num_ch = IWL_NVM_NUM_CHANNELS_UNII9; 1760 nvm_chan = iwl_unii9_nvm_channels; 1761 } else if (cfg->uhb_supported) { 1762 max_num_ch = IWL_NVM_NUM_CHANNELS_UHB; 1763 nvm_chan = iwl_unii9_nvm_channels; 1764 } else if (cfg->nvm_type == IWL_NVM_EXT) { 1765 max_num_ch = IWL_NVM_NUM_CHANNELS_EXT; 1766 nvm_chan = iwl_unii9_nvm_channels; 1767 } else { 1768 max_num_ch = IWL_NVM_NUM_CHANNELS; 1769 nvm_chan = iwl_nvm_channels; 1770 } 1771 1772 if (num_of_ch > max_num_ch) { 1773 IWL_DEBUG_DEV(dev, IWL_DL_LAR, 1774 "Num of channels (%d) is greater than expected. Truncating to %d\n", 1775 num_of_ch, max_num_ch); 1776 num_of_ch = max_num_ch; 1777 } 1778 1779 if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES)) 1780 return ERR_PTR(-EINVAL); 1781 1782 IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n", 1783 num_of_ch); 1784 1785 /* build a regdomain rule for every valid channel. 1786 * Certain firmware versions might report no valid channels 1787 * if booted in RF-kill, i.e. not all calibrations etc. are 1788 * running. We'll get out of this situation later when the 1789 * rfkill is removed and we update the regdomain again, but 1790 * since cfg80211 doesn't accept an empty regdomain, we need 1791 * to allocate space for at least one rule to add a dummy 1792 * (unusable) rule in this case so we can init. 1793 */ 1794 regd = kzalloc_flex(*regd, reg_rules, num_of_ch ?: 1); 1795 if (!regd) 1796 return ERR_PTR(-ENOMEM); 1797 1798 /* set alpha2 from FW. */ 1799 regd->alpha2[0] = fw_mcc >> 8; 1800 regd->alpha2[1] = fw_mcc & 0xff; 1801 1802 /* parse regulatory capability flags */ 1803 reg_capa = iwl_get_reg_capa(cap, resp_ver); 1804 1805 if (puncturing_status) 1806 *puncturing_status = reg_capa.puncturing_status; 1807 1808 for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) { 1809 enum nl80211_band band = 1810 iwl_nl80211_band_from_channel_idx(ch_idx); 1811 1812 ch_flags = (u16)__le32_to_cpup(channels + ch_idx); 1813 center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx], 1814 band); 1815 new_rule = false; 1816 1817 if (IWL_FW_CHECK(trans, !center_freq, 1818 "Invalid channel %d (idx %d) in NVM\n", 1819 nvm_chan[ch_idx], ch_idx)) 1820 continue; 1821 1822 if (!(ch_flags & NVM_CHANNEL_VALID)) { 1823 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR, 1824 nvm_chan[ch_idx], ch_flags); 1825 continue; 1826 } 1827 1828 reg_rule_flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx, 1829 ch_flags, 1830 reg_capa); 1831 1832 /* we can't continue the same rule */ 1833 if (ch_idx == 0 || prev_reg_rule_flags != reg_rule_flags || 1834 center_freq - prev_center_freq > 20) { 1835 valid_rules++; 1836 new_rule = true; 1837 } 1838 1839 rule = ®d->reg_rules[valid_rules - 1]; 1840 1841 if (new_rule) 1842 rule->freq_range.start_freq_khz = 1843 MHZ_TO_KHZ(center_freq - 10); 1844 1845 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10); 1846 1847 /* this doesn't matter - not used by FW */ 1848 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6); 1849 rule->power_rule.max_eirp = 1850 DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER); 1851 1852 rule->flags = reg_rule_flags; 1853 1854 /* rely on auto-calculation to merge BW of contiguous chans */ 1855 rule->flags |= NL80211_RRF_AUTO_BW; 1856 rule->freq_range.max_bandwidth_khz = 0; 1857 1858 prev_center_freq = center_freq; 1859 prev_reg_rule_flags = reg_rule_flags; 1860 1861 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR, 1862 nvm_chan[ch_idx], ch_flags); 1863 1864 if (!(geo_info & GEO_WMM_ETSI_5GHZ_INFO) || 1865 band == NL80211_BAND_2GHZ) 1866 continue; 1867 1868 reg_query_regdb_wmm(regd->alpha2, center_freq, rule); 1869 } 1870 1871 /* If no valid rules were found, add a dummy rule */ 1872 if (!valid_rules) { 1873 valid_rules = 1; 1874 rule = ®d->reg_rules[valid_rules - 1]; 1875 rule->freq_range.start_freq_khz = MHZ_TO_KHZ(2412); 1876 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(2413); 1877 rule->freq_range.max_bandwidth_khz = MHZ_TO_KHZ(1); 1878 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6); 1879 rule->power_rule.max_eirp = 1880 DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER); 1881 } 1882 1883 regd->n_reg_rules = valid_rules; 1884 1885 /* 1886 * Narrow down regdom for unused regulatory rules to prevent hole 1887 * between reg rules to wmm rules. 1888 */ 1889 copy_rd = kmemdup(regd, struct_size(regd, reg_rules, valid_rules), 1890 GFP_KERNEL); 1891 if (!copy_rd) 1892 copy_rd = ERR_PTR(-ENOMEM); 1893 1894 kfree(regd); 1895 return copy_rd; 1896 } 1897 IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info); 1898 1899 #define IWL_MAX_NVM_SECTION_SIZE 0x1b58 1900 #define IWL_MAX_EXT_NVM_SECTION_SIZE 0x1ffc 1901 #define MAX_NVM_FILE_LEN 16384 1902 1903 void iwl_nvm_fixups(u32 hw_id, unsigned int section, u8 *data, 1904 unsigned int len) 1905 { 1906 #define IWL_4165_DEVICE_ID 0x5501 1907 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5) 1908 1909 if (section == NVM_SECTION_TYPE_PHY_SKU && 1910 hw_id == IWL_4165_DEVICE_ID && data && len >= 5 && 1911 (data[4] & NVM_SKU_CAP_MIMO_DISABLE)) 1912 /* OTP 0x52 bug work around: it's a 1x1 device */ 1913 data[3] = ANT_B | (ANT_B << 4); 1914 } 1915 IWL_EXPORT_SYMBOL(iwl_nvm_fixups); 1916 1917 /* 1918 * Reads external NVM from a file into mvm->nvm_sections 1919 * 1920 * HOW TO CREATE THE NVM FILE FORMAT: 1921 * ------------------------------ 1922 * 1. create hex file, format: 1923 * 3800 -> header 1924 * 0000 -> header 1925 * 5a40 -> data 1926 * 1927 * rev - 6 bit (word1) 1928 * len - 10 bit (word1) 1929 * id - 4 bit (word2) 1930 * rsv - 12 bit (word2) 1931 * 1932 * 2. flip 8bits with 8 bits per line to get the right NVM file format 1933 * 1934 * 3. create binary file from the hex file 1935 * 1936 * 4. save as "iNVM_xxx.bin" under /lib/firmware 1937 */ 1938 int iwl_read_external_nvm(struct iwl_trans *trans, 1939 const char *nvm_file_name, 1940 struct iwl_nvm_section *nvm_sections) 1941 { 1942 int ret, section_size; 1943 u16 section_id; 1944 const struct firmware *fw_entry; 1945 const struct { 1946 __le16 word1; 1947 __le16 word2; 1948 u8 data[]; 1949 } *file_sec; 1950 const u8 *eof; 1951 u8 *temp; 1952 int max_section_size; 1953 const __le32 *dword_buff; 1954 1955 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF)) 1956 #define NVM_WORD2_ID(x) (x >> 12) 1957 #define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8)) 1958 #define EXT_NVM_WORD1_ID(x) ((x) >> 4) 1959 #define NVM_HEADER_0 (0x2A504C54) 1960 #define NVM_HEADER_1 (0x4E564D2A) 1961 #define NVM_HEADER_SIZE (4 * sizeof(u32)) 1962 1963 IWL_DEBUG_EEPROM(trans->dev, "Read from external NVM\n"); 1964 1965 /* Maximal size depends on NVM version */ 1966 if (trans->cfg->nvm_type != IWL_NVM_EXT) 1967 max_section_size = IWL_MAX_NVM_SECTION_SIZE; 1968 else 1969 max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE; 1970 1971 /* 1972 * Obtain NVM image via request_firmware. Since we already used 1973 * request_firmware_nowait() for the firmware binary load and only 1974 * get here after that we assume the NVM request can be satisfied 1975 * synchronously. 1976 */ 1977 ret = request_firmware(&fw_entry, nvm_file_name, trans->dev); 1978 if (ret) { 1979 IWL_ERR(trans, "ERROR: %s isn't available %d\n", 1980 nvm_file_name, ret); 1981 return ret; 1982 } 1983 1984 IWL_INFO(trans, "Loaded NVM file %s (%zu bytes)\n", 1985 nvm_file_name, fw_entry->size); 1986 1987 if (fw_entry->size > MAX_NVM_FILE_LEN) { 1988 IWL_ERR(trans, "NVM file too large\n"); 1989 ret = -EINVAL; 1990 goto out; 1991 } 1992 1993 eof = fw_entry->data + fw_entry->size; 1994 dword_buff = (const __le32 *)fw_entry->data; 1995 1996 /* some NVM file will contain a header. 1997 * The header is identified by 2 dwords header as follow: 1998 * dword[0] = 0x2A504C54 1999 * dword[1] = 0x4E564D2A 2000 * 2001 * This header must be skipped when providing the NVM data to the FW. 2002 */ 2003 if (fw_entry->size > NVM_HEADER_SIZE && 2004 dword_buff[0] == cpu_to_le32(NVM_HEADER_0) && 2005 dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) { 2006 file_sec = (const void *)(fw_entry->data + NVM_HEADER_SIZE); 2007 IWL_INFO(trans, "NVM Version %08X\n", le32_to_cpu(dword_buff[2])); 2008 IWL_INFO(trans, "NVM Manufacturing date %08X\n", 2009 le32_to_cpu(dword_buff[3])); 2010 2011 /* nvm file validation, dword_buff[2] holds the file version */ 2012 if (trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_8000 && 2013 trans->info.hw_rev_step == SILICON_C_STEP && 2014 le32_to_cpu(dword_buff[2]) < 0xE4A) { 2015 ret = -EFAULT; 2016 goto out; 2017 } 2018 } else { 2019 file_sec = (const void *)fw_entry->data; 2020 } 2021 2022 while (true) { 2023 if (file_sec->data > eof) { 2024 IWL_ERR(trans, 2025 "ERROR - NVM file too short for section header\n"); 2026 ret = -EINVAL; 2027 break; 2028 } 2029 2030 /* check for EOF marker */ 2031 if (!file_sec->word1 && !file_sec->word2) { 2032 ret = 0; 2033 break; 2034 } 2035 2036 if (trans->cfg->nvm_type != IWL_NVM_EXT) { 2037 section_size = 2038 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1)); 2039 section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2)); 2040 } else { 2041 section_size = 2 * EXT_NVM_WORD2_LEN( 2042 le16_to_cpu(file_sec->word2)); 2043 section_id = EXT_NVM_WORD1_ID( 2044 le16_to_cpu(file_sec->word1)); 2045 } 2046 2047 if (section_size > max_section_size) { 2048 IWL_ERR(trans, "ERROR - section too large (%d)\n", 2049 section_size); 2050 ret = -EINVAL; 2051 break; 2052 } 2053 2054 if (!section_size) { 2055 IWL_ERR(trans, "ERROR - section empty\n"); 2056 ret = -EINVAL; 2057 break; 2058 } 2059 2060 if (file_sec->data + section_size > eof) { 2061 IWL_ERR(trans, 2062 "ERROR - NVM file too short for section (%d bytes)\n", 2063 section_size); 2064 ret = -EINVAL; 2065 break; 2066 } 2067 2068 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS, 2069 "Invalid NVM section ID %d\n", section_id)) { 2070 ret = -EINVAL; 2071 break; 2072 } 2073 2074 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL); 2075 if (!temp) { 2076 ret = -ENOMEM; 2077 break; 2078 } 2079 2080 iwl_nvm_fixups(trans->info.hw_id, section_id, temp, section_size); 2081 2082 kfree(nvm_sections[section_id].data); 2083 nvm_sections[section_id].data = temp; 2084 nvm_sections[section_id].length = section_size; 2085 2086 /* advance to the next section */ 2087 file_sec = (const void *)(file_sec->data + section_size); 2088 } 2089 out: 2090 release_firmware(fw_entry); 2091 return ret; 2092 } 2093 IWL_EXPORT_SYMBOL(iwl_read_external_nvm); 2094 2095 struct iwl_nvm_data *iwl_get_nvm(struct iwl_trans *trans, 2096 const struct iwl_fw *fw, 2097 u8 set_tx_ant, u8 set_rx_ant) 2098 { 2099 struct iwl_nvm_get_info cmd = {}; 2100 struct iwl_nvm_data *nvm; 2101 struct iwl_host_cmd hcmd = { 2102 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, 2103 .data = { &cmd, }, 2104 .len = { sizeof(cmd) }, 2105 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, NVM_GET_INFO) 2106 }; 2107 int ret; 2108 bool empty_otp; 2109 u32 mac_flags; 2110 u32 sbands_flags = 0; 2111 u8 tx_ant; 2112 u8 rx_ant; 2113 2114 /* 2115 * All the values in iwl_nvm_get_info_rsp v4 are the same as 2116 * in v3, except for the channel profile part of the 2117 * regulatory. So we can just access the new struct, with the 2118 * exception of the latter. 2119 */ 2120 struct iwl_nvm_get_info_rsp *rsp; 2121 struct iwl_nvm_get_info_rsp_v3 *rsp_v3; 2122 bool v4 = fw_has_api(&fw->ucode_capa, 2123 IWL_UCODE_TLV_API_REGULATORY_NVM_INFO); 2124 size_t rsp_size; 2125 void *channel_profile; 2126 2127 ret = iwl_trans_send_cmd(trans, &hcmd); 2128 if (ret) 2129 return ERR_PTR(ret); 2130 2131 switch (iwl_fw_lookup_notif_ver(fw, REGULATORY_AND_NVM_GROUP, 2132 NVM_GET_INFO, 0)) { 2133 case 5: 2134 rsp_size = sizeof(struct iwl_nvm_get_info_rsp); 2135 break; 2136 case 4: 2137 rsp_size = sizeof(struct iwl_nvm_get_info_rsp_v4); 2138 break; 2139 default: 2140 rsp_size = sizeof(struct iwl_nvm_get_info_rsp_v3); 2141 break; 2142 } 2143 2144 if (WARN(iwl_rx_packet_payload_len(hcmd.resp_pkt) != rsp_size, 2145 "Invalid payload len in NVM response from FW %d", 2146 iwl_rx_packet_payload_len(hcmd.resp_pkt))) { 2147 ret = -EINVAL; 2148 goto out; 2149 } 2150 2151 rsp = (void *)hcmd.resp_pkt->data; 2152 empty_otp = !!(le32_to_cpu(rsp->general.flags) & 2153 NVM_GENERAL_FLAGS_EMPTY_OTP); 2154 if (empty_otp) 2155 IWL_INFO(trans, "OTP is empty\n"); 2156 2157 nvm = kzalloc_flex(*nvm, channels, IWL_NUM_CHANNELS_V3); 2158 if (!nvm) { 2159 ret = -ENOMEM; 2160 goto out; 2161 } 2162 2163 iwl_set_hw_address_from_csr(trans, nvm); 2164 /* TODO: if platform NVM has MAC address - override it here */ 2165 2166 if (!is_valid_ether_addr(nvm->hw_addr)) { 2167 IWL_ERR(trans, "no valid mac address was found\n"); 2168 ret = -EINVAL; 2169 goto err_free; 2170 } 2171 2172 IWL_INFO(trans, "base HW address: %pM\n", nvm->hw_addr); 2173 2174 /* Initialize general data */ 2175 nvm->nvm_version = le16_to_cpu(rsp->general.nvm_version); 2176 nvm->n_hw_addrs = rsp->general.n_hw_addrs; 2177 if (nvm->n_hw_addrs == 0) 2178 IWL_WARN(trans, 2179 "Firmware declares no reserved mac addresses. OTP is empty: %d\n", 2180 empty_otp); 2181 2182 /* Initialize MAC sku data */ 2183 mac_flags = le32_to_cpu(rsp->mac_sku.mac_sku_flags); 2184 nvm->sku_cap_11ac_enable = 2185 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AC_ENABLED); 2186 nvm->sku_cap_11n_enable = 2187 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11N_ENABLED); 2188 nvm->sku_cap_11ax_enable = 2189 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AX_ENABLED); 2190 nvm->sku_cap_band_24ghz_enable = 2191 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_2_4_ENABLED); 2192 nvm->sku_cap_band_52ghz_enable = 2193 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED); 2194 nvm->sku_cap_mimo_disabled = 2195 !!(mac_flags & NVM_MAC_SKU_FLAGS_MIMO_DISABLED); 2196 if (trans->cfg->eht_supported) 2197 nvm->sku_cap_11be_enable = true; 2198 nvm->sku_cap_11bn_enable = trans->cfg->uhr_supported; 2199 2200 /* Initialize PHY sku data */ 2201 nvm->valid_tx_ant = (u8)le32_to_cpu(rsp->phy_sku.tx_chains); 2202 nvm->valid_rx_ant = (u8)le32_to_cpu(rsp->phy_sku.rx_chains); 2203 2204 if (le32_to_cpu(rsp->regulatory.lar_enabled) && 2205 fw_has_capa(&fw->ucode_capa, 2206 IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) { 2207 nvm->lar_enabled = true; 2208 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR; 2209 } 2210 2211 rsp_v3 = (void *)rsp; 2212 channel_profile = v4 ? (void *)rsp->regulatory.channel_profile : 2213 (void *)rsp_v3->regulatory.channel_profile; 2214 2215 tx_ant = nvm->valid_tx_ant & fw->valid_tx_ant; 2216 rx_ant = nvm->valid_rx_ant & fw->valid_rx_ant; 2217 2218 if (set_tx_ant) 2219 tx_ant &= set_tx_ant; 2220 if (set_rx_ant) 2221 rx_ant &= set_rx_ant; 2222 2223 iwl_init_sbands(trans, nvm, channel_profile, tx_ant, rx_ant, 2224 sbands_flags, v4, fw); 2225 2226 iwl_init_nan_phy_capa(fw, nvm); 2227 2228 iwl_free_resp(&hcmd); 2229 return nvm; 2230 2231 err_free: 2232 kfree(nvm); 2233 out: 2234 iwl_free_resp(&hcmd); 2235 return ERR_PTR(ret); 2236 } 2237 IWL_EXPORT_SYMBOL(iwl_get_nvm); 2238