1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/capability.h> 25 #include <linux/device.h> 26 #include <linux/err.h> 27 #include <linux/fs.h> 28 #include <linux/file.h> 29 #include <linux/overflow.h> 30 #include <linux/sched.h> 31 #include <linux/slab.h> 32 #include <linux/uaccess.h> 33 #include <linux/compat.h> 34 #include <uapi/linux/kfd_ioctl.h> 35 #include <linux/time.h> 36 #include <linux/mm.h> 37 #include <linux/mman.h> 38 #include <linux/ptrace.h> 39 #include <linux/dma-buf.h> 40 #include <linux/processor.h> 41 #include "kfd_priv.h" 42 #include "kfd_device_queue_manager.h" 43 #include "kfd_svm.h" 44 #include "amdgpu_amdkfd.h" 45 #include "kfd_smi_events.h" 46 #include "amdgpu_dma_buf.h" 47 #include "kfd_debug.h" 48 #include "amdgpu_ptl.h" 49 50 static long kfd_ioctl(struct file *, unsigned int, unsigned long); 51 static int kfd_open(struct inode *, struct file *); 52 static int kfd_release(struct inode *, struct file *); 53 static int kfd_mmap(struct file *, struct vm_area_struct *); 54 55 static const char kfd_dev_name[] = "kfd"; 56 57 static const struct file_operations kfd_fops = { 58 .owner = THIS_MODULE, 59 .unlocked_ioctl = kfd_ioctl, 60 .compat_ioctl = compat_ptr_ioctl, 61 .open = kfd_open, 62 .release = kfd_release, 63 .mmap = kfd_mmap, 64 }; 65 66 static int kfd_char_dev_major = -1; 67 struct device *kfd_device; 68 static const struct class kfd_class = { 69 .name = kfd_dev_name, 70 }; 71 72 /* 73 * Cache the address space of the chardev on first open so that the reset 74 * path can drop all userspace mappings of doorbell and MMIO ranges via 75 * unmap_mapping_range(). 76 */ 77 static struct address_space *kfd_dev_mapping; 78 79 void kfd_dev_unmap_mapping_range(loff_t const holebegin, loff_t const holelen) 80 { 81 struct address_space *mapping = READ_ONCE(kfd_dev_mapping); 82 83 if (mapping) 84 unmap_mapping_range(mapping, holebegin, holelen, 1); 85 } 86 87 static inline struct kfd_process_device *kfd_lock_pdd_by_id(struct kfd_process *p, __u32 gpu_id) 88 { 89 struct kfd_process_device *pdd; 90 91 mutex_lock(&p->mutex); 92 pdd = kfd_process_device_data_by_id(p, gpu_id); 93 94 if (pdd) 95 return pdd; 96 97 mutex_unlock(&p->mutex); 98 return NULL; 99 } 100 101 static inline void kfd_unlock_pdd(struct kfd_process_device *pdd) 102 { 103 mutex_unlock(&pdd->process->mutex); 104 } 105 106 int kfd_chardev_init(void) 107 { 108 int err = 0; 109 110 kfd_char_dev_major = register_chrdev(0, kfd_dev_name, &kfd_fops); 111 err = kfd_char_dev_major; 112 if (err < 0) 113 goto err_register_chrdev; 114 115 err = class_register(&kfd_class); 116 if (err) 117 goto err_class_create; 118 119 kfd_device = device_create(&kfd_class, NULL, 120 MKDEV(kfd_char_dev_major, 0), 121 NULL, kfd_dev_name); 122 err = PTR_ERR(kfd_device); 123 if (IS_ERR(kfd_device)) 124 goto err_device_create; 125 126 return 0; 127 128 err_device_create: 129 class_unregister(&kfd_class); 130 err_class_create: 131 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 132 err_register_chrdev: 133 return err; 134 } 135 136 void kfd_chardev_exit(void) 137 { 138 device_destroy(&kfd_class, MKDEV(kfd_char_dev_major, 0)); 139 class_unregister(&kfd_class); 140 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 141 kfd_device = NULL; 142 } 143 144 145 static int kfd_open(struct inode *inode, struct file *filep) 146 { 147 struct kfd_process *process; 148 bool is_32bit_user_mode; 149 150 if (iminor(inode) != 0) 151 return -ENODEV; 152 153 /* 154 * /dev/kfd is a single chardev so all opens share one inode. Cache 155 * its address_space on the first open for use by the reset path. 156 */ 157 if (!READ_ONCE(kfd_dev_mapping)) 158 cmpxchg(&kfd_dev_mapping, NULL, inode->i_mapping); 159 160 is_32bit_user_mode = in_compat_syscall(); 161 162 if (is_32bit_user_mode) { 163 dev_warn(kfd_device, 164 "Process %d (32-bit) failed to open /dev/kfd\n" 165 "32-bit processes are not supported by amdkfd\n", 166 current->pid); 167 return -EPERM; 168 } 169 170 process = kfd_create_process(current); 171 if (IS_ERR(process)) 172 return PTR_ERR(process); 173 174 /* filep now owns the reference returned by kfd_create_process */ 175 filep->private_data = process; 176 177 dev_dbg(kfd_device, "process pid %d opened kfd node, compat mode (32 bit) - %d\n", 178 process->lead_thread->pid, process->is_32bit_user_mode); 179 180 return 0; 181 } 182 183 static int kfd_release(struct inode *inode, struct file *filep) 184 { 185 struct kfd_process *process = filep->private_data; 186 187 if (!process) 188 return 0; 189 190 if (process->context_id != KFD_CONTEXT_ID_PRIMARY) 191 kfd_process_notifier_release_internal(process); 192 193 kfd_unref_process(process); 194 195 return 0; 196 } 197 198 static int kfd_ioctl_get_version(struct file *filep, struct kfd_process *p, 199 void *data) 200 { 201 struct kfd_ioctl_get_version_args *args = data; 202 203 args->major_version = KFD_IOCTL_MAJOR_VERSION; 204 args->minor_version = KFD_IOCTL_MINOR_VERSION; 205 206 return 0; 207 } 208 209 static int set_queue_properties_from_user(struct queue_properties *q_properties, 210 struct kfd_ioctl_create_queue_args *args) 211 { 212 /* 213 * Repurpose queue percentage to accommodate new features: 214 * bit 0-7: queue percentage 215 * bit 8-15: pm4_target_xcc 216 */ 217 if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) { 218 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 219 return -EINVAL; 220 } 221 222 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 223 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 224 return -EINVAL; 225 } 226 227 if ((args->ring_base_address) && 228 (!access_ok((const void __user *) args->ring_base_address, 229 sizeof(uint64_t)))) { 230 pr_err("Can't access ring base address\n"); 231 return -EFAULT; 232 } 233 234 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 235 pr_err("Ring size must be a power of 2 or 0\n"); 236 return -EINVAL; 237 } 238 239 if (args->ring_size < KFD_MIN_QUEUE_RING_SIZE) { 240 args->ring_size = KFD_MIN_QUEUE_RING_SIZE; 241 pr_debug("Size lower. clamped to KFD_MIN_QUEUE_RING_SIZE"); 242 } 243 244 if ((args->metadata_ring_size != 0) && !is_power_of_2(args->metadata_ring_size)) { 245 pr_err("Metadata ring size must be a power of 2 or 0\n"); 246 return -EINVAL; 247 } 248 249 if (!access_ok((const void __user *) args->read_pointer_address, 250 sizeof(uint32_t))) { 251 pr_err("Can't access read pointer\n"); 252 return -EFAULT; 253 } 254 255 if (!access_ok((const void __user *) args->write_pointer_address, 256 sizeof(uint32_t))) { 257 pr_err("Can't access write pointer\n"); 258 return -EFAULT; 259 } 260 261 if (args->eop_buffer_address && 262 !access_ok((const void __user *) args->eop_buffer_address, 263 sizeof(uint32_t))) { 264 pr_debug("Can't access eop buffer"); 265 return -EFAULT; 266 } 267 268 if (args->ctx_save_restore_address && 269 !access_ok((const void __user *) args->ctx_save_restore_address, 270 sizeof(uint32_t))) { 271 pr_debug("Can't access ctx save restore buffer"); 272 return -EFAULT; 273 } 274 275 q_properties->is_interop = false; 276 q_properties->is_gws = false; 277 q_properties->queue_percent = args->queue_percentage & 0xFF; 278 /* bit 8-15 are repurposed to be PM4 target XCC */ 279 q_properties->pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF; 280 q_properties->priority = args->queue_priority; 281 q_properties->queue_address = args->ring_base_address; 282 q_properties->queue_size = args->ring_size; 283 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 284 q_properties->metadata_queue_size = args->metadata_ring_size; 285 286 q_properties->read_ptr = (void __user *)args->read_pointer_address; 287 q_properties->write_ptr = (void __user *)args->write_pointer_address; 288 q_properties->eop_ring_buffer_address = args->eop_buffer_address; 289 q_properties->eop_ring_buffer_size = args->eop_buffer_size; 290 q_properties->ctx_save_restore_area_address = 291 args->ctx_save_restore_address; 292 q_properties->ctx_save_restore_area_size = args->ctx_save_restore_size; 293 q_properties->ctl_stack_size = args->ctl_stack_size; 294 q_properties->sdma_engine_id = args->sdma_engine_id; 295 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE || 296 args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 297 q_properties->type = KFD_QUEUE_TYPE_COMPUTE; 298 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA) 299 q_properties->type = KFD_QUEUE_TYPE_SDMA; 300 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_XGMI) 301 q_properties->type = KFD_QUEUE_TYPE_SDMA_XGMI; 302 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_BY_ENG_ID) 303 q_properties->type = KFD_QUEUE_TYPE_SDMA_BY_ENG_ID; 304 else 305 return -ENOTSUPP; 306 307 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 308 q_properties->format = KFD_QUEUE_FORMAT_AQL; 309 else 310 q_properties->format = KFD_QUEUE_FORMAT_PM4; 311 312 pr_debug("Queue Percentage: %d, %d\n", 313 q_properties->queue_percent, args->queue_percentage); 314 315 pr_debug("Queue Priority: %d, %d\n", 316 q_properties->priority, args->queue_priority); 317 318 pr_debug("Queue Address: 0x%llX, 0x%llX\n", 319 q_properties->queue_address, args->ring_base_address); 320 321 pr_debug("Queue Size: 0x%llX, %u\n", 322 q_properties->queue_size, args->ring_size); 323 324 pr_debug("Queue r/w Pointers: %px, %px\n", 325 q_properties->read_ptr, 326 q_properties->write_ptr); 327 328 pr_debug("Queue Format: %d\n", q_properties->format); 329 330 pr_debug("Queue EOP: 0x%llX\n", q_properties->eop_ring_buffer_address); 331 332 pr_debug("Queue CTX save area: 0x%llX\n", 333 q_properties->ctx_save_restore_area_address); 334 335 return 0; 336 } 337 338 static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p, 339 void *data) 340 { 341 struct kfd_ioctl_create_queue_args *args = data; 342 struct kfd_node *dev; 343 int err = 0; 344 unsigned int queue_id; 345 struct kfd_process_device *pdd; 346 struct queue_properties q_properties; 347 uint32_t doorbell_offset_in_process = 0; 348 349 memset(&q_properties, 0, sizeof(struct queue_properties)); 350 351 pr_debug("Creating queue ioctl\n"); 352 353 err = set_queue_properties_from_user(&q_properties, args); 354 if (err) 355 return err; 356 357 pr_debug("Looking for gpu id 0x%x\n", args->gpu_id); 358 359 mutex_lock(&p->mutex); 360 361 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 362 if (!pdd) { 363 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 364 err = -EINVAL; 365 goto err_pdd; 366 } 367 dev = pdd->dev; 368 369 pdd = kfd_bind_process_to_device(dev, p); 370 if (IS_ERR(pdd)) { 371 err = -ESRCH; 372 goto err_bind_process; 373 } 374 375 if (q_properties.type == KFD_QUEUE_TYPE_SDMA_BY_ENG_ID) { 376 int max_sdma_eng_id = kfd_get_num_sdma_engines(dev) + 377 kfd_get_num_xgmi_sdma_engines(dev) - 1; 378 379 if (q_properties.sdma_engine_id > max_sdma_eng_id) { 380 err = -EINVAL; 381 pr_err("sdma_engine_id %i exceeds maximum id of %i\n", 382 q_properties.sdma_engine_id, max_sdma_eng_id); 383 goto err_sdma_engine_id; 384 } 385 } 386 387 if (!pdd->qpd.proc_doorbells) { 388 err = kfd_alloc_process_doorbells(dev->kfd, pdd); 389 if (err) { 390 pr_debug("failed to allocate process doorbells\n"); 391 goto err_bind_process; 392 } 393 } 394 395 err = kfd_queue_acquire_buffers(pdd, &q_properties); 396 if (err) { 397 pr_debug("failed to acquire user queue buffers\n"); 398 goto err_acquire_queue_buf; 399 } 400 401 pr_debug("Creating queue for process pid %d on gpu 0x%x\n", 402 p->lead_thread->pid, 403 dev->id); 404 405 err = pqm_create_queue(&p->pqm, dev, &q_properties, &queue_id, 406 NULL, NULL, NULL, &doorbell_offset_in_process); 407 if (err != 0) 408 goto err_create_queue; 409 410 args->queue_id = queue_id; 411 412 413 /* Return gpu_id as doorbell offset for mmap usage */ 414 args->doorbell_offset = KFD_MMAP_TYPE_DOORBELL; 415 args->doorbell_offset |= KFD_MMAP_GPU_ID(args->gpu_id); 416 if (KFD_IS_SOC15(dev)) 417 /* On SOC15 ASICs, include the doorbell offset within the 418 * process doorbell frame, which is 2 pages. 419 */ 420 args->doorbell_offset |= doorbell_offset_in_process; 421 422 mutex_unlock(&p->mutex); 423 424 pr_debug("Queue id %d was created successfully\n", args->queue_id); 425 426 pr_debug("Ring buffer address == 0x%016llX\n", 427 args->ring_base_address); 428 429 pr_debug("Read ptr address == 0x%016llX\n", 430 args->read_pointer_address); 431 432 pr_debug("Write ptr address == 0x%016llX\n", 433 args->write_pointer_address); 434 435 kfd_dbg_ev_raise(KFD_EC_MASK(EC_QUEUE_NEW), p, dev, queue_id, false, NULL, 0); 436 return 0; 437 438 err_create_queue: 439 kfd_queue_unref_bo_vas(pdd, &q_properties); 440 kfd_queue_release_buffers(pdd, &q_properties); 441 err_acquire_queue_buf: 442 err_sdma_engine_id: 443 err_bind_process: 444 err_pdd: 445 mutex_unlock(&p->mutex); 446 return err; 447 } 448 449 static int kfd_ioctl_destroy_queue(struct file *filp, struct kfd_process *p, 450 void *data) 451 { 452 int retval; 453 struct kfd_ioctl_destroy_queue_args *args = data; 454 455 pr_debug("Destroying queue id %d for process pid %d\n", 456 args->queue_id, 457 p->lead_thread->pid); 458 459 mutex_lock(&p->mutex); 460 461 retval = pqm_destroy_queue(&p->pqm, args->queue_id); 462 463 mutex_unlock(&p->mutex); 464 return retval; 465 } 466 467 static int kfd_ioctl_update_queue(struct file *filp, struct kfd_process *p, 468 void *data) 469 { 470 int retval; 471 struct kfd_ioctl_update_queue_args *args = data; 472 struct queue_properties properties; 473 474 /* 475 * Repurpose queue percentage to accommodate new features: 476 * bit 0-7: queue percentage 477 * bit 8-15: pm4_target_xcc 478 */ 479 if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) { 480 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 481 return -EINVAL; 482 } 483 484 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 485 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 486 return -EINVAL; 487 } 488 489 if ((args->ring_base_address) && 490 (!access_ok((const void __user *) args->ring_base_address, 491 sizeof(uint64_t)))) { 492 pr_err("Can't access ring base address\n"); 493 return -EFAULT; 494 } 495 496 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 497 pr_err("Ring size must be a power of 2 or 0\n"); 498 return -EINVAL; 499 } 500 501 if (args->ring_size < KFD_MIN_QUEUE_RING_SIZE) { 502 args->ring_size = KFD_MIN_QUEUE_RING_SIZE; 503 pr_debug("Size lower. clamped to KFD_MIN_QUEUE_RING_SIZE"); 504 } 505 506 properties.queue_address = args->ring_base_address; 507 properties.queue_size = args->ring_size; 508 properties.queue_percent = args->queue_percentage & 0xFF; 509 /* bit 8-15 are repurposed to be PM4 target XCC */ 510 properties.pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF; 511 properties.priority = args->queue_priority; 512 513 pr_debug("Updating queue id %d for process pid %d\n", 514 args->queue_id, p->lead_thread->pid); 515 516 mutex_lock(&p->mutex); 517 518 retval = pqm_update_queue_properties(&p->pqm, args->queue_id, &properties); 519 520 mutex_unlock(&p->mutex); 521 522 return retval; 523 } 524 525 static int kfd_ioctl_set_cu_mask(struct file *filp, struct kfd_process *p, 526 void *data) 527 { 528 int retval; 529 const int max_num_cus = 1024; 530 struct kfd_ioctl_set_cu_mask_args *args = data; 531 struct mqd_update_info minfo = {0}; 532 uint32_t __user *cu_mask_ptr = (uint32_t __user *)args->cu_mask_ptr; 533 size_t cu_mask_size = sizeof(uint32_t) * (args->num_cu_mask / 32); 534 535 if ((args->num_cu_mask % 32) != 0) { 536 pr_debug("num_cu_mask 0x%x must be a multiple of 32", 537 args->num_cu_mask); 538 return -EINVAL; 539 } 540 541 minfo.cu_mask.count = args->num_cu_mask; 542 if (minfo.cu_mask.count == 0) { 543 pr_debug("CU mask cannot be 0"); 544 return -EINVAL; 545 } 546 547 /* To prevent an unreasonably large CU mask size, set an arbitrary 548 * limit of max_num_cus bits. We can then just drop any CU mask bits 549 * past max_num_cus bits and just use the first max_num_cus bits. 550 */ 551 if (minfo.cu_mask.count > max_num_cus) { 552 pr_debug("CU mask cannot be greater than 1024 bits"); 553 minfo.cu_mask.count = max_num_cus; 554 cu_mask_size = sizeof(uint32_t) * (max_num_cus/32); 555 } 556 557 minfo.cu_mask.ptr = memdup_user(cu_mask_ptr, cu_mask_size); 558 if (IS_ERR(minfo.cu_mask.ptr)) { 559 pr_debug("Could not copy CU mask from userspace"); 560 return PTR_ERR(minfo.cu_mask.ptr); 561 } 562 563 mutex_lock(&p->mutex); 564 565 retval = pqm_update_mqd(&p->pqm, args->queue_id, &minfo); 566 567 mutex_unlock(&p->mutex); 568 569 kfree(minfo.cu_mask.ptr); 570 return retval; 571 } 572 573 static int kfd_ioctl_get_queue_wave_state(struct file *filep, 574 struct kfd_process *p, void *data) 575 { 576 struct kfd_ioctl_get_queue_wave_state_args *args = data; 577 int r; 578 579 mutex_lock(&p->mutex); 580 581 r = pqm_get_wave_state(&p->pqm, args->queue_id, 582 (void __user *)args->ctl_stack_address, 583 &args->ctl_stack_used_size, 584 &args->save_area_used_size); 585 586 mutex_unlock(&p->mutex); 587 588 return r; 589 } 590 591 static int kfd_ioctl_set_memory_policy(struct file *filep, 592 struct kfd_process *p, void *data) 593 { 594 struct kfd_ioctl_set_memory_policy_args *args = data; 595 int err = 0; 596 struct kfd_process_device *pdd; 597 enum cache_policy default_policy, alternate_policy; 598 599 if (args->default_policy != KFD_IOC_CACHE_POLICY_COHERENT 600 && args->default_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 601 return -EINVAL; 602 } 603 604 if (args->alternate_policy != KFD_IOC_CACHE_POLICY_COHERENT 605 && args->alternate_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 606 return -EINVAL; 607 } 608 609 mutex_lock(&p->mutex); 610 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 611 if (!pdd) { 612 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 613 err = -EINVAL; 614 goto err_pdd; 615 } 616 617 pdd = kfd_bind_process_to_device(pdd->dev, p); 618 if (IS_ERR(pdd)) { 619 err = -ESRCH; 620 goto out; 621 } 622 623 default_policy = (args->default_policy == KFD_IOC_CACHE_POLICY_COHERENT) 624 ? cache_policy_coherent : cache_policy_noncoherent; 625 626 alternate_policy = 627 (args->alternate_policy == KFD_IOC_CACHE_POLICY_COHERENT) 628 ? cache_policy_coherent : cache_policy_noncoherent; 629 630 if (!pdd->dev->dqm->ops.set_cache_memory_policy(pdd->dev->dqm, 631 &pdd->qpd, 632 default_policy, 633 alternate_policy, 634 (void __user *)args->alternate_aperture_base, 635 args->alternate_aperture_size, 636 args->misc_process_flag)) 637 err = -EINVAL; 638 639 out: 640 err_pdd: 641 mutex_unlock(&p->mutex); 642 643 return err; 644 } 645 646 static int kfd_ioctl_set_trap_handler(struct file *filep, 647 struct kfd_process *p, void *data) 648 { 649 struct kfd_ioctl_set_trap_handler_args *args = data; 650 int err = 0; 651 struct kfd_process_device *pdd; 652 653 mutex_lock(&p->mutex); 654 655 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 656 if (!pdd) { 657 err = -EINVAL; 658 goto err_pdd; 659 } 660 661 pdd = kfd_bind_process_to_device(pdd->dev, p); 662 if (IS_ERR(pdd)) { 663 err = -ESRCH; 664 goto out; 665 } 666 667 kfd_process_set_trap_handler(&pdd->qpd, args->tba_addr, args->tma_addr); 668 669 out: 670 err_pdd: 671 mutex_unlock(&p->mutex); 672 673 return err; 674 } 675 676 static int kfd_ioctl_dbg_register(struct file *filep, 677 struct kfd_process *p, void *data) 678 { 679 return -EPERM; 680 } 681 682 static int kfd_ioctl_dbg_unregister(struct file *filep, 683 struct kfd_process *p, void *data) 684 { 685 return -EPERM; 686 } 687 688 static int kfd_ioctl_dbg_address_watch(struct file *filep, 689 struct kfd_process *p, void *data) 690 { 691 return -EPERM; 692 } 693 694 /* Parse and generate fixed size data structure for wave control */ 695 static int kfd_ioctl_dbg_wave_control(struct file *filep, 696 struct kfd_process *p, void *data) 697 { 698 return -EPERM; 699 } 700 701 static int kfd_ioctl_get_clock_counters(struct file *filep, 702 struct kfd_process *p, void *data) 703 { 704 struct kfd_ioctl_get_clock_counters_args *args = data; 705 struct kfd_process_device *pdd; 706 707 mutex_lock(&p->mutex); 708 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 709 mutex_unlock(&p->mutex); 710 if (pdd) 711 /* Reading GPU clock counter from KGD */ 712 args->gpu_clock_counter = amdgpu_amdkfd_get_gpu_clock_counter(pdd->dev->adev); 713 else 714 /* Node without GPU resource */ 715 args->gpu_clock_counter = 0; 716 717 /* No access to rdtsc. Using raw monotonic time */ 718 args->cpu_clock_counter = ktime_get_raw_ns(); 719 args->system_clock_counter = ktime_get_boottime_ns(); 720 721 /* Since the counter is in nano-seconds we use 1GHz frequency */ 722 args->system_clock_freq = 1000000000; 723 724 return 0; 725 } 726 727 728 static int kfd_ioctl_get_process_apertures(struct file *filp, 729 struct kfd_process *p, void *data) 730 { 731 struct kfd_ioctl_get_process_apertures_args *args = data; 732 struct kfd_process_device_apertures *pAperture; 733 int i; 734 735 dev_dbg(kfd_device, "get apertures for process pid %d", p->lead_thread->pid); 736 737 args->num_of_nodes = 0; 738 739 mutex_lock(&p->mutex); 740 /* Run over all pdd of the process */ 741 for (i = 0; i < p->n_pdds; i++) { 742 struct kfd_process_device *pdd = p->pdds[i]; 743 744 pAperture = 745 &args->process_apertures[args->num_of_nodes]; 746 pAperture->gpu_id = pdd->dev->id; 747 pAperture->lds_base = pdd->lds_base; 748 pAperture->lds_limit = pdd->lds_limit; 749 pAperture->gpuvm_base = pdd->gpuvm_base; 750 pAperture->gpuvm_limit = pdd->gpuvm_limit; 751 pAperture->scratch_base = pdd->scratch_base; 752 pAperture->scratch_limit = pdd->scratch_limit; 753 754 dev_dbg(kfd_device, 755 "node id %u\n", args->num_of_nodes); 756 dev_dbg(kfd_device, 757 "gpu id %u\n", pdd->dev->id); 758 dev_dbg(kfd_device, 759 "lds_base %llX\n", pdd->lds_base); 760 dev_dbg(kfd_device, 761 "lds_limit %llX\n", pdd->lds_limit); 762 dev_dbg(kfd_device, 763 "gpuvm_base %llX\n", pdd->gpuvm_base); 764 dev_dbg(kfd_device, 765 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 766 dev_dbg(kfd_device, 767 "scratch_base %llX\n", pdd->scratch_base); 768 dev_dbg(kfd_device, 769 "scratch_limit %llX\n", pdd->scratch_limit); 770 771 if (++args->num_of_nodes >= NUM_OF_SUPPORTED_GPUS) 772 break; 773 } 774 mutex_unlock(&p->mutex); 775 776 return 0; 777 } 778 779 static int kfd_ioctl_get_process_apertures_new(struct file *filp, 780 struct kfd_process *p, void *data) 781 { 782 struct kfd_ioctl_get_process_apertures_new_args *args = data; 783 struct kfd_process_device_apertures *pa; 784 int ret; 785 int i; 786 787 dev_dbg(kfd_device, "get apertures for process pid %d", 788 p->lead_thread->pid); 789 790 if (args->num_of_nodes == 0) { 791 /* Return number of nodes, so that user space can alloacate 792 * sufficient memory 793 */ 794 mutex_lock(&p->mutex); 795 args->num_of_nodes = p->n_pdds; 796 goto out_unlock; 797 } 798 799 if (args->num_of_nodes > kfd_topology_get_num_devices()) 800 return -EINVAL; 801 802 /* Fill in process-aperture information for all available 803 * nodes, but not more than args->num_of_nodes as that is 804 * the amount of memory allocated by user 805 */ 806 pa = kzalloc_objs(struct kfd_process_device_apertures, 807 args->num_of_nodes); 808 if (!pa) 809 return -ENOMEM; 810 811 mutex_lock(&p->mutex); 812 813 if (!p->n_pdds) { 814 args->num_of_nodes = 0; 815 kfree(pa); 816 goto out_unlock; 817 } 818 819 /* Run over all pdd of the process */ 820 for (i = 0; i < min(p->n_pdds, args->num_of_nodes); i++) { 821 struct kfd_process_device *pdd = p->pdds[i]; 822 823 pa[i].gpu_id = pdd->dev->id; 824 pa[i].lds_base = pdd->lds_base; 825 pa[i].lds_limit = pdd->lds_limit; 826 pa[i].gpuvm_base = pdd->gpuvm_base; 827 pa[i].gpuvm_limit = pdd->gpuvm_limit; 828 pa[i].scratch_base = pdd->scratch_base; 829 pa[i].scratch_limit = pdd->scratch_limit; 830 831 dev_dbg(kfd_device, 832 "gpu id %u\n", pdd->dev->id); 833 dev_dbg(kfd_device, 834 "lds_base %llX\n", pdd->lds_base); 835 dev_dbg(kfd_device, 836 "lds_limit %llX\n", pdd->lds_limit); 837 dev_dbg(kfd_device, 838 "gpuvm_base %llX\n", pdd->gpuvm_base); 839 dev_dbg(kfd_device, 840 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 841 dev_dbg(kfd_device, 842 "scratch_base %llX\n", pdd->scratch_base); 843 dev_dbg(kfd_device, 844 "scratch_limit %llX\n", pdd->scratch_limit); 845 } 846 mutex_unlock(&p->mutex); 847 848 args->num_of_nodes = i; 849 ret = copy_to_user( 850 (void __user *)args->kfd_process_device_apertures_ptr, 851 pa, 852 (i * sizeof(struct kfd_process_device_apertures))); 853 kfree(pa); 854 return ret ? -EFAULT : 0; 855 856 out_unlock: 857 mutex_unlock(&p->mutex); 858 return 0; 859 } 860 861 static int kfd_ioctl_create_event(struct file *filp, struct kfd_process *p, 862 void *data) 863 { 864 struct kfd_ioctl_create_event_args *args = data; 865 int err; 866 867 /* For dGPUs the event page is allocated in user mode. The 868 * handle is passed to KFD with the first call to this IOCTL 869 * through the event_page_offset field. 870 */ 871 if (args->event_page_offset) { 872 mutex_lock(&p->mutex); 873 err = kfd_kmap_event_page(p, args->event_page_offset); 874 mutex_unlock(&p->mutex); 875 if (err) 876 return err; 877 } 878 879 err = kfd_event_create(filp, p, args->event_type, 880 args->auto_reset != 0, args->node_id, 881 &args->event_id, &args->event_trigger_data, 882 &args->event_page_offset, 883 &args->event_slot_index); 884 885 pr_debug("Created event (id:0x%08x) (%s)\n", args->event_id, __func__); 886 return err; 887 } 888 889 static int kfd_ioctl_destroy_event(struct file *filp, struct kfd_process *p, 890 void *data) 891 { 892 struct kfd_ioctl_destroy_event_args *args = data; 893 894 return kfd_event_destroy(p, args->event_id); 895 } 896 897 static int kfd_ioctl_set_event(struct file *filp, struct kfd_process *p, 898 void *data) 899 { 900 struct kfd_ioctl_set_event_args *args = data; 901 902 return kfd_set_event(p, args->event_id); 903 } 904 905 static int kfd_ioctl_reset_event(struct file *filp, struct kfd_process *p, 906 void *data) 907 { 908 struct kfd_ioctl_reset_event_args *args = data; 909 910 return kfd_reset_event(p, args->event_id); 911 } 912 913 static int kfd_ioctl_wait_events(struct file *filp, struct kfd_process *p, 914 void *data) 915 { 916 struct kfd_ioctl_wait_events_args *args = data; 917 918 return kfd_wait_on_events(p, args->num_events, 919 (void __user *)args->events_ptr, 920 (args->wait_for_all != 0), 921 &args->timeout, &args->wait_result); 922 } 923 static int kfd_ioctl_set_scratch_backing_va(struct file *filep, 924 struct kfd_process *p, void *data) 925 { 926 struct kfd_ioctl_set_scratch_backing_va_args *args = data; 927 struct kfd_process_device *pdd; 928 struct kfd_node *dev; 929 long err; 930 931 mutex_lock(&p->mutex); 932 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 933 if (!pdd) { 934 err = -EINVAL; 935 goto err_pdd; 936 } 937 dev = pdd->dev; 938 939 pdd = kfd_bind_process_to_device(dev, p); 940 if (IS_ERR(pdd)) { 941 err = PTR_ERR(pdd); 942 goto bind_process_to_device_fail; 943 } 944 945 pdd->qpd.sh_hidden_private_base = args->va_addr; 946 947 mutex_unlock(&p->mutex); 948 949 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS && 950 pdd->qpd.vmid != 0 && dev->kfd2kgd->set_scratch_backing_va) 951 dev->kfd2kgd->set_scratch_backing_va( 952 dev->adev, args->va_addr, pdd->qpd.vmid); 953 954 return 0; 955 956 bind_process_to_device_fail: 957 err_pdd: 958 mutex_unlock(&p->mutex); 959 return err; 960 } 961 962 static int kfd_ioctl_get_tile_config(struct file *filep, 963 struct kfd_process *p, void *data) 964 { 965 struct kfd_ioctl_get_tile_config_args *args = data; 966 struct kfd_process_device *pdd; 967 struct tile_config config; 968 int err = 0; 969 970 mutex_lock(&p->mutex); 971 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 972 mutex_unlock(&p->mutex); 973 if (!pdd) 974 return -EINVAL; 975 976 amdgpu_amdkfd_get_tile_config(pdd->dev->adev, &config); 977 978 args->gb_addr_config = config.gb_addr_config; 979 args->num_banks = config.num_banks; 980 args->num_ranks = config.num_ranks; 981 982 if (args->num_tile_configs > config.num_tile_configs) 983 args->num_tile_configs = config.num_tile_configs; 984 err = copy_to_user((void __user *)args->tile_config_ptr, 985 config.tile_config_ptr, 986 args->num_tile_configs * sizeof(uint32_t)); 987 if (err) { 988 args->num_tile_configs = 0; 989 return -EFAULT; 990 } 991 992 if (args->num_macro_tile_configs > config.num_macro_tile_configs) 993 args->num_macro_tile_configs = 994 config.num_macro_tile_configs; 995 err = copy_to_user((void __user *)args->macro_tile_config_ptr, 996 config.macro_tile_config_ptr, 997 args->num_macro_tile_configs * sizeof(uint32_t)); 998 if (err) { 999 args->num_macro_tile_configs = 0; 1000 return -EFAULT; 1001 } 1002 1003 return 0; 1004 } 1005 1006 static int kfd_ioctl_acquire_vm(struct file *filep, struct kfd_process *p, 1007 void *data) 1008 { 1009 struct kfd_ioctl_acquire_vm_args *args = data; 1010 struct kfd_process_device *pdd; 1011 struct file *drm_file; 1012 int ret; 1013 1014 drm_file = fget(args->drm_fd); 1015 if (!drm_file) 1016 return -EINVAL; 1017 1018 mutex_lock(&p->mutex); 1019 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1020 if (!pdd) { 1021 ret = -EINVAL; 1022 goto err_pdd; 1023 } 1024 1025 if (pdd->drm_file) { 1026 ret = pdd->drm_file == drm_file ? 0 : -EBUSY; 1027 goto err_drm_file; 1028 } 1029 1030 ret = kfd_process_device_init_vm(pdd, drm_file); 1031 if (ret) 1032 goto err_unlock; 1033 1034 /* On success, the PDD keeps the drm_file reference */ 1035 mutex_unlock(&p->mutex); 1036 1037 return 0; 1038 1039 err_unlock: 1040 err_pdd: 1041 err_drm_file: 1042 mutex_unlock(&p->mutex); 1043 fput(drm_file); 1044 return ret; 1045 } 1046 1047 bool kfd_dev_is_large_bar(struct kfd_node *dev) 1048 { 1049 if (dev->kfd->adev->debug_largebar) { 1050 pr_debug("Simulate large-bar allocation on non large-bar machine\n"); 1051 return true; 1052 } 1053 1054 if (dev->local_mem_info.local_mem_size_private == 0 && 1055 dev->local_mem_info.local_mem_size_public > 0) 1056 return true; 1057 1058 if (dev->local_mem_info.local_mem_size_public == 0 && 1059 dev->kfd->adev->gmc.is_app_apu) { 1060 pr_debug("APP APU, Consider like a large bar system\n"); 1061 return true; 1062 } 1063 1064 return false; 1065 } 1066 1067 static int kfd_ioctl_get_available_memory(struct file *filep, 1068 struct kfd_process *p, void *data) 1069 { 1070 struct kfd_ioctl_get_available_memory_args *args = data; 1071 struct kfd_process_device *pdd = kfd_lock_pdd_by_id(p, args->gpu_id); 1072 1073 if (!pdd) 1074 return -EINVAL; 1075 args->available = amdgpu_amdkfd_get_available_memory(pdd->dev->adev, 1076 pdd->dev->node_id); 1077 kfd_unlock_pdd(pdd); 1078 return 0; 1079 } 1080 1081 static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep, 1082 struct kfd_process *p, void *data) 1083 { 1084 struct kfd_ioctl_alloc_memory_of_gpu_args *args = data; 1085 struct kfd_process_device *pdd; 1086 void *mem; 1087 struct kfd_node *dev; 1088 int idr_handle; 1089 long err; 1090 uint64_t offset = args->mmap_offset; 1091 uint32_t flags = args->flags; 1092 1093 if (args->size == 0) 1094 return -EINVAL; 1095 1096 if (p->context_id != KFD_CONTEXT_ID_PRIMARY && (flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR)) { 1097 pr_debug("USERPTR is not supported on non-primary kfd_process\n"); 1098 1099 return -EOPNOTSUPP; 1100 } 1101 1102 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 1103 /* Flush pending deferred work to avoid racing with deferred actions 1104 * from previous memory map changes (e.g. munmap). 1105 */ 1106 svm_range_list_lock_and_flush_work(&p->svms, current->mm); 1107 mutex_lock(&p->svms.lock); 1108 mmap_write_unlock(current->mm); 1109 1110 /* Skip a special case that allocates VRAM without VA, 1111 * VA will be invalid of 0. 1112 */ 1113 if (!(!args->va_addr && (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM)) && 1114 interval_tree_iter_first(&p->svms.objects, 1115 args->va_addr >> PAGE_SHIFT, 1116 (args->va_addr + args->size - 1) >> PAGE_SHIFT)) { 1117 pr_err("Address: 0x%llx already allocated by SVM\n", 1118 args->va_addr); 1119 mutex_unlock(&p->svms.lock); 1120 return -EADDRINUSE; 1121 } 1122 1123 /* When register user buffer check if it has been registered by svm by 1124 * buffer cpu virtual address. 1125 */ 1126 if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) && 1127 interval_tree_iter_first(&p->svms.objects, 1128 args->mmap_offset >> PAGE_SHIFT, 1129 (args->mmap_offset + args->size - 1) >> PAGE_SHIFT)) { 1130 pr_err("User Buffer Address: 0x%llx already allocated by SVM\n", 1131 args->mmap_offset); 1132 mutex_unlock(&p->svms.lock); 1133 return -EADDRINUSE; 1134 } 1135 1136 mutex_unlock(&p->svms.lock); 1137 #endif 1138 mutex_lock(&p->mutex); 1139 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1140 if (!pdd) { 1141 err = -EINVAL; 1142 goto err_pdd; 1143 } 1144 1145 dev = pdd->dev; 1146 1147 if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC) && 1148 (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) && 1149 !kfd_dev_is_large_bar(dev)) { 1150 pr_err("Alloc host visible vram on small bar is not allowed\n"); 1151 err = -EINVAL; 1152 goto err_large_bar; 1153 } 1154 1155 pdd = kfd_bind_process_to_device(dev, p); 1156 if (IS_ERR(pdd)) { 1157 err = PTR_ERR(pdd); 1158 goto err_unlock; 1159 } 1160 1161 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 1162 if (args->size != kfd_doorbell_process_slice(dev->kfd)) { 1163 err = -EINVAL; 1164 goto err_unlock; 1165 } 1166 offset = kfd_get_process_doorbells(pdd); 1167 if (!offset) { 1168 err = -ENOMEM; 1169 goto err_unlock; 1170 } 1171 } else if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 1172 if (args->size != PAGE_SIZE) { 1173 err = -EINVAL; 1174 goto err_unlock; 1175 } 1176 offset = dev->adev->rmmio_remap.bus_addr; 1177 if (!offset || (PAGE_SIZE > 4096)) { 1178 err = -ENOMEM; 1179 goto err_unlock; 1180 } 1181 } 1182 1183 err = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( 1184 dev->adev, args->va_addr, args->size, 1185 pdd->drm_priv, (struct kgd_mem **) &mem, &offset, 1186 flags, false); 1187 1188 if (err) 1189 goto err_unlock; 1190 1191 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1192 if (idr_handle < 0) { 1193 err = -EFAULT; 1194 goto err_free; 1195 } 1196 1197 /* Update the VRAM usage count */ 1198 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { 1199 uint64_t size = args->size; 1200 1201 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM) 1202 size >>= 1; 1203 size = PAGE_ALIGN(size); 1204 atomic64_add(size, &pdd->vram_usage); 1205 } 1206 1207 mutex_unlock(&p->mutex); 1208 1209 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1210 args->mmap_offset = offset; 1211 1212 /* MMIO is mapped through kfd device 1213 * Generate a kfd mmap offset 1214 */ 1215 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 1216 args->mmap_offset = KFD_MMAP_TYPE_MMIO 1217 | KFD_MMAP_GPU_ID(args->gpu_id); 1218 1219 return 0; 1220 1221 err_free: 1222 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(dev->adev, (struct kgd_mem *)mem, 1223 pdd->drm_priv, NULL); 1224 err_unlock: 1225 err_pdd: 1226 err_large_bar: 1227 mutex_unlock(&p->mutex); 1228 return err; 1229 } 1230 1231 static int kfd_ioctl_free_memory_of_gpu(struct file *filep, 1232 struct kfd_process *p, void *data) 1233 { 1234 struct kfd_ioctl_free_memory_of_gpu_args *args = data; 1235 struct kfd_process_device *pdd; 1236 void *mem; 1237 int ret; 1238 uint64_t size = 0; 1239 1240 mutex_lock(&p->mutex); 1241 /* 1242 * Safeguard to prevent user space from freeing signal BO. 1243 * It will be freed at process termination. 1244 */ 1245 if (p->signal_handle && (p->signal_handle == args->handle)) { 1246 pr_err("Free signal BO is not allowed\n"); 1247 ret = -EPERM; 1248 goto err_unlock; 1249 } 1250 1251 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1252 if (!pdd) { 1253 pr_err("Process device data doesn't exist\n"); 1254 ret = -EINVAL; 1255 goto err_pdd; 1256 } 1257 1258 mem = kfd_process_device_translate_handle( 1259 pdd, GET_IDR_HANDLE(args->handle)); 1260 if (!mem) { 1261 ret = -EINVAL; 1262 goto err_unlock; 1263 } 1264 1265 ret = amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, 1266 (struct kgd_mem *)mem, pdd->drm_priv, &size); 1267 1268 /* If freeing the buffer failed, leave the handle in place for 1269 * clean-up during process tear-down. 1270 */ 1271 if (!ret) 1272 kfd_process_device_remove_obj_handle( 1273 pdd, GET_IDR_HANDLE(args->handle)); 1274 1275 atomic64_sub(size, &pdd->vram_usage); 1276 1277 err_unlock: 1278 err_pdd: 1279 mutex_unlock(&p->mutex); 1280 return ret; 1281 } 1282 1283 static int kfd_ioctl_map_memory_to_gpu(struct file *filep, 1284 struct kfd_process *p, void *data) 1285 { 1286 struct kfd_ioctl_map_memory_to_gpu_args *args = data; 1287 struct kfd_process_device *pdd, *peer_pdd; 1288 void *mem; 1289 struct kfd_node *dev; 1290 long err = 0; 1291 int i; 1292 uint32_t *devices_arr = NULL; 1293 1294 if (!args->n_devices) { 1295 pr_debug("Device IDs array empty\n"); 1296 return -EINVAL; 1297 } 1298 if (args->n_success > args->n_devices) { 1299 pr_debug("n_success exceeds n_devices\n"); 1300 return -EINVAL; 1301 } 1302 1303 devices_arr = memdup_array_user((void *)args->device_ids_array_ptr, 1304 args->n_devices, sizeof(*devices_arr)); 1305 1306 if (IS_ERR(devices_arr)) 1307 return PTR_ERR(devices_arr); 1308 1309 mutex_lock(&p->mutex); 1310 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1311 if (!pdd) { 1312 err = -EINVAL; 1313 goto get_process_device_data_failed; 1314 } 1315 dev = pdd->dev; 1316 1317 pdd = kfd_bind_process_to_device(dev, p); 1318 if (IS_ERR(pdd)) { 1319 err = PTR_ERR(pdd); 1320 goto bind_process_to_device_failed; 1321 } 1322 1323 mem = kfd_process_device_translate_handle(pdd, 1324 GET_IDR_HANDLE(args->handle)); 1325 if (!mem) { 1326 err = -ENOMEM; 1327 goto get_mem_obj_from_handle_failed; 1328 } 1329 1330 for (i = args->n_success; i < args->n_devices; i++) { 1331 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1332 if (!peer_pdd) { 1333 pr_debug("Getting device by id failed for 0x%x\n", 1334 devices_arr[i]); 1335 err = -EINVAL; 1336 goto get_mem_obj_from_handle_failed; 1337 } 1338 1339 peer_pdd = kfd_bind_process_to_device(peer_pdd->dev, p); 1340 if (IS_ERR(peer_pdd)) { 1341 err = PTR_ERR(peer_pdd); 1342 goto get_mem_obj_from_handle_failed; 1343 } 1344 1345 err = amdgpu_amdkfd_gpuvm_map_memory_to_gpu( 1346 peer_pdd->dev->adev, (struct kgd_mem *)mem, 1347 peer_pdd->drm_priv); 1348 if (err) { 1349 struct pci_dev *pdev = peer_pdd->dev->adev->pdev; 1350 1351 dev_err(dev->adev->dev, 1352 "Failed to map peer:%04x:%02x:%02x.%d mem_domain:%d\n", 1353 pci_domain_nr(pdev->bus), 1354 pdev->bus->number, 1355 PCI_SLOT(pdev->devfn), 1356 PCI_FUNC(pdev->devfn), 1357 ((struct kgd_mem *)mem)->domain); 1358 goto map_memory_to_gpu_failed; 1359 } 1360 args->n_success = i+1; 1361 } 1362 1363 err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev, (struct kgd_mem *) mem, true); 1364 if (err) { 1365 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1366 goto sync_memory_failed; 1367 } 1368 1369 mutex_unlock(&p->mutex); 1370 1371 /* Flush TLBs after waiting for the page table updates to complete */ 1372 for (i = 0; i < args->n_devices; i++) { 1373 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1374 if (WARN_ON_ONCE(!peer_pdd)) 1375 continue; 1376 kfd_flush_tlb(peer_pdd); 1377 } 1378 kfree(devices_arr); 1379 1380 return err; 1381 1382 get_process_device_data_failed: 1383 bind_process_to_device_failed: 1384 get_mem_obj_from_handle_failed: 1385 map_memory_to_gpu_failed: 1386 sync_memory_failed: 1387 mutex_unlock(&p->mutex); 1388 kfree(devices_arr); 1389 1390 return err; 1391 } 1392 1393 static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep, 1394 struct kfd_process *p, void *data) 1395 { 1396 struct kfd_ioctl_unmap_memory_from_gpu_args *args = data; 1397 struct kfd_process_device *pdd, *peer_pdd; 1398 void *mem; 1399 long err = 0; 1400 uint32_t *devices_arr = NULL, i; 1401 bool flush_tlb; 1402 1403 if (!args->n_devices) { 1404 pr_debug("Device IDs array empty\n"); 1405 return -EINVAL; 1406 } 1407 if (args->n_success > args->n_devices) { 1408 pr_debug("n_success exceeds n_devices\n"); 1409 return -EINVAL; 1410 } 1411 1412 devices_arr = memdup_array_user((void *)args->device_ids_array_ptr, 1413 args->n_devices, sizeof(*devices_arr)); 1414 1415 if (IS_ERR(devices_arr)) 1416 return PTR_ERR(devices_arr); 1417 1418 mutex_lock(&p->mutex); 1419 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1420 if (!pdd) { 1421 err = -EINVAL; 1422 goto bind_process_to_device_failed; 1423 } 1424 1425 mem = kfd_process_device_translate_handle(pdd, 1426 GET_IDR_HANDLE(args->handle)); 1427 if (!mem) { 1428 err = -ENOMEM; 1429 goto get_mem_obj_from_handle_failed; 1430 } 1431 1432 for (i = args->n_success; i < args->n_devices; i++) { 1433 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1434 if (!peer_pdd) { 1435 err = -EINVAL; 1436 goto get_mem_obj_from_handle_failed; 1437 } 1438 err = amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu( 1439 peer_pdd->dev->adev, (struct kgd_mem *)mem, peer_pdd->drm_priv); 1440 if (err) { 1441 pr_debug("Failed to unmap from gpu %d/%d\n", i, args->n_devices); 1442 goto unmap_memory_from_gpu_failed; 1443 } 1444 args->n_success = i+1; 1445 } 1446 1447 flush_tlb = kfd_flush_tlb_after_unmap(pdd->dev->kfd); 1448 if (flush_tlb) { 1449 err = amdgpu_amdkfd_gpuvm_sync_memory(pdd->dev->adev, 1450 (struct kgd_mem *) mem, true); 1451 if (err) { 1452 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1453 goto sync_memory_failed; 1454 } 1455 } 1456 1457 /* Flush TLBs after waiting for the page table updates to complete */ 1458 for (i = 0; i < args->n_devices; i++) { 1459 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1460 if (WARN_ON_ONCE(!peer_pdd)) 1461 continue; 1462 if (flush_tlb) 1463 kfd_flush_tlb(peer_pdd); 1464 1465 /* Remove dma mapping after tlb flush to avoid IO_PAGE_FAULT */ 1466 err = amdgpu_amdkfd_gpuvm_dmaunmap_mem(mem, peer_pdd->drm_priv); 1467 if (err) 1468 goto sync_memory_failed; 1469 } 1470 1471 mutex_unlock(&p->mutex); 1472 1473 kfree(devices_arr); 1474 1475 return 0; 1476 1477 bind_process_to_device_failed: 1478 get_mem_obj_from_handle_failed: 1479 unmap_memory_from_gpu_failed: 1480 sync_memory_failed: 1481 mutex_unlock(&p->mutex); 1482 kfree(devices_arr); 1483 return err; 1484 } 1485 1486 static int kfd_ioctl_alloc_queue_gws(struct file *filep, 1487 struct kfd_process *p, void *data) 1488 { 1489 int retval; 1490 struct kfd_ioctl_alloc_queue_gws_args *args = data; 1491 struct queue *q; 1492 struct kfd_node *dev; 1493 1494 mutex_lock(&p->mutex); 1495 q = pqm_get_user_queue(&p->pqm, args->queue_id); 1496 1497 if (q) { 1498 dev = q->device; 1499 } else { 1500 retval = -EINVAL; 1501 goto out_unlock; 1502 } 1503 1504 if (!dev->gws) { 1505 retval = -ENODEV; 1506 goto out_unlock; 1507 } 1508 1509 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) { 1510 retval = -ENODEV; 1511 goto out_unlock; 1512 } 1513 1514 if (p->debug_trap_enabled && (!kfd_dbg_has_gws_support(dev) || 1515 kfd_dbg_has_cwsr_workaround(dev))) { 1516 retval = -EBUSY; 1517 goto out_unlock; 1518 } 1519 1520 retval = pqm_set_gws(&p->pqm, args->queue_id, args->num_gws ? dev->gws : NULL); 1521 mutex_unlock(&p->mutex); 1522 1523 args->first_gws = 0; 1524 return retval; 1525 1526 out_unlock: 1527 mutex_unlock(&p->mutex); 1528 return retval; 1529 } 1530 1531 static int kfd_ioctl_get_dmabuf_info(struct file *filep, 1532 struct kfd_process *p, void *data) 1533 { 1534 struct kfd_ioctl_get_dmabuf_info_args *args = data; 1535 struct kfd_node *dev = NULL; 1536 struct amdgpu_device *dmabuf_adev; 1537 void *metadata_buffer = NULL; 1538 uint32_t flags; 1539 int8_t xcp_id; 1540 unsigned int i; 1541 int r; 1542 1543 /* Find a KFD GPU device that supports the get_dmabuf_info query */ 1544 for (i = 0; kfd_topology_enum_kfd_devices(i, &dev) == 0; i++) 1545 if (dev && !kfd_devcgroup_check_permission(dev)) 1546 break; 1547 if (!dev) 1548 return -EINVAL; 1549 1550 /* Get dmabuf info from KGD */ 1551 r = amdgpu_amdkfd_get_dmabuf_info(dev->adev, args->dmabuf_fd, 1552 &dmabuf_adev, &args->size, 1553 &metadata_buffer, args->metadata_size, 1554 &args->metadata_size, &flags, &xcp_id); 1555 if (r) 1556 goto exit; 1557 1558 if (xcp_id >= 0) 1559 args->gpu_id = dmabuf_adev->kfd.dev->nodes[xcp_id]->id; 1560 else 1561 args->gpu_id = dev->id; 1562 args->flags = flags; 1563 1564 /* Copy metadata buffer to user mode */ 1565 if (metadata_buffer && args->metadata_ptr) { 1566 r = copy_to_user((void __user *)args->metadata_ptr, 1567 metadata_buffer, args->metadata_size); 1568 if (r != 0) 1569 r = -EFAULT; 1570 } 1571 1572 exit: 1573 kfree(metadata_buffer); 1574 1575 return r; 1576 } 1577 1578 static int kfd_ioctl_import_dmabuf(struct file *filep, 1579 struct kfd_process *p, void *data) 1580 { 1581 struct kfd_ioctl_import_dmabuf_args *args = data; 1582 struct kfd_process_device *pdd; 1583 int idr_handle; 1584 uint64_t size; 1585 void *mem; 1586 int r; 1587 1588 mutex_lock(&p->mutex); 1589 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1590 if (!pdd) { 1591 r = -EINVAL; 1592 goto err_unlock; 1593 } 1594 1595 pdd = kfd_bind_process_to_device(pdd->dev, p); 1596 if (IS_ERR(pdd)) { 1597 r = PTR_ERR(pdd); 1598 goto err_unlock; 1599 } 1600 1601 r = amdgpu_amdkfd_gpuvm_import_dmabuf_fd(pdd->dev->adev, args->dmabuf_fd, 1602 args->va_addr, pdd->drm_priv, 1603 (struct kgd_mem **)&mem, &size, 1604 NULL); 1605 if (r) 1606 goto err_unlock; 1607 1608 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1609 if (idr_handle < 0) { 1610 r = -EFAULT; 1611 goto err_free; 1612 } 1613 1614 mutex_unlock(&p->mutex); 1615 1616 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1617 1618 return 0; 1619 1620 err_free: 1621 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, (struct kgd_mem *)mem, 1622 pdd->drm_priv, NULL); 1623 err_unlock: 1624 mutex_unlock(&p->mutex); 1625 return r; 1626 } 1627 1628 static int kfd_ioctl_export_dmabuf(struct file *filep, 1629 struct kfd_process *p, void *data) 1630 { 1631 struct kfd_ioctl_export_dmabuf_args *args = data; 1632 struct kfd_process_device *pdd; 1633 struct dma_buf *dmabuf; 1634 struct kfd_node *dev; 1635 void *mem; 1636 int ret = 0; 1637 1638 dev = kfd_device_by_id(GET_GPU_ID(args->handle)); 1639 if (!dev) 1640 return -EINVAL; 1641 1642 mutex_lock(&p->mutex); 1643 1644 pdd = kfd_get_process_device_data(dev, p); 1645 if (!pdd) { 1646 ret = -EINVAL; 1647 goto err_unlock; 1648 } 1649 1650 mem = kfd_process_device_translate_handle(pdd, 1651 GET_IDR_HANDLE(args->handle)); 1652 if (!mem) { 1653 ret = -EINVAL; 1654 goto err_unlock; 1655 } 1656 1657 ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf); 1658 mutex_unlock(&p->mutex); 1659 if (ret) 1660 goto err_out; 1661 1662 ret = dma_buf_fd(dmabuf, args->flags); 1663 if (ret < 0) { 1664 dma_buf_put(dmabuf); 1665 goto err_out; 1666 } 1667 /* dma_buf_fd assigns the reference count to the fd, no need to 1668 * put the reference here. 1669 */ 1670 args->dmabuf_fd = ret; 1671 1672 return 0; 1673 1674 err_unlock: 1675 mutex_unlock(&p->mutex); 1676 err_out: 1677 return ret; 1678 } 1679 1680 /* Handle requests for watching SMI events */ 1681 static int kfd_ioctl_smi_events(struct file *filep, 1682 struct kfd_process *p, void *data) 1683 { 1684 struct kfd_ioctl_smi_events_args *args = data; 1685 struct kfd_process_device *pdd; 1686 1687 mutex_lock(&p->mutex); 1688 1689 pdd = kfd_process_device_data_by_id(p, args->gpuid); 1690 mutex_unlock(&p->mutex); 1691 if (!pdd) 1692 return -EINVAL; 1693 1694 return kfd_smi_event_open(pdd->dev, &args->anon_fd); 1695 } 1696 1697 static int kfd_ioctl_svm_validate(void *kdata, unsigned int usize) 1698 { 1699 struct kfd_ioctl_svm_args *args = kdata; 1700 size_t expected = struct_size(args, attrs, args->nattr); 1701 1702 if (expected == SIZE_MAX || usize < expected) 1703 return -EINVAL; 1704 return 0; 1705 } 1706 1707 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 1708 1709 static int kfd_ioctl_set_xnack_mode(struct file *filep, 1710 struct kfd_process *p, void *data) 1711 { 1712 struct kfd_ioctl_set_xnack_mode_args *args = data; 1713 int r = 0; 1714 1715 mutex_lock(&p->mutex); 1716 if (args->xnack_enabled >= 0) { 1717 if (!list_empty(&p->pqm.queues)) { 1718 pr_debug("Process has user queues running\n"); 1719 r = -EBUSY; 1720 goto out_unlock; 1721 } 1722 1723 if (p->xnack_enabled == args->xnack_enabled) 1724 goto out_unlock; 1725 1726 if (args->xnack_enabled && !kfd_process_xnack_mode(p, true)) { 1727 r = -EPERM; 1728 goto out_unlock; 1729 } 1730 1731 r = svm_range_switch_xnack_reserve_mem(p, args->xnack_enabled); 1732 } else { 1733 args->xnack_enabled = p->xnack_enabled; 1734 } 1735 1736 out_unlock: 1737 mutex_unlock(&p->mutex); 1738 1739 return r; 1740 } 1741 1742 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1743 { 1744 struct kfd_ioctl_svm_args *args = data; 1745 int r = 0; 1746 1747 if (p->context_id != KFD_CONTEXT_ID_PRIMARY) { 1748 pr_debug("SVM ioctl not supported on non-primary kfd process\n"); 1749 1750 return -EOPNOTSUPP; 1751 } 1752 1753 pr_debug("start 0x%llx size 0x%llx op 0x%x nattr 0x%x\n", 1754 args->start_addr, args->size, args->op, args->nattr); 1755 1756 if ((args->start_addr & ~PAGE_MASK) || (args->size & ~PAGE_MASK)) 1757 return -EINVAL; 1758 if (!args->start_addr || !args->size) 1759 return -EINVAL; 1760 1761 r = svm_ioctl(p, args->op, args->start_addr, args->size, args->nattr, 1762 args->attrs); 1763 1764 return r; 1765 } 1766 #else 1767 static int kfd_ioctl_set_xnack_mode(struct file *filep, 1768 struct kfd_process *p, void *data) 1769 { 1770 return -EPERM; 1771 } 1772 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1773 { 1774 return -EPERM; 1775 } 1776 #endif 1777 1778 static int kfd_ptl_control(struct kfd_process_device *pdd, bool enable) 1779 { 1780 struct amdgpu_device *adev = pdd->dev->adev; 1781 struct amdgpu_ptl *ptl = &adev->psp.ptl; 1782 enum amdgpu_ptl_fmt pref_format1 = ptl->fmt1; 1783 enum amdgpu_ptl_fmt pref_format2 = ptl->fmt2; 1784 uint32_t ptl_state = enable ? 1 : 0; 1785 int ret; 1786 1787 if (ptl->hw_supported_state != AMDGPU_PTL_HW_SUPPORTED) 1788 return -EOPNOTSUPP; 1789 1790 if (!pdd->dev->kfd2kgd || !pdd->dev->kfd2kgd->ptl_ctrl) 1791 return -EOPNOTSUPP; 1792 1793 ret = pdd->dev->kfd2kgd->ptl_ctrl(adev, PSP_PTL_PERF_MON_SET, 1794 &ptl_state, 1795 &pref_format1, 1796 &pref_format2); 1797 1798 return ret; 1799 } 1800 1801 int kfd_ptl_disable_request(struct kfd_process_device *pdd, 1802 struct kfd_process *p) 1803 { 1804 struct amdgpu_device *adev = pdd->dev->adev; 1805 struct amdgpu_ptl *ptl = &adev->psp.ptl; 1806 int ret = 0; 1807 1808 if (ptl->hw_supported_state != AMDGPU_PTL_HW_SUPPORTED) 1809 return -EOPNOTSUPP; 1810 1811 mutex_lock(&ptl->mutex); 1812 1813 if (pdd->ptl_disable_req) 1814 goto out; 1815 1816 if (atomic_inc_return(&ptl->disable_ref) == 1) { 1817 ret = kfd_ptl_control(pdd, false); 1818 if (ret) { 1819 atomic_dec(&ptl->disable_ref); 1820 dev_warn(pdd->dev->adev->dev, 1821 "failed to disable PTL\n"); 1822 goto out; 1823 } 1824 } 1825 set_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap); 1826 pdd->ptl_disable_req = true; 1827 1828 out: 1829 mutex_unlock(&ptl->mutex); 1830 return ret; 1831 } 1832 1833 int kfd_ptl_disable_release(struct kfd_process_device *pdd, 1834 struct kfd_process *p) 1835 { 1836 struct amdgpu_device *adev = pdd->dev->adev; 1837 struct amdgpu_ptl *ptl = &adev->psp.ptl; 1838 int ret = 0; 1839 1840 if (ptl->hw_supported_state != AMDGPU_PTL_HW_SUPPORTED) 1841 return -EOPNOTSUPP; 1842 1843 mutex_lock(&ptl->mutex); 1844 1845 if (!pdd->ptl_disable_req) 1846 goto out; 1847 1848 if (atomic_dec_return(&ptl->disable_ref) == 0) { 1849 clear_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap); 1850 ret = kfd_ptl_control(pdd, true); 1851 if (ret) { 1852 atomic_inc(&ptl->disable_ref); 1853 set_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap); 1854 dev_warn(adev->dev, "Failed to enable PTL on release: %d\n", ret); 1855 goto out; 1856 } 1857 } 1858 pdd->ptl_disable_req = false; 1859 1860 out: 1861 mutex_unlock(&ptl->mutex); 1862 return ret; 1863 } 1864 1865 static int kfd_profiler_ptl_control(struct kfd_process *p, 1866 struct kfd_ioctl_ptl_control *args) 1867 { 1868 struct kfd_process_device *pdd; 1869 int ret; 1870 1871 mutex_lock(&p->mutex); 1872 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1873 mutex_unlock(&p->mutex); 1874 1875 if (!pdd || !pdd->dev || !pdd->dev->kfd) 1876 return -EINVAL; 1877 1878 if (args->enable == 0) 1879 ret = kfd_ptl_disable_request(pdd, p); 1880 else 1881 ret = kfd_ptl_disable_release(pdd, p); 1882 1883 return ret; 1884 } 1885 1886 static int criu_checkpoint_process(struct kfd_process *p, 1887 uint8_t __user *user_priv_data, 1888 uint64_t *priv_offset) 1889 { 1890 struct kfd_criu_process_priv_data process_priv; 1891 int ret; 1892 1893 memset(&process_priv, 0, sizeof(process_priv)); 1894 1895 process_priv.version = KFD_CRIU_PRIV_VERSION; 1896 /* For CR, we don't consider negative xnack mode which is used for 1897 * querying without changing it, here 0 simply means disabled and 1 1898 * means enabled so retry for finding a valid PTE. 1899 */ 1900 process_priv.xnack_mode = p->xnack_enabled ? 1 : 0; 1901 1902 ret = copy_to_user(user_priv_data + *priv_offset, 1903 &process_priv, sizeof(process_priv)); 1904 1905 if (ret) { 1906 pr_err("Failed to copy process information to user\n"); 1907 ret = -EFAULT; 1908 } 1909 1910 *priv_offset += sizeof(process_priv); 1911 return ret; 1912 } 1913 1914 static int criu_checkpoint_devices(struct kfd_process *p, 1915 uint32_t num_devices, 1916 uint8_t __user *user_addr, 1917 uint8_t __user *user_priv_data, 1918 uint64_t *priv_offset) 1919 { 1920 struct kfd_criu_device_priv_data *device_priv = NULL; 1921 struct kfd_criu_device_bucket *device_buckets = NULL; 1922 int ret = 0, i; 1923 1924 device_buckets = kvzalloc_objs(*device_buckets, num_devices); 1925 if (!device_buckets) { 1926 ret = -ENOMEM; 1927 goto exit; 1928 } 1929 1930 device_priv = kvzalloc_objs(*device_priv, num_devices); 1931 if (!device_priv) { 1932 ret = -ENOMEM; 1933 goto exit; 1934 } 1935 1936 for (i = 0; i < num_devices; i++) { 1937 struct kfd_process_device *pdd = p->pdds[i]; 1938 1939 device_buckets[i].user_gpu_id = pdd->user_gpu_id; 1940 device_buckets[i].actual_gpu_id = pdd->dev->id; 1941 1942 /* 1943 * priv_data does not contain useful information for now and is reserved for 1944 * future use, so we do not set its contents. 1945 */ 1946 } 1947 1948 ret = copy_to_user(user_addr, device_buckets, num_devices * sizeof(*device_buckets)); 1949 if (ret) { 1950 pr_err("Failed to copy device information to user\n"); 1951 ret = -EFAULT; 1952 goto exit; 1953 } 1954 1955 ret = copy_to_user(user_priv_data + *priv_offset, 1956 device_priv, 1957 num_devices * sizeof(*device_priv)); 1958 if (ret) { 1959 pr_err("Failed to copy device information to user\n"); 1960 ret = -EFAULT; 1961 } 1962 *priv_offset += num_devices * sizeof(*device_priv); 1963 1964 exit: 1965 kvfree(device_buckets); 1966 kvfree(device_priv); 1967 return ret; 1968 } 1969 1970 static uint32_t get_process_num_bos(struct kfd_process *p) 1971 { 1972 uint32_t num_of_bos = 0; 1973 int i; 1974 1975 /* Run over all PDDs of the process */ 1976 for (i = 0; i < p->n_pdds; i++) { 1977 struct kfd_process_device *pdd = p->pdds[i]; 1978 void *mem; 1979 int id; 1980 1981 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 1982 struct kgd_mem *kgd_mem = (struct kgd_mem *)mem; 1983 1984 if (!kgd_mem->va || kgd_mem->va > pdd->gpuvm_base) 1985 num_of_bos++; 1986 } 1987 } 1988 return num_of_bos; 1989 } 1990 1991 static int criu_get_prime_handle(struct kgd_mem *mem, 1992 int flags, u32 *shared_fd, 1993 struct file **file) 1994 { 1995 struct dma_buf *dmabuf; 1996 int ret; 1997 1998 ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf); 1999 if (ret) { 2000 pr_err("dmabuf export failed for the BO\n"); 2001 return ret; 2002 } 2003 2004 ret = get_unused_fd_flags(flags); 2005 if (ret < 0) { 2006 pr_err("dmabuf create fd failed, ret:%d\n", ret); 2007 goto out_free_dmabuf; 2008 } 2009 2010 *shared_fd = ret; 2011 *file = dmabuf->file; 2012 return 0; 2013 2014 out_free_dmabuf: 2015 dma_buf_put(dmabuf); 2016 return ret; 2017 } 2018 2019 static void commit_files(struct file **files, 2020 struct kfd_criu_bo_bucket *bo_buckets, 2021 unsigned int count, 2022 int err) 2023 { 2024 while (count--) { 2025 struct file *file = files[count]; 2026 2027 if (!file) 2028 continue; 2029 if (err) { 2030 fput(file); 2031 put_unused_fd(bo_buckets[count].dmabuf_fd); 2032 } else { 2033 fd_install(bo_buckets[count].dmabuf_fd, file); 2034 } 2035 } 2036 } 2037 2038 static int criu_checkpoint_bos(struct kfd_process *p, 2039 uint32_t num_bos, 2040 uint8_t __user *user_bos, 2041 uint8_t __user *user_priv_data, 2042 uint64_t *priv_offset) 2043 { 2044 struct kfd_criu_bo_bucket *bo_buckets; 2045 struct kfd_criu_bo_priv_data *bo_privs; 2046 struct file **files = NULL; 2047 int ret = 0, pdd_index, bo_index = 0, id; 2048 void *mem; 2049 2050 bo_buckets = kvzalloc_objs(*bo_buckets, num_bos); 2051 if (!bo_buckets) 2052 return -ENOMEM; 2053 2054 bo_privs = kvzalloc_objs(*bo_privs, num_bos); 2055 if (!bo_privs) { 2056 ret = -ENOMEM; 2057 goto exit; 2058 } 2059 2060 files = kvzalloc_objs(struct file *, num_bos); 2061 if (!files) { 2062 ret = -ENOMEM; 2063 goto exit; 2064 } 2065 2066 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) { 2067 struct kfd_process_device *pdd = p->pdds[pdd_index]; 2068 struct amdgpu_bo *dumper_bo; 2069 struct kgd_mem *kgd_mem; 2070 2071 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 2072 struct kfd_criu_bo_bucket *bo_bucket; 2073 struct kfd_criu_bo_priv_data *bo_priv; 2074 int i, dev_idx = 0; 2075 2076 kgd_mem = (struct kgd_mem *)mem; 2077 dumper_bo = kgd_mem->bo; 2078 2079 /* Skip checkpointing BOs that are used for Trap handler 2080 * code and state. Currently, these BOs have a VA that 2081 * is less GPUVM Base 2082 */ 2083 if (kgd_mem->va && kgd_mem->va <= pdd->gpuvm_base) 2084 continue; 2085 2086 bo_bucket = &bo_buckets[bo_index]; 2087 bo_priv = &bo_privs[bo_index]; 2088 2089 bo_bucket->gpu_id = pdd->user_gpu_id; 2090 bo_bucket->addr = (uint64_t)kgd_mem->va; 2091 bo_bucket->size = amdgpu_bo_size(dumper_bo); 2092 bo_bucket->alloc_flags = (uint32_t)kgd_mem->alloc_flags; 2093 bo_priv->idr_handle = id; 2094 2095 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 2096 ret = amdgpu_ttm_tt_get_userptr(&dumper_bo->tbo, 2097 &bo_priv->user_addr); 2098 if (ret) { 2099 pr_err("Failed to obtain user address for user-pointer bo\n"); 2100 goto exit; 2101 } 2102 } 2103 if (bo_bucket->alloc_flags 2104 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 2105 ret = criu_get_prime_handle(kgd_mem, 2106 bo_bucket->alloc_flags & 2107 KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE ? DRM_RDWR : 0, 2108 &bo_bucket->dmabuf_fd, &files[bo_index]); 2109 if (ret) 2110 goto exit; 2111 } else { 2112 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 2113 } 2114 2115 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 2116 bo_bucket->offset = KFD_MMAP_TYPE_DOORBELL | 2117 KFD_MMAP_GPU_ID(pdd->dev->id); 2118 else if (bo_bucket->alloc_flags & 2119 KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 2120 bo_bucket->offset = KFD_MMAP_TYPE_MMIO | 2121 KFD_MMAP_GPU_ID(pdd->dev->id); 2122 else 2123 bo_bucket->offset = amdgpu_bo_mmap_offset(dumper_bo); 2124 2125 for (i = 0; i < p->n_pdds; i++) { 2126 if (amdgpu_amdkfd_bo_mapped_to_dev(p->pdds[i]->drm_priv, kgd_mem)) 2127 bo_priv->mapped_gpuids[dev_idx++] = p->pdds[i]->user_gpu_id; 2128 } 2129 2130 pr_debug("bo_size = 0x%llx, bo_addr = 0x%llx bo_offset = 0x%llx\n" 2131 "gpu_id = 0x%x alloc_flags = 0x%x idr_handle = 0x%x", 2132 bo_bucket->size, 2133 bo_bucket->addr, 2134 bo_bucket->offset, 2135 bo_bucket->gpu_id, 2136 bo_bucket->alloc_flags, 2137 bo_priv->idr_handle); 2138 bo_index++; 2139 } 2140 } 2141 2142 ret = copy_to_user(user_bos, bo_buckets, num_bos * sizeof(*bo_buckets)); 2143 if (ret) { 2144 pr_err("Failed to copy BO information to user\n"); 2145 ret = -EFAULT; 2146 goto exit; 2147 } 2148 2149 ret = copy_to_user(user_priv_data + *priv_offset, bo_privs, num_bos * sizeof(*bo_privs)); 2150 if (ret) { 2151 pr_err("Failed to copy BO priv information to user\n"); 2152 ret = -EFAULT; 2153 goto exit; 2154 } 2155 2156 *priv_offset += num_bos * sizeof(*bo_privs); 2157 2158 exit: 2159 commit_files(files, bo_buckets, bo_index, ret); 2160 kvfree(files); 2161 kvfree(bo_buckets); 2162 kvfree(bo_privs); 2163 return ret; 2164 } 2165 2166 static int criu_get_process_object_info(struct kfd_process *p, 2167 uint32_t *num_devices, 2168 uint32_t *num_bos, 2169 uint32_t *num_objects, 2170 uint64_t *objs_priv_size) 2171 { 2172 uint64_t queues_priv_data_size, svm_priv_data_size, priv_size; 2173 uint32_t num_queues, num_events, num_svm_ranges; 2174 int ret; 2175 2176 *num_devices = p->n_pdds; 2177 *num_bos = get_process_num_bos(p); 2178 2179 ret = kfd_process_get_queue_info(p, &num_queues, &queues_priv_data_size); 2180 if (ret) 2181 return ret; 2182 2183 num_events = kfd_get_num_events(p); 2184 2185 svm_range_get_info(p, &num_svm_ranges, &svm_priv_data_size); 2186 2187 *num_objects = num_queues + num_events + num_svm_ranges; 2188 2189 if (objs_priv_size) { 2190 priv_size = sizeof(struct kfd_criu_process_priv_data); 2191 priv_size += *num_devices * sizeof(struct kfd_criu_device_priv_data); 2192 priv_size += *num_bos * sizeof(struct kfd_criu_bo_priv_data); 2193 priv_size += queues_priv_data_size; 2194 priv_size += num_events * sizeof(struct kfd_criu_event_priv_data); 2195 priv_size += svm_priv_data_size; 2196 *objs_priv_size = priv_size; 2197 } 2198 return 0; 2199 } 2200 2201 static int criu_checkpoint(struct file *filep, 2202 struct kfd_process *p, 2203 struct kfd_ioctl_criu_args *args) 2204 { 2205 int ret; 2206 uint32_t num_devices, num_bos, num_objects; 2207 uint64_t priv_size, priv_offset = 0, bo_priv_offset; 2208 2209 if (!args->devices || !args->bos || !args->priv_data) 2210 return -EINVAL; 2211 2212 mutex_lock(&p->mutex); 2213 2214 if (!p->n_pdds) { 2215 pr_err("No pdd for given process\n"); 2216 ret = -ENODEV; 2217 goto exit_unlock; 2218 } 2219 2220 /* Confirm all process queues are evicted */ 2221 if (!p->queues_paused) { 2222 pr_err("Cannot dump process when queues are not in evicted state\n"); 2223 /* CRIU plugin did not call op PROCESS_INFO before checkpointing */ 2224 ret = -EINVAL; 2225 goto exit_unlock; 2226 } 2227 2228 ret = criu_get_process_object_info(p, &num_devices, &num_bos, &num_objects, &priv_size); 2229 if (ret) 2230 goto exit_unlock; 2231 2232 if (num_devices != args->num_devices || 2233 num_bos != args->num_bos || 2234 num_objects != args->num_objects || 2235 priv_size != args->priv_data_size) { 2236 2237 ret = -EINVAL; 2238 goto exit_unlock; 2239 } 2240 2241 /* each function will store private data inside priv_data and adjust priv_offset */ 2242 ret = criu_checkpoint_process(p, (uint8_t __user *)args->priv_data, &priv_offset); 2243 if (ret) 2244 goto exit_unlock; 2245 2246 ret = criu_checkpoint_devices(p, num_devices, (uint8_t __user *)args->devices, 2247 (uint8_t __user *)args->priv_data, &priv_offset); 2248 if (ret) 2249 goto exit_unlock; 2250 2251 /* Leave room for BOs in the private data. They need to be restored 2252 * before events, but we checkpoint them last to simplify the error 2253 * handling. 2254 */ 2255 bo_priv_offset = priv_offset; 2256 priv_offset += num_bos * sizeof(struct kfd_criu_bo_priv_data); 2257 2258 if (num_objects) { 2259 ret = kfd_criu_checkpoint_queues(p, (uint8_t __user *)args->priv_data, 2260 &priv_offset); 2261 if (ret) 2262 goto exit_unlock; 2263 2264 ret = kfd_criu_checkpoint_events(p, (uint8_t __user *)args->priv_data, 2265 &priv_offset); 2266 if (ret) 2267 goto exit_unlock; 2268 2269 ret = kfd_criu_checkpoint_svm(p, (uint8_t __user *)args->priv_data, &priv_offset); 2270 if (ret) 2271 goto exit_unlock; 2272 } 2273 2274 /* This must be the last thing in this function that can fail. 2275 * Otherwise we leak dmabuf file descriptors. 2276 */ 2277 ret = criu_checkpoint_bos(p, num_bos, (uint8_t __user *)args->bos, 2278 (uint8_t __user *)args->priv_data, &bo_priv_offset); 2279 2280 exit_unlock: 2281 mutex_unlock(&p->mutex); 2282 if (ret) 2283 pr_err("Failed to dump CRIU ret:%d\n", ret); 2284 else 2285 pr_debug("CRIU dump ret:%d\n", ret); 2286 2287 return ret; 2288 } 2289 2290 static int criu_restore_process(struct kfd_process *p, 2291 struct kfd_ioctl_criu_args *args, 2292 uint64_t *priv_offset, 2293 uint64_t max_priv_data_size) 2294 { 2295 int ret = 0; 2296 struct kfd_criu_process_priv_data process_priv; 2297 2298 if (*priv_offset + sizeof(process_priv) > max_priv_data_size) 2299 return -EINVAL; 2300 2301 ret = copy_from_user(&process_priv, 2302 (void __user *)(args->priv_data + *priv_offset), 2303 sizeof(process_priv)); 2304 if (ret) { 2305 pr_err("Failed to copy process private information from user\n"); 2306 ret = -EFAULT; 2307 goto exit; 2308 } 2309 *priv_offset += sizeof(process_priv); 2310 2311 if (process_priv.version != KFD_CRIU_PRIV_VERSION) { 2312 pr_err("Invalid CRIU API version (checkpointed:%d current:%d)\n", 2313 process_priv.version, KFD_CRIU_PRIV_VERSION); 2314 return -EINVAL; 2315 } 2316 2317 pr_debug("Setting XNACK mode\n"); 2318 if (process_priv.xnack_mode && !kfd_process_xnack_mode(p, true)) { 2319 pr_err("xnack mode cannot be set\n"); 2320 ret = -EPERM; 2321 goto exit; 2322 } else { 2323 pr_debug("set xnack mode: %d\n", process_priv.xnack_mode); 2324 p->xnack_enabled = process_priv.xnack_mode; 2325 } 2326 2327 exit: 2328 return ret; 2329 } 2330 2331 static int criu_restore_devices(struct kfd_process *p, 2332 struct kfd_ioctl_criu_args *args, 2333 uint64_t *priv_offset, 2334 uint64_t max_priv_data_size) 2335 { 2336 struct kfd_criu_device_bucket *device_buckets; 2337 struct kfd_criu_device_priv_data *device_privs; 2338 int ret = 0; 2339 uint32_t i; 2340 2341 if (args->num_devices != p->n_pdds) 2342 return -EINVAL; 2343 2344 if (*priv_offset + (args->num_devices * sizeof(*device_privs)) > max_priv_data_size) 2345 return -EINVAL; 2346 2347 device_buckets = memdup_array_user((void *)args->devices, 2348 args->num_devices, sizeof(*device_buckets)); 2349 2350 if (IS_ERR(device_buckets)) 2351 return PTR_ERR(device_buckets); 2352 2353 for (i = 0; i < args->num_devices; i++) { 2354 struct kfd_node *dev; 2355 struct kfd_process_device *pdd; 2356 struct file *drm_file; 2357 2358 /* device private data is not currently used */ 2359 2360 if (!device_buckets[i].user_gpu_id) { 2361 pr_err("Invalid user gpu_id\n"); 2362 ret = -EINVAL; 2363 goto exit; 2364 } 2365 2366 dev = kfd_device_by_id(device_buckets[i].actual_gpu_id); 2367 if (!dev) { 2368 pr_err("Failed to find device with gpu_id = %x\n", 2369 device_buckets[i].actual_gpu_id); 2370 ret = -EINVAL; 2371 goto exit; 2372 } 2373 2374 pdd = kfd_get_process_device_data(dev, p); 2375 if (!pdd) { 2376 pr_err("Failed to get pdd for gpu_id = %x\n", 2377 device_buckets[i].actual_gpu_id); 2378 ret = -EINVAL; 2379 goto exit; 2380 } 2381 2382 if (pdd->drm_file) { 2383 ret = -EINVAL; 2384 goto exit; 2385 } 2386 pdd->user_gpu_id = device_buckets[i].user_gpu_id; 2387 2388 drm_file = fget(device_buckets[i].drm_fd); 2389 if (!drm_file) { 2390 pr_err("Invalid render node file descriptor sent from plugin (%d)\n", 2391 device_buckets[i].drm_fd); 2392 ret = -EINVAL; 2393 goto exit; 2394 } 2395 2396 /* create the vm using render nodes for kfd pdd */ 2397 if (kfd_process_device_init_vm(pdd, drm_file)) { 2398 pr_err("could not init vm for given pdd\n"); 2399 /* On success, the PDD keeps the drm_file reference */ 2400 fput(drm_file); 2401 ret = -EINVAL; 2402 goto exit; 2403 } 2404 /* 2405 * pdd now already has the vm bound to render node so below api won't create a new 2406 * exclusive kfd mapping but use existing one with renderDXXX but is still needed 2407 * for iommu v2 binding and runtime pm. 2408 */ 2409 pdd = kfd_bind_process_to_device(dev, p); 2410 if (IS_ERR(pdd)) { 2411 ret = PTR_ERR(pdd); 2412 goto exit; 2413 } 2414 2415 if (!pdd->qpd.proc_doorbells) { 2416 ret = kfd_alloc_process_doorbells(dev->kfd, pdd); 2417 if (ret) 2418 goto exit; 2419 } 2420 } 2421 2422 /* 2423 * We are not copying device private data from user as we are not using the data for now, 2424 * but we still adjust for its private data. 2425 */ 2426 *priv_offset += args->num_devices * sizeof(*device_privs); 2427 2428 exit: 2429 kfree(device_buckets); 2430 return ret; 2431 } 2432 2433 static int criu_restore_memory_of_gpu(struct kfd_process_device *pdd, 2434 struct kfd_criu_bo_bucket *bo_bucket, 2435 struct kfd_criu_bo_priv_data *bo_priv, 2436 struct kgd_mem **kgd_mem) 2437 { 2438 int idr_handle; 2439 int ret; 2440 const bool criu_resume = true; 2441 u64 offset; 2442 2443 if (bo_priv->idr_handle > INT_MAX) 2444 return -EINVAL; 2445 2446 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 2447 if (bo_bucket->size != 2448 kfd_doorbell_process_slice(pdd->dev->kfd)) 2449 return -EINVAL; 2450 2451 offset = kfd_get_process_doorbells(pdd); 2452 if (!offset) 2453 return -ENOMEM; 2454 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2455 /* MMIO BOs need remapped bus address */ 2456 if (bo_bucket->size != PAGE_SIZE) { 2457 pr_err("Invalid page size\n"); 2458 return -EINVAL; 2459 } 2460 offset = pdd->dev->adev->rmmio_remap.bus_addr; 2461 if (!offset || (PAGE_SIZE > 4096)) { 2462 pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n"); 2463 return -ENOMEM; 2464 } 2465 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 2466 offset = bo_priv->user_addr; 2467 } 2468 /* Create the BO */ 2469 ret = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(pdd->dev->adev, bo_bucket->addr, 2470 bo_bucket->size, pdd->drm_priv, kgd_mem, 2471 &offset, bo_bucket->alloc_flags, criu_resume); 2472 if (ret) { 2473 pr_err("Could not create the BO\n"); 2474 return ret; 2475 } 2476 pr_debug("New BO created: size:0x%llx addr:0x%llx offset:0x%llx\n", 2477 bo_bucket->size, bo_bucket->addr, offset); 2478 2479 /* Restore previous IDR handle */ 2480 pr_debug("Restoring old IDR handle for the BO"); 2481 idr_handle = idr_alloc(&pdd->alloc_idr, *kgd_mem, bo_priv->idr_handle, 2482 bo_priv->idr_handle + 1, GFP_KERNEL); 2483 2484 if (idr_handle < 0) { 2485 pr_err("Could not allocate idr\n"); 2486 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, *kgd_mem, pdd->drm_priv, 2487 NULL); 2488 return -ENOMEM; 2489 } 2490 2491 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 2492 bo_bucket->restored_offset = KFD_MMAP_TYPE_DOORBELL | KFD_MMAP_GPU_ID(pdd->dev->id); 2493 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2494 bo_bucket->restored_offset = KFD_MMAP_TYPE_MMIO | KFD_MMAP_GPU_ID(pdd->dev->id); 2495 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_GTT) { 2496 bo_bucket->restored_offset = offset; 2497 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { 2498 bo_bucket->restored_offset = offset; 2499 /* Update the VRAM usage count */ 2500 atomic64_add(bo_bucket->size, &pdd->vram_usage); 2501 } 2502 return 0; 2503 } 2504 2505 static int criu_restore_bo(struct kfd_process *p, 2506 struct kfd_criu_bo_bucket *bo_bucket, 2507 struct kfd_criu_bo_priv_data *bo_priv, 2508 struct file **file) 2509 { 2510 struct kfd_process_device *pdd; 2511 struct kgd_mem *kgd_mem; 2512 int ret; 2513 int j; 2514 2515 pr_debug("Restoring BO size:0x%llx addr:0x%llx gpu_id:0x%x flags:0x%x idr_handle:0x%x\n", 2516 bo_bucket->size, bo_bucket->addr, bo_bucket->gpu_id, bo_bucket->alloc_flags, 2517 bo_priv->idr_handle); 2518 2519 pdd = kfd_process_device_data_by_id(p, bo_bucket->gpu_id); 2520 if (!pdd) { 2521 pr_err("Failed to get pdd\n"); 2522 return -ENODEV; 2523 } 2524 2525 ret = criu_restore_memory_of_gpu(pdd, bo_bucket, bo_priv, &kgd_mem); 2526 if (ret) 2527 return ret; 2528 2529 /* now map these BOs to GPU/s */ 2530 for (j = 0; j < p->n_pdds; j++) { 2531 struct kfd_node *peer; 2532 struct kfd_process_device *peer_pdd; 2533 2534 if (!bo_priv->mapped_gpuids[j]) 2535 break; 2536 2537 peer_pdd = kfd_process_device_data_by_id(p, bo_priv->mapped_gpuids[j]); 2538 if (!peer_pdd) 2539 return -EINVAL; 2540 2541 peer = peer_pdd->dev; 2542 2543 peer_pdd = kfd_bind_process_to_device(peer, p); 2544 if (IS_ERR(peer_pdd)) 2545 return PTR_ERR(peer_pdd); 2546 2547 ret = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(peer->adev, kgd_mem, 2548 peer_pdd->drm_priv); 2549 if (ret) { 2550 pr_err("Failed to map to gpu %d/%d\n", j, p->n_pdds); 2551 return ret; 2552 } 2553 } 2554 2555 pr_debug("map memory was successful for the BO\n"); 2556 /* create the dmabuf object and export the bo */ 2557 if (bo_bucket->alloc_flags 2558 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 2559 ret = criu_get_prime_handle(kgd_mem, DRM_RDWR, 2560 &bo_bucket->dmabuf_fd, file); 2561 if (ret) 2562 return ret; 2563 } else { 2564 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 2565 } 2566 2567 return 0; 2568 } 2569 2570 static int criu_restore_bos(struct kfd_process *p, 2571 struct kfd_ioctl_criu_args *args, 2572 uint64_t *priv_offset, 2573 uint64_t max_priv_data_size) 2574 { 2575 struct kfd_criu_bo_bucket *bo_buckets = NULL; 2576 struct kfd_criu_bo_priv_data *bo_privs = NULL; 2577 struct file **files = NULL; 2578 int ret = 0; 2579 uint32_t i = 0; 2580 2581 if (*priv_offset + (args->num_bos * sizeof(*bo_privs)) > max_priv_data_size) 2582 return -EINVAL; 2583 2584 /* Prevent MMU notifications until stage-4 IOCTL (CRIU_RESUME) is received */ 2585 amdgpu_amdkfd_block_mmu_notifications(p->kgd_process_info); 2586 2587 bo_buckets = kvmalloc_objs(*bo_buckets, args->num_bos); 2588 if (!bo_buckets) 2589 return -ENOMEM; 2590 2591 files = kvzalloc_objs(struct file *, args->num_bos); 2592 if (!files) { 2593 ret = -ENOMEM; 2594 goto exit; 2595 } 2596 2597 ret = copy_from_user(bo_buckets, (void __user *)args->bos, 2598 args->num_bos * sizeof(*bo_buckets)); 2599 if (ret) { 2600 pr_err("Failed to copy BOs information from user\n"); 2601 ret = -EFAULT; 2602 goto exit; 2603 } 2604 2605 bo_privs = kvmalloc_objs(*bo_privs, args->num_bos); 2606 if (!bo_privs) { 2607 ret = -ENOMEM; 2608 goto exit; 2609 } 2610 2611 ret = copy_from_user(bo_privs, (void __user *)args->priv_data + *priv_offset, 2612 args->num_bos * sizeof(*bo_privs)); 2613 if (ret) { 2614 pr_err("Failed to copy BOs information from user\n"); 2615 ret = -EFAULT; 2616 goto exit; 2617 } 2618 *priv_offset += args->num_bos * sizeof(*bo_privs); 2619 2620 /* Create and map new BOs */ 2621 for (; i < args->num_bos; i++) { 2622 ret = criu_restore_bo(p, &bo_buckets[i], &bo_privs[i], &files[i]); 2623 if (ret) { 2624 pr_debug("Failed to restore BO[%d] ret%d\n", i, ret); 2625 goto exit; 2626 } 2627 } /* done */ 2628 2629 /* Copy only the buckets back so user can read bo_buckets[N].restored_offset */ 2630 ret = copy_to_user((void __user *)args->bos, 2631 bo_buckets, 2632 (args->num_bos * sizeof(*bo_buckets))); 2633 if (ret) 2634 ret = -EFAULT; 2635 2636 exit: 2637 commit_files(files, bo_buckets, i, ret); 2638 kvfree(files); 2639 kvfree(bo_buckets); 2640 kvfree(bo_privs); 2641 return ret; 2642 } 2643 2644 static int criu_restore_objects(struct file *filep, 2645 struct kfd_process *p, 2646 struct kfd_ioctl_criu_args *args, 2647 uint64_t *priv_offset, 2648 uint64_t max_priv_data_size) 2649 { 2650 int ret = 0; 2651 uint32_t i; 2652 2653 BUILD_BUG_ON(offsetof(struct kfd_criu_queue_priv_data, object_type)); 2654 BUILD_BUG_ON(offsetof(struct kfd_criu_event_priv_data, object_type)); 2655 BUILD_BUG_ON(offsetof(struct kfd_criu_svm_range_priv_data, object_type)); 2656 2657 for (i = 0; i < args->num_objects; i++) { 2658 uint32_t object_type; 2659 2660 if (*priv_offset + sizeof(object_type) > max_priv_data_size) { 2661 pr_err("Invalid private data size\n"); 2662 return -EINVAL; 2663 } 2664 2665 ret = get_user(object_type, (uint32_t __user *)(args->priv_data + *priv_offset)); 2666 if (ret) { 2667 pr_err("Failed to copy private information from user\n"); 2668 goto exit; 2669 } 2670 2671 switch (object_type) { 2672 case KFD_CRIU_OBJECT_TYPE_QUEUE: 2673 ret = kfd_criu_restore_queue(p, (uint8_t __user *)args->priv_data, 2674 priv_offset, max_priv_data_size); 2675 if (ret) 2676 goto exit; 2677 break; 2678 case KFD_CRIU_OBJECT_TYPE_EVENT: 2679 ret = kfd_criu_restore_event(filep, p, (uint8_t __user *)args->priv_data, 2680 priv_offset, max_priv_data_size); 2681 if (ret) 2682 goto exit; 2683 break; 2684 case KFD_CRIU_OBJECT_TYPE_SVM_RANGE: 2685 ret = kfd_criu_restore_svm(p, (uint8_t __user *)args->priv_data, 2686 priv_offset, max_priv_data_size); 2687 if (ret) 2688 goto exit; 2689 break; 2690 default: 2691 pr_err("Invalid object type:%u at index:%d\n", object_type, i); 2692 ret = -EINVAL; 2693 goto exit; 2694 } 2695 } 2696 exit: 2697 return ret; 2698 } 2699 2700 static int criu_restore(struct file *filep, 2701 struct kfd_process *p, 2702 struct kfd_ioctl_criu_args *args) 2703 { 2704 uint64_t priv_offset = 0; 2705 int ret = 0; 2706 2707 pr_debug("CRIU restore (num_devices:%u num_bos:%u num_objects:%u priv_data_size:%llu)\n", 2708 args->num_devices, args->num_bos, args->num_objects, args->priv_data_size); 2709 2710 if ((args->num_bos > 0 && !args->bos) || !args->devices || !args->priv_data || 2711 !args->priv_data_size || !args->num_devices) 2712 return -EINVAL; 2713 2714 mutex_lock(&p->mutex); 2715 2716 /* 2717 * Set the process to evicted state to avoid running any new queues before all the memory 2718 * mappings are ready. 2719 */ 2720 ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_RESTORE); 2721 if (ret) 2722 goto exit_unlock; 2723 2724 /* Each function will adjust priv_offset based on how many bytes they consumed */ 2725 ret = criu_restore_process(p, args, &priv_offset, args->priv_data_size); 2726 if (ret) 2727 goto exit_unlock; 2728 2729 ret = criu_restore_devices(p, args, &priv_offset, args->priv_data_size); 2730 if (ret) 2731 goto exit_unlock; 2732 2733 ret = criu_restore_bos(p, args, &priv_offset, args->priv_data_size); 2734 if (ret) 2735 goto exit_unlock; 2736 2737 ret = criu_restore_objects(filep, p, args, &priv_offset, args->priv_data_size); 2738 if (ret) 2739 goto exit_unlock; 2740 2741 if (priv_offset != args->priv_data_size) { 2742 pr_err("Invalid private data size\n"); 2743 ret = -EINVAL; 2744 } 2745 2746 exit_unlock: 2747 mutex_unlock(&p->mutex); 2748 if (ret) 2749 pr_err("Failed to restore CRIU ret:%d\n", ret); 2750 else 2751 pr_debug("CRIU restore successful\n"); 2752 2753 return ret; 2754 } 2755 2756 static int criu_unpause(struct file *filep, 2757 struct kfd_process *p, 2758 struct kfd_ioctl_criu_args *args) 2759 { 2760 int ret; 2761 2762 mutex_lock(&p->mutex); 2763 2764 if (!p->queues_paused) { 2765 mutex_unlock(&p->mutex); 2766 return -EINVAL; 2767 } 2768 2769 ret = kfd_process_restore_queues(p); 2770 if (ret) 2771 pr_err("Failed to unpause queues ret:%d\n", ret); 2772 else 2773 p->queues_paused = false; 2774 2775 mutex_unlock(&p->mutex); 2776 2777 return ret; 2778 } 2779 2780 static int criu_resume(struct file *filep, 2781 struct kfd_process *p, 2782 struct kfd_ioctl_criu_args *args) 2783 { 2784 struct kfd_process *target = NULL; 2785 struct pid *pid = NULL; 2786 int ret = 0; 2787 2788 pr_debug("Inside %s, target pid for criu restore: %d\n", __func__, 2789 args->pid); 2790 2791 pid = find_get_pid(args->pid); 2792 if (!pid) { 2793 pr_err("Cannot find pid info for %i\n", args->pid); 2794 return -ESRCH; 2795 } 2796 2797 pr_debug("calling kfd_lookup_process_by_pid\n"); 2798 target = kfd_lookup_process_by_pid(pid); 2799 2800 put_pid(pid); 2801 2802 if (!target) { 2803 pr_debug("Cannot find process info for %i\n", args->pid); 2804 return -ESRCH; 2805 } 2806 2807 mutex_lock(&target->mutex); 2808 ret = kfd_criu_resume_svm(target); 2809 if (ret) { 2810 pr_err("kfd_criu_resume_svm failed for %i\n", args->pid); 2811 goto exit; 2812 } 2813 2814 ret = amdgpu_amdkfd_criu_resume(target->kgd_process_info); 2815 if (ret) 2816 pr_err("amdgpu_amdkfd_criu_resume failed for %i\n", args->pid); 2817 2818 exit: 2819 mutex_unlock(&target->mutex); 2820 2821 kfd_unref_process(target); 2822 return ret; 2823 } 2824 2825 static int criu_process_info(struct file *filep, 2826 struct kfd_process *p, 2827 struct kfd_ioctl_criu_args *args) 2828 { 2829 int ret = 0; 2830 2831 mutex_lock(&p->mutex); 2832 2833 if (!p->n_pdds) { 2834 pr_err("No pdd for given process\n"); 2835 ret = -ENODEV; 2836 goto err_unlock; 2837 } 2838 2839 ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_CHECKPOINT); 2840 if (ret) 2841 goto err_unlock; 2842 2843 p->queues_paused = true; 2844 2845 args->pid = task_pid_nr_ns(p->lead_thread, 2846 task_active_pid_ns(p->lead_thread)); 2847 2848 ret = criu_get_process_object_info(p, &args->num_devices, &args->num_bos, 2849 &args->num_objects, &args->priv_data_size); 2850 if (ret) 2851 goto err_unlock; 2852 2853 dev_dbg(kfd_device, "Num of devices:%u bos:%u objects:%u priv_data_size:%lld\n", 2854 args->num_devices, args->num_bos, args->num_objects, 2855 args->priv_data_size); 2856 2857 err_unlock: 2858 if (ret) { 2859 kfd_process_restore_queues(p); 2860 p->queues_paused = false; 2861 } 2862 mutex_unlock(&p->mutex); 2863 return ret; 2864 } 2865 2866 static int kfd_ioctl_criu(struct file *filep, struct kfd_process *p, void *data) 2867 { 2868 struct kfd_ioctl_criu_args *args = data; 2869 int ret; 2870 2871 dev_dbg(kfd_device, "CRIU operation: %d\n", args->op); 2872 switch (args->op) { 2873 case KFD_CRIU_OP_PROCESS_INFO: 2874 ret = criu_process_info(filep, p, args); 2875 break; 2876 case KFD_CRIU_OP_CHECKPOINT: 2877 ret = criu_checkpoint(filep, p, args); 2878 break; 2879 case KFD_CRIU_OP_UNPAUSE: 2880 ret = criu_unpause(filep, p, args); 2881 break; 2882 case KFD_CRIU_OP_RESTORE: 2883 ret = criu_restore(filep, p, args); 2884 break; 2885 case KFD_CRIU_OP_RESUME: 2886 ret = criu_resume(filep, p, args); 2887 break; 2888 default: 2889 dev_dbg(kfd_device, "Unsupported CRIU operation:%d\n", args->op); 2890 ret = -EINVAL; 2891 break; 2892 } 2893 2894 if (ret) 2895 dev_dbg(kfd_device, "CRIU operation:%d err:%d\n", args->op, ret); 2896 2897 return ret; 2898 } 2899 2900 static int runtime_enable(struct kfd_process *p, uint64_t r_debug, 2901 bool enable_ttmp_setup) 2902 { 2903 int i = 0, ret = 0; 2904 2905 if (p->is_runtime_retry) 2906 goto retry; 2907 2908 if (p->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_DISABLED) 2909 return -EBUSY; 2910 2911 for (i = 0; i < p->n_pdds; i++) { 2912 struct kfd_process_device *pdd = p->pdds[i]; 2913 2914 if (pdd->qpd.queue_count) 2915 return -EEXIST; 2916 2917 /* 2918 * Setup TTMPs by default. 2919 * Note that this call must remain here for MES ADD QUEUE to 2920 * skip_process_ctx_clear unconditionally as the first call to 2921 * SET_SHADER_DEBUGGER clears any stale process context data 2922 * saved in MES. 2923 */ 2924 if (pdd->dev->kfd->shared_resources.enable_mes) { 2925 ret = kfd_dbg_set_mes_debug_mode( 2926 pdd, !kfd_dbg_has_cwsr_workaround(pdd->dev)); 2927 if (ret) 2928 return ret; 2929 } 2930 } 2931 2932 p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_ENABLED; 2933 p->runtime_info.r_debug = r_debug; 2934 p->runtime_info.ttmp_setup = enable_ttmp_setup; 2935 2936 if (p->runtime_info.ttmp_setup) { 2937 for (i = 0; i < p->n_pdds; i++) { 2938 struct kfd_process_device *pdd = p->pdds[i]; 2939 2940 if (!kfd_dbg_is_rlc_restore_supported(pdd->dev)) { 2941 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 2942 pdd->dev->kfd2kgd->enable_debug_trap( 2943 pdd->dev->adev, 2944 true, 2945 pdd->dev->vm_info.last_vmid_kfd); 2946 } else if (kfd_dbg_is_per_vmid_supported(pdd->dev)) { 2947 pdd->spi_dbg_override = pdd->dev->kfd2kgd->enable_debug_trap( 2948 pdd->dev->adev, 2949 false, 2950 0); 2951 } 2952 } 2953 } 2954 2955 retry: 2956 if (p->debug_trap_enabled) { 2957 if (!p->is_runtime_retry) { 2958 kfd_dbg_trap_activate(p); 2959 kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME), 2960 p, NULL, 0, false, NULL, 0); 2961 } 2962 2963 mutex_unlock(&p->mutex); 2964 ret = down_interruptible(&p->runtime_enable_sema); 2965 mutex_lock(&p->mutex); 2966 2967 p->is_runtime_retry = !!ret; 2968 } 2969 2970 return ret; 2971 } 2972 2973 static int runtime_disable(struct kfd_process *p) 2974 { 2975 int i = 0, ret = 0; 2976 bool was_enabled = p->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED; 2977 2978 p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_DISABLED; 2979 p->runtime_info.r_debug = 0; 2980 2981 if (p->debug_trap_enabled) { 2982 if (was_enabled) 2983 kfd_dbg_trap_deactivate(p, false, 0); 2984 2985 if (!p->is_runtime_retry) 2986 kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME), 2987 p, NULL, 0, false, NULL, 0); 2988 2989 mutex_unlock(&p->mutex); 2990 ret = down_interruptible(&p->runtime_enable_sema); 2991 mutex_lock(&p->mutex); 2992 2993 p->is_runtime_retry = !!ret; 2994 if (ret) 2995 return ret; 2996 } 2997 2998 if (was_enabled && p->runtime_info.ttmp_setup) { 2999 for (i = 0; i < p->n_pdds; i++) { 3000 struct kfd_process_device *pdd = p->pdds[i]; 3001 3002 if (!kfd_dbg_is_rlc_restore_supported(pdd->dev)) 3003 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 3004 } 3005 } 3006 3007 p->runtime_info.ttmp_setup = false; 3008 3009 /* disable ttmp setup */ 3010 for (i = 0; i < p->n_pdds; i++) { 3011 struct kfd_process_device *pdd = p->pdds[i]; 3012 int last_err = 0; 3013 3014 if (kfd_dbg_is_per_vmid_supported(pdd->dev)) { 3015 pdd->spi_dbg_override = 3016 pdd->dev->kfd2kgd->disable_debug_trap( 3017 pdd->dev->adev, 3018 false, 3019 pdd->dev->vm_info.last_vmid_kfd); 3020 3021 if (!pdd->dev->kfd->shared_resources.enable_mes) 3022 last_err = debug_refresh_runlist(pdd->dev->dqm); 3023 else 3024 last_err = kfd_dbg_set_mes_debug_mode(pdd, 3025 !kfd_dbg_has_cwsr_workaround(pdd->dev)); 3026 3027 if (last_err) 3028 ret = last_err; 3029 } 3030 } 3031 3032 return ret; 3033 } 3034 3035 static int kfd_ioctl_runtime_enable(struct file *filep, struct kfd_process *p, void *data) 3036 { 3037 struct kfd_ioctl_runtime_enable_args *args = data; 3038 int r; 3039 3040 mutex_lock(&p->mutex); 3041 3042 if (args->mode_mask & KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK) 3043 r = runtime_enable(p, args->r_debug, 3044 !!(args->mode_mask & KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK)); 3045 else 3046 r = runtime_disable(p); 3047 3048 mutex_unlock(&p->mutex); 3049 3050 return r; 3051 } 3052 3053 static int kfd_ioctl_set_debug_trap(struct file *filep, struct kfd_process *p, void *data) 3054 { 3055 struct kfd_ioctl_dbg_trap_args *args = data; 3056 struct task_struct *thread = NULL; 3057 struct mm_struct *mm = NULL; 3058 struct pid *pid = NULL; 3059 struct kfd_process *target = NULL; 3060 struct kfd_process_device *pdd = NULL; 3061 int r = 0; 3062 3063 if (p->context_id != KFD_CONTEXT_ID_PRIMARY) { 3064 pr_debug("Set debug trap ioctl can not be invoked on non-primary kfd process\n"); 3065 3066 return -EOPNOTSUPP; 3067 } 3068 3069 if (sched_policy == KFD_SCHED_POLICY_NO_HWS) { 3070 pr_err("Debugging does not support sched_policy %i", sched_policy); 3071 return -EINVAL; 3072 } 3073 3074 pid = find_get_pid(args->pid); 3075 if (!pid) { 3076 pr_debug("Cannot find pid info for %i\n", args->pid); 3077 r = -ESRCH; 3078 goto out; 3079 } 3080 3081 thread = get_pid_task(pid, PIDTYPE_PID); 3082 if (!thread) { 3083 r = -ESRCH; 3084 goto out; 3085 } 3086 3087 mm = get_task_mm(thread); 3088 if (!mm) { 3089 r = -ESRCH; 3090 goto out; 3091 } 3092 3093 if (args->op == KFD_IOC_DBG_TRAP_ENABLE) { 3094 bool create_process; 3095 3096 rcu_read_lock(); 3097 create_process = thread && thread != current && ptrace_parent(thread) == current; 3098 rcu_read_unlock(); 3099 3100 target = create_process ? kfd_create_process(thread) : 3101 kfd_lookup_process_by_pid(pid); 3102 } else { 3103 target = kfd_lookup_process_by_pid(pid); 3104 } 3105 3106 if (IS_ERR_OR_NULL(target)) { 3107 pr_debug("Cannot find process PID %i to debug\n", args->pid); 3108 r = target ? PTR_ERR(target) : -ESRCH; 3109 target = NULL; 3110 goto out; 3111 } 3112 3113 if (target->context_id != KFD_CONTEXT_ID_PRIMARY) { 3114 pr_debug("Set debug trap ioctl not supported on non-primary kfd process\n"); 3115 r = -EOPNOTSUPP; 3116 goto out; 3117 } 3118 3119 /* 3120 * Verify debugger has permission to debug target process. 3121 * For cross-process debugging, require active ptrace relationship. 3122 * This applies to ALL operations to prevent unauthorized interference. 3123 */ 3124 rcu_read_lock(); 3125 if (target != p && ptrace_parent(target->lead_thread) != current 3126 && target->debugger_process != p) { 3127 pr_err("PID %i is not PTRACED and cannot be debugged\n", args->pid); 3128 r = -EPERM; 3129 } 3130 rcu_read_unlock(); 3131 3132 if (r) 3133 goto out; 3134 3135 mutex_lock(&target->mutex); 3136 3137 if (args->op != KFD_IOC_DBG_TRAP_ENABLE && !target->debug_trap_enabled) { 3138 pr_err("PID %i not debug enabled for op %i\n", args->pid, args->op); 3139 r = -EINVAL; 3140 goto unlock_out; 3141 } 3142 3143 if (target->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_ENABLED && 3144 (args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE || 3145 args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE || 3146 args->op == KFD_IOC_DBG_TRAP_SUSPEND_QUEUES || 3147 args->op == KFD_IOC_DBG_TRAP_RESUME_QUEUES || 3148 args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH || 3149 args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH || 3150 args->op == KFD_IOC_DBG_TRAP_SET_FLAGS)) { 3151 r = -EPERM; 3152 goto unlock_out; 3153 } 3154 3155 if (args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH || 3156 args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH) { 3157 int user_gpu_id = kfd_process_get_user_gpu_id(target, 3158 args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH ? 3159 args->set_node_address_watch.gpu_id : 3160 args->clear_node_address_watch.gpu_id); 3161 3162 pdd = kfd_process_device_data_by_id(target, user_gpu_id); 3163 if (user_gpu_id == -EINVAL || !pdd) { 3164 r = -ENODEV; 3165 goto unlock_out; 3166 } 3167 } 3168 3169 switch (args->op) { 3170 case KFD_IOC_DBG_TRAP_ENABLE: 3171 if (target != p) 3172 target->debugger_process = p; 3173 3174 r = kfd_dbg_trap_enable(target, 3175 args->enable.dbg_fd, 3176 (void __user *)args->enable.rinfo_ptr, 3177 &args->enable.rinfo_size); 3178 if (!r) 3179 target->exception_enable_mask = args->enable.exception_mask; 3180 3181 break; 3182 case KFD_IOC_DBG_TRAP_DISABLE: 3183 r = kfd_dbg_trap_disable(target); 3184 break; 3185 case KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT: 3186 r = kfd_dbg_send_exception_to_runtime(target, 3187 args->send_runtime_event.gpu_id, 3188 args->send_runtime_event.queue_id, 3189 args->send_runtime_event.exception_mask); 3190 break; 3191 case KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED: 3192 kfd_dbg_set_enabled_debug_exception_mask(target, 3193 args->set_exceptions_enabled.exception_mask); 3194 break; 3195 case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE: 3196 r = kfd_dbg_trap_set_wave_launch_override(target, 3197 args->launch_override.override_mode, 3198 args->launch_override.enable_mask, 3199 args->launch_override.support_request_mask, 3200 &args->launch_override.enable_mask, 3201 &args->launch_override.support_request_mask); 3202 break; 3203 case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE: 3204 r = kfd_dbg_trap_set_wave_launch_mode(target, 3205 args->launch_mode.launch_mode); 3206 break; 3207 case KFD_IOC_DBG_TRAP_SUSPEND_QUEUES: 3208 r = suspend_queues(target, 3209 args->suspend_queues.num_queues, 3210 args->suspend_queues.grace_period, 3211 args->suspend_queues.exception_mask, 3212 (uint32_t *)args->suspend_queues.queue_array_ptr); 3213 3214 break; 3215 case KFD_IOC_DBG_TRAP_RESUME_QUEUES: 3216 r = resume_queues(target, args->resume_queues.num_queues, 3217 (uint32_t *)args->resume_queues.queue_array_ptr); 3218 break; 3219 case KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH: 3220 r = kfd_dbg_trap_set_dev_address_watch(pdd, 3221 args->set_node_address_watch.address, 3222 args->set_node_address_watch.mask, 3223 &args->set_node_address_watch.id, 3224 args->set_node_address_watch.mode); 3225 break; 3226 case KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH: 3227 r = kfd_dbg_trap_clear_dev_address_watch(pdd, 3228 args->clear_node_address_watch.id); 3229 break; 3230 case KFD_IOC_DBG_TRAP_SET_FLAGS: 3231 r = kfd_dbg_trap_set_flags(target, &args->set_flags.flags); 3232 break; 3233 case KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT: 3234 r = kfd_dbg_ev_query_debug_event(target, 3235 &args->query_debug_event.queue_id, 3236 &args->query_debug_event.gpu_id, 3237 args->query_debug_event.exception_mask, 3238 &args->query_debug_event.exception_mask); 3239 break; 3240 case KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO: 3241 r = kfd_dbg_trap_query_exception_info(target, 3242 args->query_exception_info.source_id, 3243 args->query_exception_info.exception_code, 3244 args->query_exception_info.clear_exception, 3245 (void __user *)args->query_exception_info.info_ptr, 3246 &args->query_exception_info.info_size); 3247 break; 3248 case KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT: 3249 r = pqm_get_queue_snapshot(&target->pqm, 3250 args->queue_snapshot.exception_mask, 3251 (void __user *)args->queue_snapshot.snapshot_buf_ptr, 3252 &args->queue_snapshot.num_queues, 3253 &args->queue_snapshot.entry_size); 3254 break; 3255 case KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT: 3256 r = kfd_dbg_trap_device_snapshot(target, 3257 args->device_snapshot.exception_mask, 3258 (void __user *)args->device_snapshot.snapshot_buf_ptr, 3259 &args->device_snapshot.num_devices, 3260 &args->device_snapshot.entry_size); 3261 break; 3262 default: 3263 pr_err("Invalid option: %i\n", args->op); 3264 r = -EINVAL; 3265 } 3266 3267 unlock_out: 3268 mutex_unlock(&target->mutex); 3269 3270 out: 3271 if (thread) 3272 put_task_struct(thread); 3273 3274 if (mm) 3275 mmput(mm); 3276 3277 if (pid) 3278 put_pid(pid); 3279 3280 if (target) 3281 kfd_unref_process(target); 3282 3283 return r; 3284 } 3285 3286 /* userspace programs need to invoke this ioctl explicitly on a FD to 3287 * create a secondary kfd_process which replacing its primary kfd_process 3288 */ 3289 static int kfd_ioctl_create_process(struct file *filep, struct kfd_process *p, void *data) 3290 { 3291 struct kfd_process *process; 3292 int ret; 3293 3294 if (!filep->private_data || !p) 3295 return -EINVAL; 3296 3297 /* Each FD owns only one kfd_process */ 3298 if (p->context_id != KFD_CONTEXT_ID_PRIMARY) 3299 return -EINVAL; 3300 3301 mutex_lock(&kfd_processes_mutex); 3302 if (p != filep->private_data) { 3303 mutex_unlock(&kfd_processes_mutex); 3304 return -EINVAL; 3305 } 3306 3307 process = create_process(current, false); 3308 if (IS_ERR(process)) { 3309 mutex_unlock(&kfd_processes_mutex); 3310 return PTR_ERR(process); 3311 } 3312 3313 filep->private_data = process; 3314 ret = kfd_debugfs_add_process(process); 3315 if (ret) 3316 pr_warn("Failed to create debugfs entry for the kfd_process, ret = %d\n", 3317 ret); 3318 3319 mutex_unlock(&kfd_processes_mutex); 3320 3321 ret = kfd_create_process_sysfs(process); 3322 if (ret) 3323 pr_warn("Failed to create sysfs entry for the kfd_process"); 3324 3325 /* Each open() increases kref of the primary kfd_process, 3326 * so we need to reduce it here when we create a new secondary process replacing it 3327 */ 3328 kfd_unref_process(p); 3329 3330 return 0; 3331 } 3332 3333 static inline int profile_lock_device(struct kfd_process *p, 3334 uint32_t gpu_id, uint32_t op) 3335 { 3336 struct kfd_process_device *pdd; 3337 struct kfd_dev *kfd; 3338 int status = -EINVAL; 3339 struct amdgpu_ptl *ptl; 3340 3341 if (!p) 3342 return -EINVAL; 3343 3344 mutex_lock(&p->mutex); 3345 pdd = kfd_process_device_data_by_id(p, gpu_id); 3346 mutex_unlock(&p->mutex); 3347 3348 if (!pdd || !pdd->dev || !pdd->dev->kfd) 3349 return -EINVAL; 3350 3351 kfd = pdd->dev->kfd; 3352 ptl = &pdd->dev->adev->psp.ptl; 3353 3354 mutex_lock(&kfd->profiler_lock); 3355 if (op == 1) { 3356 if (!kfd->profiler_process) { 3357 kfd->profiler_process = p; 3358 status = 0; 3359 mutex_unlock(&kfd->profiler_lock); 3360 if (ptl->hw_supported_state == AMDGPU_PTL_HW_SUPPORTED) { 3361 status = kfd_ptl_disable_request(pdd, p); 3362 if (status != 0) 3363 dev_err(kfd_device, 3364 "Failed to lock device %d for profiling, error %d\n", 3365 gpu_id, status); 3366 } 3367 return status; 3368 } else if (kfd->profiler_process == p) { 3369 status = -EALREADY; 3370 } else { 3371 status = -EBUSY; 3372 } 3373 } else if (op == 0 && kfd->profiler_process == p) { 3374 kfd->profiler_process = NULL; 3375 status = 0; 3376 mutex_unlock(&kfd->profiler_lock); 3377 3378 if (ptl->hw_supported_state == AMDGPU_PTL_HW_SUPPORTED) { 3379 status = kfd_ptl_disable_release(pdd, p); 3380 if (status) 3381 dev_err(kfd_device, 3382 "Failed to unlock device %d for profiling, error %d\n", 3383 gpu_id, status); 3384 } 3385 return status; 3386 } 3387 mutex_unlock(&kfd->profiler_lock); 3388 3389 return status; 3390 } 3391 3392 static inline int kfd_profiler_pmc(struct kfd_process *p, 3393 struct kfd_ioctl_pmc_settings *args) 3394 { 3395 struct kfd_process_device *pdd; 3396 struct device_queue_manager *dqm; 3397 int status; 3398 3399 /* Check if we have the correct permissions. */ 3400 if (!perfmon_capable()) 3401 return -EPERM; 3402 3403 /* Lock/Unlock the device based on the parameter given in OP */ 3404 status = profile_lock_device(p, args->gpu_id, args->lock); 3405 if (status != 0) 3406 return status; 3407 3408 /* Enable/disable perfcount if requested */ 3409 mutex_lock(&p->mutex); 3410 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 3411 dqm = pdd->dev->dqm; 3412 mutex_unlock(&p->mutex); 3413 3414 dqm->ops.set_perfcount(dqm, args->perfcount_enable); 3415 return status; 3416 } 3417 3418 static int kfd_ioctl_profiler(struct file *filep, struct kfd_process *p, void *data) 3419 { 3420 struct kfd_ioctl_profiler_args *args = data; 3421 3422 switch (args->op) { 3423 case KFD_IOC_PROFILER_VERSION: 3424 args->version = KFD_IOC_PROFILER_VERSION_NUM; 3425 return 0; 3426 case KFD_IOC_PROFILER_PMC: 3427 return kfd_profiler_pmc(p, &args->pmc); 3428 case KFD_IOC_PROFILER_PTL_CONTROL: 3429 return kfd_profiler_ptl_control(p, &args->ptl); 3430 } 3431 return -EINVAL; 3432 } 3433 3434 #define AMDKFD_IOCTL_DEF(ioctl, _func, _flags) \ 3435 [_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, \ 3436 .validate = NULL, .cmd_drv = 0, .name = #ioctl} 3437 3438 #define AMDKFD_IOCTL_DEF_V(ioctl, _func, _validate, _flags) \ 3439 [_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, \ 3440 .validate = _validate, .cmd_drv = 0, .name = #ioctl} 3441 3442 /** Ioctl table */ 3443 static const struct amdkfd_ioctl_desc amdkfd_ioctls[] = { 3444 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_VERSION, 3445 kfd_ioctl_get_version, 0), 3446 3447 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_QUEUE, 3448 kfd_ioctl_create_queue, 0), 3449 3450 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_QUEUE, 3451 kfd_ioctl_destroy_queue, 0), 3452 3453 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_MEMORY_POLICY, 3454 kfd_ioctl_set_memory_policy, 0), 3455 3456 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_CLOCK_COUNTERS, 3457 kfd_ioctl_get_clock_counters, 0), 3458 3459 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES, 3460 kfd_ioctl_get_process_apertures, 0), 3461 3462 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UPDATE_QUEUE, 3463 kfd_ioctl_update_queue, 0), 3464 3465 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_EVENT, 3466 kfd_ioctl_create_event, 0), 3467 3468 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_EVENT, 3469 kfd_ioctl_destroy_event, 0), 3470 3471 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_EVENT, 3472 kfd_ioctl_set_event, 0), 3473 3474 AMDKFD_IOCTL_DEF(AMDKFD_IOC_RESET_EVENT, 3475 kfd_ioctl_reset_event, 0), 3476 3477 AMDKFD_IOCTL_DEF(AMDKFD_IOC_WAIT_EVENTS, 3478 kfd_ioctl_wait_events, 0), 3479 3480 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_REGISTER_DEPRECATED, 3481 kfd_ioctl_dbg_register, 0), 3482 3483 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED, 3484 kfd_ioctl_dbg_unregister, 0), 3485 3486 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED, 3487 kfd_ioctl_dbg_address_watch, 0), 3488 3489 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED, 3490 kfd_ioctl_dbg_wave_control, 0), 3491 3492 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_SCRATCH_BACKING_VA, 3493 kfd_ioctl_set_scratch_backing_va, 0), 3494 3495 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_TILE_CONFIG, 3496 kfd_ioctl_get_tile_config, 0), 3497 3498 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_TRAP_HANDLER, 3499 kfd_ioctl_set_trap_handler, 0), 3500 3501 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES_NEW, 3502 kfd_ioctl_get_process_apertures_new, 0), 3503 3504 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ACQUIRE_VM, 3505 kfd_ioctl_acquire_vm, 0), 3506 3507 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_MEMORY_OF_GPU, 3508 kfd_ioctl_alloc_memory_of_gpu, 0), 3509 3510 AMDKFD_IOCTL_DEF(AMDKFD_IOC_FREE_MEMORY_OF_GPU, 3511 kfd_ioctl_free_memory_of_gpu, 0), 3512 3513 AMDKFD_IOCTL_DEF(AMDKFD_IOC_MAP_MEMORY_TO_GPU, 3514 kfd_ioctl_map_memory_to_gpu, 0), 3515 3516 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU, 3517 kfd_ioctl_unmap_memory_from_gpu, 0), 3518 3519 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_CU_MASK, 3520 kfd_ioctl_set_cu_mask, 0), 3521 3522 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_QUEUE_WAVE_STATE, 3523 kfd_ioctl_get_queue_wave_state, 0), 3524 3525 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_DMABUF_INFO, 3526 kfd_ioctl_get_dmabuf_info, 0), 3527 3528 AMDKFD_IOCTL_DEF(AMDKFD_IOC_IMPORT_DMABUF, 3529 kfd_ioctl_import_dmabuf, 0), 3530 3531 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_QUEUE_GWS, 3532 kfd_ioctl_alloc_queue_gws, 0), 3533 3534 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SMI_EVENTS, 3535 kfd_ioctl_smi_events, 0), 3536 3537 AMDKFD_IOCTL_DEF_V(AMDKFD_IOC_SVM, kfd_ioctl_svm, 3538 kfd_ioctl_svm_validate, 0), 3539 3540 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_XNACK_MODE, 3541 kfd_ioctl_set_xnack_mode, 0), 3542 3543 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CRIU_OP, 3544 kfd_ioctl_criu, KFD_IOC_FLAG_CHECKPOINT_RESTORE), 3545 3546 AMDKFD_IOCTL_DEF(AMDKFD_IOC_AVAILABLE_MEMORY, 3547 kfd_ioctl_get_available_memory, 0), 3548 3549 AMDKFD_IOCTL_DEF(AMDKFD_IOC_EXPORT_DMABUF, 3550 kfd_ioctl_export_dmabuf, 0), 3551 3552 AMDKFD_IOCTL_DEF(AMDKFD_IOC_RUNTIME_ENABLE, 3553 kfd_ioctl_runtime_enable, 0), 3554 3555 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_TRAP, 3556 kfd_ioctl_set_debug_trap, 0), 3557 3558 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_PROCESS, 3559 kfd_ioctl_create_process, 0), 3560 3561 AMDKFD_IOCTL_DEF(AMDKFD_IOC_PROFILER, 3562 kfd_ioctl_profiler, 0), 3563 }; 3564 3565 #define AMDKFD_CORE_IOCTL_COUNT ARRAY_SIZE(amdkfd_ioctls) 3566 3567 static long kfd_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) 3568 { 3569 struct kfd_process *process; 3570 amdkfd_ioctl_t *func; 3571 const struct amdkfd_ioctl_desc *ioctl = NULL; 3572 unsigned int nr = _IOC_NR(cmd); 3573 char stack_kdata[128]; 3574 char *kdata = NULL; 3575 unsigned int usize, asize; 3576 int retcode = -EINVAL; 3577 bool ptrace_attached = false; 3578 3579 if (nr >= AMDKFD_CORE_IOCTL_COUNT) { 3580 retcode = -ENOTTY; 3581 goto err_i1; 3582 } 3583 3584 if ((nr >= AMDKFD_COMMAND_START) && (nr < AMDKFD_COMMAND_END)) { 3585 u32 amdkfd_size; 3586 3587 ioctl = &amdkfd_ioctls[nr]; 3588 3589 amdkfd_size = _IOC_SIZE(ioctl->cmd); 3590 usize = asize = _IOC_SIZE(cmd); 3591 if (amdkfd_size > asize) 3592 asize = amdkfd_size; 3593 3594 cmd = ioctl->cmd; 3595 } else { 3596 retcode = -ENOTTY; 3597 goto err_i1; 3598 } 3599 3600 dev_dbg(kfd_device, "ioctl cmd 0x%x (#0x%x), arg 0x%lx\n", cmd, nr, arg); 3601 3602 /* Get the process struct from the filep. Only the process 3603 * that opened /dev/kfd can use the file descriptor. Child 3604 * processes need to create their own KFD device context. 3605 */ 3606 process = filep->private_data; 3607 3608 rcu_read_lock(); 3609 if ((ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE) && 3610 ptrace_parent(process->lead_thread) == current) 3611 ptrace_attached = true; 3612 rcu_read_unlock(); 3613 3614 if (process->lead_thread != current->group_leader 3615 && !ptrace_attached) { 3616 dev_dbg(kfd_device, "Using KFD FD in wrong process\n"); 3617 retcode = -EBADF; 3618 goto err_i1; 3619 } 3620 3621 /* Do not trust userspace, use our own definition */ 3622 func = ioctl->func; 3623 3624 if (unlikely(!func)) { 3625 dev_dbg(kfd_device, "no function\n"); 3626 retcode = -EINVAL; 3627 goto err_i1; 3628 } 3629 3630 /* 3631 * Versions of docker shipped in Ubuntu 18.xx and 20.xx do not support 3632 * CAP_CHECKPOINT_RESTORE, so we also allow access if CAP_SYS_ADMIN as CAP_SYS_ADMIN is a 3633 * more priviledged access. 3634 */ 3635 if (unlikely(ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE)) { 3636 if (!capable(CAP_CHECKPOINT_RESTORE) && 3637 !capable(CAP_SYS_ADMIN)) { 3638 retcode = -EACCES; 3639 goto err_i1; 3640 } 3641 } 3642 3643 if (cmd & (IOC_IN | IOC_OUT)) { 3644 if (asize <= sizeof(stack_kdata)) { 3645 kdata = stack_kdata; 3646 } else { 3647 kdata = kmalloc(asize, GFP_KERNEL); 3648 if (!kdata) { 3649 retcode = -ENOMEM; 3650 goto err_i1; 3651 } 3652 } 3653 if (asize > usize) 3654 memset(kdata + usize, 0, asize - usize); 3655 } 3656 3657 if (cmd & IOC_IN) { 3658 if (copy_from_user(kdata, (void __user *)arg, usize) != 0) { 3659 retcode = -EFAULT; 3660 goto err_i1; 3661 } 3662 } else if (cmd & IOC_OUT) { 3663 memset(kdata, 0, usize); 3664 } 3665 3666 if (ioctl->validate) { 3667 retcode = ioctl->validate(kdata, usize); 3668 if (retcode) 3669 goto err_i1; 3670 } 3671 3672 retcode = func(filep, process, kdata); 3673 3674 if (cmd & IOC_OUT) 3675 if (copy_to_user((void __user *)arg, kdata, usize) != 0) 3676 retcode = -EFAULT; 3677 3678 err_i1: 3679 if (!ioctl) 3680 dev_dbg(kfd_device, "invalid ioctl: pid=%d, cmd=0x%02x, nr=0x%02x\n", 3681 task_pid_nr(current), cmd, nr); 3682 3683 if (kdata != stack_kdata) 3684 kfree(kdata); 3685 3686 if (retcode) 3687 dev_dbg(kfd_device, "ioctl cmd (#0x%x), arg 0x%lx, ret = %d\n", 3688 nr, arg, retcode); 3689 3690 return retcode; 3691 } 3692 3693 static int kfd_mmio_mmap(struct kfd_node *dev, struct kfd_process *process, 3694 struct vm_area_struct *vma) 3695 { 3696 phys_addr_t address; 3697 3698 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 3699 return -EINVAL; 3700 3701 if (PAGE_SIZE > 4096) 3702 return -EINVAL; 3703 3704 address = dev->adev->rmmio_remap.bus_addr; 3705 3706 vm_flags_set(vma, VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE | 3707 VM_DONTDUMP | VM_PFNMAP); 3708 3709 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 3710 3711 pr_debug("process pid %d mapping mmio page\n" 3712 " target user address == 0x%08llX\n" 3713 " physical address == 0x%08llX\n" 3714 " vm_flags == 0x%04lX\n" 3715 " size == 0x%04lX\n", 3716 process->lead_thread->pid, (unsigned long long) vma->vm_start, 3717 address, vma->vm_flags, PAGE_SIZE); 3718 3719 return io_remap_pfn_range(vma, 3720 vma->vm_start, 3721 address >> PAGE_SHIFT, 3722 PAGE_SIZE, 3723 vma->vm_page_prot); 3724 } 3725 3726 static int kfd_mmap(struct file *filep, struct vm_area_struct *vma) 3727 { 3728 struct kfd_process *process; 3729 struct kfd_process_device *pdd; 3730 struct kfd_node *dev = NULL; 3731 unsigned long mmap_offset; 3732 unsigned int gpu_id; 3733 3734 process = filep->private_data; 3735 if (!process) 3736 return -ESRCH; 3737 3738 if (process->lead_thread != current->group_leader) 3739 return -EBADF; 3740 3741 mmap_offset = vma->vm_pgoff << PAGE_SHIFT; 3742 gpu_id = KFD_MMAP_GET_GPU_ID(mmap_offset); 3743 3744 pdd = kfd_process_device_data_by_id(process, gpu_id); 3745 if (pdd) 3746 dev = pdd->dev; 3747 3748 switch (mmap_offset & KFD_MMAP_TYPE_MASK) { 3749 case KFD_MMAP_TYPE_DOORBELL: 3750 if (!dev) 3751 return -ENODEV; 3752 return kfd_doorbell_mmap(dev, process, vma); 3753 3754 case KFD_MMAP_TYPE_EVENTS: 3755 pr_warn("KFD_MMAP_TYPE_EVENTS is no longer supported\n"); 3756 return -EINVAL; 3757 3758 case KFD_MMAP_TYPE_RESERVED_MEM: 3759 pr_warn("KFD_MMAP_TYPE_RESERVED_MEM is no longer supported\n"); 3760 return -EINVAL; 3761 case KFD_MMAP_TYPE_MMIO: 3762 if (!dev) 3763 return -ENODEV; 3764 return kfd_mmio_mmap(dev, process, vma); 3765 } 3766 3767 return -EFAULT; 3768 } 3769