1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012,2013 - ARM Ltd 4 * Author: Marc Zyngier <marc.zyngier@arm.com> 5 * 6 * Derived from arch/arm/kvm/reset.c 7 * Copyright (C) 2012 - Virtual Open Systems and Columbia University 8 * Author: Christoffer Dall <c.dall@virtualopensystems.com> 9 */ 10 11 #include <linux/errno.h> 12 #include <linux/kernel.h> 13 #include <linux/kvm_host.h> 14 #include <linux/kvm.h> 15 #include <linux/hw_breakpoint.h> 16 #include <linux/slab.h> 17 #include <linux/string.h> 18 #include <linux/types.h> 19 20 #include <kvm/arm_arch_timer.h> 21 22 #include <asm/cpufeature.h> 23 #include <asm/cputype.h> 24 #include <asm/fpsimd.h> 25 #include <asm/ptrace.h> 26 #include <asm/kvm_arm.h> 27 #include <asm/kvm_asm.h> 28 #include <asm/kvm_emulate.h> 29 #include <asm/kvm_mmu.h> 30 #include <asm/kvm_nested.h> 31 #include <asm/virt.h> 32 33 /* Maximum phys_shift supported for any VM on this host */ 34 static u32 __ro_after_init kvm_ipa_limit; 35 unsigned int __ro_after_init kvm_host_sve_max_vl; 36 37 unsigned int __ro_after_init kvm_sve_max_vl; 38 39 int __init kvm_arm_init_sve(void) 40 { 41 if (system_supports_sve()) { 42 kvm_sve_max_vl = sve_max_virtualisable_vl(); 43 kvm_host_sve_max_vl = sve_max_vl(); 44 kvm_nvhe_sym(kvm_host_sve_max_vl) = kvm_host_sve_max_vl; 45 46 /* 47 * The get_sve_reg()/set_sve_reg() ioctl interface will need 48 * to be extended with multiple register slice support in 49 * order to support vector lengths greater than 50 * VL_ARCH_MAX: 51 */ 52 if (WARN_ON(kvm_sve_max_vl > VL_ARCH_MAX)) 53 kvm_sve_max_vl = VL_ARCH_MAX; 54 55 /* 56 * Don't even try to make use of vector lengths that 57 * aren't available on all CPUs, for now: 58 */ 59 if (kvm_sve_max_vl < sve_max_vl()) 60 pr_warn("KVM: SVE vector length for guests limited to %u bytes\n", 61 kvm_sve_max_vl); 62 } 63 64 return 0; 65 } 66 67 static void kvm_vcpu_enable_sve(struct kvm_vcpu *vcpu) 68 { 69 vcpu->arch.sve_max_vl = kvm_sve_max_vl; 70 71 /* 72 * Userspace can still customize the vector lengths by writing 73 * KVM_REG_ARM64_SVE_VLS. Allocation is deferred until 74 * kvm_arm_vcpu_finalize(), which freezes the configuration. 75 */ 76 set_bit(KVM_ARCH_FLAG_GUEST_HAS_SVE, &vcpu->kvm->arch.flags); 77 } 78 79 /* 80 * Finalize vcpu's maximum SVE vector length, allocating 81 * vcpu->arch.sve_state as necessary. 82 */ 83 static int kvm_vcpu_finalize_sve(struct kvm_vcpu *vcpu) 84 { 85 void *buf; 86 unsigned int vl; 87 size_t reg_sz; 88 int ret; 89 90 vl = vcpu->arch.sve_max_vl; 91 92 /* 93 * Responsibility for these properties is shared between 94 * kvm_arm_init_sve(), kvm_vcpu_enable_sve() and 95 * set_sve_vls(). Double-check here just to be sure: 96 */ 97 if (WARN_ON(!sve_vl_valid(vl) || vl > sve_max_virtualisable_vl() || 98 vl > VL_ARCH_MAX)) 99 return -EIO; 100 101 reg_sz = vcpu_sve_state_size(vcpu); 102 buf = kzalloc(reg_sz, GFP_KERNEL_ACCOUNT); 103 if (!buf) 104 return -ENOMEM; 105 106 ret = kvm_share_hyp(buf, buf + reg_sz); 107 if (ret) { 108 kfree(buf); 109 return ret; 110 } 111 112 vcpu->arch.sve_state = buf; 113 vcpu_set_flag(vcpu, VCPU_SVE_FINALIZED); 114 return 0; 115 } 116 117 int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature) 118 { 119 switch (feature) { 120 case KVM_ARM_VCPU_SVE: 121 if (!vcpu_has_sve(vcpu)) 122 return -EINVAL; 123 124 if (kvm_arm_vcpu_sve_finalized(vcpu)) 125 return -EPERM; 126 127 return kvm_vcpu_finalize_sve(vcpu); 128 } 129 130 return -EINVAL; 131 } 132 133 bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu) 134 { 135 if (vcpu_has_sve(vcpu) && !kvm_arm_vcpu_sve_finalized(vcpu)) 136 return false; 137 138 return true; 139 } 140 141 void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu) 142 { 143 void *sve_state = vcpu->arch.sve_state; 144 145 kvm_unshare_hyp(vcpu, vcpu + 1); 146 if (sve_state) 147 kvm_unshare_hyp(sve_state, sve_state + vcpu_sve_state_size(vcpu)); 148 kfree(sve_state); 149 free_page((unsigned long)vcpu->arch.ctxt.vncr_array); 150 kfree(vcpu->arch.vncr_tlb); 151 kfree(vcpu->arch.ccsidr); 152 } 153 154 static void kvm_vcpu_reset_sve(struct kvm_vcpu *vcpu) 155 { 156 if (vcpu_has_sve(vcpu)) 157 memset(vcpu->arch.sve_state, 0, vcpu_sve_state_size(vcpu)); 158 } 159 160 /** 161 * kvm_reset_vcpu - sets core registers and sys_regs to reset value 162 * @vcpu: The VCPU pointer 163 * 164 * This function sets the registers on the virtual CPU struct to their 165 * architecturally defined reset values, except for registers whose reset is 166 * deferred until kvm_arm_vcpu_finalize(). 167 * 168 * Note: This function can be called from two paths: The KVM_ARM_VCPU_INIT 169 * ioctl or as part of handling a request issued by another VCPU in the PSCI 170 * handling code. In the first case, the VCPU will not be loaded, and in the 171 * second case the VCPU will be loaded. Because this function operates purely 172 * on the memory-backed values of system registers, we want to do a full put if 173 * we were loaded (handling a request) and load the values back at the end of 174 * the function. Otherwise we leave the state alone. In both cases, we 175 * disable preemption around the vcpu reset as we would otherwise race with 176 * preempt notifiers which also call put/load. 177 */ 178 void kvm_reset_vcpu(struct kvm_vcpu *vcpu) 179 { 180 struct vcpu_reset_state reset_state; 181 bool loaded; 182 183 spin_lock(&vcpu->arch.mp_state_lock); 184 reset_state = vcpu->arch.reset_state; 185 vcpu->arch.reset_state.reset = false; 186 spin_unlock(&vcpu->arch.mp_state_lock); 187 188 preempt_disable(); 189 loaded = (vcpu->cpu != -1); 190 if (loaded) 191 kvm_arch_vcpu_put(vcpu); 192 193 if (!kvm_arm_vcpu_sve_finalized(vcpu)) { 194 if (vcpu_has_feature(vcpu, KVM_ARM_VCPU_SVE)) 195 kvm_vcpu_enable_sve(vcpu); 196 } else { 197 kvm_vcpu_reset_sve(vcpu); 198 } 199 200 /* Reset core registers */ 201 kvm_reset_vcpu_core(vcpu); 202 203 /* Reset system registers */ 204 kvm_reset_sys_regs(vcpu); 205 206 /* 207 * Additional reset state handling that PSCI may have imposed on us. 208 * Must be done after all the sys_reg reset. 209 */ 210 if (reset_state.reset) 211 kvm_reset_vcpu_psci(vcpu, &reset_state); 212 213 /* Reset timer */ 214 kvm_timer_vcpu_reset(vcpu); 215 216 if (loaded) 217 kvm_arch_vcpu_load(vcpu, smp_processor_id()); 218 preempt_enable(); 219 } 220 221 u32 kvm_get_pa_bits(struct kvm *kvm) 222 { 223 /* Fixed limit until we can configure ID_AA64MMFR0.PARange */ 224 return kvm_ipa_limit; 225 } 226 227 u32 get_kvm_ipa_limit(void) 228 { 229 return kvm_ipa_limit; 230 } 231 232 int __init kvm_set_ipa_limit(void) 233 { 234 unsigned int parange; 235 u64 mmfr0; 236 237 mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1); 238 parange = cpuid_feature_extract_unsigned_field(mmfr0, 239 ID_AA64MMFR0_EL1_PARANGE_SHIFT); 240 /* 241 * IPA size beyond 48 bits for 4K and 16K page size is only supported 242 * when LPA2 is available. So if we have LPA2, enable it, else cap to 48 243 * bits, in case it's reported as larger on the system. 244 */ 245 if (!kvm_lpa2_is_enabled() && PAGE_SIZE != SZ_64K) 246 parange = min(parange, (unsigned int)ID_AA64MMFR0_EL1_PARANGE_48); 247 248 /* 249 * Check with ARMv8.5-GTG that our PAGE_SIZE is supported at 250 * Stage-2. If not, things will stop very quickly. 251 */ 252 switch (cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_EL1_TGRAN_2_SHIFT)) { 253 case ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_NONE: 254 kvm_err("PAGE_SIZE not supported at Stage-2, giving up\n"); 255 return -EINVAL; 256 case ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_DEFAULT: 257 kvm_debug("PAGE_SIZE supported at Stage-2 (default)\n"); 258 break; 259 case ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_MIN ... ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_MAX: 260 kvm_debug("PAGE_SIZE supported at Stage-2 (advertised)\n"); 261 break; 262 default: 263 kvm_err("Unsupported value for TGRAN_2, giving up\n"); 264 return -EINVAL; 265 } 266 267 kvm_ipa_limit = id_aa64mmfr0_parange_to_phys_shift(parange); 268 kvm_info("IPA Size Limit: %d bits%s\n", kvm_ipa_limit, 269 ((kvm_ipa_limit < KVM_PHYS_SHIFT) ? 270 " (Reduced IPA size, limited VM/VMM compatibility)" : "")); 271 272 return 0; 273 } 274