1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #ifndef _XE_GUC_H_ 7 #define _XE_GUC_H_ 8 9 #include "xe_gt.h" 10 #include "xe_guc_types.h" 11 #include "xe_hw_engine_types.h" 12 #include "xe_macros.h" 13 14 /* 15 * GuC version number components are defined to be only 8-bit size, 16 * so converting to a 32bit 8.8.8 integer allows simple (and safe) 17 * numerical comparisons. 18 */ 19 #define MAKE_GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat)) 20 #define MAKE_GUC_VER_STRUCT(ver) MAKE_GUC_VER((ver).major, (ver).minor, (ver).patch) 21 #define MAKE_GUC_VER_ARGS(ver...) \ 22 (BUILD_BUG_ON_ZERO(COUNT_ARGS(ver) < 2 || COUNT_ARGS(ver) > 3) + \ 23 MAKE_GUC_VER(PICK_ARG1(ver), PICK_ARG2(ver), IF_ARGS(PICK_ARG3(ver), 0, PICK_ARG3(ver)))) 24 25 #define GUC_SUBMIT_VER(guc) \ 26 MAKE_GUC_VER_STRUCT((guc)->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY]) 27 #define GUC_FIRMWARE_VER(guc) \ 28 MAKE_GUC_VER_STRUCT((guc)->fw.versions.found[XE_UC_FW_VER_RELEASE]) 29 #define GUC_FIRMWARE_VER_AT_LEAST(guc, ver...) \ 30 xe_guc_fw_version_at_least((guc), MAKE_GUC_VER_ARGS(ver)) 31 32 struct drm_printer; 33 34 void xe_guc_comm_init_early(struct xe_guc *guc); 35 int xe_guc_init_noalloc(struct xe_guc *guc); 36 int xe_guc_init(struct xe_guc *guc); 37 int xe_guc_init_post_hwconfig(struct xe_guc *guc); 38 int xe_guc_post_load_init(struct xe_guc *guc); 39 int xe_guc_reset(struct xe_guc *guc); 40 int xe_guc_upload(struct xe_guc *guc); 41 int xe_guc_min_load_for_hwconfig(struct xe_guc *guc); 42 int xe_guc_enable_communication(struct xe_guc *guc); 43 int xe_guc_opt_in_features_enable(struct xe_guc *guc); 44 void xe_guc_runtime_suspend(struct xe_guc *guc); 45 void xe_guc_runtime_resume(struct xe_guc *guc); 46 int xe_guc_suspend(struct xe_guc *guc); 47 int xe_guc_softreset(struct xe_guc *guc); 48 void xe_guc_notify(struct xe_guc *guc); 49 int xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr); 50 int xe_guc_mmio_send(struct xe_guc *guc, const u32 *request, u32 len); 51 int xe_guc_mmio_send_recv(struct xe_guc *guc, const u32 *request, u32 len, 52 u32 *response_buf); 53 int xe_guc_self_cfg32(struct xe_guc *guc, u16 key, u32 val); 54 int xe_guc_self_cfg64(struct xe_guc *guc, u16 key, u64 val); 55 void xe_guc_irq_handler(struct xe_guc *guc, const u16 iir); 56 void xe_guc_sanitize(struct xe_guc *guc); 57 int xe_guc_print_info(struct xe_guc *guc, struct drm_printer *p); 58 int xe_guc_reset_prepare(struct xe_guc *guc); 59 void xe_guc_reset_wait(struct xe_guc *guc); 60 void xe_guc_stop_prepare(struct xe_guc *guc); 61 void xe_guc_stop(struct xe_guc *guc); 62 int xe_guc_start(struct xe_guc *guc); 63 void xe_guc_declare_wedged(struct xe_guc *guc); 64 bool xe_guc_using_main_gamctrl_queues(struct xe_guc *guc); 65 bool xe_guc_has_paging_engine(struct xe_guc *guc); 66 67 #if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST) 68 int xe_guc_g2g_test_notification(struct xe_guc *guc, u32 *payload, u32 len); 69 #endif 70 71 u16 xe_hwe_to_guc_class(struct xe_hw_engine *hwe); 72 u16 xe_hwe_guc_logical_instance(struct xe_hw_engine *hwe); 73 74 static inline struct xe_gt *guc_to_gt(struct xe_guc *guc) 75 { 76 return container_of(guc, struct xe_gt, uc.guc); 77 } 78 79 static inline struct xe_device *guc_to_xe(struct xe_guc *guc) 80 { 81 return gt_to_xe(guc_to_gt(guc)); 82 } 83 84 static inline struct drm_device *guc_to_drm(struct xe_guc *guc) 85 { 86 return &guc_to_xe(guc)->drm; 87 } 88 89 /** 90 * xe_guc_fw_version_at_least() - Check if GuC is at least of given version. 91 * @guc: the &xe_guc 92 * @ver: the version to check 93 * 94 * The @ver should be prepared using MAKE_GUC_VER(major, minor, patch). 95 * 96 * Return: true if loaded GuC firmware is at least of given version, 97 * false otherwise. 98 */ 99 static inline bool xe_guc_fw_version_at_least(const struct xe_guc *guc, u32 ver) 100 { 101 return GUC_FIRMWARE_VER(guc) >= ver; 102 } 103 104 #endif 105