1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <linux/debugfs.h> 29 #include <linux/firmware.h> 30 31 #include <drm/display/drm_dp_helper.h> 32 #include <drm/display/drm_dsc_helper.h> 33 #include <drm/drm_edid.h> 34 #include <drm/drm_fixed.h> 35 #include <drm/drm_print.h> 36 37 #include "intel_display.h" 38 #include "intel_display_core.h" 39 #include "intel_display_rpm.h" 40 #include "intel_display_types.h" 41 #include "intel_display_utils.h" 42 #include "intel_gmbus.h" 43 #include "intel_rom.h" 44 45 #define _INTEL_BIOS_PRIVATE 46 #include "intel_vbt_defs.h" 47 48 /** 49 * DOC: Video BIOS Table (VBT) 50 * 51 * The Video BIOS Table, or VBT, provides platform and board specific 52 * configuration information to the driver that is not discoverable or available 53 * through other means. The configuration is mostly related to display 54 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 55 * the PCI ROM. 56 * 57 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 58 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 59 * contain the actual configuration information. The VBT Header, and thus the 60 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 61 * BDB Header. The data blocks are concatenated after the BDB Header. The data 62 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 63 * data. (Block 53, the MIPI Sequence Block is an exception.) 64 * 65 * The driver parses the VBT during load. The relevant information is stored in 66 * driver private data for ease of use, and the actual VBT is not read after 67 * that. 68 */ 69 70 /* Wrapper for VBT child device config */ 71 struct intel_bios_encoder_data { 72 struct intel_display *display; 73 74 struct child_device_config child; 75 struct dsc_compression_parameters_entry *dsc; 76 struct list_head node; 77 }; 78 79 #define TARGET_ADDR1 0x70 80 #define TARGET_ADDR2 0x72 81 82 /* Get BDB block size given a pointer to Block ID. */ 83 static u32 _get_blocksize(const u8 *block_base) 84 { 85 /* The MIPI Sequence Block v3+ has a separate size field. */ 86 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 87 return *((const u32 *)(block_base + 4)); 88 else 89 return *((const u16 *)(block_base + 1)); 90 } 91 92 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 93 static u32 get_blocksize(const void *block_data) 94 { 95 return _get_blocksize(block_data - 3); 96 } 97 98 static const void * 99 find_raw_section(const void *_bdb, enum bdb_block_id section_id) 100 { 101 const struct bdb_header *bdb = _bdb; 102 const u8 *base = _bdb; 103 int index = 0; 104 u32 total, current_size; 105 enum bdb_block_id current_id; 106 107 /* skip to first section */ 108 index += bdb->header_size; 109 total = bdb->bdb_size; 110 111 /* walk the sections looking for section_id */ 112 while (index + 3 < total) { 113 current_id = *(base + index); 114 current_size = _get_blocksize(base + index); 115 index += 3; 116 117 if (index + current_size > total) 118 return NULL; 119 120 if (current_id == section_id) 121 return base + index; 122 123 index += current_size; 124 } 125 126 return NULL; 127 } 128 129 /* 130 * Offset from the start of BDB to the start of the 131 * block data (just past the block header). 132 */ 133 static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id) 134 { 135 const void *block; 136 137 block = find_raw_section(bdb, section_id); 138 if (!block) 139 return 0; 140 141 return block - bdb; 142 } 143 144 struct bdb_block_entry { 145 struct list_head node; 146 enum bdb_block_id section_id; 147 u8 data[]; 148 }; 149 150 static const void * 151 bdb_find_section(struct intel_display *display, 152 enum bdb_block_id section_id) 153 { 154 struct bdb_block_entry *entry; 155 156 list_for_each_entry(entry, &display->vbt.bdb_blocks, node) { 157 if (entry->section_id == section_id) 158 return entry->data + 3; 159 } 160 161 return NULL; 162 } 163 164 static const struct { 165 enum bdb_block_id section_id; 166 size_t min_size; 167 } bdb_blocks[] = { 168 { .section_id = BDB_GENERAL_FEATURES, 169 .min_size = sizeof(struct bdb_general_features), }, 170 { .section_id = BDB_GENERAL_DEFINITIONS, 171 .min_size = sizeof(struct bdb_general_definitions), }, 172 { .section_id = BDB_PSR, 173 .min_size = sizeof(struct bdb_psr), }, 174 { .section_id = BDB_DRIVER_FEATURES, 175 .min_size = sizeof(struct bdb_driver_features), }, 176 { .section_id = BDB_SDVO_LVDS_OPTIONS, 177 .min_size = sizeof(struct bdb_sdvo_lvds_options), }, 178 { .section_id = BDB_SDVO_LVDS_DTD, 179 .min_size = sizeof(struct bdb_sdvo_lvds_dtd), }, 180 { .section_id = BDB_EDP, 181 .min_size = sizeof(struct bdb_edp), }, 182 { .section_id = BDB_LFP_OPTIONS, 183 .min_size = sizeof(struct bdb_lfp_options), }, 184 /* 185 * BDB_LFP_DATA depends on BDB_LFP_DATA_PTRS, 186 * so keep the two ordered. 187 */ 188 { .section_id = BDB_LFP_DATA_PTRS, 189 .min_size = sizeof(struct bdb_lfp_data_ptrs), }, 190 { .section_id = BDB_LFP_DATA, 191 .min_size = 0, /* special case */ }, 192 { .section_id = BDB_LFP_BACKLIGHT, 193 .min_size = sizeof(struct bdb_lfp_backlight), }, 194 { .section_id = BDB_LFP_POWER, 195 .min_size = sizeof(struct bdb_lfp_power), }, 196 { .section_id = BDB_MIPI_CONFIG, 197 .min_size = sizeof(struct bdb_mipi_config), }, 198 { .section_id = BDB_MIPI_SEQUENCE, 199 .min_size = sizeof(struct bdb_mipi_sequence) }, 200 { .section_id = BDB_COMPRESSION_PARAMETERS, 201 .min_size = sizeof(struct bdb_compression_parameters), }, 202 { .section_id = BDB_GENERIC_DTD, 203 .min_size = sizeof(struct bdb_generic_dtd), }, 204 }; 205 206 static size_t lfp_data_min_size(struct intel_display *display) 207 { 208 const struct bdb_lfp_data_ptrs *ptrs; 209 size_t size; 210 211 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS); 212 if (!ptrs) 213 return 0; 214 215 size = sizeof(struct bdb_lfp_data); 216 if (ptrs->panel_name.table_size) 217 size = max(size, ptrs->panel_name.offset + 218 sizeof(struct bdb_lfp_data_tail)); 219 220 return size; 221 } 222 223 static bool validate_lfp_data_ptrs(const void *bdb, 224 const struct bdb_lfp_data_ptrs *ptrs) 225 { 226 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size; 227 int data_block_size, lfp_data_size; 228 const void *data_block; 229 int i; 230 231 data_block = find_raw_section(bdb, BDB_LFP_DATA); 232 if (!data_block) 233 return false; 234 235 data_block_size = get_blocksize(data_block); 236 if (data_block_size == 0) 237 return false; 238 239 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */ 240 if (ptrs->num_entries != 3) 241 return false; 242 243 fp_timing_size = ptrs->ptr[0].fp_timing.table_size; 244 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size; 245 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size; 246 panel_name_size = ptrs->panel_name.table_size; 247 248 /* fp_timing has variable size */ 249 if (fp_timing_size < 32 || 250 dvo_timing_size != sizeof(struct bdb_edid_dtd) || 251 panel_pnp_id_size != sizeof(struct bdb_edid_pnp_id)) 252 return false; 253 254 /* panel_name is not present in old VBTs */ 255 if (panel_name_size != 0 && 256 panel_name_size != sizeof(struct bdb_edid_product_name)) 257 return false; 258 259 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset; 260 if (16 * lfp_data_size > data_block_size) 261 return false; 262 263 /* make sure the table entries have uniform size */ 264 for (i = 1; i < 16; i++) { 265 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size || 266 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size || 267 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size) 268 return false; 269 270 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size || 271 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size || 272 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size) 273 return false; 274 } 275 276 /* 277 * Except for vlv/chv machines all real VBTs seem to have 6 278 * unaccounted bytes in the fp_timing table. And it doesn't 279 * appear to be a really intentional hole as the fp_timing 280 * 0xffff terminator is always within those 6 missing bytes. 281 */ 282 if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size) 283 fp_timing_size += 6; 284 285 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size) 286 return false; 287 288 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset || 289 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset || 290 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size) 291 return false; 292 293 /* make sure the tables fit inside the data block */ 294 for (i = 0; i < 16; i++) { 295 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size || 296 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size || 297 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size) 298 return false; 299 } 300 301 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size) 302 return false; 303 304 /* make sure fp_timing terminators are present at expected locations */ 305 for (i = 0; i < 16; i++) { 306 const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset + 307 fp_timing_size - 2; 308 309 if (*t != 0xffff) 310 return false; 311 } 312 313 return true; 314 } 315 316 /* make the data table offsets relative to the data block */ 317 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block) 318 { 319 struct bdb_lfp_data_ptrs *ptrs = ptrs_block; 320 u32 offset; 321 int i; 322 323 offset = raw_block_offset(bdb, BDB_LFP_DATA); 324 325 for (i = 0; i < 16; i++) { 326 if (ptrs->ptr[i].fp_timing.offset < offset || 327 ptrs->ptr[i].dvo_timing.offset < offset || 328 ptrs->ptr[i].panel_pnp_id.offset < offset) 329 return false; 330 331 ptrs->ptr[i].fp_timing.offset -= offset; 332 ptrs->ptr[i].dvo_timing.offset -= offset; 333 ptrs->ptr[i].panel_pnp_id.offset -= offset; 334 } 335 336 if (ptrs->panel_name.table_size) { 337 if (ptrs->panel_name.offset < offset) 338 return false; 339 340 ptrs->panel_name.offset -= offset; 341 } 342 343 return validate_lfp_data_ptrs(bdb, ptrs); 344 } 345 346 static int make_lfp_data_ptr(struct lfp_data_ptr_table *table, 347 int table_size, int total_size) 348 { 349 if (total_size < table_size) 350 return total_size; 351 352 table->table_size = table_size; 353 table->offset = total_size - table_size; 354 355 return total_size - table_size; 356 } 357 358 static void next_lfp_data_ptr(struct lfp_data_ptr_table *next, 359 const struct lfp_data_ptr_table *prev, 360 int size) 361 { 362 next->table_size = prev->table_size; 363 next->offset = prev->offset + size; 364 } 365 366 static void *generate_lfp_data_ptrs(struct intel_display *display, 367 const void *bdb) 368 { 369 int i, size, table_size, block_size, offset, fp_timing_size; 370 struct bdb_lfp_data_ptrs *ptrs; 371 const void *block; 372 void *ptrs_block; 373 374 /* 375 * The hardcoded fp_timing_size is only valid for 376 * modernish VBTs. All older VBTs definitely should 377 * include block 41 and thus we don't need to 378 * generate one. 379 */ 380 if (display->vbt.version < 155) 381 return NULL; 382 383 fp_timing_size = 38; 384 385 block = find_raw_section(bdb, BDB_LFP_DATA); 386 if (!block) 387 return NULL; 388 389 drm_dbg_kms(display->drm, "Generating LFP data table pointers\n"); 390 391 block_size = get_blocksize(block); 392 393 size = fp_timing_size + sizeof(struct bdb_edid_dtd) + 394 sizeof(struct bdb_edid_pnp_id); 395 if (size * 16 > block_size) 396 return NULL; 397 398 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL); 399 if (!ptrs_block) 400 return NULL; 401 402 *(u8 *)(ptrs_block + 0) = BDB_LFP_DATA_PTRS; 403 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs); 404 ptrs = ptrs_block + 3; 405 406 table_size = sizeof(struct bdb_edid_pnp_id); 407 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size); 408 409 table_size = sizeof(struct bdb_edid_dtd); 410 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size); 411 412 table_size = fp_timing_size; 413 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size); 414 415 if (ptrs->ptr[0].fp_timing.table_size) 416 ptrs->num_entries++; 417 if (ptrs->ptr[0].dvo_timing.table_size) 418 ptrs->num_entries++; 419 if (ptrs->ptr[0].panel_pnp_id.table_size) 420 ptrs->num_entries++; 421 422 if (size != 0 || ptrs->num_entries != 3) { 423 kfree(ptrs_block); 424 return NULL; 425 } 426 427 size = fp_timing_size + sizeof(struct bdb_edid_dtd) + 428 sizeof(struct bdb_edid_pnp_id); 429 for (i = 1; i < 16; i++) { 430 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size); 431 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size); 432 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size); 433 } 434 435 table_size = sizeof(struct bdb_edid_product_name); 436 437 if (16 * (size + table_size) <= block_size) { 438 ptrs->panel_name.table_size = table_size; 439 ptrs->panel_name.offset = size * 16; 440 } 441 442 offset = block - bdb; 443 444 for (i = 0; i < 16; i++) { 445 ptrs->ptr[i].fp_timing.offset += offset; 446 ptrs->ptr[i].dvo_timing.offset += offset; 447 ptrs->ptr[i].panel_pnp_id.offset += offset; 448 } 449 450 if (ptrs->panel_name.table_size) 451 ptrs->panel_name.offset += offset; 452 453 return ptrs_block; 454 } 455 456 static void 457 init_bdb_block(struct intel_display *display, 458 const void *bdb, enum bdb_block_id section_id, 459 size_t min_size) 460 { 461 struct bdb_block_entry *entry; 462 void *temp_block = NULL; 463 const void *block; 464 size_t block_size; 465 466 block = find_raw_section(bdb, section_id); 467 468 /* Modern VBTs lack the LFP data table pointers block, make one up */ 469 if (!block && section_id == BDB_LFP_DATA_PTRS) { 470 temp_block = generate_lfp_data_ptrs(display, bdb); 471 if (temp_block) 472 block = temp_block + 3; 473 } 474 if (!block) 475 return; 476 477 drm_WARN(display->drm, min_size == 0, 478 "Block %d min_size is zero\n", section_id); 479 480 block_size = get_blocksize(block); 481 482 /* 483 * Version number and new block size are considered 484 * part of the header for MIPI sequenece block v3+. 485 */ 486 if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3) 487 block_size += 5; 488 489 entry = kzalloc_flex(*entry, data, max(min_size, block_size) + 3, 490 GFP_KERNEL); 491 if (!entry) { 492 kfree(temp_block); 493 return; 494 } 495 496 entry->section_id = section_id; 497 memcpy(entry->data, block - 3, block_size + 3); 498 499 kfree(temp_block); 500 501 drm_dbg_kms(display->drm, 502 "Found BDB block %d (size %zu, min size %zu)\n", 503 section_id, block_size, min_size); 504 505 if (section_id == BDB_LFP_DATA_PTRS && 506 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) { 507 drm_err(display->drm, 508 "VBT has malformed LFP data table pointers\n"); 509 kfree(entry); 510 return; 511 } 512 513 list_add_tail(&entry->node, &display->vbt.bdb_blocks); 514 } 515 516 static void init_bdb_blocks(struct intel_display *display, 517 const void *bdb) 518 { 519 int i; 520 521 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) { 522 enum bdb_block_id section_id = bdb_blocks[i].section_id; 523 size_t min_size = bdb_blocks[i].min_size; 524 525 if (section_id == BDB_LFP_DATA) 526 min_size = lfp_data_min_size(display); 527 528 init_bdb_block(display, bdb, section_id, min_size); 529 } 530 } 531 532 static void 533 fill_detail_timing_data(struct intel_display *display, 534 struct drm_display_mode *panel_fixed_mode, 535 const struct bdb_edid_dtd *dvo_timing) 536 { 537 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 538 dvo_timing->hactive_lo; 539 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 540 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 541 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 542 ((dvo_timing->hsync_pulse_width_hi << 8) | 543 dvo_timing->hsync_pulse_width_lo); 544 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 545 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 546 547 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 548 dvo_timing->vactive_lo; 549 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 550 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 551 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 552 ((dvo_timing->vsync_pulse_width_hi << 4) | 553 dvo_timing->vsync_pulse_width_lo); 554 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 555 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 556 panel_fixed_mode->clock = dvo_timing->clock * 10; 557 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 558 559 if (dvo_timing->hsync_positive) 560 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 561 else 562 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 563 564 if (dvo_timing->vsync_positive) 565 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 566 else 567 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 568 569 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 570 dvo_timing->himage_lo; 571 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 572 dvo_timing->vimage_lo; 573 574 /* Some VBTs have bogus h/vsync_end values */ 575 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) { 576 drm_dbg_kms(display->drm, "reducing hsync_end %d->%d\n", 577 panel_fixed_mode->hsync_end, panel_fixed_mode->htotal); 578 panel_fixed_mode->hsync_end = panel_fixed_mode->htotal; 579 } 580 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) { 581 drm_dbg_kms(display->drm, "reducing vsync_end %d->%d\n", 582 panel_fixed_mode->vsync_end, panel_fixed_mode->vtotal); 583 panel_fixed_mode->vsync_end = panel_fixed_mode->vtotal; 584 } 585 586 drm_mode_set_name(panel_fixed_mode); 587 } 588 589 static const struct bdb_edid_dtd * 590 get_lfp_dvo_timing(const struct bdb_lfp_data *data, 591 const struct bdb_lfp_data_ptrs *ptrs, 592 int index) 593 { 594 return (const void *)data + ptrs->ptr[index].dvo_timing.offset; 595 } 596 597 static const struct fp_timing * 598 get_lfp_fp_timing(const struct bdb_lfp_data *data, 599 const struct bdb_lfp_data_ptrs *ptrs, 600 int index) 601 { 602 return (const void *)data + ptrs->ptr[index].fp_timing.offset; 603 } 604 605 static const struct drm_edid_product_id * 606 get_lfp_pnp_id(const struct bdb_lfp_data *data, 607 const struct bdb_lfp_data_ptrs *ptrs, 608 int index) 609 { 610 /* These two are supposed to have the same layout in memory. */ 611 BUILD_BUG_ON(sizeof(struct bdb_edid_pnp_id) != sizeof(struct drm_edid_product_id)); 612 613 return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset; 614 } 615 616 static const struct bdb_lfp_data_tail * 617 get_lfp_data_tail(const struct bdb_lfp_data *data, 618 const struct bdb_lfp_data_ptrs *ptrs) 619 { 620 if (ptrs->panel_name.table_size) 621 return (const void *)data + ptrs->panel_name.offset; 622 else 623 return NULL; 624 } 625 626 static int opregion_get_panel_type(struct intel_display *display, 627 const struct intel_bios_encoder_data *devdata, 628 const struct drm_edid *drm_edid, bool use_fallback) 629 { 630 return intel_opregion_get_panel_type(display); 631 } 632 633 static int vbt_get_panel_type(struct intel_display *display, 634 const struct intel_bios_encoder_data *devdata, 635 const struct drm_edid *drm_edid, bool use_fallback) 636 { 637 const struct bdb_lfp_options *lfp_options; 638 639 lfp_options = bdb_find_section(display, BDB_LFP_OPTIONS); 640 if (!lfp_options) 641 return -1; 642 643 if (lfp_options->panel_type > 0xf && 644 lfp_options->panel_type != 0xff) { 645 drm_dbg_kms(display->drm, "Invalid VBT panel type 0x%x\n", 646 lfp_options->panel_type); 647 return -1; 648 } 649 650 if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2) 651 return lfp_options->panel_type2; 652 653 drm_WARN_ON(display->drm, 654 devdata && devdata->child.handle != DEVICE_HANDLE_LFP1); 655 656 return lfp_options->panel_type; 657 } 658 659 static int pnpid_get_panel_type(struct intel_display *display, 660 const struct intel_bios_encoder_data *devdata, 661 const struct drm_edid *drm_edid, bool use_fallback) 662 { 663 const struct bdb_lfp_data *data; 664 const struct bdb_lfp_data_ptrs *ptrs; 665 struct drm_edid_product_id product_id, product_id_nodate; 666 struct drm_printer p; 667 int i, best = -1; 668 669 if (!drm_edid) 670 return -1; 671 672 drm_edid_get_product_id(drm_edid, &product_id); 673 674 product_id_nodate = product_id; 675 product_id_nodate.week_of_manufacture = 0; 676 product_id_nodate.year_of_manufacture = 0; 677 678 p = drm_dbg_printer(display->drm, DRM_UT_KMS, "EDID"); 679 drm_edid_print_product_id(&p, &product_id, true); 680 681 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS); 682 if (!ptrs) 683 return -1; 684 685 data = bdb_find_section(display, BDB_LFP_DATA); 686 if (!data) 687 return -1; 688 689 for (i = 0; i < 16; i++) { 690 const struct drm_edid_product_id *vbt_id = 691 get_lfp_pnp_id(data, ptrs, i); 692 693 /* full match? */ 694 if (!memcmp(vbt_id, &product_id, sizeof(*vbt_id))) 695 return i; 696 697 /* 698 * Accept a match w/o date if no full match is found, 699 * and the VBT entry does not specify a date. 700 */ 701 if (best < 0 && 702 !memcmp(vbt_id, &product_id_nodate, sizeof(*vbt_id))) 703 best = i; 704 } 705 706 return best; 707 } 708 709 static int fallback_get_panel_type(struct intel_display *display, 710 const struct intel_bios_encoder_data *devdata, 711 const struct drm_edid *drm_edid, bool use_fallback) 712 { 713 return use_fallback ? 0 : -1; 714 } 715 716 enum panel_type { 717 PANEL_TYPE_OPREGION, 718 PANEL_TYPE_VBT, 719 PANEL_TYPE_PNPID, 720 PANEL_TYPE_FALLBACK, 721 }; 722 723 static int get_panel_type(struct intel_display *display, 724 const struct intel_bios_encoder_data *devdata, 725 const struct drm_edid *drm_edid, bool use_fallback) 726 { 727 struct { 728 const char *name; 729 int (*get_panel_type)(struct intel_display *display, 730 const struct intel_bios_encoder_data *devdata, 731 const struct drm_edid *drm_edid, bool use_fallback); 732 int panel_type; 733 } panel_types[] = { 734 [PANEL_TYPE_OPREGION] = { 735 .name = "OpRegion", 736 .get_panel_type = opregion_get_panel_type, 737 }, 738 [PANEL_TYPE_VBT] = { 739 .name = "VBT", 740 .get_panel_type = vbt_get_panel_type, 741 }, 742 [PANEL_TYPE_PNPID] = { 743 .name = "PNPID", 744 .get_panel_type = pnpid_get_panel_type, 745 }, 746 [PANEL_TYPE_FALLBACK] = { 747 .name = "fallback", 748 .get_panel_type = fallback_get_panel_type, 749 }, 750 }; 751 int i; 752 753 for (i = 0; i < ARRAY_SIZE(panel_types); i++) { 754 panel_types[i].panel_type = panel_types[i].get_panel_type(display, devdata, 755 drm_edid, use_fallback); 756 757 drm_WARN_ON(display->drm, panel_types[i].panel_type > 0xf && 758 panel_types[i].panel_type != 0xff); 759 760 if (panel_types[i].panel_type >= 0) 761 drm_dbg_kms(display->drm, "Panel type (%s): %d\n", 762 panel_types[i].name, panel_types[i].panel_type); 763 } 764 765 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0) 766 i = PANEL_TYPE_OPREGION; 767 else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff && 768 panel_types[PANEL_TYPE_PNPID].panel_type >= 0) 769 i = PANEL_TYPE_PNPID; 770 else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff && 771 panel_types[PANEL_TYPE_VBT].panel_type >= 0) 772 i = PANEL_TYPE_VBT; 773 else 774 i = PANEL_TYPE_FALLBACK; 775 776 drm_dbg_kms(display->drm, "Selected panel type (%s): %d\n", 777 panel_types[i].name, panel_types[i].panel_type); 778 779 return panel_types[i].panel_type; 780 } 781 782 static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits) 783 { 784 return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1); 785 } 786 787 static bool panel_bool(unsigned int value, int panel_type) 788 { 789 return panel_bits(value, panel_type, 1); 790 } 791 792 /* Parse general panel options */ 793 static void 794 parse_panel_options(struct intel_display *display, 795 struct intel_panel *panel) 796 { 797 const struct bdb_lfp_options *lfp_options; 798 int panel_type = panel->vbt.panel_type; 799 int drrs_mode; 800 801 lfp_options = bdb_find_section(display, BDB_LFP_OPTIONS); 802 if (!lfp_options) 803 return; 804 805 panel->vbt.lvds_dither = lfp_options->pixel_dither; 806 807 /* 808 * Empirical evidence indicates the block size can be 809 * either 4,14,16,24+ bytes. For older VBTs no clear 810 * relationship between the block size vs. BDB version. 811 */ 812 if (get_blocksize(lfp_options) < 16) 813 return; 814 815 drrs_mode = panel_bits(lfp_options->dps_panel_type_bits, 816 panel_type, 2); 817 /* 818 * VBT has static DRRS = 0 and seamless DRRS = 2. 819 * The below piece of code is required to adjust vbt.drrs_type 820 * to match the enum drrs_support_type. 821 */ 822 switch (drrs_mode) { 823 case 0: 824 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 825 drm_dbg_kms(display->drm, "DRRS supported mode is static\n"); 826 break; 827 case 2: 828 panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS; 829 drm_dbg_kms(display->drm, 830 "DRRS supported mode is seamless\n"); 831 break; 832 default: 833 panel->vbt.drrs_type = DRRS_TYPE_NONE; 834 drm_dbg_kms(display->drm, 835 "DRRS not supported (VBT input)\n"); 836 break; 837 } 838 } 839 840 static void 841 parse_lfp_panel_dtd(struct intel_display *display, 842 struct intel_panel *panel, 843 const struct bdb_lfp_data *lfp_data, 844 const struct bdb_lfp_data_ptrs *lfp_data_ptrs) 845 { 846 const struct bdb_edid_dtd *panel_dvo_timing; 847 const struct fp_timing *fp_timing; 848 struct drm_display_mode *panel_fixed_mode; 849 int panel_type = panel->vbt.panel_type; 850 851 panel_dvo_timing = get_lfp_dvo_timing(lfp_data, 852 lfp_data_ptrs, 853 panel_type); 854 855 panel_fixed_mode = kzalloc_obj(*panel_fixed_mode); 856 if (!panel_fixed_mode) 857 return; 858 859 fill_detail_timing_data(display, panel_fixed_mode, panel_dvo_timing); 860 861 panel->vbt.lfp_vbt_mode = panel_fixed_mode; 862 863 drm_dbg_kms(display->drm, 864 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n", 865 DRM_MODE_ARG(panel_fixed_mode)); 866 867 fp_timing = get_lfp_fp_timing(lfp_data, 868 lfp_data_ptrs, 869 panel_type); 870 871 /* check the resolution, just to be sure */ 872 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 873 fp_timing->y_res == panel_fixed_mode->vdisplay) { 874 panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 875 drm_dbg_kms(display->drm, 876 "VBT initial LVDS value %x\n", 877 panel->vbt.bios_lvds_val); 878 } 879 } 880 881 static void 882 parse_lfp_data(struct intel_display *display, 883 struct intel_panel *panel) 884 { 885 const struct bdb_lfp_data *data; 886 const struct bdb_lfp_data_tail *tail; 887 const struct bdb_lfp_data_ptrs *ptrs; 888 const struct drm_edid_product_id *pnp_id; 889 struct drm_printer p; 890 int panel_type = panel->vbt.panel_type; 891 892 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS); 893 if (!ptrs) 894 return; 895 896 data = bdb_find_section(display, BDB_LFP_DATA); 897 if (!data) 898 return; 899 900 if (!panel->vbt.lfp_vbt_mode) 901 parse_lfp_panel_dtd(display, panel, data, ptrs); 902 903 pnp_id = get_lfp_pnp_id(data, ptrs, panel_type); 904 905 p = drm_dbg_printer(display->drm, DRM_UT_KMS, "Panel"); 906 drm_edid_print_product_id(&p, pnp_id, false); 907 908 tail = get_lfp_data_tail(data, ptrs); 909 if (!tail) 910 return; 911 912 drm_dbg_kms(display->drm, "Panel name: %.*s\n", 913 (int)sizeof(tail->panel_name[0].name), 914 tail->panel_name[panel_type].name); 915 916 if (display->vbt.version >= 188) { 917 panel->vbt.seamless_drrs_min_refresh_rate = 918 tail->seamless_drrs_min_refresh_rate[panel_type]; 919 drm_dbg_kms(display->drm, 920 "Seamless DRRS min refresh rate: %d Hz\n", 921 panel->vbt.seamless_drrs_min_refresh_rate); 922 } 923 } 924 925 static void 926 parse_generic_dtd(struct intel_display *display, 927 struct intel_panel *panel) 928 { 929 const struct bdb_generic_dtd *generic_dtd; 930 const struct generic_dtd_entry *dtd; 931 struct drm_display_mode *panel_fixed_mode; 932 int num_dtd; 933 934 /* 935 * Older VBTs provided DTD information for internal displays through 936 * the "LFP panel tables" block (42). As of VBT revision 229 the 937 * DTD information should be provided via a newer "generic DTD" 938 * block (58). Just to be safe, we'll try the new generic DTD block 939 * first on VBT >= 229, but still fall back to trying the old LFP 940 * block if that fails. 941 */ 942 if (display->vbt.version < 229) 943 return; 944 945 generic_dtd = bdb_find_section(display, BDB_GENERIC_DTD); 946 if (!generic_dtd) 947 return; 948 949 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 950 drm_err(display->drm, "GDTD size %u is too small.\n", 951 generic_dtd->gdtd_size); 952 return; 953 } else if (generic_dtd->gdtd_size != 954 sizeof(struct generic_dtd_entry)) { 955 drm_err(display->drm, "Unexpected GDTD size %u\n", 956 generic_dtd->gdtd_size); 957 /* DTD has unknown fields, but keep going */ 958 } 959 960 num_dtd = (get_blocksize(generic_dtd) - 961 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 962 if (panel->vbt.panel_type >= num_dtd) { 963 drm_err(display->drm, 964 "Panel type %d not found in table of %d DTD's\n", 965 panel->vbt.panel_type, num_dtd); 966 return; 967 } 968 969 dtd = &generic_dtd->dtd[panel->vbt.panel_type]; 970 971 panel_fixed_mode = kzalloc_obj(*panel_fixed_mode); 972 if (!panel_fixed_mode) 973 return; 974 975 panel_fixed_mode->hdisplay = dtd->hactive; 976 panel_fixed_mode->hsync_start = 977 panel_fixed_mode->hdisplay + dtd->hfront_porch; 978 panel_fixed_mode->hsync_end = 979 panel_fixed_mode->hsync_start + dtd->hsync; 980 panel_fixed_mode->htotal = 981 panel_fixed_mode->hdisplay + dtd->hblank; 982 983 panel_fixed_mode->vdisplay = dtd->vactive; 984 panel_fixed_mode->vsync_start = 985 panel_fixed_mode->vdisplay + dtd->vfront_porch; 986 panel_fixed_mode->vsync_end = 987 panel_fixed_mode->vsync_start + dtd->vsync; 988 panel_fixed_mode->vtotal = 989 panel_fixed_mode->vdisplay + dtd->vblank; 990 991 panel_fixed_mode->clock = dtd->pixel_clock; 992 panel_fixed_mode->width_mm = dtd->width_mm; 993 panel_fixed_mode->height_mm = dtd->height_mm; 994 995 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 996 drm_mode_set_name(panel_fixed_mode); 997 998 if (dtd->hsync_positive_polarity) 999 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 1000 else 1001 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 1002 1003 if (dtd->vsync_positive_polarity) 1004 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 1005 else 1006 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 1007 1008 drm_dbg_kms(display->drm, 1009 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n", 1010 DRM_MODE_ARG(panel_fixed_mode)); 1011 1012 panel->vbt.lfp_vbt_mode = panel_fixed_mode; 1013 } 1014 1015 static void 1016 parse_lfp_backlight(struct intel_display *display, 1017 struct intel_panel *panel) 1018 { 1019 const struct bdb_lfp_backlight *backlight_data; 1020 const struct lfp_backlight_data_entry *entry; 1021 int panel_type = panel->vbt.panel_type; 1022 u16 level; 1023 1024 backlight_data = bdb_find_section(display, BDB_LFP_BACKLIGHT); 1025 if (!backlight_data) 1026 return; 1027 1028 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 1029 drm_dbg_kms(display->drm, 1030 "Unsupported backlight data entry size %u\n", 1031 backlight_data->entry_size); 1032 return; 1033 } 1034 1035 entry = &backlight_data->data[panel_type]; 1036 1037 panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 1038 if (!panel->vbt.backlight.present) { 1039 drm_dbg_kms(display->drm, 1040 "PWM backlight not present in VBT (type %u)\n", 1041 entry->type); 1042 return; 1043 } 1044 1045 panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 1046 panel->vbt.backlight.controller = 0; 1047 if (display->vbt.version >= 191) { 1048 const struct lfp_backlight_control_method *method; 1049 1050 method = &backlight_data->backlight_control[panel_type]; 1051 panel->vbt.backlight.type = method->type; 1052 panel->vbt.backlight.controller = method->controller; 1053 } 1054 1055 panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 1056 panel->vbt.backlight.active_low_pwm = entry->active_low_pwm; 1057 1058 if (display->vbt.version >= 234) { 1059 u16 min_level; 1060 bool scale; 1061 1062 level = backlight_data->brightness_level[panel_type].level; 1063 min_level = backlight_data->brightness_min_level[panel_type].level; 1064 1065 if (display->vbt.version >= 236) 1066 scale = backlight_data->brightness_precision_bits[panel_type] == 16; 1067 else 1068 scale = level > 255; 1069 1070 if (scale) 1071 min_level = min_level / 255; 1072 1073 if (min_level > 255) { 1074 drm_warn(display->drm, "Brightness min level > 255\n"); 1075 level = 255; 1076 } 1077 panel->vbt.backlight.min_brightness = min_level; 1078 1079 panel->vbt.backlight.brightness_precision_bits = 1080 backlight_data->brightness_precision_bits[panel_type]; 1081 } else { 1082 level = backlight_data->level[panel_type]; 1083 panel->vbt.backlight.min_brightness = entry->min_brightness; 1084 } 1085 1086 if (display->vbt.version >= 239) 1087 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 1088 DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100); 1089 else 1090 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30; 1091 1092 drm_dbg_kms(display->drm, 1093 "VBT backlight PWM modulation frequency %u Hz, " 1094 "active %s, min brightness %u, level %u, controller %u\n", 1095 panel->vbt.backlight.pwm_freq_hz, 1096 panel->vbt.backlight.active_low_pwm ? "low" : "high", 1097 panel->vbt.backlight.min_brightness, 1098 level, 1099 panel->vbt.backlight.controller); 1100 } 1101 1102 static void 1103 parse_sdvo_lvds_data(struct intel_display *display, 1104 struct intel_panel *panel) 1105 { 1106 const struct bdb_sdvo_lvds_dtd *dtd; 1107 struct drm_display_mode *panel_fixed_mode; 1108 int index; 1109 1110 index = display->params.vbt_sdvo_panel_type; 1111 if (index == -2) { 1112 drm_dbg_kms(display->drm, 1113 "Ignore SDVO LVDS mode from BIOS VBT tables.\n"); 1114 return; 1115 } 1116 1117 if (index == -1) { 1118 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 1119 1120 sdvo_lvds_options = bdb_find_section(display, BDB_SDVO_LVDS_OPTIONS); 1121 if (!sdvo_lvds_options) 1122 return; 1123 1124 index = sdvo_lvds_options->panel_type; 1125 } 1126 1127 dtd = bdb_find_section(display, BDB_SDVO_LVDS_DTD); 1128 if (!dtd) 1129 return; 1130 1131 /* 1132 * This should not happen, as long as the panel_type 1133 * enumeration doesn't grow over 4 items. But if it does, it 1134 * could lead to hard-to-detect bugs, so better double-check 1135 * it here to be sure. 1136 */ 1137 if (index >= ARRAY_SIZE(dtd->dtd)) { 1138 drm_err(display->drm, 1139 "index %d is larger than dtd->dtd[4] array\n", 1140 index); 1141 return; 1142 } 1143 1144 panel_fixed_mode = kzalloc_obj(*panel_fixed_mode); 1145 if (!panel_fixed_mode) 1146 return; 1147 1148 fill_detail_timing_data(display, panel_fixed_mode, &dtd->dtd[index]); 1149 1150 panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 1151 1152 drm_dbg_kms(display->drm, 1153 "Found SDVO LVDS mode in BIOS VBT tables: " DRM_MODE_FMT "\n", 1154 DRM_MODE_ARG(panel_fixed_mode)); 1155 } 1156 1157 static int intel_bios_ssc_frequency(struct intel_display *display, 1158 bool alternate) 1159 { 1160 switch (DISPLAY_VER(display)) { 1161 case 2: 1162 return alternate ? 66667 : 48000; 1163 case 3: 1164 case 4: 1165 return alternate ? 100000 : 96000; 1166 default: 1167 return alternate ? 100000 : 120000; 1168 } 1169 } 1170 1171 static void 1172 parse_general_features(struct intel_display *display) 1173 { 1174 const struct bdb_general_features *general; 1175 1176 general = bdb_find_section(display, BDB_GENERAL_FEATURES); 1177 if (!general) 1178 return; 1179 1180 display->vbt.int_tv_support = general->int_tv_support; 1181 /* int_crt_support can't be trusted on earlier platforms */ 1182 if (display->vbt.version >= 155 && 1183 (HAS_DDI(display) || display->platform.valleyview)) 1184 display->vbt.int_crt_support = general->int_crt_support; 1185 display->vbt.lvds_use_ssc = general->enable_ssc; 1186 display->vbt.lvds_ssc_freq = 1187 intel_bios_ssc_frequency(display, general->ssc_freq); 1188 display->vbt.display_clock_mode = general->display_clock_mode; 1189 display->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 1190 if (display->vbt.version >= 181) { 1191 display->vbt.orientation = general->rotate_180 ? 1192 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 1193 DRM_MODE_PANEL_ORIENTATION_NORMAL; 1194 } else { 1195 display->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1196 } 1197 1198 if (display->vbt.version >= 249 && general->afc_startup_config) { 1199 display->vbt.override_afc_startup = true; 1200 display->vbt.override_afc_startup_val = general->afc_startup_config == 1 ? 0 : 7; 1201 } 1202 1203 drm_dbg_kms(display->drm, 1204 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 1205 display->vbt.int_tv_support, 1206 display->vbt.int_crt_support, 1207 display->vbt.lvds_use_ssc, 1208 display->vbt.lvds_ssc_freq, 1209 display->vbt.display_clock_mode, 1210 display->vbt.fdi_rx_polarity_inverted); 1211 } 1212 1213 static const struct child_device_config * 1214 child_device_ptr(const struct bdb_general_definitions *defs, int i) 1215 { 1216 return (const void *) &defs->devices[i * defs->child_dev_size]; 1217 } 1218 1219 static void 1220 parse_sdvo_device_mapping(struct intel_display *display) 1221 { 1222 const struct intel_bios_encoder_data *devdata; 1223 int count = 0; 1224 1225 /* 1226 * Only parse SDVO mappings on gens that could have SDVO. This isn't 1227 * accurate and doesn't have to be, as long as it's not too strict. 1228 */ 1229 if (!IS_DISPLAY_VER(display, 3, 7)) { 1230 drm_dbg_kms(display->drm, "Skipping SDVO device mapping\n"); 1231 return; 1232 } 1233 1234 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 1235 const struct child_device_config *child = &devdata->child; 1236 struct sdvo_device_mapping *mapping; 1237 1238 if (child->target_addr != TARGET_ADDR1 && 1239 child->target_addr != TARGET_ADDR2) { 1240 /* 1241 * If the target address is neither 0x70 nor 0x72, 1242 * it is not a SDVO device. Skip it. 1243 */ 1244 continue; 1245 } 1246 if (child->dvo_port != DEVICE_PORT_DVOB && 1247 child->dvo_port != DEVICE_PORT_DVOC) { 1248 /* skip the incorrect SDVO port */ 1249 drm_dbg_kms(display->drm, 1250 "Incorrect SDVO port. Skip it\n"); 1251 continue; 1252 } 1253 drm_dbg_kms(display->drm, 1254 "the SDVO device with target addr %2x is found on" 1255 " %s port\n", 1256 child->target_addr, 1257 (child->dvo_port == DEVICE_PORT_DVOB) ? 1258 "SDVOB" : "SDVOC"); 1259 mapping = &display->vbt.sdvo_mappings[child->dvo_port - 1]; 1260 if (!mapping->initialized) { 1261 mapping->dvo_port = child->dvo_port; 1262 mapping->target_addr = child->target_addr; 1263 mapping->dvo_wiring = child->dvo_wiring; 1264 mapping->ddc_pin = child->ddc_pin; 1265 mapping->i2c_pin = child->i2c_pin; 1266 mapping->initialized = 1; 1267 drm_dbg_kms(display->drm, 1268 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 1269 mapping->dvo_port, mapping->target_addr, 1270 mapping->dvo_wiring, mapping->ddc_pin, 1271 mapping->i2c_pin); 1272 } else { 1273 drm_dbg_kms(display->drm, 1274 "Maybe one SDVO port is shared by " 1275 "two SDVO device.\n"); 1276 } 1277 if (child->target2_addr) { 1278 /* Maybe this is a SDVO device with multiple inputs */ 1279 /* And the mapping info is not added */ 1280 drm_dbg_kms(display->drm, 1281 "there exists the target2_addr. Maybe this" 1282 " is a SDVO device with multiple inputs.\n"); 1283 } 1284 count++; 1285 } 1286 1287 if (!count) { 1288 /* No SDVO device info is found */ 1289 drm_dbg_kms(display->drm, 1290 "No SDVO device info is found in VBT\n"); 1291 } 1292 } 1293 1294 static void 1295 parse_driver_features(struct intel_display *display) 1296 { 1297 const struct bdb_driver_features *driver; 1298 1299 driver = bdb_find_section(display, BDB_DRIVER_FEATURES); 1300 if (!driver) 1301 return; 1302 1303 if (DISPLAY_VER(display) >= 5) { 1304 /* 1305 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 1306 * to mean "eDP". The VBT spec doesn't agree with that 1307 * interpretation, but real world VBTs seem to. 1308 */ 1309 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 1310 display->vbt.int_lvds_support = 0; 1311 } else { 1312 /* 1313 * FIXME it's not clear which BDB version has the LVDS config 1314 * bits defined. Revision history in the VBT spec says: 1315 * "0.92 | Add two definitions for VBT value of LVDS Active 1316 * Config (00b and 11b values defined) | 06/13/2005" 1317 * but does not the specify the BDB version. 1318 * 1319 * So far version 134 (on i945gm) is the oldest VBT observed 1320 * in the wild with the bits correctly populated. Version 1321 * 108 (on i85x) does not have the bits correctly populated. 1322 */ 1323 if (display->vbt.version >= 134 && 1324 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 1325 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 1326 display->vbt.int_lvds_support = 0; 1327 } 1328 } 1329 1330 static void 1331 parse_panel_driver_features(struct intel_display *display, 1332 struct intel_panel *panel) 1333 { 1334 const struct bdb_driver_features *driver; 1335 1336 driver = bdb_find_section(display, BDB_DRIVER_FEATURES); 1337 if (!driver) 1338 return; 1339 1340 if (display->vbt.version < 228) { 1341 drm_dbg_kms(display->drm, "DRRS State Enabled:%d\n", 1342 driver->drrs_enabled); 1343 /* 1344 * If DRRS is not supported, drrs_type has to be set to 0. 1345 * This is because, VBT is configured in such a way that 1346 * static DRRS is 0 and DRRS not supported is represented by 1347 * driver->drrs_enabled=false 1348 */ 1349 if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) { 1350 /* 1351 * FIXME Should DMRRS perhaps be treated as seamless 1352 * but without the automatic downclocking? 1353 */ 1354 if (driver->dmrrs_enabled) 1355 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 1356 else 1357 panel->vbt.drrs_type = DRRS_TYPE_NONE; 1358 } 1359 1360 panel->vbt.psr.enable = driver->psr_enabled; 1361 } 1362 } 1363 1364 static void 1365 parse_power_conservation_features(struct intel_display *display, 1366 struct intel_panel *panel) 1367 { 1368 const struct bdb_lfp_power *power; 1369 u8 panel_type = panel->vbt.panel_type; 1370 1371 panel->vbt.vrr = true; /* matches Windows behaviour */ 1372 1373 if (display->vbt.version < 228) 1374 return; 1375 1376 power = bdb_find_section(display, BDB_LFP_POWER); 1377 if (!power) 1378 return; 1379 1380 panel->vbt.psr.enable = panel_bool(power->psr, panel_type); 1381 1382 /* 1383 * If DRRS is not supported, drrs_type has to be set to 0. 1384 * This is because, VBT is configured in such a way that 1385 * static DRRS is 0 and DRRS not supported is represented by 1386 * power->drrs & BIT(panel_type)=false 1387 */ 1388 if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) { 1389 /* 1390 * FIXME Should DMRRS perhaps be treated as seamless 1391 * but without the automatic downclocking? 1392 */ 1393 if (panel_bool(power->dmrrs, panel_type)) 1394 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 1395 else 1396 panel->vbt.drrs_type = DRRS_TYPE_NONE; 1397 } 1398 1399 if (display->vbt.version >= 232) 1400 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type); 1401 1402 if (display->vbt.version >= 233) 1403 panel->vbt.vrr = panel_bool(power->vrr_feature_enabled, 1404 panel_type); 1405 } 1406 1407 static void vbt_edp_to_pps_delays(struct intel_pps_delays *pps, 1408 const struct edp_power_seq *edp_pps) 1409 { 1410 pps->power_up = edp_pps->t1_t3; 1411 pps->backlight_on = edp_pps->t8; 1412 pps->backlight_off = edp_pps->t9; 1413 pps->power_down = edp_pps->t10; 1414 pps->power_cycle = edp_pps->t11_t12; 1415 } 1416 1417 static void 1418 parse_edp(struct intel_display *display, 1419 struct intel_panel *panel) 1420 { 1421 const struct bdb_edp *edp; 1422 const struct edp_fast_link_params *edp_link_params; 1423 int panel_type = panel->vbt.panel_type; 1424 1425 edp = bdb_find_section(display, BDB_EDP); 1426 if (!edp) 1427 return; 1428 1429 switch (panel_bits(edp->color_depth, panel_type, 2)) { 1430 case EDP_18BPP: 1431 panel->vbt.edp.bpp = 18; 1432 break; 1433 case EDP_24BPP: 1434 panel->vbt.edp.bpp = 24; 1435 break; 1436 case EDP_30BPP: 1437 panel->vbt.edp.bpp = 30; 1438 break; 1439 } 1440 1441 /* Get the eDP sequencing and link info */ 1442 edp_link_params = &edp->fast_link_params[panel_type]; 1443 1444 vbt_edp_to_pps_delays(&panel->vbt.edp.pps, 1445 &edp->power_seqs[panel_type]); 1446 1447 if (display->vbt.version >= 224) { 1448 panel->vbt.edp.rate = 1449 edp->edp_fast_link_training_rate[panel_type] * 20; 1450 } else { 1451 switch (edp_link_params->rate) { 1452 case EDP_RATE_1_62: 1453 panel->vbt.edp.rate = 162000; 1454 break; 1455 case EDP_RATE_2_7: 1456 panel->vbt.edp.rate = 270000; 1457 break; 1458 case EDP_RATE_5_4: 1459 panel->vbt.edp.rate = 540000; 1460 break; 1461 default: 1462 drm_dbg_kms(display->drm, 1463 "VBT has unknown eDP link rate value %u\n", 1464 edp_link_params->rate); 1465 break; 1466 } 1467 } 1468 1469 switch (edp_link_params->lanes) { 1470 case EDP_LANE_1: 1471 panel->vbt.edp.lanes = 1; 1472 break; 1473 case EDP_LANE_2: 1474 panel->vbt.edp.lanes = 2; 1475 break; 1476 case EDP_LANE_4: 1477 panel->vbt.edp.lanes = 4; 1478 break; 1479 default: 1480 drm_dbg_kms(display->drm, 1481 "VBT has unknown eDP lane count value %u\n", 1482 edp_link_params->lanes); 1483 break; 1484 } 1485 1486 switch (edp_link_params->preemphasis) { 1487 case EDP_PREEMPHASIS_NONE: 1488 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 1489 break; 1490 case EDP_PREEMPHASIS_3_5dB: 1491 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 1492 break; 1493 case EDP_PREEMPHASIS_6dB: 1494 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 1495 break; 1496 case EDP_PREEMPHASIS_9_5dB: 1497 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 1498 break; 1499 default: 1500 drm_dbg_kms(display->drm, 1501 "VBT has unknown eDP pre-emphasis value %u\n", 1502 edp_link_params->preemphasis); 1503 break; 1504 } 1505 1506 switch (edp_link_params->vswing) { 1507 case EDP_VSWING_0_4V: 1508 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 1509 break; 1510 case EDP_VSWING_0_6V: 1511 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 1512 break; 1513 case EDP_VSWING_0_8V: 1514 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 1515 break; 1516 case EDP_VSWING_1_2V: 1517 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 1518 break; 1519 default: 1520 drm_dbg_kms(display->drm, 1521 "VBT has unknown eDP voltage swing value %u\n", 1522 edp_link_params->vswing); 1523 break; 1524 } 1525 1526 if (display->vbt.version >= 173) { 1527 u8 vswing; 1528 1529 /* Don't read from VBT if module parameter has valid value*/ 1530 if (display->params.edp_vswing) { 1531 panel->vbt.edp.low_vswing = 1532 display->params.edp_vswing == 1; 1533 } else { 1534 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 1535 panel->vbt.edp.low_vswing = vswing == 0; 1536 } 1537 } 1538 1539 panel->vbt.edp.drrs_msa_timing_delay = 1540 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2); 1541 1542 if (display->vbt.version >= 244) 1543 panel->vbt.edp.max_link_rate = 1544 edp->edp_max_port_link_rate[panel_type] * 20; 1545 1546 if (display->vbt.version >= 251) 1547 panel->vbt.edp.dsc_disable = 1548 panel_bool(edp->edp_dsc_disable, panel_type); 1549 } 1550 1551 static void 1552 parse_psr(struct intel_display *display, 1553 struct intel_panel *panel) 1554 { 1555 const struct bdb_psr *psr; 1556 const struct psr_table *psr_table; 1557 int panel_type = panel->vbt.panel_type; 1558 1559 psr = bdb_find_section(display, BDB_PSR); 1560 if (!psr) { 1561 drm_dbg_kms(display->drm, "No PSR BDB found.\n"); 1562 return; 1563 } 1564 1565 psr_table = &psr->psr_table[panel_type]; 1566 1567 panel->vbt.psr.full_link = psr_table->full_link; 1568 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 1569 panel->vbt.psr.idle_frames = psr_table->idle_frames; 1570 1571 /* 1572 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 1573 * Old decimal value is wake up time in multiples of 100 us. 1574 */ 1575 if (display->vbt.version >= 205 && 1576 (DISPLAY_VER(display) >= 9 && !display->platform.broxton)) { 1577 switch (psr_table->tp1_wakeup_time) { 1578 case 0: 1579 panel->vbt.psr.tp1_wakeup_time_us = 500; 1580 break; 1581 case 1: 1582 panel->vbt.psr.tp1_wakeup_time_us = 100; 1583 break; 1584 case 3: 1585 panel->vbt.psr.tp1_wakeup_time_us = 0; 1586 break; 1587 default: 1588 drm_dbg_kms(display->drm, 1589 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1590 psr_table->tp1_wakeup_time); 1591 fallthrough; 1592 case 2: 1593 panel->vbt.psr.tp1_wakeup_time_us = 2500; 1594 break; 1595 } 1596 1597 switch (psr_table->tp2_tp3_wakeup_time) { 1598 case 0: 1599 panel->vbt.psr.tp2_tp3_wakeup_time_us = 500; 1600 break; 1601 case 1: 1602 panel->vbt.psr.tp2_tp3_wakeup_time_us = 100; 1603 break; 1604 case 3: 1605 panel->vbt.psr.tp2_tp3_wakeup_time_us = 0; 1606 break; 1607 default: 1608 drm_dbg_kms(display->drm, 1609 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1610 psr_table->tp2_tp3_wakeup_time); 1611 fallthrough; 1612 case 2: 1613 panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 1614 break; 1615 } 1616 } else { 1617 panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 1618 panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 1619 } 1620 1621 if (display->vbt.version >= 226) { 1622 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 1623 1624 wakeup_time = panel_bits(wakeup_time, panel_type, 2); 1625 switch (wakeup_time) { 1626 case 0: 1627 wakeup_time = 500; 1628 break; 1629 case 1: 1630 wakeup_time = 100; 1631 break; 1632 case 3: 1633 wakeup_time = 50; 1634 break; 1635 default: 1636 case 2: 1637 wakeup_time = 2500; 1638 break; 1639 } 1640 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 1641 } else { 1642 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 1643 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us; 1644 } 1645 } 1646 1647 static void parse_dsi_backlight_ports(struct intel_display *display, 1648 struct intel_panel *panel, 1649 enum port port) 1650 { 1651 enum port port_bc = DISPLAY_VER(display) >= 11 ? PORT_B : PORT_C; 1652 1653 if (!panel->vbt.dsi.config->dual_link || display->vbt.version < 197) { 1654 panel->vbt.dsi.bl_ports = BIT(port); 1655 if (panel->vbt.dsi.config->cabc_supported) 1656 panel->vbt.dsi.cabc_ports = BIT(port); 1657 1658 return; 1659 } 1660 1661 switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) { 1662 case DL_DCS_PORT_A: 1663 panel->vbt.dsi.bl_ports = BIT(PORT_A); 1664 break; 1665 case DL_DCS_PORT_C: 1666 panel->vbt.dsi.bl_ports = BIT(port_bc); 1667 break; 1668 default: 1669 case DL_DCS_PORT_A_AND_C: 1670 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc); 1671 break; 1672 } 1673 1674 if (!panel->vbt.dsi.config->cabc_supported) 1675 return; 1676 1677 switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) { 1678 case DL_DCS_PORT_A: 1679 panel->vbt.dsi.cabc_ports = BIT(PORT_A); 1680 break; 1681 case DL_DCS_PORT_C: 1682 panel->vbt.dsi.cabc_ports = BIT(port_bc); 1683 break; 1684 default: 1685 case DL_DCS_PORT_A_AND_C: 1686 panel->vbt.dsi.cabc_ports = 1687 BIT(PORT_A) | BIT(port_bc); 1688 break; 1689 } 1690 } 1691 1692 static void 1693 parse_mipi_config(struct intel_display *display, 1694 struct intel_panel *panel) 1695 { 1696 const struct bdb_mipi_config *start; 1697 const struct mipi_config *config; 1698 const struct mipi_pps_data *pps; 1699 int panel_type = panel->vbt.panel_type; 1700 enum port port; 1701 1702 /* parse MIPI blocks only if LFP type is MIPI */ 1703 if (!intel_bios_is_dsi_present(display, &port)) 1704 return; 1705 1706 /* Initialize this to undefined indicating no generic MIPI support */ 1707 panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 1708 1709 start = bdb_find_section(display, BDB_MIPI_CONFIG); 1710 if (!start) { 1711 drm_dbg_kms(display->drm, "No MIPI config BDB found"); 1712 return; 1713 } 1714 1715 drm_dbg_kms(display->drm, "Found MIPI Config block, panel index = %d\n", 1716 panel_type); 1717 1718 /* 1719 * get hold of the correct configuration block and pps data as per 1720 * the panel_type as index 1721 */ 1722 config = &start->config[panel_type]; 1723 pps = &start->pps[panel_type]; 1724 1725 /* store as of now full data. Trim when we realise all is not needed */ 1726 panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1727 if (!panel->vbt.dsi.config) 1728 return; 1729 1730 panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1731 if (!panel->vbt.dsi.pps) { 1732 kfree(panel->vbt.dsi.config); 1733 return; 1734 } 1735 1736 parse_dsi_backlight_ports(display, panel, port); 1737 1738 /* FIXME is the 90 vs. 270 correct? */ 1739 switch (config->rotation) { 1740 case ENABLE_ROTATION_0: 1741 /* 1742 * Most (all?) VBTs claim 0 degrees despite having 1743 * an upside down panel, thus we do not trust this. 1744 */ 1745 panel->vbt.dsi.orientation = 1746 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1747 break; 1748 case ENABLE_ROTATION_90: 1749 panel->vbt.dsi.orientation = 1750 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1751 break; 1752 case ENABLE_ROTATION_180: 1753 panel->vbt.dsi.orientation = 1754 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1755 break; 1756 case ENABLE_ROTATION_270: 1757 panel->vbt.dsi.orientation = 1758 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1759 break; 1760 } 1761 1762 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1763 panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1764 } 1765 1766 /* Find the sequence block and size for the given panel. */ 1767 static const u8 * 1768 find_panel_sequence_block(struct intel_display *display, 1769 const struct bdb_mipi_sequence *sequence, 1770 u16 panel_id, u32 *seq_size) 1771 { 1772 u32 total = get_blocksize(sequence); 1773 const u8 *data = &sequence->data[0]; 1774 u8 current_id; 1775 u32 current_size; 1776 int header_size = sequence->version >= 3 ? 5 : 3; 1777 int index = 0; 1778 int i; 1779 1780 /* skip new block size */ 1781 if (sequence->version >= 3) 1782 data += 4; 1783 1784 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1785 if (index + header_size > total) { 1786 drm_err(display->drm, 1787 "Invalid sequence block (header)\n"); 1788 return NULL; 1789 } 1790 1791 current_id = *(data + index); 1792 if (sequence->version >= 3) 1793 current_size = *((const u32 *)(data + index + 1)); 1794 else 1795 current_size = *((const u16 *)(data + index + 1)); 1796 1797 index += header_size; 1798 1799 if (index + current_size > total) { 1800 drm_err(display->drm, "Invalid sequence block\n"); 1801 return NULL; 1802 } 1803 1804 if (current_id == panel_id) { 1805 *seq_size = current_size; 1806 return data + index; 1807 } 1808 1809 index += current_size; 1810 } 1811 1812 drm_err(display->drm, 1813 "Sequence block detected but no valid configuration\n"); 1814 1815 return NULL; 1816 } 1817 1818 static int goto_next_sequence(struct intel_display *display, 1819 const u8 *data, int index, int total) 1820 { 1821 u16 len; 1822 1823 /* Skip Sequence Byte. */ 1824 for (index = index + 1; index < total; index += len) { 1825 u8 operation_byte = *(data + index); 1826 index++; 1827 1828 switch (operation_byte) { 1829 case MIPI_SEQ_ELEM_END: 1830 return index; 1831 case MIPI_SEQ_ELEM_SEND_PKT: 1832 if (index + 4 > total) 1833 return 0; 1834 1835 len = *((const u16 *)(data + index + 2)) + 4; 1836 break; 1837 case MIPI_SEQ_ELEM_DELAY: 1838 len = 4; 1839 break; 1840 case MIPI_SEQ_ELEM_GPIO: 1841 len = 2; 1842 break; 1843 case MIPI_SEQ_ELEM_I2C: 1844 if (index + 7 > total) 1845 return 0; 1846 len = *(data + index + 6) + 7; 1847 break; 1848 default: 1849 drm_err(display->drm, "Unknown operation byte\n"); 1850 return 0; 1851 } 1852 } 1853 1854 return 0; 1855 } 1856 1857 static int goto_next_sequence_v3(struct intel_display *display, 1858 const u8 *data, int index, int total) 1859 { 1860 int seq_end; 1861 u16 len; 1862 u32 size_of_sequence; 1863 1864 /* 1865 * Could skip sequence based on Size of Sequence alone, but also do some 1866 * checking on the structure. 1867 */ 1868 if (total < 5) { 1869 drm_err(display->drm, "Too small sequence size\n"); 1870 return 0; 1871 } 1872 1873 /* Skip Sequence Byte. */ 1874 index++; 1875 1876 /* 1877 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1878 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1879 * byte. 1880 */ 1881 size_of_sequence = *((const u32 *)(data + index)); 1882 index += 4; 1883 1884 seq_end = index + size_of_sequence; 1885 if (seq_end > total) { 1886 drm_err(display->drm, "Invalid sequence size\n"); 1887 return 0; 1888 } 1889 1890 for (; index < total; index += len) { 1891 u8 operation_byte = *(data + index); 1892 index++; 1893 1894 if (operation_byte == MIPI_SEQ_ELEM_END) { 1895 if (index != seq_end) { 1896 drm_err(display->drm, 1897 "Invalid element structure\n"); 1898 return 0; 1899 } 1900 return index; 1901 } 1902 1903 len = *(data + index); 1904 index++; 1905 1906 /* 1907 * FIXME: Would be nice to check elements like for v1/v2 in 1908 * goto_next_sequence() above. 1909 */ 1910 switch (operation_byte) { 1911 case MIPI_SEQ_ELEM_SEND_PKT: 1912 case MIPI_SEQ_ELEM_DELAY: 1913 case MIPI_SEQ_ELEM_GPIO: 1914 case MIPI_SEQ_ELEM_I2C: 1915 case MIPI_SEQ_ELEM_SPI: 1916 case MIPI_SEQ_ELEM_PMIC: 1917 break; 1918 default: 1919 drm_err(display->drm, "Unknown operation byte %u\n", 1920 operation_byte); 1921 break; 1922 } 1923 } 1924 1925 return 0; 1926 } 1927 1928 /* 1929 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1930 * skip all delay + gpio operands and stop at the first DSI packet op. 1931 */ 1932 static int get_init_otp_deassert_fragment_len(struct intel_display *display, 1933 struct intel_panel *panel) 1934 { 1935 const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1936 int index, len; 1937 1938 if (drm_WARN_ON(display->drm, 1939 !data || panel->vbt.dsi.seq_version >= 3)) 1940 return 0; 1941 1942 /* index = 1 to skip sequence byte */ 1943 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1944 switch (data[index]) { 1945 case MIPI_SEQ_ELEM_SEND_PKT: 1946 return index == 1 ? 0 : index; 1947 case MIPI_SEQ_ELEM_DELAY: 1948 len = 5; /* 1 byte for operand + uint32 */ 1949 break; 1950 case MIPI_SEQ_ELEM_GPIO: 1951 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1952 break; 1953 default: 1954 return 0; 1955 } 1956 } 1957 1958 return 0; 1959 } 1960 1961 /* 1962 * Some v1/v2 VBT MIPI sequences do the deassert in the init OTP sequence. 1963 * The deassert must be done before calling intel_dsi_device_ready, so for 1964 * these devices we split the init OTP sequence into a deassert sequence and 1965 * the actual init OTP part. 1966 */ 1967 static void vlv_fixup_mipi_sequences(struct intel_display *display, 1968 struct intel_panel *panel) 1969 { 1970 u8 *init_otp; 1971 int len; 1972 1973 /* Limit this to v1/v2 vid-mode sequences */ 1974 if (panel->vbt.dsi.config->is_cmd_mode || 1975 panel->vbt.dsi.seq_version >= 3) 1976 return; 1977 1978 /* Only do this if there are otp and assert seqs and no deassert seq */ 1979 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1980 !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1981 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1982 return; 1983 1984 /* The deassert-sequence ends at the first DSI packet */ 1985 len = get_init_otp_deassert_fragment_len(display, panel); 1986 if (!len) 1987 return; 1988 1989 drm_dbg_kms(display->drm, 1990 "Using init OTP fragment to deassert reset\n"); 1991 1992 /* Copy the fragment, update seq byte and terminate it */ 1993 init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1994 panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1995 if (!panel->vbt.dsi.deassert_seq) 1996 return; 1997 panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1998 panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1999 /* Use the copy for deassert */ 2000 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 2001 panel->vbt.dsi.deassert_seq; 2002 /* Replace the last byte of the fragment with init OTP seq byte */ 2003 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 2004 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 2005 panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 2006 } 2007 2008 /* 2009 * Some machines (eg. Lenovo 82TQ) appear to have broken 2010 * VBT sequences: 2011 * - INIT_OTP is not present at all 2012 * - what should be in INIT_OTP is in DISPLAY_ON 2013 * - what should be in DISPLAY_ON is in BACKLIGHT_ON 2014 * (along with the actual backlight stuff) 2015 * 2016 * To make those work we simply swap DISPLAY_ON and INIT_OTP. 2017 * 2018 * TODO: Do we need to limit this to specific machines, 2019 * or examine the contents of the sequences to 2020 * avoid false positives? 2021 */ 2022 static void icl_fixup_mipi_sequences(struct intel_display *display, 2023 struct intel_panel *panel) 2024 { 2025 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] && 2026 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]) { 2027 drm_dbg_kms(display->drm, 2028 "Broken VBT: Swapping INIT_OTP and DISPLAY_ON sequences\n"); 2029 2030 swap(panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP], 2031 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]); 2032 } 2033 } 2034 2035 static void fixup_mipi_sequences(struct intel_display *display, 2036 struct intel_panel *panel) 2037 { 2038 if (DISPLAY_VER(display) >= 11) 2039 icl_fixup_mipi_sequences(display, panel); 2040 else if (display->platform.valleyview) 2041 vlv_fixup_mipi_sequences(display, panel); 2042 } 2043 2044 static void 2045 parse_mipi_sequence(struct intel_display *display, 2046 struct intel_panel *panel) 2047 { 2048 int panel_type = panel->vbt.panel_type; 2049 const struct bdb_mipi_sequence *sequence; 2050 const u8 *seq_data; 2051 u32 seq_size; 2052 u8 *data; 2053 int index = 0; 2054 2055 /* Only our generic panel driver uses the sequence block. */ 2056 if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 2057 return; 2058 2059 sequence = bdb_find_section(display, BDB_MIPI_SEQUENCE); 2060 if (!sequence) { 2061 drm_dbg_kms(display->drm, 2062 "No MIPI Sequence found, parsing complete\n"); 2063 return; 2064 } 2065 2066 /* Fail gracefully for forward incompatible sequence block. */ 2067 if (sequence->version >= 4) { 2068 drm_err(display->drm, 2069 "Unable to parse MIPI Sequence Block v%u\n", 2070 sequence->version); 2071 return; 2072 } 2073 2074 drm_dbg_kms(display->drm, "Found MIPI sequence block v%u\n", 2075 sequence->version); 2076 2077 seq_data = find_panel_sequence_block(display, sequence, panel_type, &seq_size); 2078 if (!seq_data) 2079 return; 2080 2081 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 2082 if (!data) 2083 return; 2084 2085 /* Parse the sequences, store pointers to each sequence. */ 2086 for (;;) { 2087 u8 seq_id = *(data + index); 2088 if (seq_id == MIPI_SEQ_END) 2089 break; 2090 2091 if (seq_id >= MIPI_SEQ_MAX) { 2092 drm_err(display->drm, "Unknown sequence %u\n", 2093 seq_id); 2094 goto err; 2095 } 2096 2097 /* Log about presence of sequences we won't run. */ 2098 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 2099 drm_dbg_kms(display->drm, 2100 "Unsupported sequence %u\n", seq_id); 2101 2102 panel->vbt.dsi.sequence[seq_id] = data + index; 2103 2104 if (sequence->version >= 3) 2105 index = goto_next_sequence_v3(display, data, index, seq_size); 2106 else 2107 index = goto_next_sequence(display, data, index, seq_size); 2108 if (!index) { 2109 drm_err(display->drm, "Invalid sequence %u\n", 2110 seq_id); 2111 goto err; 2112 } 2113 } 2114 2115 panel->vbt.dsi.data = data; 2116 panel->vbt.dsi.size = seq_size; 2117 panel->vbt.dsi.seq_version = sequence->version; 2118 2119 fixup_mipi_sequences(display, panel); 2120 2121 drm_dbg_kms(display->drm, "MIPI related VBT parsing complete\n"); 2122 return; 2123 2124 err: 2125 kfree(data); 2126 memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence)); 2127 } 2128 2129 static void 2130 parse_compression_parameters(struct intel_display *display) 2131 { 2132 const struct bdb_compression_parameters *params; 2133 struct intel_bios_encoder_data *devdata; 2134 u16 block_size; 2135 int index; 2136 2137 if (display->vbt.version < 198) 2138 return; 2139 2140 params = bdb_find_section(display, BDB_COMPRESSION_PARAMETERS); 2141 if (params) { 2142 /* Sanity checks */ 2143 if (params->entry_size != sizeof(params->data[0])) { 2144 drm_dbg_kms(display->drm, 2145 "VBT: unsupported compression param entry size\n"); 2146 return; 2147 } 2148 2149 block_size = get_blocksize(params); 2150 if (block_size < sizeof(*params)) { 2151 drm_dbg_kms(display->drm, 2152 "VBT: expected 16 compression param entries\n"); 2153 return; 2154 } 2155 } 2156 2157 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 2158 const struct child_device_config *child = &devdata->child; 2159 2160 if (!child->compression_enable) 2161 continue; 2162 2163 if (!params) { 2164 drm_dbg_kms(display->drm, 2165 "VBT: compression params not available\n"); 2166 continue; 2167 } 2168 2169 if (child->compression_method_cps) { 2170 drm_dbg_kms(display->drm, 2171 "VBT: CPS compression not supported\n"); 2172 continue; 2173 } 2174 2175 index = child->compression_structure_index; 2176 2177 devdata->dsc = kmemdup(¶ms->data[index], 2178 sizeof(*devdata->dsc), GFP_KERNEL); 2179 } 2180 } 2181 2182 static u8 translate_iboost(struct intel_display *display, u8 val) 2183 { 2184 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 2185 2186 if (val >= ARRAY_SIZE(mapping)) { 2187 drm_dbg_kms(display->drm, 2188 "Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 2189 return 0; 2190 } 2191 return mapping[val]; 2192 } 2193 2194 static const u8 cnp_ddc_pin_map[] = { 2195 [0] = 0, /* N/A */ 2196 [GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B, 2197 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C, 2198 [GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */ 2199 [GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */ 2200 }; 2201 2202 static const u8 icp_ddc_pin_map[] = { 2203 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2204 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2205 [GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C, 2206 [GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1, 2207 [GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2, 2208 [GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3, 2209 [GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4, 2210 [GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5, 2211 [GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6, 2212 }; 2213 2214 static const u8 rkl_pch_tgp_ddc_pin_map[] = { 2215 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2216 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2217 [GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D, 2218 [GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E, 2219 }; 2220 2221 static const u8 adls_ddc_pin_map[] = { 2222 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2223 [GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1, 2224 [GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2, 2225 [GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3, 2226 [GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4, 2227 }; 2228 2229 static const u8 gen9bc_tgp_ddc_pin_map[] = { 2230 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B, 2231 [GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C, 2232 [GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D, 2233 }; 2234 2235 static const u8 adlp_ddc_pin_map[] = { 2236 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2237 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2238 [GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1, 2239 [GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2, 2240 [GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3, 2241 [GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4, 2242 }; 2243 2244 static u8 map_ddc_pin(struct intel_display *display, u8 vbt_pin) 2245 { 2246 const u8 *ddc_pin_map; 2247 int i, n_entries; 2248 2249 if (INTEL_PCH_TYPE(display) >= PCH_MTL || display->platform.alderlake_p) { 2250 ddc_pin_map = adlp_ddc_pin_map; 2251 n_entries = ARRAY_SIZE(adlp_ddc_pin_map); 2252 } else if (display->platform.alderlake_s) { 2253 ddc_pin_map = adls_ddc_pin_map; 2254 n_entries = ARRAY_SIZE(adls_ddc_pin_map); 2255 } else if (INTEL_PCH_TYPE(display) >= PCH_DG1) { 2256 return vbt_pin; 2257 } else if (display->platform.rocketlake && INTEL_PCH_TYPE(display) == PCH_TGP) { 2258 ddc_pin_map = rkl_pch_tgp_ddc_pin_map; 2259 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map); 2260 } else if (HAS_PCH_TGP(display) && DISPLAY_VER(display) == 9) { 2261 ddc_pin_map = gen9bc_tgp_ddc_pin_map; 2262 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map); 2263 } else if (INTEL_PCH_TYPE(display) >= PCH_ICP) { 2264 ddc_pin_map = icp_ddc_pin_map; 2265 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 2266 } else if (HAS_PCH_CNP(display)) { 2267 ddc_pin_map = cnp_ddc_pin_map; 2268 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 2269 } else { 2270 /* Assuming direct map */ 2271 return vbt_pin; 2272 } 2273 2274 for (i = 0; i < n_entries; i++) { 2275 if (ddc_pin_map[i] == vbt_pin) 2276 return i; 2277 } 2278 2279 drm_dbg_kms(display->drm, 2280 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 2281 vbt_pin); 2282 return 0; 2283 } 2284 2285 static u8 dvo_port_type(u8 dvo_port) 2286 { 2287 switch (dvo_port) { 2288 case DVO_PORT_HDMIA: 2289 case DVO_PORT_HDMIB: 2290 case DVO_PORT_HDMIC: 2291 case DVO_PORT_HDMID: 2292 case DVO_PORT_HDMIE: 2293 case DVO_PORT_HDMIF: 2294 case DVO_PORT_HDMIG: 2295 case DVO_PORT_HDMIH: 2296 case DVO_PORT_HDMII: 2297 return DVO_PORT_HDMIA; 2298 case DVO_PORT_DPA: 2299 case DVO_PORT_DPB: 2300 case DVO_PORT_DPC: 2301 case DVO_PORT_DPD: 2302 case DVO_PORT_DPE: 2303 case DVO_PORT_DPF: 2304 case DVO_PORT_DPG: 2305 case DVO_PORT_DPH: 2306 case DVO_PORT_DPI: 2307 return DVO_PORT_DPA; 2308 case DVO_PORT_MIPIA: 2309 case DVO_PORT_MIPIB: 2310 case DVO_PORT_MIPIC: 2311 case DVO_PORT_MIPID: 2312 return DVO_PORT_MIPIA; 2313 default: 2314 return dvo_port; 2315 } 2316 } 2317 2318 static enum port __dvo_port_to_port(int n_ports, int n_dvo, 2319 const int port_mapping[][3], u8 dvo_port) 2320 { 2321 enum port port; 2322 int i; 2323 2324 for (port = PORT_A; port < n_ports; port++) { 2325 for (i = 0; i < n_dvo; i++) { 2326 if (port_mapping[port][i] == -1) 2327 break; 2328 2329 if (dvo_port == port_mapping[port][i]) 2330 return port; 2331 } 2332 } 2333 2334 return PORT_NONE; 2335 } 2336 2337 static enum port dvo_port_to_port(struct intel_display *display, 2338 u8 dvo_port) 2339 { 2340 /* 2341 * Each DDI port can have more than one value on the "DVO Port" field, 2342 * so look for all the possible values for each port. 2343 */ 2344 static const int port_mapping[][3] = { 2345 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2346 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2347 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2348 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2349 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT }, 2350 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2351 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2352 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2353 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2354 }; 2355 /* 2356 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D 2357 * map to DDI A,B,TC1,TC2 respectively. 2358 */ 2359 static const int rkl_port_mapping[][3] = { 2360 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2361 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2362 [PORT_C] = { -1 }, 2363 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2364 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2365 }; 2366 /* 2367 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E, 2368 * PORT_F and PORT_G, we need to map that to correct VBT sections. 2369 */ 2370 static const int adls_port_mapping[][3] = { 2371 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2372 [PORT_B] = { -1 }, 2373 [PORT_C] = { -1 }, 2374 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2375 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2376 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2377 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2378 }; 2379 static const int xelpd_port_mapping[][3] = { 2380 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2381 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2382 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2383 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2384 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2385 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2386 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2387 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2388 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2389 }; 2390 2391 if (DISPLAY_VER(display) >= 13) 2392 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping), 2393 ARRAY_SIZE(xelpd_port_mapping[0]), 2394 xelpd_port_mapping, 2395 dvo_port); 2396 else if (display->platform.alderlake_s) 2397 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping), 2398 ARRAY_SIZE(adls_port_mapping[0]), 2399 adls_port_mapping, 2400 dvo_port); 2401 else if (display->platform.dg1 || display->platform.rocketlake) 2402 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), 2403 ARRAY_SIZE(rkl_port_mapping[0]), 2404 rkl_port_mapping, 2405 dvo_port); 2406 else 2407 return __dvo_port_to_port(ARRAY_SIZE(port_mapping), 2408 ARRAY_SIZE(port_mapping[0]), 2409 port_mapping, 2410 dvo_port); 2411 } 2412 2413 static enum port 2414 dsi_dvo_port_to_port(struct intel_display *display, u8 dvo_port) 2415 { 2416 switch (dvo_port) { 2417 case DVO_PORT_MIPIA: 2418 return PORT_A; 2419 case DVO_PORT_MIPIC: 2420 if (DISPLAY_VER(display) >= 11) 2421 return PORT_B; 2422 else 2423 return PORT_C; 2424 default: 2425 return PORT_NONE; 2426 } 2427 } 2428 2429 enum port intel_bios_encoder_port(const struct intel_bios_encoder_data *devdata) 2430 { 2431 struct intel_display *display = devdata->display; 2432 const struct child_device_config *child = &devdata->child; 2433 enum port port; 2434 2435 port = dvo_port_to_port(display, child->dvo_port); 2436 if (port == PORT_NONE && DISPLAY_VER(display) >= 11) 2437 port = dsi_dvo_port_to_port(display, child->dvo_port); 2438 2439 return port; 2440 } 2441 2442 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate) 2443 { 2444 switch (vbt_max_link_rate) { 2445 default: 2446 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF: 2447 return 0; 2448 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20: 2449 return 2000000; 2450 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5: 2451 return 1350000; 2452 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10: 2453 return 1000000; 2454 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3: 2455 return 810000; 2456 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2: 2457 return 540000; 2458 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR: 2459 return 270000; 2460 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR: 2461 return 162000; 2462 } 2463 } 2464 2465 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate) 2466 { 2467 switch (vbt_max_link_rate) { 2468 default: 2469 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3: 2470 return 810000; 2471 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2: 2472 return 540000; 2473 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR: 2474 return 270000; 2475 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR: 2476 return 162000; 2477 } 2478 } 2479 2480 static u32 edp_rate_override_mask(int rate) 2481 { 2482 switch (rate) { 2483 case 2000000: return BDB_263_VBT_EDP_LINK_RATE_20; 2484 case 1350000: return BDB_263_VBT_EDP_LINK_RATE_13_5; 2485 case 1000000: return BDB_263_VBT_EDP_LINK_RATE_10; 2486 case 810000: return BDB_263_VBT_EDP_LINK_RATE_8_1; 2487 case 675000: return BDB_263_VBT_EDP_LINK_RATE_6_75; 2488 case 540000: return BDB_263_VBT_EDP_LINK_RATE_5_4; 2489 case 432000: return BDB_263_VBT_EDP_LINK_RATE_4_32; 2490 case 324000: return BDB_263_VBT_EDP_LINK_RATE_3_24; 2491 case 270000: return BDB_263_VBT_EDP_LINK_RATE_2_7; 2492 case 243000: return BDB_263_VBT_EDP_LINK_RATE_2_43; 2493 case 216000: return BDB_263_VBT_EDP_LINK_RATE_2_16; 2494 case 162000: return BDB_263_VBT_EDP_LINK_RATE_1_62; 2495 default: return 0; 2496 } 2497 } 2498 2499 int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata) 2500 { 2501 if (!devdata || devdata->display->vbt.version < 216) 2502 return 0; 2503 2504 if (devdata->display->vbt.version >= 230) 2505 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate); 2506 else 2507 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate); 2508 } 2509 2510 int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata) 2511 { 2512 if (!devdata || devdata->display->vbt.version < 244) 2513 return 0; 2514 2515 return devdata->child.dp_max_lane_count + 1; 2516 } 2517 2518 bool 2519 intel_bios_encoder_reject_edp_rate(const struct intel_bios_encoder_data *devdata, 2520 int rate) 2521 { 2522 if (!devdata || devdata->display->vbt.version < 263) 2523 return false; 2524 2525 if (devdata->child.edp_data_rate_override == BDB_263_VBT_EDP_RATES_MASK) 2526 return false; 2527 2528 return devdata->child.edp_data_rate_override & edp_rate_override_mask(rate); 2529 } 2530 2531 static void sanitize_dedicated_external(struct intel_bios_encoder_data *devdata, 2532 enum port port) 2533 { 2534 struct intel_display *display = devdata->display; 2535 2536 if (!intel_bios_encoder_is_dedicated_external(devdata)) 2537 return; 2538 2539 /* 2540 * Since dedicated_external is for ports connected to PHYs outside of 2541 * the Type-C subsystem, clear bits that would only make sense for ports 2542 * with PHYs in the Type-C subsystem. 2543 */ 2544 2545 /* 2546 * Bit dp_usb_type_c is marked as "don't care" in Bspec when 2547 * dedicated_external is set. 2548 */ 2549 if (devdata->child.dp_usb_type_c) { 2550 drm_dbg_kms(display->drm, 2551 "VBT claims Port %c supports USB Type-C, but the port is dedicated external, ignoring\n", 2552 port_name(port)); 2553 devdata->child.dp_usb_type_c = 0; 2554 } 2555 2556 /* 2557 * Bit tbt is marked as "don't care" in Bspec when dedicated_external is 2558 * set. 2559 */ 2560 if (devdata->child.tbt) { 2561 drm_dbg_kms(display->drm, 2562 "VBT claims Port %c supports TBT, but the port is dedicated external, ignoring\n", 2563 port_name(port)); 2564 devdata->child.tbt = 0; 2565 } 2566 2567 /* 2568 * DDI allocation for TC capable ports only make sense for PHYs in the 2569 * Type-C subsystem. 2570 */ 2571 if (devdata->child.dyn_port_over_tc) { 2572 drm_dbg_kms(display->drm, 2573 "VBT claims Port %c supports dynamic DDI allocation in TCSS, but the port is dedicated external, ignoring\n", 2574 port_name(port)); 2575 devdata->child.dyn_port_over_tc = 0; 2576 } 2577 } 2578 2579 static void sanitize_device_type(struct intel_bios_encoder_data *devdata, 2580 enum port port) 2581 { 2582 struct intel_display *display = devdata->display; 2583 bool is_hdmi; 2584 2585 if (port != PORT_A || DISPLAY_VER(display) >= 12) 2586 return; 2587 2588 if (!intel_bios_encoder_supports_dvi(devdata)) 2589 return; 2590 2591 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2592 2593 drm_dbg_kms(display->drm, "VBT claims port A supports DVI%s, ignoring\n", 2594 is_hdmi ? "/HDMI" : ""); 2595 2596 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 2597 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 2598 } 2599 2600 static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata, 2601 enum port port) 2602 { 2603 struct intel_display *display = devdata->display; 2604 2605 if (!intel_bios_encoder_supports_dvi(devdata)) 2606 return; 2607 2608 /* 2609 * Some BDW machines (eg. HP Pavilion 15-ab) shipped 2610 * with a HSW VBT where the level shifter value goes 2611 * up to 11, whereas the BDW max is 9. 2612 */ 2613 if (display->platform.broadwell && devdata->child.hdmi_level_shifter_value > 9) { 2614 drm_dbg_kms(display->drm, 2615 "Bogus port %c VBT HDMI level shift %d, adjusting to %d\n", 2616 port_name(port), devdata->child.hdmi_level_shifter_value, 9); 2617 2618 devdata->child.hdmi_level_shifter_value = 9; 2619 } 2620 } 2621 2622 static bool 2623 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata) 2624 { 2625 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT; 2626 } 2627 2628 bool 2629 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata) 2630 { 2631 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 2632 } 2633 2634 bool 2635 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata) 2636 { 2637 return intel_bios_encoder_supports_dvi(devdata) && 2638 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 2639 } 2640 2641 bool 2642 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata) 2643 { 2644 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2645 } 2646 2647 bool 2648 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata) 2649 { 2650 return intel_bios_encoder_supports_dp(devdata) && 2651 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR; 2652 } 2653 2654 bool 2655 intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata) 2656 { 2657 return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT; 2658 } 2659 2660 bool 2661 intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata) 2662 { 2663 return devdata && HAS_LSPCON(devdata->display) && devdata->child.lspcon; 2664 } 2665 2666 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */ 2667 int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata) 2668 { 2669 if (!devdata || devdata->display->vbt.version < 158 || 2670 DISPLAY_VER(devdata->display) >= 14) 2671 return -1; 2672 2673 return devdata->child.hdmi_level_shifter_value; 2674 } 2675 2676 int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata) 2677 { 2678 if (!devdata || devdata->display->vbt.version < 204) 2679 return 0; 2680 2681 switch (devdata->child.hdmi_max_data_rate) { 2682 default: 2683 MISSING_CASE(devdata->child.hdmi_max_data_rate); 2684 fallthrough; 2685 case HDMI_MAX_DATA_RATE_PLATFORM: 2686 return 0; 2687 case HDMI_MAX_DATA_RATE_594: 2688 return 594000; 2689 case HDMI_MAX_DATA_RATE_340: 2690 return 340000; 2691 case HDMI_MAX_DATA_RATE_300: 2692 return 300000; 2693 case HDMI_MAX_DATA_RATE_297: 2694 return 297000; 2695 case HDMI_MAX_DATA_RATE_165: 2696 return 165000; 2697 } 2698 } 2699 2700 static bool is_port_valid(struct intel_display *display, enum port port) 2701 { 2702 /* 2703 * On some ICL SKUs port F is not present, but broken VBTs mark 2704 * the port as present. Only try to initialize port F for the 2705 * SKUs that may actually have it. 2706 */ 2707 if (port == PORT_F && display->platform.icelake) 2708 return display->platform.icelake_port_f; 2709 2710 return true; 2711 } 2712 2713 static void print_ddi_port(const struct intel_bios_encoder_data *devdata) 2714 { 2715 struct intel_display *display = devdata->display; 2716 const struct child_device_config *child = &devdata->child; 2717 bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt; 2718 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock; 2719 enum port port; 2720 2721 port = intel_bios_encoder_port(devdata); 2722 if (port == PORT_NONE) 2723 return; 2724 2725 is_dvi = intel_bios_encoder_supports_dvi(devdata); 2726 is_dp = intel_bios_encoder_supports_dp(devdata); 2727 is_crt = intel_bios_encoder_supports_crt(devdata); 2728 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2729 is_edp = intel_bios_encoder_supports_edp(devdata); 2730 is_dsi = intel_bios_encoder_supports_dsi(devdata); 2731 2732 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata); 2733 supports_tbt = intel_bios_encoder_supports_tbt(devdata); 2734 2735 drm_dbg_kms(display->drm, 2736 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 2737 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi, 2738 intel_bios_encoder_supports_dp_dual_mode(devdata), 2739 intel_bios_encoder_is_lspcon(devdata), 2740 supports_typec_usb, supports_tbt, 2741 devdata->dsc != NULL); 2742 2743 if (intel_bios_encoder_is_dedicated_external(devdata)) 2744 drm_dbg_kms(display->drm, 2745 "Port %c is dedicated external\n", 2746 port_name(port)); 2747 2748 if (intel_bios_encoder_supports_dyn_port_over_tc(devdata)) 2749 drm_dbg_kms(display->drm, 2750 "Port %c supports dynamic DDI allocation in TCSS\n", 2751 port_name(port)); 2752 2753 hdmi_level_shift = intel_bios_hdmi_level_shift(devdata); 2754 if (hdmi_level_shift >= 0) { 2755 drm_dbg_kms(display->drm, 2756 "Port %c VBT HDMI level shift: %d\n", 2757 port_name(port), hdmi_level_shift); 2758 } 2759 2760 max_tmds_clock = intel_bios_hdmi_max_tmds_clock(devdata); 2761 if (max_tmds_clock) 2762 drm_dbg_kms(display->drm, 2763 "Port %c VBT HDMI max TMDS clock: %d kHz\n", 2764 port_name(port), max_tmds_clock); 2765 2766 /* I_boost config for SKL and above */ 2767 dp_boost_level = intel_bios_dp_boost_level(devdata); 2768 if (dp_boost_level) 2769 drm_dbg_kms(display->drm, 2770 "Port %c VBT (e)DP boost level: %d\n", 2771 port_name(port), dp_boost_level); 2772 2773 hdmi_boost_level = intel_bios_hdmi_boost_level(devdata); 2774 if (hdmi_boost_level) 2775 drm_dbg_kms(display->drm, 2776 "Port %c VBT HDMI boost level: %d\n", 2777 port_name(port), hdmi_boost_level); 2778 2779 dp_max_link_rate = intel_bios_dp_max_link_rate(devdata); 2780 if (dp_max_link_rate) 2781 drm_dbg_kms(display->drm, 2782 "Port %c VBT DP max link rate: %d\n", 2783 port_name(port), dp_max_link_rate); 2784 2785 /* 2786 * FIXME need to implement support for VBT 2787 * vswing/preemph tables should this ever trigger. 2788 */ 2789 drm_WARN(display->drm, child->use_vbt_vswing, 2790 "Port %c asks to use VBT vswing/preemph tables\n", 2791 port_name(port)); 2792 } 2793 2794 static void parse_ddi_port(struct intel_bios_encoder_data *devdata) 2795 { 2796 struct intel_display *display = devdata->display; 2797 enum port port; 2798 2799 port = intel_bios_encoder_port(devdata); 2800 if (port == PORT_NONE) 2801 return; 2802 2803 if (!is_port_valid(display, port)) { 2804 drm_dbg_kms(display->drm, 2805 "VBT reports port %c as supported, but that can't be true: skipping\n", 2806 port_name(port)); 2807 return; 2808 } 2809 2810 sanitize_dedicated_external(devdata, port); 2811 sanitize_device_type(devdata, port); 2812 sanitize_hdmi_level_shift(devdata, port); 2813 } 2814 2815 static bool has_ddi_port_info(struct intel_display *display) 2816 { 2817 return DISPLAY_VER(display) >= 5 || display->platform.g4x; 2818 } 2819 2820 static void parse_ddi_ports(struct intel_display *display) 2821 { 2822 struct intel_bios_encoder_data *devdata; 2823 2824 if (!has_ddi_port_info(display)) 2825 return; 2826 2827 list_for_each_entry(devdata, &display->vbt.display_devices, node) 2828 parse_ddi_port(devdata); 2829 2830 list_for_each_entry(devdata, &display->vbt.display_devices, node) 2831 print_ddi_port(devdata); 2832 } 2833 2834 static int child_device_expected_size(u16 version) 2835 { 2836 BUILD_BUG_ON(sizeof(struct child_device_config) < 40); 2837 2838 if (version > 264) 2839 return -ENOENT; 2840 else if (version >= 263) 2841 return 44; 2842 else if (version >= 256) 2843 return 40; 2844 else if (version >= 216) 2845 return 39; 2846 else if (version >= 196) 2847 return 38; 2848 else if (version >= 195) 2849 return 37; 2850 else if (version >= 111) 2851 return LEGACY_CHILD_DEVICE_CONFIG_SIZE; 2852 else if (version >= 106) 2853 return 27; 2854 else 2855 return 22; 2856 } 2857 2858 static bool child_device_size_valid(struct intel_display *display, int size) 2859 { 2860 int expected_size; 2861 2862 expected_size = child_device_expected_size(display->vbt.version); 2863 if (expected_size < 0) { 2864 expected_size = sizeof(struct child_device_config); 2865 drm_dbg_kms(display->drm, 2866 "Expected child device config size for VBT version %u not known; assuming %d\n", 2867 display->vbt.version, expected_size); 2868 } 2869 2870 /* Flag an error for unexpected size, but continue anyway. */ 2871 if (size != expected_size) 2872 drm_err(display->drm, 2873 "Unexpected child device config size %d (expected %d for VBT version %u)\n", 2874 size, expected_size, display->vbt.version); 2875 2876 /* The legacy sized child device config is the minimum we need. */ 2877 if (size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 2878 drm_dbg_kms(display->drm, 2879 "Child device config size %d is too small.\n", 2880 size); 2881 return false; 2882 } 2883 2884 return true; 2885 } 2886 2887 static void 2888 parse_general_definitions(struct intel_display *display) 2889 { 2890 const struct bdb_general_definitions *defs; 2891 struct intel_bios_encoder_data *devdata; 2892 const struct child_device_config *child; 2893 int i, child_device_num; 2894 u16 block_size; 2895 int bus_pin; 2896 2897 defs = bdb_find_section(display, BDB_GENERAL_DEFINITIONS); 2898 if (!defs) { 2899 drm_dbg_kms(display->drm, 2900 "No general definition block is found, no devices defined.\n"); 2901 return; 2902 } 2903 2904 block_size = get_blocksize(defs); 2905 if (block_size < sizeof(*defs)) { 2906 drm_dbg_kms(display->drm, 2907 "General definitions block too small (%u)\n", 2908 block_size); 2909 return; 2910 } 2911 2912 bus_pin = defs->crt_ddc_gmbus_pin; 2913 drm_dbg_kms(display->drm, "crt_ddc_bus_pin: %d\n", bus_pin); 2914 if (intel_gmbus_is_valid_pin(display, bus_pin)) 2915 display->vbt.crt_ddc_pin = bus_pin; 2916 2917 if (!child_device_size_valid(display, defs->child_dev_size)) 2918 return; 2919 2920 /* get the number of child device */ 2921 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 2922 2923 for (i = 0; i < child_device_num; i++) { 2924 child = child_device_ptr(defs, i); 2925 if (!child->device_type) 2926 continue; 2927 2928 drm_dbg_kms(display->drm, 2929 "Found VBT child device with type 0x%x\n", 2930 child->device_type); 2931 2932 devdata = kzalloc_obj(*devdata); 2933 if (!devdata) 2934 break; 2935 2936 devdata->display = display; 2937 2938 /* 2939 * Copy as much as we know (sizeof) and is available 2940 * (child_dev_size) of the child device config. Accessing the 2941 * data must depend on VBT version. 2942 */ 2943 memcpy(&devdata->child, child, 2944 min_t(size_t, defs->child_dev_size, sizeof(*child))); 2945 2946 list_add_tail(&devdata->node, &display->vbt.display_devices); 2947 } 2948 2949 if (list_empty(&display->vbt.display_devices)) 2950 drm_dbg_kms(display->drm, 2951 "no child dev is parsed from VBT\n"); 2952 } 2953 2954 /* Common defaults which may be overridden by VBT. */ 2955 static void 2956 init_vbt_defaults(struct intel_display *display) 2957 { 2958 display->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 2959 2960 /* general features */ 2961 display->vbt.int_tv_support = 1; 2962 display->vbt.int_crt_support = 1; 2963 2964 /* driver features */ 2965 display->vbt.int_lvds_support = 1; 2966 2967 /* Default to using SSC */ 2968 display->vbt.lvds_use_ssc = 1; 2969 /* 2970 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 2971 * clock for LVDS. 2972 */ 2973 display->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(display, 2974 !HAS_PCH_SPLIT(display)); 2975 drm_dbg_kms(display->drm, "Set default to SSC at %d kHz\n", 2976 display->vbt.lvds_ssc_freq); 2977 } 2978 2979 /* Common defaults which may be overridden by VBT. */ 2980 static void 2981 init_vbt_panel_defaults(struct intel_panel *panel) 2982 { 2983 /* Default to having backlight */ 2984 panel->vbt.backlight.present = true; 2985 2986 /* LFP panel data */ 2987 panel->vbt.lvds_dither = true; 2988 } 2989 2990 /* Defaults to initialize only if there is no VBT. */ 2991 static void 2992 init_vbt_missing_defaults(struct intel_display *display) 2993 { 2994 unsigned int ports = DISPLAY_RUNTIME_INFO(display)->port_mask; 2995 enum port port; 2996 2997 if (!HAS_DDI(display) && !display->platform.cherryview) 2998 return; 2999 3000 for_each_port_masked(port, ports) { 3001 struct intel_bios_encoder_data *devdata; 3002 struct child_device_config *child; 3003 enum phy phy = intel_port_to_phy(display, port); 3004 3005 /* 3006 * VBT has the TypeC mode (native,TBT/USB) and we don't want 3007 * to detect it. 3008 */ 3009 if (intel_phy_is_tc(display, phy)) 3010 continue; 3011 3012 /* Create fake child device config */ 3013 devdata = kzalloc_obj(*devdata); 3014 if (!devdata) 3015 break; 3016 3017 devdata->display = display; 3018 child = &devdata->child; 3019 3020 if (port == PORT_F) 3021 child->dvo_port = DVO_PORT_HDMIF; 3022 else if (port == PORT_E) 3023 child->dvo_port = DVO_PORT_HDMIE; 3024 else 3025 child->dvo_port = DVO_PORT_HDMIA + port; 3026 3027 if (port != PORT_A && port != PORT_E) 3028 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING; 3029 3030 if (port != PORT_E) 3031 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT; 3032 3033 if (port == PORT_A) 3034 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR; 3035 3036 list_add_tail(&devdata->node, &display->vbt.display_devices); 3037 3038 drm_dbg_kms(display->drm, 3039 "Generating default VBT child device with type 0x%04x on port %c\n", 3040 child->device_type, port_name(port)); 3041 } 3042 3043 /* Bypass some minimum baseline VBT version checks */ 3044 display->vbt.version = 155; 3045 } 3046 3047 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 3048 { 3049 const void *_vbt = vbt; 3050 3051 return _vbt + vbt->bdb_offset; 3052 } 3053 3054 static const char vbt_signature[] = "$VBT"; 3055 static const int vbt_signature_len = 4; 3056 3057 /** 3058 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 3059 * @display: display device 3060 * @buf: pointer to a buffer to validate 3061 * @size: size of the buffer 3062 * 3063 * Returns true on valid VBT. 3064 */ 3065 bool intel_bios_is_valid_vbt(struct intel_display *display, 3066 const void *buf, size_t size) 3067 { 3068 const struct vbt_header *vbt = buf; 3069 const struct bdb_header *bdb; 3070 3071 if (!vbt) 3072 return false; 3073 3074 if (sizeof(struct vbt_header) > size) { 3075 drm_dbg_kms(display->drm, "VBT header incomplete\n"); 3076 return false; 3077 } 3078 3079 if (memcmp(vbt->signature, vbt_signature, vbt_signature_len)) { 3080 drm_dbg_kms(display->drm, "VBT invalid signature\n"); 3081 return false; 3082 } 3083 3084 if (vbt->vbt_size > size) { 3085 drm_dbg_kms(display->drm, 3086 "VBT incomplete (vbt_size overflows)\n"); 3087 return false; 3088 } 3089 3090 size = vbt->vbt_size; 3091 3092 if (range_overflows_t(size_t, 3093 vbt->bdb_offset, 3094 sizeof(struct bdb_header), 3095 size)) { 3096 drm_dbg_kms(display->drm, "BDB header incomplete\n"); 3097 return false; 3098 } 3099 3100 bdb = get_bdb_header(vbt); 3101 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 3102 drm_dbg_kms(display->drm, "BDB incomplete\n"); 3103 return false; 3104 } 3105 3106 return vbt; 3107 } 3108 3109 static struct vbt_header *firmware_get_vbt(struct intel_display *display, 3110 size_t *size) 3111 { 3112 struct vbt_header *vbt = NULL; 3113 const struct firmware *fw = NULL; 3114 const char *name = display->params.vbt_firmware; 3115 int ret; 3116 3117 if (!name || !*name) 3118 return NULL; 3119 3120 ret = request_firmware(&fw, name, display->drm->dev); 3121 if (ret) { 3122 drm_err(display->drm, 3123 "Requesting VBT firmware \"%s\" failed (%d)\n", 3124 name, ret); 3125 return NULL; 3126 } 3127 3128 if (intel_bios_is_valid_vbt(display, fw->data, fw->size)) { 3129 vbt = kmemdup(fw->data, fw->size, GFP_KERNEL); 3130 if (vbt) { 3131 drm_dbg_kms(display->drm, 3132 "Found valid VBT firmware \"%s\"\n", name); 3133 if (size) 3134 *size = fw->size; 3135 } 3136 } else { 3137 drm_dbg_kms(display->drm, "Invalid VBT firmware \"%s\"\n", 3138 name); 3139 } 3140 3141 release_firmware(fw); 3142 3143 return vbt; 3144 } 3145 3146 static struct vbt_header *oprom_get_vbt(struct intel_display *display, 3147 struct intel_rom *rom, 3148 size_t *size, const char *type) 3149 { 3150 struct vbt_header *vbt; 3151 size_t vbt_size; 3152 loff_t offset; 3153 3154 if (!rom) 3155 return NULL; 3156 3157 BUILD_BUG_ON(vbt_signature_len != sizeof(vbt_signature) - 1); 3158 BUILD_BUG_ON(vbt_signature_len != sizeof(u32)); 3159 3160 offset = intel_rom_find(rom, *(const u32 *)vbt_signature); 3161 if (offset < 0) 3162 goto err_free_rom; 3163 3164 if (sizeof(struct vbt_header) > intel_rom_size(rom) - offset) { 3165 drm_dbg_kms(display->drm, "VBT header incomplete\n"); 3166 goto err_free_rom; 3167 } 3168 3169 BUILD_BUG_ON(sizeof(vbt->vbt_size) != sizeof(u16)); 3170 3171 vbt_size = intel_rom_read16(rom, offset + offsetof(struct vbt_header, vbt_size)); 3172 if (vbt_size > intel_rom_size(rom) - offset) { 3173 drm_dbg_kms(display->drm, "VBT incomplete (vbt_size overflows)\n"); 3174 goto err_free_rom; 3175 } 3176 3177 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL); 3178 if (!vbt) 3179 goto err_free_rom; 3180 3181 intel_rom_read_block(rom, vbt, offset, vbt_size); 3182 3183 if (!intel_bios_is_valid_vbt(display, vbt, vbt_size)) 3184 goto err_free_vbt; 3185 3186 drm_dbg_kms(display->drm, "Found valid VBT in %s\n", type); 3187 3188 if (size) 3189 *size = vbt_size; 3190 3191 intel_rom_free(rom); 3192 3193 return vbt; 3194 3195 err_free_vbt: 3196 kfree(vbt); 3197 err_free_rom: 3198 intel_rom_free(rom); 3199 return NULL; 3200 } 3201 3202 static const struct vbt_header *intel_bios_get_vbt(struct intel_display *display, 3203 size_t *sizep) 3204 { 3205 const struct vbt_header *vbt = NULL; 3206 3207 vbt = firmware_get_vbt(display, sizep); 3208 3209 if (!vbt) 3210 vbt = intel_opregion_get_vbt(display, sizep); 3211 3212 /* 3213 * If the OpRegion does not have VBT, look in SPI flash 3214 * through MMIO or PCI mapping 3215 */ 3216 if (!vbt && display->platform.dgfx) 3217 with_intel_display_rpm(display) 3218 vbt = oprom_get_vbt(display, intel_rom_spi(display->drm), sizep, "SPI flash"); 3219 3220 if (!vbt) 3221 with_intel_display_rpm(display) 3222 vbt = oprom_get_vbt(display, intel_rom_pci(display->drm), sizep, "PCI ROM"); 3223 3224 return vbt; 3225 } 3226 3227 /** 3228 * intel_bios_init - find VBT and initialize settings from the BIOS 3229 * @display: display device instance 3230 * 3231 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 3232 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 3233 * initialize some defaults if the VBT is not present at all. 3234 */ 3235 void intel_bios_init(struct intel_display *display) 3236 { 3237 const struct vbt_header *vbt; 3238 const struct bdb_header *bdb; 3239 3240 INIT_LIST_HEAD(&display->vbt.display_devices); 3241 INIT_LIST_HEAD(&display->vbt.bdb_blocks); 3242 3243 if (!HAS_DISPLAY(display)) { 3244 drm_dbg_kms(display->drm, 3245 "Skipping VBT init due to disabled display.\n"); 3246 return; 3247 } 3248 3249 init_vbt_defaults(display); 3250 3251 vbt = intel_bios_get_vbt(display, NULL); 3252 3253 if (!vbt) 3254 goto out; 3255 3256 bdb = get_bdb_header(vbt); 3257 display->vbt.version = bdb->version; 3258 3259 drm_dbg_kms(display->drm, 3260 "VBT signature \"%.*s\", BDB version %d\n", 3261 (int)sizeof(vbt->signature), vbt->signature, 3262 display->vbt.version); 3263 3264 init_bdb_blocks(display, bdb); 3265 3266 /* Grab useful general definitions */ 3267 parse_general_features(display); 3268 parse_general_definitions(display); 3269 parse_driver_features(display); 3270 3271 /* Depends on child device list */ 3272 parse_compression_parameters(display); 3273 3274 out: 3275 if (!vbt) { 3276 drm_info(display->drm, 3277 "Failed to find VBIOS tables (VBT)\n"); 3278 init_vbt_missing_defaults(display); 3279 } 3280 3281 /* Further processing on pre-parsed or generated child device data */ 3282 parse_sdvo_device_mapping(display); 3283 parse_ddi_ports(display); 3284 3285 kfree(vbt); 3286 } 3287 3288 static void intel_bios_init_panel(struct intel_display *display, 3289 struct intel_panel *panel, 3290 const struct intel_bios_encoder_data *devdata, 3291 const struct drm_edid *drm_edid, 3292 bool use_fallback) 3293 { 3294 /* already have it? */ 3295 if (panel->vbt.panel_type >= 0) { 3296 drm_WARN_ON(display->drm, !use_fallback); 3297 return; 3298 } 3299 3300 panel->vbt.panel_type = get_panel_type(display, devdata, 3301 drm_edid, use_fallback); 3302 if (panel->vbt.panel_type < 0) { 3303 drm_WARN_ON(display->drm, use_fallback); 3304 return; 3305 } 3306 3307 init_vbt_panel_defaults(panel); 3308 3309 parse_panel_options(display, panel); 3310 parse_generic_dtd(display, panel); 3311 parse_lfp_data(display, panel); 3312 parse_lfp_backlight(display, panel); 3313 parse_sdvo_lvds_data(display, panel); 3314 parse_panel_driver_features(display, panel); 3315 parse_power_conservation_features(display, panel); 3316 parse_edp(display, panel); 3317 parse_psr(display, panel); 3318 parse_mipi_config(display, panel); 3319 parse_mipi_sequence(display, panel); 3320 } 3321 3322 void intel_bios_init_panel_early(struct intel_display *display, 3323 struct intel_panel *panel, 3324 const struct intel_bios_encoder_data *devdata) 3325 { 3326 intel_bios_init_panel(display, panel, devdata, NULL, false); 3327 } 3328 3329 void intel_bios_init_panel_late(struct intel_display *display, 3330 struct intel_panel *panel, 3331 const struct intel_bios_encoder_data *devdata, 3332 const struct drm_edid *drm_edid) 3333 { 3334 intel_bios_init_panel(display, panel, devdata, drm_edid, true); 3335 } 3336 3337 /** 3338 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 3339 * @display: display device instance 3340 */ 3341 void intel_bios_driver_remove(struct intel_display *display) 3342 { 3343 struct intel_bios_encoder_data *devdata, *nd; 3344 struct bdb_block_entry *entry, *ne; 3345 3346 list_for_each_entry_safe(devdata, nd, &display->vbt.display_devices, 3347 node) { 3348 list_del(&devdata->node); 3349 kfree(devdata->dsc); 3350 kfree(devdata); 3351 } 3352 3353 list_for_each_entry_safe(entry, ne, &display->vbt.bdb_blocks, node) { 3354 list_del(&entry->node); 3355 kfree(entry); 3356 } 3357 } 3358 3359 void intel_bios_fini_panel(struct intel_panel *panel) 3360 { 3361 kfree(panel->vbt.sdvo_lvds_vbt_mode); 3362 panel->vbt.sdvo_lvds_vbt_mode = NULL; 3363 kfree(panel->vbt.lfp_vbt_mode); 3364 panel->vbt.lfp_vbt_mode = NULL; 3365 kfree(panel->vbt.dsi.data); 3366 panel->vbt.dsi.data = NULL; 3367 kfree(panel->vbt.dsi.pps); 3368 panel->vbt.dsi.pps = NULL; 3369 kfree(panel->vbt.dsi.config); 3370 panel->vbt.dsi.config = NULL; 3371 kfree(panel->vbt.dsi.deassert_seq); 3372 panel->vbt.dsi.deassert_seq = NULL; 3373 } 3374 3375 /** 3376 * intel_bios_is_tv_present - is integrated TV present in VBT 3377 * @display: display device instance 3378 * 3379 * Return true if TV is present. If no child devices were parsed from VBT, 3380 * assume TV is present. 3381 */ 3382 bool intel_bios_is_tv_present(struct intel_display *display) 3383 { 3384 const struct intel_bios_encoder_data *devdata; 3385 3386 if (!display->vbt.int_tv_support) 3387 return false; 3388 3389 if (list_empty(&display->vbt.display_devices)) 3390 return true; 3391 3392 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3393 const struct child_device_config *child = &devdata->child; 3394 3395 /* 3396 * If the device type is not TV, continue. 3397 */ 3398 switch (child->device_type) { 3399 case DEVICE_TYPE_INT_TV: 3400 case DEVICE_TYPE_TV: 3401 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 3402 break; 3403 default: 3404 continue; 3405 } 3406 /* Only when the addin_offset is non-zero, it is regarded 3407 * as present. 3408 */ 3409 if (child->addin_offset) 3410 return true; 3411 } 3412 3413 return false; 3414 } 3415 3416 /** 3417 * intel_bios_is_lvds_present - is LVDS present in VBT 3418 * @display: display device instance 3419 * @i2c_pin: i2c pin for LVDS if present 3420 * 3421 * Return true if LVDS is present. If no child devices were parsed from VBT, 3422 * assume LVDS is present. 3423 */ 3424 bool intel_bios_is_lvds_present(struct intel_display *display, u8 *i2c_pin) 3425 { 3426 const struct intel_bios_encoder_data *devdata; 3427 3428 if (list_empty(&display->vbt.display_devices)) 3429 return true; 3430 3431 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3432 const struct child_device_config *child = &devdata->child; 3433 3434 /* If the device type is not LFP, continue. 3435 * We have to check both the new identifiers as well as the 3436 * old for compatibility with some BIOSes. 3437 */ 3438 if (child->device_type != DEVICE_TYPE_INT_LFP && 3439 child->device_type != DEVICE_TYPE_LFP) 3440 continue; 3441 3442 if (intel_gmbus_is_valid_pin(display, child->i2c_pin)) 3443 *i2c_pin = child->i2c_pin; 3444 3445 /* However, we cannot trust the BIOS writers to populate 3446 * the VBT correctly. Since LVDS requires additional 3447 * information from AIM blocks, a non-zero addin offset is 3448 * a good indicator that the LVDS is actually present. 3449 */ 3450 if (child->addin_offset) 3451 return true; 3452 3453 /* But even then some BIOS writers perform some black magic 3454 * and instantiate the device without reference to any 3455 * additional data. Trust that if the VBT was written into 3456 * the OpRegion then they have validated the LVDS's existence. 3457 */ 3458 return intel_opregion_vbt_present(display); 3459 } 3460 3461 return false; 3462 } 3463 3464 /** 3465 * intel_bios_is_port_present - is the specified digital port present 3466 * @display: display device instance 3467 * @port: port to check 3468 * 3469 * Return true if the device in %port is present. 3470 */ 3471 bool intel_bios_is_port_present(struct intel_display *display, enum port port) 3472 { 3473 const struct intel_bios_encoder_data *devdata; 3474 3475 if (WARN_ON(!has_ddi_port_info(display))) 3476 return true; 3477 3478 if (!is_port_valid(display, port)) 3479 return false; 3480 3481 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3482 const struct child_device_config *child = &devdata->child; 3483 3484 if (dvo_port_to_port(display, child->dvo_port) == port) 3485 return true; 3486 } 3487 3488 return false; 3489 } 3490 3491 bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata) 3492 { 3493 const struct child_device_config *child = &devdata->child; 3494 3495 if (!devdata) 3496 return false; 3497 3498 if (!intel_bios_encoder_supports_dp(devdata) || 3499 !intel_bios_encoder_supports_hdmi(devdata)) 3500 return false; 3501 3502 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA) 3503 return true; 3504 3505 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 3506 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA && 3507 child->aux_channel != 0) 3508 return true; 3509 3510 return false; 3511 } 3512 3513 /** 3514 * intel_bios_is_dsi_present - is DSI present in VBT 3515 * @display: display device instance 3516 * @port: port for DSI if present 3517 * 3518 * Return true if DSI is present, and return the port in %port. 3519 */ 3520 bool intel_bios_is_dsi_present(struct intel_display *display, 3521 enum port *port) 3522 { 3523 const struct intel_bios_encoder_data *devdata; 3524 3525 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3526 const struct child_device_config *child = &devdata->child; 3527 u8 dvo_port = child->dvo_port; 3528 3529 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3530 continue; 3531 3532 if (dsi_dvo_port_to_port(display, dvo_port) == PORT_NONE) { 3533 drm_dbg_kms(display->drm, 3534 "VBT has unsupported DSI port %c\n", 3535 port_name(dvo_port - DVO_PORT_MIPIA)); 3536 continue; 3537 } 3538 3539 if (port) 3540 *port = dsi_dvo_port_to_port(display, dvo_port); 3541 return true; 3542 } 3543 3544 return false; 3545 } 3546 3547 static void fill_dsc(struct intel_crtc_state *crtc_state, 3548 struct dsc_compression_parameters_entry *dsc, 3549 int dsc_max_bpc) 3550 { 3551 struct intel_display *display = to_intel_display(crtc_state); 3552 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 3553 int bpc = 8; 3554 3555 vdsc_cfg->dsc_version_major = dsc->version_major; 3556 vdsc_cfg->dsc_version_minor = dsc->version_minor; 3557 3558 if (dsc->support_12bpc && dsc_max_bpc >= 12) 3559 bpc = 12; 3560 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 3561 bpc = 10; 3562 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 3563 bpc = 8; 3564 else 3565 drm_dbg_kms(display->drm, "VBT: Unsupported BPC %d for DCS\n", 3566 dsc_max_bpc); 3567 3568 crtc_state->pipe_bpp = bpc * 3; 3569 3570 crtc_state->dsc.compressed_bpp_x16 = fxp_q4_from_int(min(crtc_state->pipe_bpp, 3571 VBT_DSC_MAX_BPP(dsc->max_bpp))); 3572 3573 /* 3574 * FIXME: This is ugly, and slice count should take DSC engine 3575 * throughput etc. into account. 3576 * 3577 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 3578 */ 3579 if (dsc->slices_per_line & BIT(2)) { 3580 crtc_state->dsc.slice_count = 4; 3581 } else if (dsc->slices_per_line & BIT(1)) { 3582 crtc_state->dsc.slice_count = 2; 3583 } else { 3584 /* FIXME */ 3585 if (!(dsc->slices_per_line & BIT(0))) 3586 drm_dbg_kms(display->drm, 3587 "VBT: Unsupported DSC slice count for DSI\n"); 3588 3589 crtc_state->dsc.slice_count = 1; 3590 } 3591 3592 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 3593 crtc_state->dsc.slice_count != 0) 3594 drm_dbg_kms(display->drm, 3595 "VBT: DSC hdisplay %d not divisible by slice count %d\n", 3596 crtc_state->hw.adjusted_mode.crtc_hdisplay, 3597 crtc_state->dsc.slice_count); 3598 3599 /* 3600 * The VBT rc_buffer_block_size and rc_buffer_size definitions 3601 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. 3602 */ 3603 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, 3604 dsc->rc_buffer_size); 3605 3606 /* FIXME: DSI spec says bpc + 1 for this one */ 3607 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 3608 3609 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 3610 3611 vdsc_cfg->slice_height = dsc->slice_height; 3612 } 3613 3614 /* FIXME: initially DSI specific */ 3615 bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 3616 struct intel_crtc_state *crtc_state, 3617 int dsc_max_bpc) 3618 { 3619 struct intel_display *display = to_intel_display(encoder); 3620 const struct intel_bios_encoder_data *devdata; 3621 3622 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3623 const struct child_device_config *child = &devdata->child; 3624 3625 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3626 continue; 3627 3628 if (dsi_dvo_port_to_port(display, child->dvo_port) == encoder->port) { 3629 if (!devdata->dsc) 3630 return false; 3631 3632 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 3633 3634 return true; 3635 } 3636 } 3637 3638 return false; 3639 } 3640 3641 static const u8 adlp_aux_ch_map[] = { 3642 [AUX_CH_A] = DP_AUX_A, 3643 [AUX_CH_B] = DP_AUX_B, 3644 [AUX_CH_C] = DP_AUX_C, 3645 [AUX_CH_D_XELPD] = DP_AUX_D, 3646 [AUX_CH_E_XELPD] = DP_AUX_E, 3647 [AUX_CH_USBC1] = DP_AUX_F, 3648 [AUX_CH_USBC2] = DP_AUX_G, 3649 [AUX_CH_USBC3] = DP_AUX_H, 3650 [AUX_CH_USBC4] = DP_AUX_I, 3651 }; 3652 3653 /* 3654 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E 3655 * map to DDI A,TC1,TC2,TC3,TC4 respectively. 3656 */ 3657 static const u8 adls_aux_ch_map[] = { 3658 [AUX_CH_A] = DP_AUX_A, 3659 [AUX_CH_USBC1] = DP_AUX_B, 3660 [AUX_CH_USBC2] = DP_AUX_C, 3661 [AUX_CH_USBC3] = DP_AUX_D, 3662 [AUX_CH_USBC4] = DP_AUX_E, 3663 }; 3664 3665 /* 3666 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D 3667 * map to DDI A,B,TC1,TC2 respectively. 3668 */ 3669 static const u8 rkl_aux_ch_map[] = { 3670 [AUX_CH_A] = DP_AUX_A, 3671 [AUX_CH_B] = DP_AUX_B, 3672 [AUX_CH_USBC1] = DP_AUX_C, 3673 [AUX_CH_USBC2] = DP_AUX_D, 3674 }; 3675 3676 static const u8 direct_aux_ch_map[] = { 3677 [AUX_CH_A] = DP_AUX_A, 3678 [AUX_CH_B] = DP_AUX_B, 3679 [AUX_CH_C] = DP_AUX_C, 3680 [AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */ 3681 [AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */ 3682 [AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */ 3683 [AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */ 3684 [AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */ 3685 [AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */ 3686 }; 3687 3688 static enum aux_ch map_aux_ch(struct intel_display *display, u8 aux_channel) 3689 { 3690 const u8 *aux_ch_map; 3691 int i, n_entries; 3692 3693 if (DISPLAY_VER(display) >= 13) { 3694 aux_ch_map = adlp_aux_ch_map; 3695 n_entries = ARRAY_SIZE(adlp_aux_ch_map); 3696 } else if (display->platform.alderlake_s) { 3697 aux_ch_map = adls_aux_ch_map; 3698 n_entries = ARRAY_SIZE(adls_aux_ch_map); 3699 } else if (display->platform.dg1 || display->platform.rocketlake) { 3700 aux_ch_map = rkl_aux_ch_map; 3701 n_entries = ARRAY_SIZE(rkl_aux_ch_map); 3702 } else { 3703 aux_ch_map = direct_aux_ch_map; 3704 n_entries = ARRAY_SIZE(direct_aux_ch_map); 3705 } 3706 3707 for (i = 0; i < n_entries; i++) { 3708 if (aux_ch_map[i] == aux_channel) 3709 return i; 3710 } 3711 3712 drm_dbg_kms(display->drm, 3713 "Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n", 3714 aux_channel); 3715 3716 return AUX_CH_NONE; 3717 } 3718 3719 enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata) 3720 { 3721 if (!devdata || !devdata->child.aux_channel) 3722 return AUX_CH_NONE; 3723 3724 return map_aux_ch(devdata->display, devdata->child.aux_channel); 3725 } 3726 3727 bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata) 3728 { 3729 struct intel_display *display; 3730 u8 aux_channel; 3731 int count = 0; 3732 3733 if (!devdata || !devdata->child.aux_channel) 3734 return false; 3735 3736 display = devdata->display; 3737 aux_channel = devdata->child.aux_channel; 3738 3739 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3740 if (intel_bios_encoder_supports_dp(devdata) && 3741 aux_channel == devdata->child.aux_channel) 3742 count++; 3743 } 3744 3745 return count > 1; 3746 } 3747 3748 int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata) 3749 { 3750 if (!devdata || devdata->display->vbt.version < 196 || !devdata->child.iboost) 3751 return 0; 3752 3753 return translate_iboost(devdata->display, devdata->child.dp_iboost_level); 3754 } 3755 3756 int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata) 3757 { 3758 if (!devdata || devdata->display->vbt.version < 196 || !devdata->child.iboost) 3759 return 0; 3760 3761 return translate_iboost(devdata->display, devdata->child.hdmi_iboost_level); 3762 } 3763 3764 int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata) 3765 { 3766 if (!devdata || !devdata->child.ddc_pin) 3767 return 0; 3768 3769 return map_ddc_pin(devdata->display, devdata->child.ddc_pin); 3770 } 3771 3772 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata) 3773 { 3774 return devdata->display->vbt.version >= 195 && devdata->child.dp_usb_type_c; 3775 } 3776 3777 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata) 3778 { 3779 return devdata->display->vbt.version >= 209 && devdata->child.tbt; 3780 } 3781 3782 bool intel_bios_encoder_is_dedicated_external(const struct intel_bios_encoder_data *devdata) 3783 { 3784 return devdata->display->vbt.version >= 264 && 3785 devdata->child.dedicated_external; 3786 } 3787 3788 bool intel_bios_encoder_supports_dyn_port_over_tc(const struct intel_bios_encoder_data *devdata) 3789 { 3790 return devdata->display->vbt.version >= 264 && 3791 devdata->child.dyn_port_over_tc; 3792 } 3793 3794 bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata) 3795 { 3796 return devdata && devdata->child.lane_reversal; 3797 } 3798 3799 bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata) 3800 { 3801 return devdata && devdata->child.hpd_invert; 3802 } 3803 3804 const struct intel_bios_encoder_data * 3805 intel_bios_encoder_data_lookup(struct intel_display *display, enum port port) 3806 { 3807 struct intel_bios_encoder_data *devdata; 3808 3809 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3810 if (intel_bios_encoder_port(devdata) == port) 3811 return devdata; 3812 } 3813 3814 return NULL; 3815 } 3816 3817 void intel_bios_for_each_encoder(struct intel_display *display, 3818 void (*func)(struct intel_display *display, 3819 const struct intel_bios_encoder_data *devdata)) 3820 { 3821 struct intel_bios_encoder_data *devdata; 3822 3823 list_for_each_entry(devdata, &display->vbt.display_devices, node) 3824 func(display, devdata); 3825 } 3826 3827 static int intel_bios_vbt_show(struct seq_file *m, void *unused) 3828 { 3829 struct intel_display *display = m->private; 3830 const void *vbt; 3831 size_t vbt_size; 3832 3833 vbt = intel_bios_get_vbt(display, &vbt_size); 3834 3835 if (vbt) { 3836 seq_write(m, vbt, vbt_size); 3837 kfree(vbt); 3838 } 3839 3840 return 0; 3841 } 3842 3843 DEFINE_SHOW_ATTRIBUTE(intel_bios_vbt); 3844 3845 void intel_bios_debugfs_register(struct intel_display *display) 3846 { 3847 debugfs_create_file("i915_vbt", 0444, display->drm->debugfs_root, 3848 display, &intel_bios_vbt_fops); 3849 } 3850