xref: /linux/drivers/gpu/drm/gma500/cdv_intel_lvds.c (revision 3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright © 2006-2011 Intel Corporation
4  *
5  * Authors:
6  *	Eric Anholt <eric@anholt.net>
7  *	Dave Airlie <airlied@linux.ie>
8  *	Jesse Barnes <jesse.barnes@intel.com>
9  */
10 
11 #include <linux/dmi.h>
12 #include <linux/i2c.h>
13 #include <linux/pm_runtime.h>
14 
15 #include <drm/drm_crtc_helper.h>
16 #include <drm/drm_encoder.h>
17 #include <drm/drm_modeset_helper_vtables.h>
18 #include <drm/drm_print.h>
19 
20 #include "cdv_device.h"
21 #include "intel_bios.h"
22 #include "power.h"
23 #include "psb_drv.h"
24 #include "psb_intel_drv.h"
25 #include "psb_intel_reg.h"
26 
27 /*
28  * LVDS I2C backlight control macros
29  */
30 #define BRIGHTNESS_MAX_LEVEL 100
31 #define BRIGHTNESS_MASK 0xFF
32 #define BLC_I2C_TYPE	0x01
33 #define BLC_PWM_TYPT	0x02
34 
35 #define BLC_POLARITY_NORMAL 0
36 #define BLC_POLARITY_INVERSE 1
37 
38 #define PSB_BLC_MAX_PWM_REG_FREQ       (0xFFFE)
39 #define PSB_BLC_MIN_PWM_REG_FREQ	(0x2)
40 #define PSB_BLC_PWM_PRECISION_FACTOR	(10)
41 #define PSB_BACKLIGHT_PWM_CTL_SHIFT	(16)
42 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
43 
44 struct cdv_intel_lvds_priv {
45 	/**
46 	 * Saved LVDO output states
47 	 */
48 	uint32_t savePP_ON;
49 	uint32_t savePP_OFF;
50 	uint32_t saveLVDS;
51 	uint32_t savePP_CONTROL;
52 	uint32_t savePP_CYCLE;
53 	uint32_t savePFIT_CONTROL;
54 	uint32_t savePFIT_PGM_RATIOS;
55 	uint32_t saveBLC_PWM_CTL;
56 };
57 
58 /*
59  * Returns the maximum level of the backlight duty cycle field.
60  */
61 static u32 cdv_intel_lvds_get_max_backlight(struct drm_device *dev)
62 {
63 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
64 	u32 retval;
65 
66 	if (gma_power_begin(dev, false)) {
67 		retval = ((REG_READ(BLC_PWM_CTL) &
68 			  BACKLIGHT_MODULATION_FREQ_MASK) >>
69 			  BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
70 
71 		gma_power_end(dev);
72 	} else
73 		retval = ((dev_priv->regs.saveBLC_PWM_CTL &
74 			  BACKLIGHT_MODULATION_FREQ_MASK) >>
75 			  BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
76 
77 	return retval;
78 }
79 
80 /*
81  * Sets the backlight level.
82  *
83  * level backlight level, from 0 to cdv_intel_lvds_get_max_backlight().
84  */
85 static void cdv_intel_lvds_set_backlight(struct drm_device *dev, int level)
86 {
87 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
88 	u32 blc_pwm_ctl;
89 
90 	if (gma_power_begin(dev, false)) {
91 		blc_pwm_ctl =
92 			REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
93 		REG_WRITE(BLC_PWM_CTL,
94 				(blc_pwm_ctl |
95 				(level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
96 		gma_power_end(dev);
97 	} else {
98 		blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
99 				~BACKLIGHT_DUTY_CYCLE_MASK;
100 		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
101 					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
102 	}
103 }
104 
105 /*
106  * Sets the power state for the panel.
107  */
108 static void cdv_intel_lvds_set_power(struct drm_device *dev,
109 				     struct drm_encoder *encoder, bool on)
110 {
111 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
112 	u32 pp_status;
113 
114 	if (!gma_power_begin(dev, true))
115 		return;
116 
117 	if (on) {
118 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
119 			  POWER_TARGET_ON);
120 		do {
121 			pp_status = REG_READ(PP_STATUS);
122 		} while ((pp_status & PP_ON) == 0);
123 
124 		cdv_intel_lvds_set_backlight(dev,
125 				dev_priv->mode_dev.backlight_duty_cycle);
126 	} else {
127 		cdv_intel_lvds_set_backlight(dev, 0);
128 
129 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
130 			  ~POWER_TARGET_ON);
131 		do {
132 			pp_status = REG_READ(PP_STATUS);
133 		} while (pp_status & PP_ON);
134 	}
135 	gma_power_end(dev);
136 }
137 
138 static void cdv_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
139 {
140 	struct drm_device *dev = encoder->dev;
141 	if (mode == DRM_MODE_DPMS_ON)
142 		cdv_intel_lvds_set_power(dev, encoder, true);
143 	else
144 		cdv_intel_lvds_set_power(dev, encoder, false);
145 	/* XXX: We never power down the LVDS pairs. */
146 }
147 
148 static void cdv_intel_lvds_save(struct drm_connector *connector)
149 {
150 }
151 
152 static void cdv_intel_lvds_restore(struct drm_connector *connector)
153 {
154 }
155 
156 static enum drm_mode_status cdv_intel_lvds_mode_valid(struct drm_connector *connector,
157 			      const struct drm_display_mode *mode)
158 {
159 	struct drm_device *dev = connector->dev;
160 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
161 	struct drm_display_mode *fixed_mode =
162 					dev_priv->mode_dev.panel_fixed_mode;
163 
164 	/* just in case */
165 	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
166 		return MODE_NO_DBLESCAN;
167 
168 	/* just in case */
169 	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
170 		return MODE_NO_INTERLACE;
171 
172 	if (fixed_mode) {
173 		if (mode->hdisplay > fixed_mode->hdisplay)
174 			return MODE_PANEL;
175 		if (mode->vdisplay > fixed_mode->vdisplay)
176 			return MODE_PANEL;
177 	}
178 	return MODE_OK;
179 }
180 
181 static bool cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder,
182 				  const struct drm_display_mode *mode,
183 				  struct drm_display_mode *adjusted_mode)
184 {
185 	struct drm_device *dev = encoder->dev;
186 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
187 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
188 	struct drm_encoder *tmp_encoder;
189 	struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
190 
191 	/* Should never happen!! */
192 	list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
193 			    head) {
194 		if (tmp_encoder != encoder
195 		    && tmp_encoder->crtc == encoder->crtc) {
196 			pr_err("Can't enable LVDS and another encoder on the same pipe\n");
197 			return false;
198 		}
199 	}
200 
201 	/*
202 	 * If we have timings from the BIOS for the panel, put them in
203 	 * to the adjusted mode.  The CRTC will be set up for this mode,
204 	 * with the panel scaling set up to source from the H/VDisplay
205 	 * of the original mode.
206 	 */
207 	if (panel_fixed_mode != NULL) {
208 		adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
209 		adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
210 		adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
211 		adjusted_mode->htotal = panel_fixed_mode->htotal;
212 		adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
213 		adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
214 		adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
215 		adjusted_mode->vtotal = panel_fixed_mode->vtotal;
216 		adjusted_mode->clock = panel_fixed_mode->clock;
217 		drm_mode_set_crtcinfo(adjusted_mode,
218 				      CRTC_INTERLACE_HALVE_V);
219 	}
220 
221 	/*
222 	 * XXX: It would be nice to support lower refresh rates on the
223 	 * panels to reduce power consumption, and perhaps match the
224 	 * user's requested refresh rate.
225 	 */
226 
227 	return true;
228 }
229 
230 static void cdv_intel_lvds_prepare(struct drm_encoder *encoder)
231 {
232 	struct drm_device *dev = encoder->dev;
233 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
234 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
235 
236 	if (!gma_power_begin(dev, true))
237 		return;
238 
239 	mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
240 	mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
241 					  BACKLIGHT_DUTY_CYCLE_MASK);
242 
243 	cdv_intel_lvds_set_power(dev, encoder, false);
244 
245 	gma_power_end(dev);
246 }
247 
248 static void cdv_intel_lvds_commit(struct drm_encoder *encoder)
249 {
250 	struct drm_device *dev = encoder->dev;
251 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
252 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
253 
254 	if (mode_dev->backlight_duty_cycle == 0)
255 		mode_dev->backlight_duty_cycle =
256 		    cdv_intel_lvds_get_max_backlight(dev);
257 
258 	cdv_intel_lvds_set_power(dev, encoder, true);
259 }
260 
261 static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,
262 				struct drm_display_mode *mode,
263 				struct drm_display_mode *adjusted_mode)
264 {
265 	struct drm_device *dev = encoder->dev;
266 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
267 	struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
268 	u32 pfit_control;
269 
270 	/*
271 	 * The LVDS pin pair will already have been turned on in the
272 	 * cdv_intel_crtc_mode_set since it has a large impact on the DPLL
273 	 * settings.
274 	 */
275 
276 	/*
277 	 * Enable automatic panel scaling so that non-native modes fill the
278 	 * screen.  Should be enabled before the pipe is enabled, according to
279 	 * register description and PRM.
280 	 */
281 	if (mode->hdisplay != adjusted_mode->hdisplay ||
282 	    mode->vdisplay != adjusted_mode->vdisplay)
283 		pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
284 				HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
285 				HORIZ_INTERP_BILINEAR);
286 	else
287 		pfit_control = 0;
288 
289 	pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;
290 
291 	if (dev_priv->lvds_dither)
292 		pfit_control |= PANEL_8TO6_DITHER_ENABLE;
293 
294 	REG_WRITE(PFIT_CONTROL, pfit_control);
295 }
296 
297 /*
298  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
299  */
300 static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
301 {
302 	struct drm_device *dev = connector->dev;
303 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
304 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
305 	int ret;
306 
307 	ret = psb_intel_ddc_get_modes(connector, connector->ddc);
308 
309 	if (ret)
310 		return ret;
311 
312 	if (mode_dev->panel_fixed_mode != NULL) {
313 		struct drm_display_mode *mode =
314 		    drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
315 		if (!mode)
316 			return 0;
317 
318 		drm_mode_probed_add(connector, mode);
319 		return 1;
320 	}
321 
322 	return 0;
323 }
324 
325 static void cdv_intel_lvds_destroy(struct drm_connector *connector)
326 {
327 	struct gma_connector *gma_connector = to_gma_connector(connector);
328 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
329 
330 	gma_i2c_destroy(to_gma_i2c_chan(connector->ddc));
331 	gma_i2c_destroy(gma_encoder->i2c_bus);
332 	drm_connector_cleanup(connector);
333 	kfree(gma_connector);
334 }
335 
336 static int cdv_intel_lvds_set_property(struct drm_connector *connector,
337 				       struct drm_property *property,
338 				       uint64_t value)
339 {
340 	struct drm_encoder *encoder = connector->encoder;
341 
342 	if (!strcmp(property->name, "scaling mode") && encoder) {
343 		struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
344 		uint64_t curValue;
345 
346 		if (!crtc)
347 			return -1;
348 
349 		switch (value) {
350 		case DRM_MODE_SCALE_FULLSCREEN:
351 			break;
352 		case DRM_MODE_SCALE_NO_SCALE:
353 			break;
354 		case DRM_MODE_SCALE_ASPECT:
355 			break;
356 		default:
357 			return -1;
358 		}
359 
360 		if (drm_object_property_get_value(&connector->base,
361 						     property,
362 						     &curValue))
363 			return -1;
364 
365 		if (curValue == value)
366 			return 0;
367 
368 		if (drm_object_property_set_value(&connector->base,
369 							property,
370 							value))
371 			return -1;
372 
373 		if (crtc->saved_mode.hdisplay != 0 &&
374 		    crtc->saved_mode.vdisplay != 0) {
375 			if (!drm_crtc_helper_set_mode(encoder->crtc,
376 						      &crtc->saved_mode,
377 						      encoder->crtc->x,
378 						      encoder->crtc->y,
379 						      encoder->crtc->primary->fb))
380 				return -1;
381 		}
382 	} else if (!strcmp(property->name, "backlight") && encoder) {
383 		if (drm_object_property_set_value(&connector->base,
384 							property,
385 							value))
386 			return -1;
387 		else
388                         gma_backlight_set(encoder->dev, value);
389 	} else if (!strcmp(property->name, "DPMS") && encoder) {
390 		const struct drm_encoder_helper_funcs *helpers =
391 					encoder->helper_private;
392 		helpers->dpms(encoder, value);
393 	}
394 	return 0;
395 }
396 
397 static const struct drm_encoder_funcs cdv_intel_lvds_funcs = {
398 	.destroy = drm_encoder_cleanup,
399 };
400 
401 static const struct drm_encoder_helper_funcs
402 					cdv_intel_lvds_helper_funcs = {
403 	.dpms = cdv_intel_lvds_encoder_dpms,
404 	.mode_fixup = cdv_intel_lvds_mode_fixup,
405 	.prepare = cdv_intel_lvds_prepare,
406 	.mode_set = cdv_intel_lvds_mode_set,
407 	.commit = cdv_intel_lvds_commit,
408 };
409 
410 static const struct drm_connector_helper_funcs
411 				cdv_intel_lvds_connector_helper_funcs = {
412 	.get_modes = cdv_intel_lvds_get_modes,
413 	.mode_valid = cdv_intel_lvds_mode_valid,
414 	.best_encoder = gma_best_encoder,
415 };
416 
417 static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
418 	.dpms = drm_helper_connector_dpms,
419 	.fill_modes = drm_helper_probe_single_connector_modes,
420 	.set_property = cdv_intel_lvds_set_property,
421 	.destroy = cdv_intel_lvds_destroy,
422 };
423 
424 /*
425  * Enumerate the child dev array parsed from VBT to check whether
426  * the LVDS is present.
427  * If it is present, return 1.
428  * If it is not present, return false.
429  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
430  */
431 static bool lvds_is_present_in_vbt(struct drm_device *dev,
432 				   u8 *i2c_pin)
433 {
434 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
435 	int i;
436 
437 	if (!dev_priv->child_dev_num)
438 		return true;
439 
440 	for (i = 0; i < dev_priv->child_dev_num; i++) {
441 		struct child_device_config *child = dev_priv->child_dev + i;
442 
443 		/* If the device type is not LFP, continue.
444 		 * We have to check both the new identifiers as well as the
445 		 * old for compatibility with some BIOSes.
446 		 */
447 		if (child->device_type != DEVICE_TYPE_INT_LFP &&
448 		    child->device_type != DEVICE_TYPE_LFP)
449 			continue;
450 
451 		if (child->i2c_pin)
452 		    *i2c_pin = child->i2c_pin;
453 
454 		/* However, we cannot trust the BIOS writers to populate
455 		 * the VBT correctly.  Since LVDS requires additional
456 		 * information from AIM blocks, a non-zero addin offset is
457 		 * a good indicator that the LVDS is actually present.
458 		 */
459 		if (child->addin_offset)
460 			return true;
461 
462 		/* But even then some BIOS writers perform some black magic
463 		 * and instantiate the device without reference to any
464 		 * additional data.  Trust that if the VBT was written into
465 		 * the OpRegion then they have validated the LVDS's existence.
466 		 */
467 		if (dev_priv->opregion.vbt)
468 			return true;
469 	}
470 
471 	return false;
472 }
473 
474 /**
475  * cdv_intel_lvds_init - setup LVDS connectors on this device
476  * @dev: drm device
477  * @mode_dev: PSB mode device
478  *
479  * Create the connector, register the LVDS DDC bus, and try to figure out what
480  * modes we can display on the LVDS panel (if present).
481  */
482 void cdv_intel_lvds_init(struct drm_device *dev,
483 		     struct psb_intel_mode_device *mode_dev)
484 {
485 	struct gma_encoder *gma_encoder;
486 	struct gma_connector *gma_connector;
487 	struct cdv_intel_lvds_priv *lvds_priv;
488 	struct drm_connector *connector;
489 	struct drm_encoder *encoder;
490 	struct drm_display_mode *scan;
491 	struct drm_crtc *crtc;
492 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
493 	struct gma_i2c_chan *ddc_bus;
494 	u32 lvds;
495 	int pipe;
496 	int ret;
497 	u8 pin;
498 
499 	if (!dev_priv->lvds_enabled_in_vbt)
500 		return;
501 
502 	pin = GMBUS_PORT_PANEL;
503 	if (!lvds_is_present_in_vbt(dev, &pin)) {
504 		DRM_DEBUG_KMS("LVDS is not present in VBT\n");
505 		return;
506 	}
507 
508 	gma_encoder = kzalloc_obj(struct gma_encoder);
509 	if (!gma_encoder)
510 		return;
511 
512 	gma_connector = kzalloc_obj(struct gma_connector);
513 	if (!gma_connector)
514 		goto err_free_encoder;
515 
516 	lvds_priv = kzalloc_obj(struct cdv_intel_lvds_priv);
517 	if (!lvds_priv)
518 		goto err_free_connector;
519 
520 	gma_encoder->dev_priv = lvds_priv;
521 
522 	connector = &gma_connector->base;
523 	gma_connector->save = cdv_intel_lvds_save;
524 	gma_connector->restore = cdv_intel_lvds_restore;
525 	encoder = &gma_encoder->base;
526 
527 	/* Set up the DDC bus. */
528 	ddc_bus = gma_i2c_create(dev, GPIOC, "LVDSDDC_C");
529 	if (!ddc_bus) {
530 		dev_printk(KERN_ERR, dev->dev,
531 			   "DDC bus registration " "failed.\n");
532 		goto err_free_lvds_priv;
533 	}
534 
535 	ret = drm_connector_init_with_ddc(dev, connector,
536 					  &cdv_intel_lvds_connector_funcs,
537 					  DRM_MODE_CONNECTOR_LVDS,
538 					  &ddc_bus->base);
539 	if (ret)
540 		goto err_destroy_ddc;
541 
542 	ret = drm_encoder_init(dev, encoder, &cdv_intel_lvds_funcs,
543 			       DRM_MODE_ENCODER_LVDS, NULL);
544 	if (ret)
545 		goto err_connector_cleanup;
546 
547 	gma_connector_attach_encoder(gma_connector, gma_encoder);
548 	gma_encoder->type = INTEL_OUTPUT_LVDS;
549 
550 	drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
551 	drm_connector_helper_add(connector,
552 				 &cdv_intel_lvds_connector_helper_funcs);
553 	connector->display_info.subpixel_order = SubPixelHorizontalRGB;
554 	connector->interlace_allowed = false;
555 	connector->doublescan_allowed = false;
556 
557 	/*Attach connector properties*/
558 	drm_object_attach_property(&connector->base,
559 				      dev->mode_config.scaling_mode_property,
560 				      DRM_MODE_SCALE_FULLSCREEN);
561 	drm_object_attach_property(&connector->base,
562 				      dev_priv->backlight_property,
563 				      BRIGHTNESS_MAX_LEVEL);
564 
565 	/**
566 	 * Set up I2C bus
567 	 * FIXME: distroy i2c_bus when exit
568 	 */
569 	gma_encoder->i2c_bus = gma_i2c_create(dev, GPIOB, "LVDSBLC_B");
570 	if (!gma_encoder->i2c_bus) {
571 		dev_printk(KERN_ERR,
572 			dev->dev, "I2C bus registration failed.\n");
573 		goto err_encoder_cleanup;
574 	}
575 	gma_encoder->i2c_bus->target_addr = 0x2C;
576 	dev_priv->lvds_i2c_bus = gma_encoder->i2c_bus;
577 
578 	/*
579 	 * LVDS discovery:
580 	 * 1) check for EDID on DDC
581 	 * 2) check for VBT data
582 	 * 3) check to see if LVDS is already on
583 	 *    if none of the above, no panel
584 	 * 4) make sure lid is open
585 	 *    if closed, act like it's not there for now
586 	 */
587 
588 	/*
589 	 * Attempt to get the fixed panel mode from DDC.  Assume that the
590 	 * preferred mode is the right one.
591 	 */
592 	mutex_lock(&dev->mode_config.mutex);
593 	psb_intel_ddc_get_modes(connector, &ddc_bus->base);
594 
595 	list_for_each_entry(scan, &connector->probed_modes, head) {
596 		if (scan->type & DRM_MODE_TYPE_PREFERRED) {
597 			mode_dev->panel_fixed_mode =
598 			    drm_mode_duplicate(dev, scan);
599 			goto out;	/* FIXME: check for quirks */
600 		}
601 	}
602 
603 	/* Failed to get EDID, what about VBT? do we need this?*/
604 	if (dev_priv->lfp_lvds_vbt_mode) {
605 		mode_dev->panel_fixed_mode =
606 			drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
607 		if (mode_dev->panel_fixed_mode) {
608 			mode_dev->panel_fixed_mode->type |=
609 				DRM_MODE_TYPE_PREFERRED;
610 			goto out;	/* FIXME: check for quirks */
611 		}
612 	}
613 	/*
614 	 * If we didn't get EDID, try checking if the panel is already turned
615 	 * on.	If so, assume that whatever is currently programmed is the
616 	 * correct mode.
617 	 */
618 	lvds = REG_READ(LVDS);
619 	pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
620 	crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
621 
622 	if (crtc && (lvds & LVDS_PORT_EN)) {
623 		mode_dev->panel_fixed_mode =
624 		    cdv_intel_crtc_mode_get(dev, crtc);
625 		if (mode_dev->panel_fixed_mode) {
626 			mode_dev->panel_fixed_mode->type |=
627 			    DRM_MODE_TYPE_PREFERRED;
628 			goto out;	/* FIXME: check for quirks */
629 		}
630 	}
631 
632 	/* If we still don't have a mode after all that, give up. */
633 	if (!mode_dev->panel_fixed_mode) {
634 		DRM_DEBUG
635 			("Found no modes on the lvds, ignoring the LVDS\n");
636 		goto err_unlock;
637 	}
638 
639 	/* setup PWM */
640 	{
641 		u32 pwm;
642 
643 		pwm = REG_READ(BLC_PWM_CTL2);
644 		if (pipe == 1)
645 			pwm |= PWM_PIPE_B;
646 		else
647 			pwm &= ~PWM_PIPE_B;
648 		pwm |= PWM_ENABLE;
649 		REG_WRITE(BLC_PWM_CTL2, pwm);
650 	}
651 
652 out:
653 	mutex_unlock(&dev->mode_config.mutex);
654 	return;
655 
656 err_unlock:
657 	mutex_unlock(&dev->mode_config.mutex);
658 	gma_i2c_destroy(gma_encoder->i2c_bus);
659 err_encoder_cleanup:
660 	drm_encoder_cleanup(encoder);
661 err_connector_cleanup:
662 	drm_connector_cleanup(connector);
663 err_destroy_ddc:
664 	gma_i2c_destroy(ddc_bus);
665 err_free_lvds_priv:
666 	kfree(lvds_priv);
667 err_free_connector:
668 	kfree(gma_connector);
669 err_free_encoder:
670 	kfree(gma_encoder);
671 }
672