1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/cdns,usb3.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Cadence USBSS and USBSSP DRD controller 8 9maintainers: 10 - Pawel Laszczak <pawell@cadence.com> 11 12description: 13 Cadence USB dual-role controller. Covers USBSS (SuperSpeed, USB 3.0) and 14 USBSSP (SuperSpeed Plus, USB 3.1 gen2x1). Both variants share the same 15 DRD/OTG register interface, so the driver auto-detects the controller 16 version at runtime. 17 18properties: 19 compatible: 20 oneOf: 21 - const: cdns,usb3 22 - items: 23 - {} 24 - const: cdns,cdnsp 25 26 reg: 27 minItems: 2 28 maxItems: 3 29 30 reg-names: 31 minItems: 2 32 maxItems: 3 33 items: 34 enum: [ otg, xhci, dev ] 35 36 interrupts: 37 minItems: 2 38 items: 39 - description: XHCI host controller interrupt 40 - description: Device controller interrupt 41 - description: OTG/DRD controller interrupt 42 - description: interrupt used to wake up core, e.g when usbcmd.rs is 43 cleared by xhci core, this interrupt is optional 44 45 interrupt-names: 46 minItems: 2 47 items: 48 - const: host 49 - const: peripheral 50 - const: otg 51 - const: wakeup 52 53 iommus: 54 maxItems: 1 55 56 port: 57 $ref: /schemas/graph.yaml#/properties/port 58 description: 59 This port is used with the 'usb-role-switch' property to connect the 60 cdns3 to type C connector. 61 62 maximum-speed: 63 enum: [super-speed-plus, super-speed, high-speed, full-speed] 64 65 phys: 66 minItems: 1 67 maxItems: 2 68 69 phy-names: 70 minItems: 1 71 maxItems: 2 72 items: 73 anyOf: 74 - const: cdns3,usb2-phy 75 - const: cdns3,usb3-phy 76 77 cdns,on-chip-buff-size: 78 description: 79 size of memory intended as internal memory for endpoints 80 buffers expressed in KB 81 $ref: /schemas/types.yaml#/definitions/uint16 82 83 cdns,phyrst-a-enable: 84 description: Enable resetting of PHY if Rx fail is detected 85 type: boolean 86 87dependencies: 88 port: [ usb-role-switch ] 89 90required: 91 - compatible 92 - reg 93 - reg-names 94 - interrupts 95 - interrupt-names 96 97allOf: 98 - $ref: usb-drd.yaml# 99 - $ref: usb-xhci.yaml# 100 101 - if: 102 properties: 103 compatible: 104 contains: 105 const: cdns,cdnsp 106 then: 107 properties: 108 reg: 109 items: 110 - description: XHCI Host controller registers 111 - description: DEVICE controller registers 112 reg-names: 113 items: 114 - const: xhci 115 - const: dev 116 interrupts: 117 maxItems: 2 118 interrupt-names: 119 items: 120 - const: host 121 - const: peripheral 122 dr_mode: 123 enum: [host, peripheral] 124 else: 125 properties: 126 reg: 127 items: 128 - description: OTG controller registers 129 - description: XHCI Host controller registers 130 - description: DEVICE controller registers 131 reg-names: 132 items: 133 - const: otg 134 - const: xhci 135 - const: dev 136 interrupts: 137 minItems: 3 138 maxItems: 4 139 interrupt-names: 140 minItems: 3 141 142unevaluatedProperties: false 143 144examples: 145 - | 146 #include <dt-bindings/interrupt-controller/arm-gic.h> 147 bus { 148 #address-cells = <2>; 149 #size-cells = <2>; 150 151 usb@6000000 { 152 compatible = "cdns,usb3"; 153 reg = <0x00 0x6000000 0x00 0x10000>, 154 <0x00 0x6010000 0x00 0x10000>, 155 <0x00 0x6020000 0x00 0x10000>; 156 reg-names = "otg", "xhci", "dev"; 157 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 158 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 159 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 160 interrupt-names = "host", "peripheral", "otg"; 161 maximum-speed = "super-speed"; 162 dr_mode = "otg"; 163 }; 164 }; 165