1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for Texas Instruments INA219, INA226 and register-layout compatible 4 * current/power monitor chips with I2C Interface 5 * 6 * Copyright (C) 2012 Lothar Felten <lothar.felten@gmail.com> 7 * Thanks to Jan Volkering 8 */ 9 10 #include <linux/bitfield.h> 11 #include <linux/bits.h> 12 #include <linux/delay.h> 13 #include <linux/device.h> 14 #include <linux/err.h> 15 #include <linux/hwmon.h> 16 #include <linux/i2c.h> 17 #include <linux/init.h> 18 #include <linux/kernel.h> 19 #include <linux/limits.h> 20 #include <linux/module.h> 21 #include <linux/property.h> 22 #include <linux/regmap.h> 23 #include <linux/slab.h> 24 #include <linux/sysfs.h> 25 #include <linux/util_macros.h> 26 27 /* common register definitions */ 28 #define INA2XX_CONFIG 0x00 29 #define INA2XX_SHUNT_VOLTAGE 0x01 /* readonly */ 30 #define INA2XX_BUS_VOLTAGE 0x02 /* readonly */ 31 #define INA2XX_POWER 0x03 /* readonly */ 32 #define INA2XX_CURRENT 0x04 /* readonly */ 33 #define INA2XX_CALIBRATION 0x05 34 35 /* INA226 register definitions */ 36 #define INA226_MASK_ENABLE 0x06 37 #define INA226_ALERT_LIMIT 0x07 38 39 /* SY24655 register definitions */ 40 #define SY24655_EIN 0x0A 41 #define SY24655_ACCUM_CONFIG 0x0D 42 #define INA2XX_MAX_REGISTERS 0x0D 43 44 /* settings - depend on use case */ 45 #define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */ 46 #define INA226_CONFIG_DEFAULT 0x4527 /* averages=16 */ 47 #define INA260_CONFIG_DEFAULT 0x6527 /* averages=16 */ 48 #define SY24655_CONFIG_DEFAULT 0x4527 /* averages=16 */ 49 50 /* (only for sy24655) */ 51 #define SY24655_ACCUM_CONFIG_DEFAULT 0x044C /* continuous mode, clear after read*/ 52 53 /* worst case is 68.10 ms (~14.6Hz, ina219) */ 54 #define INA2XX_CONVERSION_RATE 15 55 #define INA2XX_MAX_DELAY 69 /* worst case delay in ms */ 56 57 #define INA2XX_RSHUNT_DEFAULT 10000 58 #define INA260_RSHUNT 2000 59 60 /* bit mask for reading the averaging setting in the configuration register */ 61 #define INA226_AVG_RD_MASK GENMASK(11, 9) 62 63 #define INA226_READ_AVG(reg) FIELD_GET(INA226_AVG_RD_MASK, reg) 64 65 #define INA226_ALERT_LATCH_ENABLE BIT(0) 66 #define INA226_ALERT_POLARITY BIT(1) 67 68 /* bit number of alert functions in Mask/Enable Register */ 69 #define INA226_SHUNT_OVER_VOLTAGE_MASK BIT(15) 70 #define INA226_SHUNT_UNDER_VOLTAGE_MASK BIT(14) 71 #define INA226_BUS_OVER_VOLTAGE_MASK BIT(13) 72 #define INA226_BUS_UNDER_VOLTAGE_MASK BIT(12) 73 #define INA226_POWER_OVER_LIMIT_MASK BIT(11) 74 75 /* bit mask for alert config bits of Mask/Enable Register */ 76 #define INA226_ALERT_CONFIG_MASK GENMASK(15, 10) 77 #define INA226_ALERT_FUNCTION_FLAG BIT(4) 78 79 /* 80 * Both bus voltage and shunt voltage conversion times for ina226 are set 81 * to 0b0100 on POR, which translates to 2200 microseconds in total. 82 */ 83 #define INA226_TOTAL_CONV_TIME_DEFAULT 2200 84 85 static bool ina2xx_writeable_reg(struct device *dev, unsigned int reg) 86 { 87 switch (reg) { 88 case INA2XX_CONFIG: 89 case INA2XX_CALIBRATION: 90 case INA226_MASK_ENABLE: 91 case INA226_ALERT_LIMIT: 92 case SY24655_ACCUM_CONFIG: 93 return true; 94 default: 95 return false; 96 } 97 } 98 99 static bool ina2xx_volatile_reg(struct device *dev, unsigned int reg) 100 { 101 switch (reg) { 102 case INA2XX_SHUNT_VOLTAGE: 103 case INA2XX_BUS_VOLTAGE: 104 case INA2XX_POWER: 105 case INA2XX_CURRENT: 106 return true; 107 default: 108 return false; 109 } 110 } 111 112 static const struct regmap_config ina2xx_regmap_config = { 113 .reg_bits = 8, 114 .val_bits = 16, 115 .use_single_write = true, 116 .use_single_read = true, 117 .max_register = INA2XX_MAX_REGISTERS, 118 .cache_type = REGCACHE_MAPLE, 119 .volatile_reg = ina2xx_volatile_reg, 120 .writeable_reg = ina2xx_writeable_reg, 121 }; 122 123 enum ina2xx_ids { 124 ina219, 125 ina226, 126 ina232, 127 ina234, 128 ina260, 129 sy24655 130 }; 131 132 struct ina2xx_config { 133 u16 config_default; 134 bool has_alerts; /* chip supports alerts and limits */ 135 bool has_ishunt; /* chip has internal shunt resistor */ 136 bool has_power_average; /* chip supports average power */ 137 bool has_update_interval; 138 int calibration_value; 139 int shunt_div; 140 int shunt_voltage_shift; 141 int bus_voltage_shift; 142 int bus_voltage_lsb; /* uV */ 143 int power_lsb_factor; 144 int current_shift; 145 }; 146 147 struct ina2xx_data { 148 const struct ina2xx_config *config; 149 enum ina2xx_ids chip; 150 151 long rshunt; 152 long current_lsb_uA; 153 long power_lsb_uW; 154 struct regmap *regmap; 155 struct i2c_client *client; 156 }; 157 158 static const struct ina2xx_config ina2xx_config[] = { 159 [ina219] = { 160 .config_default = INA219_CONFIG_DEFAULT, 161 .calibration_value = 4096, 162 .shunt_div = 100, 163 .shunt_voltage_shift = 0, 164 .bus_voltage_shift = 3, 165 .bus_voltage_lsb = 4000, 166 .power_lsb_factor = 20, 167 .has_alerts = false, 168 .has_ishunt = false, 169 .has_power_average = false, 170 .current_shift = 0, 171 .has_update_interval = false, 172 }, 173 [ina226] = { 174 .config_default = INA226_CONFIG_DEFAULT, 175 .calibration_value = 2048, 176 .shunt_div = 400, 177 .shunt_voltage_shift = 0, 178 .bus_voltage_shift = 0, 179 .bus_voltage_lsb = 1250, 180 .power_lsb_factor = 25, 181 .has_alerts = true, 182 .has_ishunt = false, 183 .has_power_average = false, 184 .current_shift = 0, 185 .has_update_interval = true, 186 }, 187 [ina234] = { 188 .config_default = INA226_CONFIG_DEFAULT, 189 .calibration_value = 2048, 190 .shunt_div = 25, /* 2.5 µV/LSB raw ADC reading from INA2XX_SHUNT_VOLTAGE */ 191 .shunt_voltage_shift = 4, 192 .bus_voltage_shift = 4, 193 .bus_voltage_lsb = 25600, 194 .power_lsb_factor = 32, 195 .has_alerts = true, 196 .has_ishunt = false, 197 .has_power_average = false, 198 .current_shift = 4, 199 .has_update_interval = true, 200 }, 201 [ina232] = { 202 .config_default = INA226_CONFIG_DEFAULT, 203 .calibration_value = 2048, 204 .shunt_div = 400, 205 .shunt_voltage_shift = 0, 206 .bus_voltage_shift = 0, 207 .bus_voltage_lsb = 1600, 208 .power_lsb_factor = 32, 209 .has_alerts = true, 210 .has_ishunt = false, 211 .has_power_average = false, 212 .current_shift = 0, 213 .has_update_interval = true, 214 }, 215 [ina260] = { 216 .config_default = INA260_CONFIG_DEFAULT, 217 .shunt_div = 400, 218 .shunt_voltage_shift = 0, 219 .bus_voltage_shift = 0, 220 .bus_voltage_lsb = 1250, 221 .power_lsb_factor = 8, 222 .has_alerts = true, 223 .has_ishunt = true, 224 .has_power_average = false, 225 .current_shift = 0, 226 .has_update_interval = true, 227 }, 228 [sy24655] = { 229 .config_default = SY24655_CONFIG_DEFAULT, 230 .calibration_value = 4096, 231 .shunt_div = 400, 232 .shunt_voltage_shift = 0, 233 .bus_voltage_shift = 0, 234 .bus_voltage_lsb = 1250, 235 .power_lsb_factor = 25, 236 .has_alerts = true, 237 .has_ishunt = false, 238 .has_power_average = true, 239 .current_shift = 0, 240 .has_update_interval = false, 241 }, 242 }; 243 244 /* 245 * Available averaging rates for ina226. The indices correspond with 246 * the bit values expected by the chip (according to the ina226 datasheet, 247 * table 3 AVG bit settings, found at 248 * https://www.ti.com/lit/ds/symlink/ina226.pdf. 249 */ 250 static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 }; 251 252 static int ina226_reg_to_interval(u16 config) 253 { 254 int avg = ina226_avg_tab[INA226_READ_AVG(config)]; 255 256 /* 257 * Multiply the total conversion time by the number of averages. 258 * Return the result in milliseconds. 259 */ 260 return DIV_ROUND_CLOSEST(avg * INA226_TOTAL_CONV_TIME_DEFAULT, 1000); 261 } 262 263 /* 264 * Return the new, shifted AVG field value of CONFIG register, 265 * to use with regmap_update_bits 266 */ 267 static u16 ina226_interval_to_reg(long interval) 268 { 269 int avg, avg_bits; 270 271 /* 272 * The maximum supported interval is 1,024 * (2 * 8.244ms) ~= 16.8s. 273 * Clamp to 32 seconds before calculations to avoid overflows. 274 */ 275 interval = clamp_val(interval, 0, 32000); 276 277 avg = DIV_ROUND_CLOSEST(interval * 1000, 278 INA226_TOTAL_CONV_TIME_DEFAULT); 279 avg_bits = find_closest(avg, ina226_avg_tab, 280 ARRAY_SIZE(ina226_avg_tab)); 281 282 return FIELD_PREP(INA226_AVG_RD_MASK, avg_bits); 283 } 284 285 static long ina2xx_get_value(struct ina2xx_data *data, u8 reg, 286 unsigned int regval) 287 { 288 s64 val64; 289 long val; 290 291 switch (reg) { 292 case INA2XX_SHUNT_VOLTAGE: 293 /* signed register */ 294 val = DIV_ROUND_CLOSEST((s16)regval >> data->config->shunt_voltage_shift, 295 data->config->shunt_div); 296 break; 297 case INA2XX_BUS_VOLTAGE: 298 val = DIV_ROUND_CLOSEST((regval >> data->config->bus_voltage_shift) * 299 data->config->bus_voltage_lsb, 1000); 300 break; 301 case INA2XX_POWER: 302 val = min_t(u64, (u64)regval * data->power_lsb_uW, LONG_MAX); 303 break; 304 case INA2XX_CURRENT: 305 /* signed register, result in mA */ 306 val64 = (s64)((s16)regval >> data->config->current_shift) * 307 data->current_lsb_uA; 308 if (val64 < 0) 309 val64 = -DIV_ROUND_CLOSEST_ULL(-val64, 1000); 310 else 311 val64 = DIV_ROUND_CLOSEST_ULL(val64, 1000); 312 val = clamp_val(val64, LONG_MIN, LONG_MAX); 313 break; 314 case INA2XX_CALIBRATION: 315 val = regval; 316 break; 317 default: 318 /* programmer goofed */ 319 WARN_ON_ONCE(1); 320 val = 0; 321 break; 322 } 323 324 return val; 325 } 326 327 /* 328 * Read and convert register value from chip. If the register value is 0, 329 * check if the chip has been power cycled or reset. If so, re-initialize it. 330 */ 331 static int ina2xx_read_init(struct device *dev, int reg, long *val) 332 { 333 struct ina2xx_data *data = dev_get_drvdata(dev); 334 struct regmap *regmap = data->regmap; 335 unsigned int regval; 336 int ret, retry; 337 338 if (data->config->has_ishunt) { 339 /* No calibration needed */ 340 ret = regmap_read(regmap, reg, ®val); 341 if (ret < 0) 342 return ret; 343 *val = ina2xx_get_value(data, reg, regval); 344 return 0; 345 } 346 347 for (retry = 5; retry; retry--) { 348 ret = regmap_read(regmap, reg, ®val); 349 if (ret < 0) 350 return ret; 351 352 /* 353 * If the current value in the calibration register is 0, the 354 * power and current registers will also remain at 0. In case 355 * the chip has been reset let's check the calibration 356 * register and reinitialize if needed. 357 * We do that extra read of the calibration register if there 358 * is some hint of a chip reset. 359 */ 360 if (regval == 0) { 361 unsigned int cal; 362 363 ret = regmap_read_bypassed(regmap, INA2XX_CALIBRATION, &cal); 364 if (ret < 0) 365 return ret; 366 367 if (cal == 0) { 368 dev_warn(dev, "chip not calibrated, reinitializing\n"); 369 370 regcache_mark_dirty(regmap); 371 regcache_sync(regmap); 372 373 /* 374 * Let's make sure the power and current 375 * registers have been updated before trying 376 * again. 377 */ 378 msleep(INA2XX_MAX_DELAY); 379 continue; 380 } 381 } 382 *val = ina2xx_get_value(data, reg, regval); 383 return 0; 384 } 385 386 /* 387 * If we're here then although all write operations succeeded, the 388 * chip still returns 0 in the calibration register. Nothing more we 389 * can do here. 390 */ 391 dev_err(dev, "unable to reinitialize the chip\n"); 392 return -ENODEV; 393 } 394 395 /* 396 * Turns alert limit values into register values. 397 * Opposite of the formula in ina2xx_get_value(). 398 */ 399 static u16 ina226_alert_to_reg(struct ina2xx_data *data, int reg, long val) 400 { 401 long limit; 402 403 switch (reg) { 404 case INA2XX_SHUNT_VOLTAGE: 405 val = min_t(long, val, DIV_ROUND_CLOSEST(SHRT_MAX, data->config->shunt_div)); 406 return min_t(long, (val * data->config->shunt_div) << data->config->shunt_voltage_shift, 407 SHRT_MAX); 408 case INA2XX_BUS_VOLTAGE: 409 val = min_t(long, val, 130000); 410 return min_t(long, 411 DIV_ROUND_CLOSEST((val * 1000) << data->config->bus_voltage_shift, 412 data->config->bus_voltage_lsb), 413 USHRT_MAX); 414 case INA2XX_POWER: 415 val = min_t(long, val, LONG_MAX - data->power_lsb_uW); 416 return min_t(long, DIV_ROUND_CLOSEST(val, data->power_lsb_uW), USHRT_MAX); 417 case INA2XX_CURRENT: 418 limit = (LONG_MAX - (data->current_lsb_uA / 2)) / 1000; 419 val = min_t(long, val, limit); 420 /* signed register, result in mA */ 421 val = DIV_ROUND_CLOSEST(val * 1000, data->current_lsb_uA); 422 limit = SHRT_MAX >> data->config->current_shift; 423 return (u16)(min_t(long, val, limit) << data->config->current_shift); 424 default: 425 /* programmer goofed */ 426 WARN_ON_ONCE(1); 427 return 0; 428 } 429 } 430 431 static int ina226_alert_limit_read(struct ina2xx_data *data, u32 mask, int reg, long *val) 432 { 433 struct regmap *regmap = data->regmap; 434 int regval; 435 int ret; 436 437 ret = regmap_read(regmap, INA226_MASK_ENABLE, ®val); 438 if (ret) 439 return ret; 440 441 if (regval & mask) { 442 ret = regmap_read(regmap, INA226_ALERT_LIMIT, ®val); 443 if (ret) 444 return ret; 445 *val = ina2xx_get_value(data, reg, regval); 446 } else { 447 *val = 0; 448 } 449 return 0; 450 } 451 452 static int ina226_alert_limit_write(struct ina2xx_data *data, u32 mask, int reg, long val) 453 { 454 struct regmap *regmap = data->regmap; 455 int ret; 456 457 if (val < 0) 458 return -EINVAL; 459 460 /* 461 * Clear all alerts first to avoid accidentally triggering ALERT pin 462 * due to register write sequence. Then, only enable the alert 463 * if the value is non-zero. 464 */ 465 ret = regmap_update_bits(regmap, INA226_MASK_ENABLE, 466 INA226_ALERT_CONFIG_MASK, 0); 467 if (ret < 0) 468 return ret; 469 470 ret = regmap_write(regmap, INA226_ALERT_LIMIT, 471 ina226_alert_to_reg(data, reg, val)); 472 if (ret < 0) 473 return ret; 474 475 if (val) 476 return regmap_update_bits(regmap, INA226_MASK_ENABLE, 477 INA226_ALERT_CONFIG_MASK, mask); 478 return 0; 479 } 480 481 static int ina2xx_chip_read(struct device *dev, u32 attr, long *val) 482 { 483 struct ina2xx_data *data = dev_get_drvdata(dev); 484 u32 regval; 485 int ret; 486 487 switch (attr) { 488 case hwmon_chip_update_interval: 489 ret = regmap_read(data->regmap, INA2XX_CONFIG, ®val); 490 if (ret) 491 return ret; 492 493 *val = ina226_reg_to_interval(regval); 494 break; 495 default: 496 return -EOPNOTSUPP; 497 } 498 return 0; 499 } 500 501 static int ina226_alert_read(struct regmap *regmap, u32 mask, long *val) 502 { 503 unsigned int regval; 504 int ret; 505 506 ret = regmap_read_bypassed(regmap, INA226_MASK_ENABLE, ®val); 507 if (ret) 508 return ret; 509 510 *val = (regval & mask) && (regval & INA226_ALERT_FUNCTION_FLAG); 511 512 return 0; 513 } 514 515 static int ina2xx_in_read(struct device *dev, u32 attr, int channel, long *val) 516 { 517 int voltage_reg = channel ? INA2XX_BUS_VOLTAGE : INA2XX_SHUNT_VOLTAGE; 518 u32 under_voltage_mask = channel ? INA226_BUS_UNDER_VOLTAGE_MASK 519 : INA226_SHUNT_UNDER_VOLTAGE_MASK; 520 u32 over_voltage_mask = channel ? INA226_BUS_OVER_VOLTAGE_MASK 521 : INA226_SHUNT_OVER_VOLTAGE_MASK; 522 struct ina2xx_data *data = dev_get_drvdata(dev); 523 struct regmap *regmap = data->regmap; 524 unsigned int regval; 525 int ret; 526 527 switch (attr) { 528 case hwmon_in_input: 529 ret = regmap_read(regmap, voltage_reg, ®val); 530 if (ret) 531 return ret; 532 *val = ina2xx_get_value(data, voltage_reg, regval); 533 break; 534 case hwmon_in_lcrit: 535 return ina226_alert_limit_read(data, under_voltage_mask, 536 voltage_reg, val); 537 case hwmon_in_crit: 538 return ina226_alert_limit_read(data, over_voltage_mask, 539 voltage_reg, val); 540 case hwmon_in_lcrit_alarm: 541 return ina226_alert_read(regmap, under_voltage_mask, val); 542 case hwmon_in_crit_alarm: 543 return ina226_alert_read(regmap, over_voltage_mask, val); 544 default: 545 return -EOPNOTSUPP; 546 } 547 return 0; 548 } 549 550 /* 551 * Configuring the READ_EIN (bit 10) of the ACCUM_CONFIG register to 1 552 * can clear accumulator and sample_count after reading the EIN register. 553 * This way, the average power between the last read and the current 554 * read can be obtained. By combining with accurate time data from 555 * outside, the energy consumption during that period can be calculated. 556 */ 557 static int sy24655_average_power_read(struct ina2xx_data *data, u8 reg, long *val) 558 { 559 u8 template[6]; 560 int ret; 561 long accumulator_24, sample_count; 562 u64 val64; 563 564 /* 48-bit register read */ 565 ret = i2c_smbus_read_i2c_block_data(data->client, reg, 6, template); 566 if (ret < 0) 567 return ret; 568 if (ret != 6) 569 return -EIO; 570 accumulator_24 = ((template[3] << 16) | 571 (template[4] << 8) | 572 template[5]); 573 sample_count = ((template[0] << 16) | 574 (template[1] << 8) | 575 template[2]); 576 if (sample_count <= 0) { 577 *val = 0; 578 return 0; 579 } 580 581 val64 = (u64)DIV_ROUND_CLOSEST(accumulator_24, sample_count) * data->power_lsb_uW; 582 *val = min_t(u64, val64, LONG_MAX); 583 584 return 0; 585 } 586 587 static int ina2xx_power_read(struct device *dev, u32 attr, long *val) 588 { 589 struct ina2xx_data *data = dev_get_drvdata(dev); 590 591 switch (attr) { 592 case hwmon_power_input: 593 return ina2xx_read_init(dev, INA2XX_POWER, val); 594 case hwmon_power_average: 595 return sy24655_average_power_read(data, SY24655_EIN, val); 596 case hwmon_power_crit: 597 return ina226_alert_limit_read(data, INA226_POWER_OVER_LIMIT_MASK, 598 INA2XX_POWER, val); 599 case hwmon_power_crit_alarm: 600 return ina226_alert_read(data->regmap, INA226_POWER_OVER_LIMIT_MASK, val); 601 default: 602 return -EOPNOTSUPP; 603 } 604 } 605 606 static int ina2xx_curr_read(struct device *dev, u32 attr, long *val) 607 { 608 struct ina2xx_data *data = dev_get_drvdata(dev); 609 struct regmap *regmap = data->regmap; 610 unsigned int regval; 611 int ret; 612 613 /* 614 * While the chips supported by this driver do not directly support 615 * current limits, they do support setting shunt voltage limits. 616 * The shunt voltage divided by the shunt resistor value is the current. 617 * On top of that, calibration values are set such that in the shunt 618 * voltage register and the current register report the same values. 619 * That means we can report and configure current limits based on shunt 620 * voltage limits. 621 */ 622 switch (attr) { 623 case hwmon_curr_input: 624 /* 625 * Since the shunt voltage and the current register report the 626 * same values when the chip is calibrated, we can calculate 627 * the current directly from the shunt voltage without relying 628 * on chip calibration. 629 */ 630 ret = regmap_read(regmap, INA2XX_SHUNT_VOLTAGE, ®val); 631 if (ret) 632 return ret; 633 *val = ina2xx_get_value(data, INA2XX_CURRENT, regval); 634 return 0; 635 case hwmon_curr_lcrit: 636 return ina226_alert_limit_read(data, INA226_SHUNT_UNDER_VOLTAGE_MASK, 637 INA2XX_CURRENT, val); 638 case hwmon_curr_crit: 639 return ina226_alert_limit_read(data, INA226_SHUNT_OVER_VOLTAGE_MASK, 640 INA2XX_CURRENT, val); 641 case hwmon_curr_lcrit_alarm: 642 return ina226_alert_read(regmap, INA226_SHUNT_UNDER_VOLTAGE_MASK, val); 643 case hwmon_curr_crit_alarm: 644 return ina226_alert_read(regmap, INA226_SHUNT_OVER_VOLTAGE_MASK, val); 645 default: 646 return -EOPNOTSUPP; 647 } 648 } 649 650 static int ina2xx_read(struct device *dev, enum hwmon_sensor_types type, 651 u32 attr, int channel, long *val) 652 { 653 switch (type) { 654 case hwmon_chip: 655 return ina2xx_chip_read(dev, attr, val); 656 case hwmon_in: 657 return ina2xx_in_read(dev, attr, channel, val); 658 case hwmon_power: 659 return ina2xx_power_read(dev, attr, val); 660 case hwmon_curr: 661 return ina2xx_curr_read(dev, attr, val); 662 default: 663 return -EOPNOTSUPP; 664 } 665 } 666 667 static int ina2xx_chip_write(struct device *dev, u32 attr, long val) 668 { 669 struct ina2xx_data *data = dev_get_drvdata(dev); 670 671 switch (attr) { 672 case hwmon_chip_update_interval: 673 return regmap_update_bits(data->regmap, INA2XX_CONFIG, 674 INA226_AVG_RD_MASK, 675 ina226_interval_to_reg(val)); 676 default: 677 return -EOPNOTSUPP; 678 } 679 } 680 681 static int ina2xx_in_write(struct device *dev, u32 attr, int channel, long val) 682 { 683 struct ina2xx_data *data = dev_get_drvdata(dev); 684 685 switch (attr) { 686 case hwmon_in_lcrit: 687 return ina226_alert_limit_write(data, 688 channel ? INA226_BUS_UNDER_VOLTAGE_MASK : INA226_SHUNT_UNDER_VOLTAGE_MASK, 689 channel ? INA2XX_BUS_VOLTAGE : INA2XX_SHUNT_VOLTAGE, 690 val); 691 case hwmon_in_crit: 692 return ina226_alert_limit_write(data, 693 channel ? INA226_BUS_OVER_VOLTAGE_MASK : INA226_SHUNT_OVER_VOLTAGE_MASK, 694 channel ? INA2XX_BUS_VOLTAGE : INA2XX_SHUNT_VOLTAGE, 695 val); 696 default: 697 return -EOPNOTSUPP; 698 } 699 return 0; 700 } 701 702 static int ina2xx_power_write(struct device *dev, u32 attr, long val) 703 { 704 struct ina2xx_data *data = dev_get_drvdata(dev); 705 706 switch (attr) { 707 case hwmon_power_crit: 708 return ina226_alert_limit_write(data, INA226_POWER_OVER_LIMIT_MASK, 709 INA2XX_POWER, val); 710 default: 711 return -EOPNOTSUPP; 712 } 713 return 0; 714 } 715 716 static int ina2xx_curr_write(struct device *dev, u32 attr, long val) 717 { 718 struct ina2xx_data *data = dev_get_drvdata(dev); 719 720 switch (attr) { 721 case hwmon_curr_lcrit: 722 return ina226_alert_limit_write(data, INA226_SHUNT_UNDER_VOLTAGE_MASK, 723 INA2XX_CURRENT, val); 724 case hwmon_curr_crit: 725 return ina226_alert_limit_write(data, INA226_SHUNT_OVER_VOLTAGE_MASK, 726 INA2XX_CURRENT, val); 727 default: 728 return -EOPNOTSUPP; 729 } 730 return 0; 731 } 732 733 static int ina2xx_write(struct device *dev, enum hwmon_sensor_types type, 734 u32 attr, int channel, long val) 735 { 736 switch (type) { 737 case hwmon_chip: 738 return ina2xx_chip_write(dev, attr, val); 739 case hwmon_in: 740 return ina2xx_in_write(dev, attr, channel, val); 741 case hwmon_power: 742 return ina2xx_power_write(dev, attr, val); 743 case hwmon_curr: 744 return ina2xx_curr_write(dev, attr, val); 745 default: 746 return -EOPNOTSUPP; 747 } 748 } 749 750 static umode_t ina2xx_is_visible(const void *_data, enum hwmon_sensor_types type, 751 u32 attr, int channel) 752 { 753 const struct ina2xx_data *data = _data; 754 bool has_alerts = data->config->has_alerts; 755 bool has_power_average = data->config->has_power_average; 756 bool has_update_interval = data->config->has_update_interval; 757 758 switch (type) { 759 case hwmon_in: 760 switch (attr) { 761 case hwmon_in_input: 762 return 0444; 763 case hwmon_in_lcrit: 764 case hwmon_in_crit: 765 if (has_alerts) 766 return 0644; 767 break; 768 case hwmon_in_lcrit_alarm: 769 case hwmon_in_crit_alarm: 770 if (has_alerts) 771 return 0444; 772 break; 773 default: 774 break; 775 } 776 break; 777 case hwmon_curr: 778 switch (attr) { 779 case hwmon_curr_input: 780 return 0444; 781 case hwmon_curr_lcrit: 782 case hwmon_curr_crit: 783 if (has_alerts) 784 return 0644; 785 break; 786 case hwmon_curr_lcrit_alarm: 787 case hwmon_curr_crit_alarm: 788 if (has_alerts) 789 return 0444; 790 break; 791 default: 792 break; 793 } 794 break; 795 case hwmon_power: 796 switch (attr) { 797 case hwmon_power_input: 798 return 0444; 799 case hwmon_power_crit: 800 if (has_alerts) 801 return 0644; 802 break; 803 case hwmon_power_crit_alarm: 804 if (has_alerts) 805 return 0444; 806 break; 807 case hwmon_power_average: 808 if (has_power_average) 809 return 0444; 810 break; 811 default: 812 break; 813 } 814 break; 815 case hwmon_chip: 816 switch (attr) { 817 case hwmon_chip_update_interval: 818 if (has_update_interval) 819 return 0644; 820 break; 821 default: 822 break; 823 } 824 break; 825 default: 826 break; 827 } 828 return 0; 829 } 830 831 static const struct hwmon_channel_info * const ina2xx_info[] = { 832 HWMON_CHANNEL_INFO(chip, 833 HWMON_C_UPDATE_INTERVAL), 834 HWMON_CHANNEL_INFO(in, 835 HWMON_I_INPUT | HWMON_I_CRIT | HWMON_I_CRIT_ALARM | 836 HWMON_I_LCRIT | HWMON_I_LCRIT_ALARM, 837 HWMON_I_INPUT | HWMON_I_CRIT | HWMON_I_CRIT_ALARM | 838 HWMON_I_LCRIT | HWMON_I_LCRIT_ALARM 839 ), 840 HWMON_CHANNEL_INFO(curr, HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM | 841 HWMON_C_LCRIT | HWMON_C_LCRIT_ALARM), 842 HWMON_CHANNEL_INFO(power, 843 HWMON_P_INPUT | HWMON_P_CRIT | HWMON_P_CRIT_ALARM | 844 HWMON_P_AVERAGE), 845 NULL 846 }; 847 848 static const struct hwmon_ops ina2xx_hwmon_ops = { 849 .is_visible = ina2xx_is_visible, 850 .read = ina2xx_read, 851 .write = ina2xx_write, 852 }; 853 854 static const struct hwmon_chip_info ina2xx_chip_info = { 855 .ops = &ina2xx_hwmon_ops, 856 .info = ina2xx_info, 857 }; 858 859 /* shunt resistance */ 860 861 /* 862 * In order to keep calibration register value fixed, the product 863 * of current_lsb and shunt_resistor should also be fixed and equal 864 * to shunt_voltage_lsb = 1 / shunt_div multiplied by 10^9 in order 865 * to keep the scale. 866 */ 867 static int ina2xx_set_shunt(struct ina2xx_data *data, unsigned long val) 868 { 869 unsigned int dividend = DIV_ROUND_CLOSEST(1000000000, 870 data->config->shunt_div); 871 if (!val || val > dividend) 872 return -EINVAL; 873 874 data->rshunt = val; 875 data->current_lsb_uA = DIV_ROUND_CLOSEST(dividend, val); 876 data->power_lsb_uW = data->config->power_lsb_factor * 877 data->current_lsb_uA; 878 879 return 0; 880 } 881 882 static ssize_t shunt_resistor_show(struct device *dev, 883 struct device_attribute *da, char *buf) 884 { 885 struct ina2xx_data *data = dev_get_drvdata(dev); 886 887 return sysfs_emit(buf, "%li\n", data->rshunt); 888 } 889 890 static ssize_t shunt_resistor_store(struct device *dev, 891 struct device_attribute *da, 892 const char *buf, size_t count) 893 { 894 struct ina2xx_data *data = dev_get_drvdata(dev); 895 unsigned long val; 896 int status; 897 898 status = kstrtoul(buf, 10, &val); 899 if (status < 0) 900 return status; 901 902 scoped_guard(hwmon_lock, dev) { 903 status = ina2xx_set_shunt(data, val); 904 if (status < 0) 905 return status; 906 } 907 return count; 908 } 909 910 static DEVICE_ATTR_RW(shunt_resistor); 911 912 /* pointers to created device attributes */ 913 static struct attribute *ina2xx_attrs[] = { 914 &dev_attr_shunt_resistor.attr, 915 NULL, 916 }; 917 ATTRIBUTE_GROUPS(ina2xx); 918 919 /* 920 * Initialize chip 921 */ 922 static int ina2xx_init(struct device *dev, struct ina2xx_data *data) 923 { 924 struct regmap *regmap = data->regmap; 925 u32 shunt; 926 int ret; 927 928 if (data->config->has_ishunt) 929 shunt = INA260_RSHUNT; 930 else if (device_property_read_u32(dev, "shunt-resistor", &shunt) < 0) 931 shunt = INA2XX_RSHUNT_DEFAULT; 932 933 ret = ina2xx_set_shunt(data, shunt); 934 if (ret < 0) 935 return ret; 936 937 ret = regmap_write(regmap, INA2XX_CONFIG, data->config->config_default); 938 if (ret < 0) 939 return ret; 940 941 if (data->config->has_alerts) { 942 bool active_high = device_property_read_bool(dev, "ti,alert-polarity-active-high"); 943 944 regmap_update_bits(regmap, INA226_MASK_ENABLE, 945 INA226_ALERT_LATCH_ENABLE | INA226_ALERT_POLARITY, 946 INA226_ALERT_LATCH_ENABLE | 947 FIELD_PREP(INA226_ALERT_POLARITY, active_high)); 948 } 949 if (data->config->has_power_average) { 950 if (data->chip == sy24655) { 951 /* 952 * Initialize the power accumulation method to continuous 953 * mode and clear the EIN register after each read of the 954 * EIN register 955 */ 956 ret = regmap_write(regmap, SY24655_ACCUM_CONFIG, 957 SY24655_ACCUM_CONFIG_DEFAULT); 958 if (ret < 0) 959 return ret; 960 } 961 } 962 963 if (data->config->has_ishunt) 964 return 0; 965 966 /* 967 * Calibration register is set to the best value, which eliminates 968 * truncation errors on calculating current register in hardware. 969 * According to datasheet (eq. 3) the best values are 2048 for 970 * ina226 and 4096 for ina219. They are hardcoded as calibration_value. 971 */ 972 return regmap_write(regmap, INA2XX_CALIBRATION, 973 data->config->calibration_value); 974 } 975 976 static int ina2xx_probe(struct i2c_client *client) 977 { 978 struct device *dev = &client->dev; 979 struct ina2xx_data *data; 980 struct device *hwmon_dev; 981 enum ina2xx_ids chip; 982 int ret; 983 984 chip = (uintptr_t)i2c_get_match_data(client); 985 986 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); 987 if (!data) 988 return -ENOMEM; 989 990 /* set the device type */ 991 data->client = client; 992 data->config = &ina2xx_config[chip]; 993 data->chip = chip; 994 995 data->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config); 996 if (IS_ERR(data->regmap)) { 997 dev_err(dev, "failed to allocate register map\n"); 998 return PTR_ERR(data->regmap); 999 } 1000 1001 /* 1002 * Regulator core returns -ENODEV if the 'vs' is not available. 1003 * Hence the check for -ENODEV return code is necessary. 1004 */ 1005 ret = devm_regulator_get_enable_optional(dev, "vs"); 1006 if (ret < 0 && ret != -ENODEV) 1007 return dev_err_probe(dev, ret, "failed to enable vs regulator\n"); 1008 1009 ret = ina2xx_init(dev, data); 1010 if (ret < 0) 1011 return dev_err_probe(dev, ret, "failed to configure device\n"); 1012 1013 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 1014 data, &ina2xx_chip_info, 1015 data->config->has_ishunt ? 1016 NULL : ina2xx_groups); 1017 if (IS_ERR(hwmon_dev)) 1018 return PTR_ERR(hwmon_dev); 1019 1020 dev_info(dev, "power monitor %s (Rshunt = %li uOhm)\n", 1021 client->name, data->rshunt); 1022 1023 return 0; 1024 } 1025 1026 static const struct i2c_device_id ina2xx_id[] = { 1027 { .name = "ina219", .driver_data = ina219 }, 1028 { .name = "ina220", .driver_data = ina219 }, 1029 { .name = "ina226", .driver_data = ina226 }, 1030 { .name = "ina230", .driver_data = ina226 }, 1031 { .name = "ina231", .driver_data = ina226 }, 1032 { .name = "ina232", .driver_data = ina232 }, 1033 { .name = "ina234", .driver_data = ina234 }, 1034 { .name = "ina260", .driver_data = ina260 }, 1035 { .name = "sy24655", .driver_data = sy24655 }, 1036 { } 1037 }; 1038 MODULE_DEVICE_TABLE(i2c, ina2xx_id); 1039 1040 static const struct of_device_id __maybe_unused ina2xx_of_match[] = { 1041 { 1042 .compatible = "silergy,sy24655", 1043 .data = (void *)sy24655 1044 }, 1045 { 1046 .compatible = "ti,ina219", 1047 .data = (void *)ina219 1048 }, 1049 { 1050 .compatible = "ti,ina220", 1051 .data = (void *)ina219 1052 }, 1053 { 1054 .compatible = "ti,ina226", 1055 .data = (void *)ina226 1056 }, 1057 { 1058 .compatible = "ti,ina230", 1059 .data = (void *)ina226 1060 }, 1061 { 1062 .compatible = "ti,ina231", 1063 .data = (void *)ina226 1064 }, 1065 { 1066 .compatible = "ti,ina232", 1067 .data = (void *)ina232 1068 }, 1069 { 1070 .compatible = "ti,ina234", 1071 .data = (void *)ina234 1072 }, 1073 { 1074 .compatible = "ti,ina260", 1075 .data = (void *)ina260 1076 }, 1077 { } 1078 }; 1079 MODULE_DEVICE_TABLE(of, ina2xx_of_match); 1080 1081 static struct i2c_driver ina2xx_driver = { 1082 .driver = { 1083 .name = "ina2xx", 1084 .of_match_table = of_match_ptr(ina2xx_of_match), 1085 }, 1086 .probe = ina2xx_probe, 1087 .id_table = ina2xx_id, 1088 }; 1089 1090 module_i2c_driver(ina2xx_driver); 1091 1092 MODULE_AUTHOR("Lothar Felten <l-felten@ti.com>"); 1093 MODULE_DESCRIPTION("ina2xx driver"); 1094 MODULE_LICENSE("GPL"); 1095