1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * GPIO driver for EXAR XRA1403 16-bit GPIO expander 4 * 5 * Copyright (c) 2017, General Electric Company 6 */ 7 8 #include <linux/bitops.h> 9 #include <linux/gpio/driver.h> 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/mutex.h> 13 #include <linux/seq_file.h> 14 #include <linux/spi/spi.h> 15 #include <linux/string_choices.h> 16 #include <linux/regmap.h> 17 18 /* XRA1403 registers */ 19 #define XRA_GSR 0x00 /* GPIO State */ 20 #define XRA_OCR 0x02 /* Output Control */ 21 #define XRA_PIR 0x04 /* Input Polarity Inversion */ 22 #define XRA_GCR 0x06 /* GPIO Configuration */ 23 #define XRA_PUR 0x08 /* Input Internal Pull-up Resistor Enable/Disable */ 24 #define XRA_IER 0x0A /* Input Interrupt Enable */ 25 #define XRA_TSCR 0x0C /* Output Three-State Control */ 26 #define XRA_ISR 0x0E /* Input Interrupt Status */ 27 #define XRA_REIR 0x10 /* Input Rising Edge Interrupt Enable */ 28 #define XRA_FEIR 0x12 /* Input Falling Edge Interrupt Enable */ 29 #define XRA_IFR 0x14 /* Input Filter Enable/Disable */ 30 #define XRA_LAST 0x15 /* Bounds */ 31 32 struct xra1403 { 33 struct gpio_chip chip; 34 struct regmap *regmap; 35 }; 36 37 static const struct regmap_config xra1403_regmap_cfg = { 38 .reg_bits = 7, 39 .pad_bits = 1, 40 .val_bits = 8, 41 42 .max_register = XRA_LAST, 43 }; 44 45 static unsigned int to_reg(unsigned int reg, unsigned int offset) 46 { 47 return reg + (offset > 7); 48 } 49 50 static int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset) 51 { 52 struct xra1403 *xra = gpiochip_get_data(chip); 53 54 return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset), 55 BIT(offset % 8), BIT(offset % 8)); 56 } 57 58 static int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset, 59 int value) 60 { 61 int ret; 62 struct xra1403 *xra = gpiochip_get_data(chip); 63 64 ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset), 65 BIT(offset % 8), 0); 66 if (ret) 67 return ret; 68 69 ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset), 70 BIT(offset % 8), value ? BIT(offset % 8) : 0); 71 72 return ret; 73 } 74 75 static int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset) 76 { 77 int ret; 78 unsigned int val; 79 struct xra1403 *xra = gpiochip_get_data(chip); 80 81 ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val); 82 if (ret) 83 return ret; 84 85 if (val & BIT(offset % 8)) 86 return GPIO_LINE_DIRECTION_IN; 87 88 return GPIO_LINE_DIRECTION_OUT; 89 } 90 91 static int xra1403_get(struct gpio_chip *chip, unsigned int offset) 92 { 93 int ret; 94 unsigned int val; 95 struct xra1403 *xra = gpiochip_get_data(chip); 96 97 ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val); 98 if (ret) 99 return ret; 100 101 return !!(val & BIT(offset % 8)); 102 } 103 104 static int xra1403_set(struct gpio_chip *chip, unsigned int offset, int value) 105 { 106 struct xra1403 *xra = gpiochip_get_data(chip); 107 108 return regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset), 109 BIT(offset % 8), 110 value ? BIT(offset % 8) : 0); 111 } 112 113 #ifdef CONFIG_DEBUG_FS 114 static void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip) 115 { 116 int reg; 117 struct xra1403 *xra = gpiochip_get_data(chip); 118 int value[XRA_LAST]; 119 int i; 120 const char *label; 121 unsigned int gcr; 122 unsigned int gsr; 123 124 seq_puts(s, "xra reg:"); 125 for (reg = 0; reg <= XRA_LAST; reg++) 126 seq_printf(s, " %2.2x", reg); 127 seq_puts(s, "\n value:"); 128 for (reg = 0; reg < XRA_LAST; reg++) { 129 regmap_read(xra->regmap, reg, &value[reg]); 130 seq_printf(s, " %2.2x", value[reg]); 131 } 132 seq_puts(s, "\n"); 133 134 gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR]; 135 gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR]; 136 for_each_requested_gpio(chip, i, label) { 137 seq_printf(s, " gpio-%-3d (%-12s) %s %s\n", i, label, 138 (gcr & BIT(i)) ? "in" : "out", 139 str_hi_lo(gsr & BIT(i))); 140 } 141 } 142 #else 143 #define xra1403_dbg_show NULL 144 #endif 145 146 static int xra1403_probe(struct spi_device *spi) 147 { 148 struct xra1403 *xra; 149 struct gpio_desc *reset_gpio; 150 int ret; 151 152 xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL); 153 if (!xra) 154 return -ENOMEM; 155 156 /* bring the chip out of reset if reset pin is provided*/ 157 reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW); 158 if (IS_ERR(reset_gpio)) 159 dev_warn(&spi->dev, "Could not get reset-gpios\n"); 160 161 xra->chip.direction_input = xra1403_direction_input; 162 xra->chip.direction_output = xra1403_direction_output; 163 xra->chip.get_direction = xra1403_get_direction; 164 xra->chip.get = xra1403_get; 165 xra->chip.set = xra1403_set; 166 167 xra->chip.dbg_show = xra1403_dbg_show; 168 169 xra->chip.ngpio = 16; 170 xra->chip.label = "xra1403"; 171 172 xra->chip.base = -1; 173 xra->chip.can_sleep = true; 174 xra->chip.parent = &spi->dev; 175 xra->chip.owner = THIS_MODULE; 176 177 xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg); 178 if (IS_ERR(xra->regmap)) { 179 ret = PTR_ERR(xra->regmap); 180 dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret); 181 return ret; 182 } 183 184 return devm_gpiochip_add_data(&spi->dev, &xra->chip, xra); 185 } 186 187 static const struct spi_device_id xra1403_ids[] = { 188 { "xra1403" }, 189 {}, 190 }; 191 MODULE_DEVICE_TABLE(spi, xra1403_ids); 192 193 static const struct of_device_id xra1403_spi_of_match[] = { 194 { .compatible = "exar,xra1403" }, 195 {}, 196 }; 197 MODULE_DEVICE_TABLE(of, xra1403_spi_of_match); 198 199 static struct spi_driver xra1403_driver = { 200 .probe = xra1403_probe, 201 .id_table = xra1403_ids, 202 .driver = { 203 .name = "xra1403", 204 .of_match_table = xra1403_spi_of_match, 205 }, 206 }; 207 208 module_spi_driver(xra1403_driver); 209 210 MODULE_AUTHOR("Nandor Han <nandor.han@ge.com>"); 211 MODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>"); 212 MODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403"); 213 MODULE_LICENSE("GPL v2"); 214