1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * GPIO driver for the ACCES 104-IDI-48 family 4 * Copyright (C) 2015 William Breathitt Gray 5 * 6 * This driver supports the following ACCES devices: 104-IDI-48A, 7 * 104-IDI-48AC, 104-IDI-48B, and 104-IDI-48BC. 8 */ 9 #include <linux/bits.h> 10 #include <linux/device.h> 11 #include <linux/err.h> 12 #include <linux/gpio/regmap.h> 13 #include <linux/interrupt.h> 14 #include <linux/ioport.h> 15 #include <linux/irq.h> 16 #include <linux/isa.h> 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/moduleparam.h> 20 #include <linux/regmap.h> 21 #include <linux/types.h> 22 23 #define IDI_48_EXTENT 8 24 #define MAX_NUM_IDI_48 max_num_isa_dev(IDI_48_EXTENT) 25 26 static unsigned int base[MAX_NUM_IDI_48]; 27 static unsigned int num_idi_48; 28 module_param_hw_array(base, uint, ioport, &num_idi_48, 0); 29 MODULE_PARM_DESC(base, "ACCES 104-IDI-48 base addresses"); 30 31 static unsigned int irq[MAX_NUM_IDI_48]; 32 static unsigned int num_irq; 33 module_param_hw_array(irq, uint, irq, &num_irq, 0); 34 MODULE_PARM_DESC(irq, "ACCES 104-IDI-48 interrupt line numbers"); 35 36 #define IDI48_IRQ_STATUS 0x7 37 #define IDI48_IRQ_ENABLE IDI48_IRQ_STATUS 38 39 static int idi_48_reg_mask_xlate(struct gpio_regmap *gpio, 40 enum gpio_regmap_operation op, 41 unsigned int base, unsigned int offset, 42 unsigned int *reg, unsigned int *mask) 43 { 44 const unsigned int line = offset % 8; 45 const unsigned int stride = offset / 8; 46 const unsigned int port = (stride / 3) * 4; 47 const unsigned int port_stride = stride % 3; 48 49 *reg = base + port + port_stride; 50 *mask = BIT(line); 51 52 return 0; 53 } 54 55 static const struct regmap_range idi_48_wr_ranges[] = { 56 regmap_reg_range(0x0, 0x6), 57 }; 58 static const struct regmap_range idi_48_rd_ranges[] = { 59 regmap_reg_range(0x0, 0x2), regmap_reg_range(0x4, 0x7), 60 }; 61 static const struct regmap_range idi_48_precious_ranges[] = { 62 regmap_reg_range(0x7, 0x7), 63 }; 64 static const struct regmap_access_table idi_48_wr_table = { 65 .no_ranges = idi_48_wr_ranges, 66 .n_no_ranges = ARRAY_SIZE(idi_48_wr_ranges), 67 }; 68 static const struct regmap_access_table idi_48_rd_table = { 69 .yes_ranges = idi_48_rd_ranges, 70 .n_yes_ranges = ARRAY_SIZE(idi_48_rd_ranges), 71 }; 72 static const struct regmap_access_table idi_48_precious_table = { 73 .yes_ranges = idi_48_precious_ranges, 74 .n_yes_ranges = ARRAY_SIZE(idi_48_precious_ranges), 75 }; 76 static const struct regmap_config idi48_regmap_config = { 77 .reg_bits = 8, 78 .reg_stride = 1, 79 .val_bits = 8, 80 .io_port = true, 81 .max_register = 0x6, 82 .wr_table = &idi_48_wr_table, 83 .rd_table = &idi_48_rd_table, 84 .precious_table = &idi_48_precious_table, 85 .use_raw_spinlock = true, 86 }; 87 88 #define IDI48_NGPIO 48 89 90 #define IDI48_REGMAP_IRQ(_id) \ 91 [_id] = { \ 92 .mask = BIT((_id) / 8), \ 93 .type = { .types_supported = IRQ_TYPE_EDGE_BOTH }, \ 94 } 95 96 static const struct regmap_irq idi48_regmap_irqs[IDI48_NGPIO] = { 97 IDI48_REGMAP_IRQ(0), IDI48_REGMAP_IRQ(1), IDI48_REGMAP_IRQ(2), /* 0-2 */ 98 IDI48_REGMAP_IRQ(3), IDI48_REGMAP_IRQ(4), IDI48_REGMAP_IRQ(5), /* 3-5 */ 99 IDI48_REGMAP_IRQ(6), IDI48_REGMAP_IRQ(7), IDI48_REGMAP_IRQ(8), /* 6-8 */ 100 IDI48_REGMAP_IRQ(9), IDI48_REGMAP_IRQ(10), IDI48_REGMAP_IRQ(11), /* 9-11 */ 101 IDI48_REGMAP_IRQ(12), IDI48_REGMAP_IRQ(13), IDI48_REGMAP_IRQ(14), /* 12-14 */ 102 IDI48_REGMAP_IRQ(15), IDI48_REGMAP_IRQ(16), IDI48_REGMAP_IRQ(17), /* 15-17 */ 103 IDI48_REGMAP_IRQ(18), IDI48_REGMAP_IRQ(19), IDI48_REGMAP_IRQ(20), /* 18-20 */ 104 IDI48_REGMAP_IRQ(21), IDI48_REGMAP_IRQ(22), IDI48_REGMAP_IRQ(23), /* 21-23 */ 105 IDI48_REGMAP_IRQ(24), IDI48_REGMAP_IRQ(25), IDI48_REGMAP_IRQ(26), /* 24-26 */ 106 IDI48_REGMAP_IRQ(27), IDI48_REGMAP_IRQ(28), IDI48_REGMAP_IRQ(29), /* 27-29 */ 107 IDI48_REGMAP_IRQ(30), IDI48_REGMAP_IRQ(31), IDI48_REGMAP_IRQ(32), /* 30-32 */ 108 IDI48_REGMAP_IRQ(33), IDI48_REGMAP_IRQ(34), IDI48_REGMAP_IRQ(35), /* 33-35 */ 109 IDI48_REGMAP_IRQ(36), IDI48_REGMAP_IRQ(37), IDI48_REGMAP_IRQ(38), /* 36-38 */ 110 IDI48_REGMAP_IRQ(39), IDI48_REGMAP_IRQ(40), IDI48_REGMAP_IRQ(41), /* 39-41 */ 111 IDI48_REGMAP_IRQ(42), IDI48_REGMAP_IRQ(43), IDI48_REGMAP_IRQ(44), /* 42-44 */ 112 IDI48_REGMAP_IRQ(45), IDI48_REGMAP_IRQ(46), IDI48_REGMAP_IRQ(47), /* 45-47 */ 113 }; 114 115 static const char *idi48_names[IDI48_NGPIO] = { 116 "Bit 0 A", "Bit 1 A", "Bit 2 A", "Bit 3 A", "Bit 4 A", "Bit 5 A", 117 "Bit 6 A", "Bit 7 A", "Bit 8 A", "Bit 9 A", "Bit 10 A", "Bit 11 A", 118 "Bit 12 A", "Bit 13 A", "Bit 14 A", "Bit 15 A", "Bit 16 A", "Bit 17 A", 119 "Bit 18 A", "Bit 19 A", "Bit 20 A", "Bit 21 A", "Bit 22 A", "Bit 23 A", 120 "Bit 0 B", "Bit 1 B", "Bit 2 B", "Bit 3 B", "Bit 4 B", "Bit 5 B", 121 "Bit 6 B", "Bit 7 B", "Bit 8 B", "Bit 9 B", "Bit 10 B", "Bit 11 B", 122 "Bit 12 B", "Bit 13 B", "Bit 14 B", "Bit 15 B", "Bit 16 B", "Bit 17 B", 123 "Bit 18 B", "Bit 19 B", "Bit 20 B", "Bit 21 B", "Bit 22 B", "Bit 23 B" 124 }; 125 126 static int idi_48_probe(struct device *dev, unsigned int id) 127 { 128 const char *const name = dev_name(dev); 129 struct gpio_regmap_config config = {}; 130 void __iomem *regs; 131 struct regmap *map; 132 struct regmap_irq_chip *chip; 133 struct regmap_irq_chip_data *chip_data; 134 int err; 135 136 if (!devm_request_region(dev, base[id], IDI_48_EXTENT, name)) { 137 dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n", 138 base[id], base[id] + IDI_48_EXTENT); 139 return -EBUSY; 140 } 141 142 regs = devm_ioport_map(dev, base[id], IDI_48_EXTENT); 143 if (!regs) 144 return -ENOMEM; 145 146 map = devm_regmap_init_mmio(dev, regs, &idi48_regmap_config); 147 if (IS_ERR(map)) 148 return dev_err_probe(dev, PTR_ERR(map), 149 "Unable to initialize register map\n"); 150 151 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); 152 if (!chip) 153 return -ENOMEM; 154 155 chip->name = name; 156 chip->status_base = IDI48_IRQ_STATUS; 157 chip->unmask_base = IDI48_IRQ_ENABLE; 158 chip->clear_on_unmask = true; 159 chip->num_regs = 1; 160 chip->irqs = idi48_regmap_irqs; 161 chip->num_irqs = ARRAY_SIZE(idi48_regmap_irqs); 162 163 err = devm_regmap_add_irq_chip(dev, map, irq[id], IRQF_SHARED, 0, chip, 164 &chip_data); 165 if (err) 166 return dev_err_probe(dev, err, "IRQ registration failed\n"); 167 168 config.parent = dev; 169 config.regmap = map; 170 config.ngpio = IDI48_NGPIO; 171 config.names = idi48_names; 172 config.reg_dat_base = GPIO_REGMAP_ADDR(0x0); 173 config.ngpio_per_reg = 8; 174 config.reg_mask_xlate = idi_48_reg_mask_xlate; 175 config.irq_domain = regmap_irq_get_domain(chip_data); 176 177 return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &config)); 178 } 179 180 static struct isa_driver idi_48_driver = { 181 .probe = idi_48_probe, 182 .driver = { 183 .name = "104-idi-48" 184 }, 185 }; 186 module_isa_driver_with_irq(idi_48_driver, num_idi_48, num_irq); 187 188 MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>"); 189 MODULE_DESCRIPTION("ACCES 104-IDI-48 GPIO driver"); 190 MODULE_LICENSE("GPL v2"); 191