xref: /linux/Documentation/devicetree/bindings/crypto/qcom-qce.yaml (revision 3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm crypto engine driver
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Konrad Dybcio <konradybcio@kernel.org>
12
13description:
14  This document defines the binding for the QCE crypto
15  controller found on Qualcomm parts.
16
17properties:
18  compatible:
19    oneOf:
20      - const: qcom,crypto-v5.1
21        deprecated: true
22        description: Kept only for ABI backward compatibility
23
24      - const: qcom,crypto-v5.4
25        deprecated: true
26        description: Kept only for ABI backward compatibility
27
28      - items:
29          - enum:
30              - qcom,ipq4019-qce
31              - qcom,sm8150-qce
32          - const: qcom,qce
33
34      - items:
35          - enum:
36              - qcom,ipq6018-qce
37              - qcom,ipq8074-qce
38              - qcom,ipq9574-qce
39              - qcom,msm8996-qce
40              - qcom,qcm2290-qce
41              - qcom,sdm845-qce
42              - qcom,sm6115-qce
43          - const: qcom,ipq4019-qce
44          - const: qcom,qce
45
46      - items:
47          - enum:
48              - qcom,eliza-qce
49              - qcom,glymur-qce
50              - qcom,kaanapali-qce
51              - qcom,milos-qce
52              - qcom,nord-qce
53              - qcom,qcs615-qce
54              - qcom,qcs8300-qce
55              - qcom,sa8775p-qce
56              - qcom,sc7280-qce
57              - qcom,shikra-qce
58              - qcom,sm6350-qce
59              - qcom,sm8250-qce
60              - qcom,sm8350-qce
61              - qcom,sm8450-qce
62              - qcom,sm8550-qce
63              - qcom,sm8650-qce
64              - qcom,sm8750-qce
65              - qcom,x1e80100-qce
66          - const: qcom,sm8150-qce
67          - const: qcom,qce
68
69  reg:
70    maxItems: 1
71
72  clocks:
73    minItems: 1
74    maxItems: 3
75
76  clock-names:
77    minItems: 1
78    maxItems: 3
79
80  iommus:
81    minItems: 1
82    maxItems: 8
83    description:
84      phandle to apps_smmu node with sid mask.
85
86  interconnects:
87    maxItems: 1
88    description:
89      Interconnect path between qce crypto and main memory.
90
91  interconnect-names:
92    const: memory
93
94  dmas:
95    items:
96      - description: DMA specifiers for rx dma channel.
97      - description: DMA specifiers for tx dma channel.
98
99  dma-names:
100    items:
101      - const: rx
102      - const: tx
103
104allOf:
105  - if:
106      properties:
107        compatible:
108          contains:
109            enum:
110              - qcom,crypto-v5.1
111              - qcom,crypto-v5.4
112              - qcom,ipq6018-qce
113              - qcom,ipq8074-qce
114              - qcom,ipq9574-qce
115              - qcom,msm8996-qce
116              - qcom,sdm845-qce
117    then:
118      properties:
119        clocks:
120          maxItems: 3
121        clock-names:
122          items:
123            - const: iface
124            - const: bus
125            - const: core
126      required:
127        - clocks
128        - clock-names
129
130  - if:
131      properties:
132        compatible:
133          contains:
134            enum:
135              - qcom,qcm2290-qce
136              - qcom,sm6115-qce
137    then:
138      properties:
139        clocks:
140          maxItems: 1
141        clock-names:
142          items:
143            - const: core
144      required:
145        - clocks
146        - clock-names
147
148  - if:
149      properties:
150        compatible:
151          contains:
152            enum:
153              - qcom,sm8150-qce
154    then:
155      properties:
156        clocks: false
157        clock-names: false
158
159required:
160  - compatible
161  - reg
162  - dmas
163  - dma-names
164
165additionalProperties: false
166
167examples:
168  - |
169    #include <dt-bindings/clock/qcom,gcc-apq8084.h>
170    crypto-engine@fd45a000 {
171        compatible = "qcom,ipq6018-qce", "qcom,ipq4019-qce", "qcom,qce";
172        reg = <0xfd45a000 0x6000>;
173        clocks = <&gcc GCC_CE2_AHB_CLK>,
174                 <&gcc GCC_CE2_AXI_CLK>,
175                 <&gcc GCC_CE2_CLK>;
176        clock-names = "iface", "bus", "core";
177        dmas = <&cryptobam 2>, <&cryptobam 3>;
178        dma-names = "rx", "tx";
179        iommus = <&apps_smmu 0x584 0x0011>,
180                 <&apps_smmu 0x586 0x0011>,
181                 <&apps_smmu 0x594 0x0011>,
182                 <&apps_smmu 0x596 0x0011>;
183    };
184