xref: /linux/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml (revision 3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interconnect/qcom,osm-l3.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider
8
9maintainers:
10  - Sibi Sankar <quic_sibis@quicinc.com>
11
12description:
13  L3 cache bandwidth requirements on Qualcomm SoCs is serviced by the OSM.
14  The OSM L3 interconnect provider aggregates the L3 bandwidth requests
15  from CPU/GPU and relays it to the OSM.
16
17properties:
18  compatible:
19    oneOf:
20      - enum:
21          - qcom,shikra-epss-l3
22      - items:
23          - enum:
24              - qcom,sc7180-osm-l3
25              - qcom,sc8180x-osm-l3
26              - qcom,sdm670-osm-l3
27              - qcom,sdm845-osm-l3
28              - qcom,sm6350-osm-l3
29              - qcom,sm8150-osm-l3
30          - const: qcom,osm-l3
31      - items:
32          - enum:
33              - qcom,eliza-epss-l3
34              - qcom,sa8775p-epss-l3
35              - qcom,sc7280-epss-l3
36              - qcom,sc8280xp-epss-l3
37              - qcom,sm6375-cpucp-l3
38              - qcom,sm8250-epss-l3
39              - qcom,sm8350-epss-l3
40              - qcom,sm8550-epss-l3
41              - qcom,sm8650-epss-l3
42          - const: qcom,epss-l3
43      - items:
44          - enum:
45              - qcom,qcs8300-epss-l3
46          - const: qcom,sa8775p-epss-l3
47          - const: qcom,epss-l3
48      - items:
49          - enum:
50              - qcom,qcs615-osm-l3
51          - const: qcom,sm8150-osm-l3
52          - const: qcom,osm-l3
53
54  reg:
55    maxItems: 1
56
57  clocks:
58    items:
59      - description: xo clock
60      - description: alternate clock
61
62  clock-names:
63    items:
64      - const: xo
65      - const: alternate
66
67  '#interconnect-cells':
68    const: 1
69
70required:
71  - compatible
72  - reg
73  - clocks
74  - clock-names
75  - '#interconnect-cells'
76
77additionalProperties: false
78
79examples:
80  - |
81
82    #define GPLL0               165
83    #define RPMH_CXO_CLK        0
84
85    osm_l3: interconnect@17d41000 {
86      compatible = "qcom,sdm845-osm-l3", "qcom,osm-l3";
87      reg = <0x17d41000 0x1400>;
88
89      clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
90      clock-names = "xo", "alternate";
91
92      #interconnect-cells = <1>;
93    };
94