1 /* 2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/slab.h> 37 #include <linux/errno.h> 38 #include <linux/netdevice.h> 39 #include <linux/inetdevice.h> 40 #include <linux/rtnetlink.h> 41 #include <linux/if_vlan.h> 42 #include <linux/sched/mm.h> 43 #include <linux/sched/task.h> 44 45 #include <net/ipv6.h> 46 #include <net/addrconf.h> 47 #include <net/devlink.h> 48 49 #include <rdma/ib_smi.h> 50 #include <rdma/ib_user_verbs.h> 51 #include <rdma/ib_addr.h> 52 #include <rdma/ib_cache.h> 53 #include <rdma/uverbs_ioctl.h> 54 55 #include <net/bonding.h> 56 57 #include <linux/mlx4/driver.h> 58 #include <linux/mlx4/cmd.h> 59 #include <linux/mlx4/qp.h> 60 61 #include "mlx4_ib.h" 62 #include <rdma/mlx4-abi.h> 63 64 #define DRV_NAME MLX4_IB_DRV_NAME 65 #define DRV_VERSION "4.0-0" 66 67 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF 68 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF 69 #define MLX4_IB_CARD_REV_A0 0xA0 70 71 MODULE_AUTHOR("Roland Dreier"); 72 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver"); 73 MODULE_LICENSE("Dual BSD/GPL"); 74 75 int mlx4_ib_sm_guid_assign = 0; 76 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444); 77 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)"); 78 79 static const char mlx4_ib_version[] = 80 DRV_NAME ": Mellanox ConnectX InfiniBand driver v" 81 DRV_VERSION "\n"; 82 83 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init); 84 static enum rdma_link_layer mlx4_ib_port_link_layer(struct ib_device *device, 85 u32 port_num); 86 static int mlx4_ib_event(struct notifier_block *this, unsigned long event, 87 void *param); 88 89 static struct workqueue_struct *wq; 90 91 static int check_flow_steering_support(struct mlx4_dev *dev) 92 { 93 int eth_num_ports = 0; 94 int ib_num_ports = 0; 95 96 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED; 97 98 if (dmfs) { 99 int i; 100 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) 101 eth_num_ports++; 102 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 103 ib_num_ports++; 104 dmfs &= (!ib_num_ports || 105 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) && 106 (!eth_num_ports || 107 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN)); 108 if (ib_num_ports && mlx4_is_mfunc(dev)) { 109 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n"); 110 dmfs = 0; 111 } 112 } 113 return dmfs; 114 } 115 116 static int num_ib_ports(struct mlx4_dev *dev) 117 { 118 int ib_ports = 0; 119 int i; 120 121 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 122 ib_ports++; 123 124 return ib_ports; 125 } 126 127 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, 128 u32 port_num) 129 { 130 struct mlx4_ib_dev *ibdev = to_mdev(device); 131 struct net_device *dev, *ret = NULL; 132 133 rcu_read_lock(); 134 for_each_netdev_rcu(&init_net, dev) { 135 if (dev->dev.parent != ibdev->ib_dev.dev.parent || 136 dev->dev_port + 1 != port_num) 137 continue; 138 139 if (mlx4_is_bonded(ibdev->dev)) { 140 struct net_device *upper; 141 142 upper = netdev_master_upper_dev_get_rcu(dev); 143 if (upper) { 144 struct net_device *active; 145 146 active = bond_option_active_slave_get_rcu(netdev_priv(upper)); 147 if (active) 148 dev = active; 149 } 150 } 151 152 dev_hold(dev); 153 ret = dev; 154 break; 155 } 156 157 rcu_read_unlock(); 158 return ret; 159 } 160 161 static int mlx4_ib_update_gids_v1(struct gid_entry *gids, 162 struct mlx4_ib_dev *ibdev, 163 u32 port_num) 164 { 165 struct mlx4_cmd_mailbox *mailbox; 166 int err; 167 struct mlx4_dev *dev = ibdev->dev; 168 int i; 169 union ib_gid *gid_tbl; 170 171 mailbox = mlx4_alloc_cmd_mailbox(dev); 172 if (IS_ERR(mailbox)) 173 return -ENOMEM; 174 175 gid_tbl = mailbox->buf; 176 177 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 178 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid)); 179 180 err = mlx4_cmd(dev, mailbox->dma, 181 MLX4_SET_PORT_GID_TABLE << 8 | port_num, 182 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 183 MLX4_CMD_WRAPPED); 184 if (mlx4_is_bonded(dev)) 185 err += mlx4_cmd(dev, mailbox->dma, 186 MLX4_SET_PORT_GID_TABLE << 8 | 2, 187 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 188 MLX4_CMD_WRAPPED); 189 190 mlx4_free_cmd_mailbox(dev, mailbox); 191 return err; 192 } 193 194 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids, 195 struct mlx4_ib_dev *ibdev, 196 u32 port_num) 197 { 198 struct mlx4_cmd_mailbox *mailbox; 199 int err; 200 struct mlx4_dev *dev = ibdev->dev; 201 int i; 202 struct { 203 union ib_gid gid; 204 __be32 rsrvd1[2]; 205 __be16 rsrvd2; 206 u8 type; 207 u8 version; 208 __be32 rsrvd3; 209 } *gid_tbl; 210 211 mailbox = mlx4_alloc_cmd_mailbox(dev); 212 if (IS_ERR(mailbox)) 213 return -ENOMEM; 214 215 gid_tbl = mailbox->buf; 216 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 217 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid)); 218 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) { 219 gid_tbl[i].version = 2; 220 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid)) 221 gid_tbl[i].type = 1; 222 } 223 } 224 225 err = mlx4_cmd(dev, mailbox->dma, 226 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num, 227 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 228 MLX4_CMD_WRAPPED); 229 if (mlx4_is_bonded(dev)) 230 err += mlx4_cmd(dev, mailbox->dma, 231 MLX4_SET_PORT_ROCE_ADDR << 8 | 2, 232 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 233 MLX4_CMD_WRAPPED); 234 235 mlx4_free_cmd_mailbox(dev, mailbox); 236 return err; 237 } 238 239 static int mlx4_ib_update_gids(struct gid_entry *gids, 240 struct mlx4_ib_dev *ibdev, 241 u32 port_num) 242 { 243 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 244 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num); 245 246 return mlx4_ib_update_gids_v1(gids, ibdev, port_num); 247 } 248 249 static void free_gid_entry(struct gid_entry *entry) 250 { 251 memset(&entry->gid, 0, sizeof(entry->gid)); 252 kfree(entry->ctx); 253 entry->ctx = NULL; 254 } 255 256 static int mlx4_ib_add_gid(const struct ib_gid_attr *attr, void **context) 257 { 258 struct mlx4_ib_dev *ibdev = to_mdev(attr->device); 259 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 260 struct mlx4_port_gid_table *port_gid_table; 261 int free = -1, found = -1; 262 int ret = 0; 263 int hw_update = 0; 264 int i; 265 struct gid_entry *gids; 266 u16 vlan_id = 0xffff; 267 u8 mac[ETH_ALEN]; 268 269 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num)) 270 return -EINVAL; 271 272 if (attr->port_num > MLX4_MAX_PORTS) 273 return -EINVAL; 274 275 if (!context) 276 return -EINVAL; 277 278 ret = rdma_read_gid_l2_fields(attr, &vlan_id, &mac[0]); 279 if (ret) 280 return ret; 281 port_gid_table = &iboe->gids[attr->port_num - 1]; 282 spin_lock_bh(&iboe->lock); 283 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 284 if (!memcmp(&port_gid_table->gids[i].gid, 285 &attr->gid, sizeof(attr->gid)) && 286 port_gid_table->gids[i].gid_type == attr->gid_type && 287 port_gid_table->gids[i].vlan_id == vlan_id) { 288 found = i; 289 break; 290 } 291 if (free < 0 && rdma_is_zero_gid(&port_gid_table->gids[i].gid)) 292 free = i; /* HW has space */ 293 } 294 295 if (found < 0) { 296 if (free < 0) { 297 ret = -ENOSPC; 298 } else { 299 port_gid_table->gids[free].ctx = kmalloc_obj(*port_gid_table->gids[free].ctx, 300 GFP_ATOMIC); 301 if (!port_gid_table->gids[free].ctx) { 302 ret = -ENOMEM; 303 } else { 304 *context = port_gid_table->gids[free].ctx; 305 port_gid_table->gids[free].gid = attr->gid; 306 port_gid_table->gids[free].gid_type = attr->gid_type; 307 port_gid_table->gids[free].vlan_id = vlan_id; 308 port_gid_table->gids[free].ctx->real_index = free; 309 port_gid_table->gids[free].ctx->refcount = 1; 310 hw_update = 1; 311 } 312 } 313 } else { 314 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx; 315 *context = ctx; 316 ctx->refcount++; 317 } 318 if (!ret && hw_update) { 319 gids = kmalloc_objs(*gids, MLX4_MAX_PORT_GIDS, GFP_ATOMIC); 320 if (!gids) { 321 ret = -ENOMEM; 322 *context = NULL; 323 free_gid_entry(&port_gid_table->gids[free]); 324 } else { 325 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) { 326 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid)); 327 gids[i].gid_type = port_gid_table->gids[i].gid_type; 328 } 329 } 330 } 331 spin_unlock_bh(&iboe->lock); 332 333 if (!ret && hw_update) { 334 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num); 335 if (ret) { 336 spin_lock_bh(&iboe->lock); 337 *context = NULL; 338 free_gid_entry(&port_gid_table->gids[free]); 339 spin_unlock_bh(&iboe->lock); 340 } 341 kfree(gids); 342 } 343 344 return ret; 345 } 346 347 static int mlx4_ib_del_gid(const struct ib_gid_attr *attr, void **context) 348 { 349 struct gid_cache_context *ctx = *context; 350 struct mlx4_ib_dev *ibdev = to_mdev(attr->device); 351 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 352 struct mlx4_port_gid_table *port_gid_table; 353 int ret = 0; 354 int hw_update = 0; 355 struct gid_entry *gids = NULL; 356 357 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num)) 358 return -EINVAL; 359 360 if (attr->port_num > MLX4_MAX_PORTS) 361 return -EINVAL; 362 363 port_gid_table = &iboe->gids[attr->port_num - 1]; 364 spin_lock_bh(&iboe->lock); 365 if (ctx) { 366 ctx->refcount--; 367 if (!ctx->refcount) { 368 unsigned int real_index = ctx->real_index; 369 370 free_gid_entry(&port_gid_table->gids[real_index]); 371 hw_update = 1; 372 } 373 } 374 if (!ret && hw_update) { 375 int i; 376 377 gids = kmalloc_objs(*gids, MLX4_MAX_PORT_GIDS, GFP_ATOMIC); 378 if (!gids) { 379 ret = -ENOMEM; 380 } else { 381 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) { 382 memcpy(&gids[i].gid, 383 &port_gid_table->gids[i].gid, 384 sizeof(union ib_gid)); 385 gids[i].gid_type = 386 port_gid_table->gids[i].gid_type; 387 } 388 } 389 } 390 spin_unlock_bh(&iboe->lock); 391 392 if (gids) 393 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num); 394 395 kfree(gids); 396 return ret; 397 } 398 399 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev, 400 const struct ib_gid_attr *attr) 401 { 402 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 403 struct gid_cache_context *ctx = NULL; 404 struct mlx4_port_gid_table *port_gid_table; 405 int real_index = -EINVAL; 406 int i; 407 unsigned long flags; 408 u32 port_num = attr->port_num; 409 410 if (port_num > MLX4_MAX_PORTS) 411 return -EINVAL; 412 413 if (mlx4_is_bonded(ibdev->dev)) 414 port_num = 1; 415 416 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num)) 417 return attr->index; 418 419 spin_lock_irqsave(&iboe->lock, flags); 420 port_gid_table = &iboe->gids[port_num - 1]; 421 422 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 423 if (!memcmp(&port_gid_table->gids[i].gid, 424 &attr->gid, sizeof(attr->gid)) && 425 attr->gid_type == port_gid_table->gids[i].gid_type) { 426 ctx = port_gid_table->gids[i].ctx; 427 break; 428 } 429 if (ctx) 430 real_index = ctx->real_index; 431 spin_unlock_irqrestore(&iboe->lock, flags); 432 return real_index; 433 } 434 435 static int mlx4_ib_query_device(struct ib_device *ibdev, 436 struct ib_device_attr *props, 437 struct ib_udata *uhw) 438 { 439 struct mlx4_ib_dev *dev = to_mdev(ibdev); 440 struct ib_smp *in_mad; 441 struct ib_smp *out_mad; 442 int err; 443 int have_ib_ports; 444 struct mlx4_uverbs_ex_query_device cmd; 445 struct mlx4_uverbs_ex_query_device_resp resp = {}; 446 struct mlx4_clock_params clock_params; 447 size_t uhw_outlen = uhw ? uhw->outlen : 0; 448 449 if (uhw && uhw->inlen) { 450 err = ib_copy_validate_udata_in_cm(uhw, cmd, reserved, 0); 451 if (err) 452 return err; 453 454 if (cmd.reserved) 455 return -EINVAL; 456 } 457 458 resp.response_length = offsetof(typeof(resp), response_length) + 459 sizeof(resp.response_length); 460 in_mad = kzalloc_obj(*in_mad); 461 out_mad = kmalloc_obj(*out_mad); 462 err = -ENOMEM; 463 if (!in_mad || !out_mad) 464 goto out; 465 466 ib_init_query_mad(in_mad); 467 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 468 469 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS, 470 1, NULL, NULL, in_mad, out_mad); 471 if (err) 472 goto out; 473 474 have_ib_ports = num_ib_ports(dev->dev); 475 476 props->fw_ver = dev->dev->caps.fw_ver; 477 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 478 IB_DEVICE_PORT_ACTIVE_EVENT | 479 IB_DEVICE_SYS_IMAGE_GUID | 480 IB_DEVICE_RC_RNR_NAK_GEN; 481 props->kernel_cap_flags = IBK_BLOCK_MULTICAST_LOOPBACK; 482 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR) 483 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 484 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR) 485 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 486 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports) 487 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 488 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT) 489 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 490 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) 491 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 492 if (dev->dev->caps.max_gso_sz && 493 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) && 494 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)) 495 props->kernel_cap_flags |= IBK_UD_TSO; 496 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY) 497 props->kernel_cap_flags |= IBK_LOCAL_DMA_LKEY; 498 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) && 499 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) && 500 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR)) 501 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 502 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) 503 props->device_cap_flags |= IB_DEVICE_XRC; 504 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW) 505 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW; 506 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 507 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B) 508 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B; 509 else 510 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A; 511 } 512 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 513 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING; 514 515 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM; 516 517 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) & 518 0xffffff; 519 props->vendor_part_id = dev->dev->persist->pdev->device; 520 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32)); 521 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 522 523 props->max_mr_size = ~0ull; 524 props->page_size_cap = dev->dev->caps.page_size_cap; 525 props->max_qp = dev->dev->quotas.qp; 526 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE; 527 props->max_send_sge = 528 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg); 529 props->max_recv_sge = 530 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg); 531 props->max_sge_rd = MLX4_MAX_SGE_RD; 532 props->max_cq = dev->dev->quotas.cq; 533 props->max_cqe = dev->dev->caps.max_cqes; 534 props->max_mr = dev->dev->quotas.mpt; 535 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds; 536 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma; 537 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma; 538 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 539 props->max_srq = dev->dev->quotas.srq; 540 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; 541 props->max_srq_sge = dev->dev->caps.max_srq_sge; 542 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES; 543 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; 544 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? 545 IB_ATOMIC_HCA : IB_ATOMIC_NONE; 546 props->masked_atomic_cap = props->atomic_cap; 547 props->max_pkeys = dev->dev->caps.pkey_table_len[1]; 548 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms; 549 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm; 550 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 551 props->max_mcast_grp; 552 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL; 553 props->timestamp_mask = 0xFFFFFFFFFFFFULL; 554 props->max_ah = INT_MAX; 555 556 if (mlx4_ib_port_link_layer(ibdev, 1) == IB_LINK_LAYER_ETHERNET || 557 mlx4_ib_port_link_layer(ibdev, 2) == IB_LINK_LAYER_ETHERNET) { 558 if (dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) { 559 props->rss_caps.max_rwq_indirection_tables = 560 props->max_qp; 561 props->rss_caps.max_rwq_indirection_table_size = 562 dev->dev->caps.max_rss_tbl_sz; 563 props->rss_caps.supported_qpts = 1 << IB_QPT_RAW_PACKET; 564 props->max_wq_type_rq = props->max_qp; 565 } 566 567 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) 568 props->raw_packet_caps |= IB_RAW_PACKET_CAP_SCATTER_FCS; 569 } 570 571 props->cq_caps.max_cq_moderation_count = MLX4_MAX_CQ_COUNT; 572 props->cq_caps.max_cq_moderation_period = MLX4_MAX_CQ_PERIOD; 573 574 if (uhw_outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) { 575 resp.response_length += sizeof(resp.hca_core_clock_offset); 576 if (!mlx4_get_internal_clock_params(dev->dev, &clock_params)) { 577 resp.comp_mask |= MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET; 578 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE; 579 } 580 } 581 582 if (uhw_outlen >= resp.response_length + 583 sizeof(resp.max_inl_recv_sz)) { 584 resp.response_length += sizeof(resp.max_inl_recv_sz); 585 resp.max_inl_recv_sz = dev->dev->caps.max_rq_sg * 586 sizeof(struct mlx4_wqe_data_seg); 587 } 588 589 if (offsetofend(typeof(resp), rss_caps) <= uhw_outlen) { 590 if (props->rss_caps.supported_qpts) { 591 resp.rss_caps.rx_hash_function = 592 MLX4_IB_RX_HASH_FUNC_TOEPLITZ; 593 594 resp.rss_caps.rx_hash_fields_mask = 595 MLX4_IB_RX_HASH_SRC_IPV4 | 596 MLX4_IB_RX_HASH_DST_IPV4 | 597 MLX4_IB_RX_HASH_SRC_IPV6 | 598 MLX4_IB_RX_HASH_DST_IPV6 | 599 MLX4_IB_RX_HASH_SRC_PORT_TCP | 600 MLX4_IB_RX_HASH_DST_PORT_TCP | 601 MLX4_IB_RX_HASH_SRC_PORT_UDP | 602 MLX4_IB_RX_HASH_DST_PORT_UDP; 603 604 if (dev->dev->caps.tunnel_offload_mode == 605 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 606 resp.rss_caps.rx_hash_fields_mask |= 607 MLX4_IB_RX_HASH_INNER; 608 } 609 resp.response_length = offsetof(typeof(resp), rss_caps) + 610 sizeof(resp.rss_caps); 611 } 612 613 if (offsetofend(typeof(resp), tso_caps) <= uhw_outlen) { 614 if (dev->dev->caps.max_gso_sz && 615 ((mlx4_ib_port_link_layer(ibdev, 1) == 616 IB_LINK_LAYER_ETHERNET) || 617 (mlx4_ib_port_link_layer(ibdev, 2) == 618 IB_LINK_LAYER_ETHERNET))) { 619 resp.tso_caps.max_tso = dev->dev->caps.max_gso_sz; 620 resp.tso_caps.supported_qpts |= 621 1 << IB_QPT_RAW_PACKET; 622 } 623 resp.response_length = offsetof(typeof(resp), tso_caps) + 624 sizeof(resp.tso_caps); 625 } 626 627 if (uhw_outlen) { 628 err = ib_respond_udata(uhw, resp); 629 if (err) 630 goto out; 631 } 632 out: 633 kfree(in_mad); 634 kfree(out_mad); 635 636 return err; 637 } 638 639 static enum rdma_link_layer 640 mlx4_ib_port_link_layer(struct ib_device *device, u32 port_num) 641 { 642 struct mlx4_dev *dev = to_mdev(device)->dev; 643 644 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ? 645 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET; 646 } 647 648 static int ib_link_query_port(struct ib_device *ibdev, u32 port, 649 struct ib_port_attr *props, int netw_view) 650 { 651 struct ib_smp *in_mad; 652 struct ib_smp *out_mad; 653 int ext_active_speed; 654 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 655 int err = -ENOMEM; 656 657 in_mad = kzalloc_obj(*in_mad); 658 out_mad = kmalloc_obj(*out_mad); 659 if (!in_mad || !out_mad) 660 goto out; 661 662 ib_init_query_mad(in_mad); 663 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 664 in_mad->attr_mod = cpu_to_be32(port); 665 666 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 667 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 668 669 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 670 in_mad, out_mad); 671 if (err) 672 goto out; 673 674 675 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); 676 props->lmc = out_mad->data[34] & 0x7; 677 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); 678 props->sm_sl = out_mad->data[36] & 0xf; 679 props->state = out_mad->data[32] & 0xf; 680 props->phys_state = out_mad->data[33] >> 4; 681 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20)); 682 if (netw_view) 683 props->gid_tbl_len = out_mad->data[50]; 684 else 685 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; 686 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; 687 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port]; 688 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 689 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 690 props->active_width = out_mad->data[31] & 0xf; 691 props->active_speed = out_mad->data[35] >> 4; 692 props->max_mtu = out_mad->data[41] & 0xf; 693 props->active_mtu = out_mad->data[36] >> 4; 694 props->subnet_timeout = out_mad->data[51] & 0x1f; 695 props->max_vl_num = out_mad->data[37] >> 4; 696 props->init_type_reply = out_mad->data[41] >> 4; 697 698 /* Check if extended speeds (EDR/FDR/...) are supported */ 699 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 700 ext_active_speed = out_mad->data[62] >> 4; 701 702 switch (ext_active_speed) { 703 case 1: 704 props->active_speed = IB_SPEED_FDR; 705 break; 706 case 2: 707 props->active_speed = IB_SPEED_EDR; 708 break; 709 } 710 } 711 712 /* If reported active speed is QDR, check if is FDR-10 */ 713 if (props->active_speed == IB_SPEED_QDR) { 714 ib_init_query_mad(in_mad); 715 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO; 716 in_mad->attr_mod = cpu_to_be32(port); 717 718 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, 719 NULL, NULL, in_mad, out_mad); 720 if (err) 721 goto out; 722 723 /* Checking LinkSpeedActive for FDR-10 */ 724 if (out_mad->data[15] & 0x1) 725 props->active_speed = IB_SPEED_FDR10; 726 } 727 728 /* Avoid wrong speed value returned by FW if the IB link is down. */ 729 if (props->state == IB_PORT_DOWN) 730 props->active_speed = IB_SPEED_SDR; 731 732 out: 733 kfree(in_mad); 734 kfree(out_mad); 735 return err; 736 } 737 738 static u8 state_to_phys_state(enum ib_port_state state) 739 { 740 return state == IB_PORT_ACTIVE ? 741 IB_PORT_PHYS_STATE_LINK_UP : IB_PORT_PHYS_STATE_DISABLED; 742 } 743 744 static int eth_link_query_port(struct ib_device *ibdev, u32 port, 745 struct ib_port_attr *props) 746 { 747 748 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 749 struct mlx4_ib_iboe *iboe = &mdev->iboe; 750 struct net_device *ndev; 751 enum ib_mtu tmp; 752 struct mlx4_cmd_mailbox *mailbox; 753 int err = 0; 754 int is_bonded = mlx4_is_bonded(mdev->dev); 755 756 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 757 if (IS_ERR(mailbox)) 758 return PTR_ERR(mailbox); 759 760 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0, 761 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, 762 MLX4_CMD_WRAPPED); 763 if (err) 764 goto out; 765 766 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) || 767 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ? 768 IB_WIDTH_4X : IB_WIDTH_1X; 769 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ? 770 IB_SPEED_FDR : IB_SPEED_QDR; 771 props->port_cap_flags = IB_PORT_CM_SUP; 772 props->ip_gids = true; 773 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port]; 774 props->max_msg_sz = mdev->dev->caps.max_msg_sz; 775 if (mdev->dev->caps.pkey_table_len[port]) 776 props->pkey_tbl_len = 1; 777 props->max_mtu = IB_MTU_4096; 778 props->max_vl_num = 2; 779 props->state = IB_PORT_DOWN; 780 props->phys_state = state_to_phys_state(props->state); 781 props->active_mtu = IB_MTU_256; 782 spin_lock_bh(&iboe->lock); 783 ndev = iboe->netdevs[port - 1]; 784 if (ndev && is_bonded) { 785 rcu_read_lock(); /* required to get upper dev */ 786 ndev = netdev_master_upper_dev_get_rcu(ndev); 787 rcu_read_unlock(); 788 } 789 if (!ndev) 790 goto out_unlock; 791 792 tmp = iboe_get_mtu(ndev->mtu); 793 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256; 794 795 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ? 796 IB_PORT_ACTIVE : IB_PORT_DOWN; 797 props->phys_state = state_to_phys_state(props->state); 798 out_unlock: 799 spin_unlock_bh(&iboe->lock); 800 out: 801 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 802 return err; 803 } 804 805 int __mlx4_ib_query_port(struct ib_device *ibdev, u32 port, 806 struct ib_port_attr *props, int netw_view) 807 { 808 int err; 809 810 /* props being zeroed by the caller, avoid zeroing it here */ 811 812 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ? 813 ib_link_query_port(ibdev, port, props, netw_view) : 814 eth_link_query_port(ibdev, port, props); 815 816 return err; 817 } 818 819 static int mlx4_ib_query_port(struct ib_device *ibdev, u32 port, 820 struct ib_port_attr *props) 821 { 822 /* returns host view */ 823 return __mlx4_ib_query_port(ibdev, port, props, 0); 824 } 825 826 int __mlx4_ib_query_gid(struct ib_device *ibdev, u32 port, int index, 827 union ib_gid *gid, int netw_view) 828 { 829 struct ib_smp *in_mad; 830 struct ib_smp *out_mad; 831 int err = -ENOMEM; 832 struct mlx4_ib_dev *dev = to_mdev(ibdev); 833 int clear = 0; 834 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 835 836 in_mad = kzalloc_obj(*in_mad); 837 out_mad = kmalloc_obj(*out_mad); 838 if (!in_mad || !out_mad) 839 goto out; 840 841 ib_init_query_mad(in_mad); 842 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 843 in_mad->attr_mod = cpu_to_be32(port); 844 845 if (mlx4_is_mfunc(dev->dev) && netw_view) 846 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 847 848 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad); 849 if (err) 850 goto out; 851 852 memcpy(gid->raw, out_mad->data + 8, 8); 853 854 if (mlx4_is_mfunc(dev->dev) && !netw_view) { 855 if (index) { 856 /* For any index > 0, return the null guid */ 857 err = 0; 858 clear = 1; 859 goto out; 860 } 861 } 862 863 ib_init_query_mad(in_mad); 864 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 865 in_mad->attr_mod = cpu_to_be32(index / 8); 866 867 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, 868 NULL, NULL, in_mad, out_mad); 869 if (err) 870 goto out; 871 872 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 873 874 out: 875 if (clear) 876 memset(gid->raw + 8, 0, 8); 877 kfree(in_mad); 878 kfree(out_mad); 879 return err; 880 } 881 882 static int mlx4_ib_query_gid(struct ib_device *ibdev, u32 port, int index, 883 union ib_gid *gid) 884 { 885 if (rdma_protocol_ib(ibdev, port)) 886 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0); 887 return 0; 888 } 889 890 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u32 port, 891 u64 *sl2vl_tbl) 892 { 893 union sl2vl_tbl_to_u64 sl2vl64; 894 struct ib_smp *in_mad; 895 struct ib_smp *out_mad; 896 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 897 int err = -ENOMEM; 898 int jj; 899 900 if (mlx4_is_slave(to_mdev(ibdev)->dev)) { 901 *sl2vl_tbl = 0; 902 return 0; 903 } 904 905 in_mad = kzalloc_obj(*in_mad); 906 out_mad = kmalloc_obj(*out_mad); 907 if (!in_mad || !out_mad) 908 goto out; 909 910 ib_init_query_mad(in_mad); 911 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE; 912 in_mad->attr_mod = 0; 913 914 if (mlx4_is_mfunc(to_mdev(ibdev)->dev)) 915 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 916 917 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 918 in_mad, out_mad); 919 if (err) 920 goto out; 921 922 for (jj = 0; jj < 8; jj++) 923 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj]; 924 *sl2vl_tbl = sl2vl64.sl64; 925 926 out: 927 kfree(in_mad); 928 kfree(out_mad); 929 return err; 930 } 931 932 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev) 933 { 934 u64 sl2vl; 935 int i; 936 int err; 937 938 for (i = 1; i <= mdev->dev->caps.num_ports; i++) { 939 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) 940 continue; 941 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl); 942 if (err) { 943 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n", 944 i, err); 945 sl2vl = 0; 946 } 947 atomic64_set(&mdev->sl2vl[i - 1], sl2vl); 948 } 949 } 950 951 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u32 port, u16 index, 952 u16 *pkey, int netw_view) 953 { 954 struct ib_smp *in_mad; 955 struct ib_smp *out_mad; 956 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 957 int err = -ENOMEM; 958 959 in_mad = kzalloc_obj(*in_mad); 960 out_mad = kmalloc_obj(*out_mad); 961 if (!in_mad || !out_mad) 962 goto out; 963 964 ib_init_query_mad(in_mad); 965 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 966 in_mad->attr_mod = cpu_to_be32(index / 32); 967 968 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 969 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 970 971 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 972 in_mad, out_mad); 973 if (err) 974 goto out; 975 976 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]); 977 978 out: 979 kfree(in_mad); 980 kfree(out_mad); 981 return err; 982 } 983 984 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u32 port, u16 index, 985 u16 *pkey) 986 { 987 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0); 988 } 989 990 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, 991 struct ib_device_modify *props) 992 { 993 struct mlx4_cmd_mailbox *mailbox; 994 unsigned long flags; 995 996 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 997 return -EOPNOTSUPP; 998 999 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 1000 return 0; 1001 1002 if (mlx4_is_slave(to_mdev(ibdev)->dev)) 1003 return -EOPNOTSUPP; 1004 1005 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags); 1006 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 1007 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags); 1008 1009 /* 1010 * If possible, pass node desc to FW, so it can generate 1011 * a 144 trap. If cmd fails, just ignore. 1012 */ 1013 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev); 1014 if (IS_ERR(mailbox)) 1015 return 0; 1016 1017 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 1018 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0, 1019 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); 1020 1021 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox); 1022 1023 return 0; 1024 } 1025 1026 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u32 port, 1027 int reset_qkey_viols, u32 cap_mask) 1028 { 1029 struct mlx4_cmd_mailbox *mailbox; 1030 int err; 1031 1032 mailbox = mlx4_alloc_cmd_mailbox(dev->dev); 1033 if (IS_ERR(mailbox)) 1034 return PTR_ERR(mailbox); 1035 1036 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 1037 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6; 1038 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask); 1039 } else { 1040 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols; 1041 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask); 1042 } 1043 1044 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE, 1045 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1046 MLX4_CMD_WRAPPED); 1047 1048 mlx4_free_cmd_mailbox(dev->dev, mailbox); 1049 return err; 1050 } 1051 1052 static int mlx4_ib_modify_port(struct ib_device *ibdev, u32 port, int mask, 1053 struct ib_port_modify *props) 1054 { 1055 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 1056 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH; 1057 struct ib_port_attr attr; 1058 u32 cap_mask; 1059 int err; 1060 1061 /* return OK if this is RoCE. CM calls ib_modify_port() regardless 1062 * of whether port link layer is ETH or IB. For ETH ports, qkey 1063 * violations and port capabilities are not meaningful. 1064 */ 1065 if (is_eth) 1066 return 0; 1067 1068 mutex_lock(&mdev->cap_mask_mutex); 1069 1070 err = ib_query_port(ibdev, port, &attr); 1071 if (err) 1072 goto out; 1073 1074 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) & 1075 ~props->clr_port_cap_mask; 1076 1077 err = mlx4_ib_SET_PORT(mdev, port, 1078 !!(mask & IB_PORT_RESET_QKEY_CNTR), 1079 cap_mask); 1080 1081 out: 1082 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex); 1083 return err; 1084 } 1085 1086 static int mlx4_ib_alloc_ucontext(struct ib_ucontext *uctx, 1087 struct ib_udata *udata) 1088 { 1089 struct ib_device *ibdev = uctx->device; 1090 struct mlx4_ib_dev *dev = to_mdev(ibdev); 1091 struct mlx4_ib_ucontext *context = to_mucontext(uctx); 1092 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3 = {}; 1093 struct mlx4_ib_alloc_ucontext_resp resp = {}; 1094 int err; 1095 1096 if (!dev->ib_active) 1097 return -EAGAIN; 1098 1099 if (ibdev->ops.uverbs_abi_ver == 1100 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) { 1101 resp_v3.qp_tab_size = dev->dev->caps.num_qps; 1102 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size; 1103 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1104 } else { 1105 resp.dev_caps = dev->dev->caps.userspace_caps; 1106 resp.qp_tab_size = dev->dev->caps.num_qps; 1107 resp.bf_reg_size = dev->dev->caps.bf_reg_size; 1108 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1109 resp.cqe_size = dev->dev->caps.cqe_size; 1110 } 1111 1112 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar); 1113 if (err) 1114 return err; 1115 1116 INIT_LIST_HEAD(&context->db_page_list); 1117 mutex_init(&context->db_page_mutex); 1118 1119 INIT_LIST_HEAD(&context->wqn_ranges_list); 1120 mutex_init(&context->wqn_ranges_mutex); 1121 1122 if (ibdev->ops.uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) 1123 err = ib_respond_udata(udata, resp_v3); 1124 else 1125 err = ib_respond_udata(udata, resp); 1126 1127 if (err) { 1128 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar); 1129 return err; 1130 } 1131 1132 return 0; 1133 } 1134 1135 static void mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 1136 { 1137 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext); 1138 1139 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar); 1140 } 1141 1142 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext) 1143 { 1144 } 1145 1146 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 1147 { 1148 struct mlx4_ib_dev *dev = to_mdev(context->device); 1149 1150 switch (vma->vm_pgoff) { 1151 case 0: 1152 return rdma_user_mmap_io(context, vma, 1153 to_mucontext(context)->uar.pfn, 1154 PAGE_SIZE, 1155 pgprot_noncached(vma->vm_page_prot), 1156 NULL); 1157 1158 case 1: 1159 if (dev->dev->caps.bf_reg_size == 0) 1160 return -EINVAL; 1161 return rdma_user_mmap_io( 1162 context, vma, 1163 to_mucontext(context)->uar.pfn + 1164 dev->dev->caps.num_uars, 1165 PAGE_SIZE, pgprot_writecombine(vma->vm_page_prot), 1166 NULL); 1167 1168 case 3: { 1169 struct mlx4_clock_params params; 1170 int ret; 1171 1172 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms); 1173 if (ret) 1174 return ret; 1175 1176 return rdma_user_mmap_io( 1177 context, vma, 1178 (pci_resource_start(dev->dev->persist->pdev, 1179 params.bar) + 1180 params.offset) >> 1181 PAGE_SHIFT, 1182 PAGE_SIZE, pgprot_noncached(vma->vm_page_prot), 1183 NULL); 1184 } 1185 1186 default: 1187 return -EINVAL; 1188 } 1189 } 1190 1191 static int mlx4_ib_alloc_pd(struct ib_pd *ibpd, struct ib_udata *udata) 1192 { 1193 struct mlx4_ib_pd *pd = to_mpd(ibpd); 1194 struct ib_device *ibdev = ibpd->device; 1195 int err; 1196 1197 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn); 1198 if (err) 1199 return err; 1200 1201 if (udata) { 1202 struct mlx4_ib_alloc_pd_resp uresp = { .pdn = pd->pdn }; 1203 1204 err = ib_respond_udata(udata, uresp); 1205 if (err) { 1206 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn); 1207 return err; 1208 } 1209 } 1210 return 0; 1211 } 1212 1213 static int mlx4_ib_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata) 1214 { 1215 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn); 1216 return 0; 1217 } 1218 1219 static int mlx4_ib_alloc_xrcd(struct ib_xrcd *ibxrcd, struct ib_udata *udata) 1220 { 1221 struct mlx4_ib_dev *dev = to_mdev(ibxrcd->device); 1222 struct mlx4_ib_xrcd *xrcd = to_mxrcd(ibxrcd); 1223 struct ib_cq_init_attr cq_attr = {}; 1224 int err; 1225 1226 if (!(dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)) 1227 return -EOPNOTSUPP; 1228 1229 err = mlx4_xrcd_alloc(dev->dev, &xrcd->xrcdn); 1230 if (err) 1231 return err; 1232 1233 xrcd->pd = ib_alloc_pd(ibxrcd->device, 0); 1234 if (IS_ERR(xrcd->pd)) { 1235 err = PTR_ERR(xrcd->pd); 1236 goto err2; 1237 } 1238 1239 cq_attr.cqe = 1; 1240 xrcd->cq = ib_create_cq(ibxrcd->device, NULL, NULL, xrcd, &cq_attr); 1241 if (IS_ERR(xrcd->cq)) { 1242 err = PTR_ERR(xrcd->cq); 1243 goto err3; 1244 } 1245 1246 return 0; 1247 1248 err3: 1249 ib_dealloc_pd(xrcd->pd); 1250 err2: 1251 mlx4_xrcd_free(dev->dev, xrcd->xrcdn); 1252 return err; 1253 } 1254 1255 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata) 1256 { 1257 ib_destroy_cq(to_mxrcd(xrcd)->cq); 1258 ib_dealloc_pd(to_mxrcd(xrcd)->pd); 1259 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn); 1260 return 0; 1261 } 1262 1263 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid) 1264 { 1265 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1266 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1267 struct mlx4_ib_gid_entry *ge; 1268 1269 ge = kzalloc_obj(*ge); 1270 if (!ge) 1271 return -ENOMEM; 1272 1273 ge->gid = *gid; 1274 if (mlx4_ib_add_mc(mdev, mqp, gid)) { 1275 ge->port = mqp->port; 1276 ge->added = 1; 1277 } 1278 1279 mutex_lock(&mqp->mutex); 1280 list_add_tail(&ge->list, &mqp->gid_list); 1281 mutex_unlock(&mqp->mutex); 1282 1283 return 0; 1284 } 1285 1286 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev, 1287 struct mlx4_ib_counters *ctr_table) 1288 { 1289 struct counter_index *counter, *tmp_count; 1290 1291 mutex_lock(&ctr_table->mutex); 1292 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list, 1293 list) { 1294 if (counter->allocated) 1295 mlx4_counter_free(ibdev->dev, counter->index); 1296 list_del(&counter->list); 1297 kfree(counter); 1298 } 1299 mutex_unlock(&ctr_table->mutex); 1300 } 1301 1302 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 1303 union ib_gid *gid) 1304 { 1305 struct net_device *ndev; 1306 int ret = 0; 1307 1308 if (!mqp->port) 1309 return 0; 1310 1311 spin_lock_bh(&mdev->iboe.lock); 1312 ndev = mdev->iboe.netdevs[mqp->port - 1]; 1313 dev_hold(ndev); 1314 spin_unlock_bh(&mdev->iboe.lock); 1315 1316 if (ndev) { 1317 ret = 1; 1318 dev_put(ndev); 1319 } 1320 1321 return ret; 1322 } 1323 1324 struct mlx4_ib_steering { 1325 struct list_head list; 1326 struct mlx4_flow_reg_id reg_id; 1327 union ib_gid gid; 1328 }; 1329 1330 #define LAST_ETH_FIELD vlan_tag 1331 #define LAST_IB_FIELD sl 1332 #define LAST_IPV4_FIELD dst_ip 1333 #define LAST_TCP_UDP_FIELD src_port 1334 1335 /* Field is the last supported field */ 1336 #define FIELDS_NOT_SUPPORTED(filter, field)\ 1337 memchr_inv((void *)&filter.field +\ 1338 sizeof(filter.field), 0,\ 1339 sizeof(filter) -\ 1340 offsetof(typeof(filter), field) -\ 1341 sizeof(filter.field)) 1342 1343 static int parse_flow_attr(struct mlx4_dev *dev, 1344 u32 qp_num, 1345 union ib_flow_spec *ib_spec, 1346 struct _rule_hw *mlx4_spec) 1347 { 1348 enum mlx4_net_trans_rule_id type; 1349 1350 switch (ib_spec->type) { 1351 case IB_FLOW_SPEC_ETH: 1352 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD)) 1353 return -ENOTSUPP; 1354 1355 type = MLX4_NET_TRANS_RULE_ID_ETH; 1356 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac, 1357 ETH_ALEN); 1358 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac, 1359 ETH_ALEN); 1360 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag; 1361 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag; 1362 break; 1363 case IB_FLOW_SPEC_IB: 1364 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD)) 1365 return -ENOTSUPP; 1366 1367 type = MLX4_NET_TRANS_RULE_ID_IB; 1368 mlx4_spec->ib.l3_qpn = 1369 cpu_to_be32(qp_num); 1370 mlx4_spec->ib.qpn_mask = 1371 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK); 1372 break; 1373 1374 1375 case IB_FLOW_SPEC_IPV4: 1376 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD)) 1377 return -ENOTSUPP; 1378 1379 type = MLX4_NET_TRANS_RULE_ID_IPV4; 1380 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip; 1381 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip; 1382 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip; 1383 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip; 1384 break; 1385 1386 case IB_FLOW_SPEC_TCP: 1387 case IB_FLOW_SPEC_UDP: 1388 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD)) 1389 return -ENOTSUPP; 1390 1391 type = ib_spec->type == IB_FLOW_SPEC_TCP ? 1392 MLX4_NET_TRANS_RULE_ID_TCP : 1393 MLX4_NET_TRANS_RULE_ID_UDP; 1394 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port; 1395 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port; 1396 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port; 1397 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port; 1398 break; 1399 1400 default: 1401 return -EINVAL; 1402 } 1403 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 || 1404 mlx4_hw_rule_sz(dev, type) < 0) 1405 return -EINVAL; 1406 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type)); 1407 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2; 1408 return mlx4_hw_rule_sz(dev, type); 1409 } 1410 1411 struct default_rules { 1412 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1413 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1414 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1415 __u8 link_layer; 1416 }; 1417 static const struct default_rules default_table[] = { 1418 { 1419 .mandatory_fields = {IB_FLOW_SPEC_IPV4}, 1420 .mandatory_not_fields = {IB_FLOW_SPEC_ETH}, 1421 .rules_create_list = {IB_FLOW_SPEC_IB}, 1422 .link_layer = IB_LINK_LAYER_INFINIBAND 1423 } 1424 }; 1425 1426 static int __mlx4_ib_default_rules_match(struct ib_qp *qp, 1427 struct ib_flow_attr *flow_attr) 1428 { 1429 int i, j, k; 1430 void *ib_flow; 1431 const struct default_rules *pdefault_rules = default_table; 1432 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port); 1433 1434 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) { 1435 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1436 memset(&field_types, 0, sizeof(field_types)); 1437 1438 if (link_layer != pdefault_rules->link_layer) 1439 continue; 1440 1441 ib_flow = flow_attr + 1; 1442 /* we assume the specs are sorted */ 1443 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS && 1444 j < flow_attr->num_of_specs; k++) { 1445 union ib_flow_spec *current_flow = 1446 (union ib_flow_spec *)ib_flow; 1447 1448 /* same layer but different type */ 1449 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) == 1450 (pdefault_rules->mandatory_fields[k] & 1451 IB_FLOW_SPEC_LAYER_MASK)) && 1452 (current_flow->type != 1453 pdefault_rules->mandatory_fields[k])) 1454 goto out; 1455 1456 /* same layer, try match next one */ 1457 if (current_flow->type == 1458 pdefault_rules->mandatory_fields[k]) { 1459 j++; 1460 ib_flow += 1461 ((union ib_flow_spec *)ib_flow)->size; 1462 } 1463 } 1464 1465 ib_flow = flow_attr + 1; 1466 for (j = 0; j < flow_attr->num_of_specs; 1467 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size) 1468 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++) 1469 /* same layer and same type */ 1470 if (((union ib_flow_spec *)ib_flow)->type == 1471 pdefault_rules->mandatory_not_fields[k]) 1472 goto out; 1473 1474 return i; 1475 } 1476 out: 1477 return -1; 1478 } 1479 1480 static int __mlx4_ib_create_default_rules( 1481 struct mlx4_ib_dev *mdev, 1482 struct ib_qp *qp, 1483 const struct default_rules *pdefault_rules, 1484 struct _rule_hw *mlx4_spec) { 1485 int size = 0; 1486 int i; 1487 1488 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) { 1489 union ib_flow_spec ib_spec = {}; 1490 int ret; 1491 1492 switch (pdefault_rules->rules_create_list[i]) { 1493 case 0: 1494 /* no rule */ 1495 continue; 1496 case IB_FLOW_SPEC_IB: 1497 ib_spec.type = IB_FLOW_SPEC_IB; 1498 ib_spec.size = sizeof(struct ib_flow_spec_ib); 1499 1500 break; 1501 default: 1502 /* invalid rule */ 1503 return -EINVAL; 1504 } 1505 /* We must put empty rule, qpn is being ignored */ 1506 ret = parse_flow_attr(mdev->dev, 0, &ib_spec, 1507 mlx4_spec); 1508 if (ret < 0) { 1509 pr_info("invalid parsing\n"); 1510 return -EINVAL; 1511 } 1512 1513 mlx4_spec = (void *)mlx4_spec + ret; 1514 size += ret; 1515 } 1516 return size; 1517 } 1518 1519 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1520 int domain, 1521 enum mlx4_net_trans_promisc_mode flow_type, 1522 u64 *reg_id) 1523 { 1524 int ret, i; 1525 int size = 0; 1526 void *ib_flow; 1527 struct mlx4_ib_dev *mdev = to_mdev(qp->device); 1528 struct mlx4_cmd_mailbox *mailbox; 1529 struct mlx4_net_trans_rule_hw_ctrl *ctrl; 1530 int default_flow; 1531 1532 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) { 1533 pr_err("Invalid priority value %d\n", flow_attr->priority); 1534 return -EINVAL; 1535 } 1536 1537 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0) 1538 return -EINVAL; 1539 1540 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 1541 if (IS_ERR(mailbox)) 1542 return PTR_ERR(mailbox); 1543 ctrl = mailbox->buf; 1544 1545 ctrl->prio = cpu_to_be16(domain | flow_attr->priority); 1546 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type); 1547 ctrl->port = flow_attr->port; 1548 ctrl->qpn = cpu_to_be32(qp->qp_num); 1549 1550 ib_flow = flow_attr + 1; 1551 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl); 1552 /* Add default flows */ 1553 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr); 1554 if (default_flow >= 0) { 1555 ret = __mlx4_ib_create_default_rules( 1556 mdev, qp, default_table + default_flow, 1557 mailbox->buf + size); 1558 if (ret < 0) { 1559 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1560 return -EINVAL; 1561 } 1562 size += ret; 1563 } 1564 for (i = 0; i < flow_attr->num_of_specs; i++) { 1565 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow, 1566 mailbox->buf + size); 1567 if (ret < 0) { 1568 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1569 return -EINVAL; 1570 } 1571 ib_flow += ((union ib_flow_spec *) ib_flow)->size; 1572 size += ret; 1573 } 1574 1575 if (mlx4_is_master(mdev->dev) && flow_type == MLX4_FS_REGULAR && 1576 flow_attr->num_of_specs == 1) { 1577 struct _rule_hw *rule_header = (struct _rule_hw *)(ctrl + 1); 1578 enum ib_flow_spec_type header_spec = 1579 ((union ib_flow_spec *)(flow_attr + 1))->type; 1580 1581 if (header_spec == IB_FLOW_SPEC_ETH) 1582 mlx4_handle_eth_header_mcast_prio(ctrl, rule_header); 1583 } 1584 1585 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0, 1586 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A, 1587 MLX4_CMD_NATIVE); 1588 if (ret == -ENOMEM) 1589 pr_err("mcg table is full. Fail to register network rule.\n"); 1590 else if (ret == -ENXIO) 1591 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n"); 1592 else if (ret) 1593 pr_err("Invalid argument. Fail to register network rule.\n"); 1594 1595 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1596 return ret; 1597 } 1598 1599 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id) 1600 { 1601 int err; 1602 err = mlx4_cmd(dev, reg_id, 0, 0, 1603 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A, 1604 MLX4_CMD_NATIVE); 1605 if (err) 1606 pr_err("Fail to detach network rule. registration id = 0x%llx\n", 1607 reg_id); 1608 return err; 1609 } 1610 1611 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1612 u64 *reg_id) 1613 { 1614 void *ib_flow; 1615 union ib_flow_spec *ib_spec; 1616 struct mlx4_dev *dev = to_mdev(qp->device)->dev; 1617 int err = 0; 1618 1619 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 1620 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 1621 return 0; /* do nothing */ 1622 1623 ib_flow = flow_attr + 1; 1624 ib_spec = (union ib_flow_spec *)ib_flow; 1625 1626 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1) 1627 return 0; /* do nothing */ 1628 1629 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac, 1630 flow_attr->port, qp->qp_num, 1631 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff), 1632 reg_id); 1633 return err; 1634 } 1635 1636 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev, 1637 struct ib_flow_attr *flow_attr, 1638 enum mlx4_net_trans_promisc_mode *type) 1639 { 1640 int err = 0; 1641 1642 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) || 1643 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) || 1644 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) { 1645 return -EOPNOTSUPP; 1646 } 1647 1648 if (flow_attr->num_of_specs == 0) { 1649 type[0] = MLX4_FS_MC_SNIFFER; 1650 type[1] = MLX4_FS_UC_SNIFFER; 1651 } else { 1652 union ib_flow_spec *ib_spec; 1653 1654 ib_spec = (union ib_flow_spec *)(flow_attr + 1); 1655 if (ib_spec->type != IB_FLOW_SPEC_ETH) 1656 return -EINVAL; 1657 1658 /* if all is zero than MC and UC */ 1659 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) { 1660 type[0] = MLX4_FS_MC_SNIFFER; 1661 type[1] = MLX4_FS_UC_SNIFFER; 1662 } else { 1663 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01, 1664 ib_spec->eth.mask.dst_mac[1], 1665 ib_spec->eth.mask.dst_mac[2], 1666 ib_spec->eth.mask.dst_mac[3], 1667 ib_spec->eth.mask.dst_mac[4], 1668 ib_spec->eth.mask.dst_mac[5]}; 1669 1670 /* Above xor was only on MC bit, non empty mask is valid 1671 * only if this bit is set and rest are zero. 1672 */ 1673 if (!is_zero_ether_addr(&mac[0])) 1674 return -EINVAL; 1675 1676 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac)) 1677 type[0] = MLX4_FS_MC_SNIFFER; 1678 else 1679 type[0] = MLX4_FS_UC_SNIFFER; 1680 } 1681 } 1682 1683 return err; 1684 } 1685 1686 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp, 1687 struct ib_flow_attr *flow_attr, 1688 struct ib_udata *udata) 1689 { 1690 int err = 0, i = 0, j = 0; 1691 struct mlx4_ib_flow *mflow; 1692 enum mlx4_net_trans_promisc_mode type[2]; 1693 struct mlx4_dev *dev = (to_mdev(qp->device))->dev; 1694 int is_bonded = mlx4_is_bonded(dev); 1695 1696 if (flow_attr->flags & ~IB_FLOW_ATTR_FLAGS_DONT_TRAP) 1697 return ERR_PTR(-EOPNOTSUPP); 1698 1699 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) && 1700 (flow_attr->type != IB_FLOW_ATTR_NORMAL)) 1701 return ERR_PTR(-EOPNOTSUPP); 1702 1703 err = ib_is_udata_in_empty(udata); 1704 if (err) 1705 return ERR_PTR(err); 1706 1707 memset(type, 0, sizeof(type)); 1708 1709 mflow = kzalloc_obj(*mflow); 1710 if (!mflow) { 1711 err = -ENOMEM; 1712 goto err_free; 1713 } 1714 1715 switch (flow_attr->type) { 1716 case IB_FLOW_ATTR_NORMAL: 1717 /* If dont trap flag (continue match) is set, under specific 1718 * condition traffic be replicated to given qp, 1719 * without stealing it 1720 */ 1721 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) { 1722 err = mlx4_ib_add_dont_trap_rule(dev, 1723 flow_attr, 1724 type); 1725 if (err) 1726 goto err_free; 1727 } else { 1728 type[0] = MLX4_FS_REGULAR; 1729 } 1730 break; 1731 1732 case IB_FLOW_ATTR_ALL_DEFAULT: 1733 type[0] = MLX4_FS_ALL_DEFAULT; 1734 break; 1735 1736 case IB_FLOW_ATTR_MC_DEFAULT: 1737 type[0] = MLX4_FS_MC_DEFAULT; 1738 break; 1739 1740 case IB_FLOW_ATTR_SNIFFER: 1741 type[0] = MLX4_FS_MIRROR_RX_PORT; 1742 type[1] = MLX4_FS_MIRROR_SX_PORT; 1743 break; 1744 1745 default: 1746 err = -EINVAL; 1747 goto err_free; 1748 } 1749 1750 while (i < ARRAY_SIZE(type) && type[i]) { 1751 err = __mlx4_ib_create_flow(qp, flow_attr, MLX4_DOMAIN_UVERBS, 1752 type[i], &mflow->reg_id[i].id); 1753 if (err) 1754 goto err_create_flow; 1755 if (is_bonded) { 1756 /* Application always sees one port so the mirror rule 1757 * must be on port #2 1758 */ 1759 flow_attr->port = 2; 1760 err = __mlx4_ib_create_flow(qp, flow_attr, 1761 MLX4_DOMAIN_UVERBS, type[j], 1762 &mflow->reg_id[j].mirror); 1763 flow_attr->port = 1; 1764 if (err) 1765 goto err_create_flow; 1766 j++; 1767 } 1768 1769 i++; 1770 } 1771 1772 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) { 1773 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1774 &mflow->reg_id[i].id); 1775 if (err) 1776 goto err_create_flow; 1777 1778 if (is_bonded) { 1779 flow_attr->port = 2; 1780 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1781 &mflow->reg_id[j].mirror); 1782 flow_attr->port = 1; 1783 if (err) 1784 goto err_create_flow; 1785 j++; 1786 } 1787 /* function to create mirror rule */ 1788 i++; 1789 } 1790 1791 return &mflow->ibflow; 1792 1793 err_create_flow: 1794 while (i) { 1795 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1796 mflow->reg_id[i].id); 1797 i--; 1798 } 1799 1800 while (j) { 1801 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1802 mflow->reg_id[j].mirror); 1803 j--; 1804 } 1805 err_free: 1806 kfree(mflow); 1807 return ERR_PTR(err); 1808 } 1809 1810 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id) 1811 { 1812 int err, ret = 0; 1813 int i = 0; 1814 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device); 1815 struct mlx4_ib_flow *mflow = to_mflow(flow_id); 1816 1817 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) { 1818 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id); 1819 if (err) 1820 ret = err; 1821 if (mflow->reg_id[i].mirror) { 1822 err = __mlx4_ib_destroy_flow(mdev->dev, 1823 mflow->reg_id[i].mirror); 1824 if (err) 1825 ret = err; 1826 } 1827 i++; 1828 } 1829 1830 kfree(mflow); 1831 return ret; 1832 } 1833 1834 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1835 { 1836 int err; 1837 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1838 struct mlx4_dev *dev = mdev->dev; 1839 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1840 struct mlx4_ib_steering *ib_steering = NULL; 1841 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1842 struct mlx4_flow_reg_id reg_id; 1843 1844 if (mdev->dev->caps.steering_mode == 1845 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1846 ib_steering = kmalloc_obj(*ib_steering); 1847 if (!ib_steering) 1848 return -ENOMEM; 1849 } 1850 1851 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port, 1852 !!(mqp->flags & 1853 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1854 prot, ®_id.id); 1855 if (err) { 1856 pr_err("multicast attach op failed, err %d\n", err); 1857 goto err_malloc; 1858 } 1859 1860 reg_id.mirror = 0; 1861 if (mlx4_is_bonded(dev)) { 1862 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, 1863 (mqp->port == 1) ? 2 : 1, 1864 !!(mqp->flags & 1865 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1866 prot, ®_id.mirror); 1867 if (err) 1868 goto err_add; 1869 } 1870 1871 err = add_gid_entry(ibqp, gid); 1872 if (err) 1873 goto err_add; 1874 1875 if (ib_steering) { 1876 memcpy(ib_steering->gid.raw, gid->raw, 16); 1877 ib_steering->reg_id = reg_id; 1878 mutex_lock(&mqp->mutex); 1879 list_add(&ib_steering->list, &mqp->steering_rules); 1880 mutex_unlock(&mqp->mutex); 1881 } 1882 return 0; 1883 1884 err_add: 1885 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1886 prot, reg_id.id); 1887 if (reg_id.mirror) 1888 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1889 prot, reg_id.mirror); 1890 err_malloc: 1891 kfree(ib_steering); 1892 1893 return err; 1894 } 1895 1896 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw) 1897 { 1898 struct mlx4_ib_gid_entry *ge; 1899 struct mlx4_ib_gid_entry *tmp; 1900 struct mlx4_ib_gid_entry *ret = NULL; 1901 1902 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { 1903 if (!memcmp(raw, ge->gid.raw, 16)) { 1904 ret = ge; 1905 break; 1906 } 1907 } 1908 1909 return ret; 1910 } 1911 1912 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1913 { 1914 int err; 1915 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1916 struct mlx4_dev *dev = mdev->dev; 1917 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1918 struct net_device *ndev; 1919 struct mlx4_ib_gid_entry *ge; 1920 struct mlx4_flow_reg_id reg_id = {0, 0}; 1921 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1922 1923 if (mdev->dev->caps.steering_mode == 1924 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1925 struct mlx4_ib_steering *ib_steering; 1926 1927 mutex_lock(&mqp->mutex); 1928 list_for_each_entry(ib_steering, &mqp->steering_rules, list) { 1929 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) { 1930 list_del(&ib_steering->list); 1931 break; 1932 } 1933 } 1934 mutex_unlock(&mqp->mutex); 1935 if (&ib_steering->list == &mqp->steering_rules) { 1936 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n"); 1937 return -EINVAL; 1938 } 1939 reg_id = ib_steering->reg_id; 1940 kfree(ib_steering); 1941 } 1942 1943 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1944 prot, reg_id.id); 1945 if (err) 1946 return err; 1947 1948 if (mlx4_is_bonded(dev)) { 1949 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1950 prot, reg_id.mirror); 1951 if (err) 1952 return err; 1953 } 1954 1955 mutex_lock(&mqp->mutex); 1956 ge = find_gid_entry(mqp, gid->raw); 1957 if (ge) { 1958 spin_lock_bh(&mdev->iboe.lock); 1959 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL; 1960 dev_hold(ndev); 1961 spin_unlock_bh(&mdev->iboe.lock); 1962 dev_put(ndev); 1963 list_del(&ge->list); 1964 kfree(ge); 1965 } else 1966 pr_warn("could not find mgid entry\n"); 1967 1968 mutex_unlock(&mqp->mutex); 1969 1970 return 0; 1971 } 1972 1973 static int init_node_data(struct mlx4_ib_dev *dev) 1974 { 1975 struct ib_smp *in_mad; 1976 struct ib_smp *out_mad; 1977 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 1978 int err = -ENOMEM; 1979 1980 in_mad = kzalloc_obj(*in_mad); 1981 out_mad = kmalloc_obj(*out_mad); 1982 if (!in_mad || !out_mad) 1983 goto out; 1984 1985 ib_init_query_mad(in_mad); 1986 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 1987 if (mlx4_is_master(dev->dev)) 1988 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 1989 1990 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 1991 if (err) 1992 goto out; 1993 1994 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX); 1995 1996 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 1997 1998 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 1999 if (err) 2000 goto out; 2001 2002 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32)); 2003 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 2004 2005 out: 2006 kfree(in_mad); 2007 kfree(out_mad); 2008 return err; 2009 } 2010 2011 static ssize_t hca_type_show(struct device *device, 2012 struct device_attribute *attr, char *buf) 2013 { 2014 struct mlx4_ib_dev *dev = 2015 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev); 2016 2017 return sysfs_emit(buf, "MT%d\n", dev->dev->persist->pdev->device); 2018 } 2019 static DEVICE_ATTR_RO(hca_type); 2020 2021 static ssize_t hw_rev_show(struct device *device, 2022 struct device_attribute *attr, char *buf) 2023 { 2024 struct mlx4_ib_dev *dev = 2025 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev); 2026 2027 return sysfs_emit(buf, "%x\n", dev->dev->rev_id); 2028 } 2029 static DEVICE_ATTR_RO(hw_rev); 2030 2031 static ssize_t board_id_show(struct device *device, 2032 struct device_attribute *attr, char *buf) 2033 { 2034 struct mlx4_ib_dev *dev = 2035 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev); 2036 2037 return sysfs_emit(buf, "%.*s\n", MLX4_BOARD_ID_LEN, dev->dev->board_id); 2038 } 2039 static DEVICE_ATTR_RO(board_id); 2040 2041 static struct attribute *mlx4_class_attributes[] = { 2042 &dev_attr_hw_rev.attr, 2043 &dev_attr_hca_type.attr, 2044 &dev_attr_board_id.attr, 2045 NULL 2046 }; 2047 2048 static const struct attribute_group mlx4_attr_group = { 2049 .attrs = mlx4_class_attributes, 2050 }; 2051 2052 struct diag_counter { 2053 const char *name; 2054 u32 offset; 2055 }; 2056 2057 #define DIAG_COUNTER(_name, _offset) \ 2058 { .name = #_name, .offset = _offset } 2059 2060 static const struct diag_counter diag_basic[] = { 2061 DIAG_COUNTER(rq_num_lle, 0x00), 2062 DIAG_COUNTER(sq_num_lle, 0x04), 2063 DIAG_COUNTER(rq_num_lqpoe, 0x08), 2064 DIAG_COUNTER(sq_num_lqpoe, 0x0C), 2065 DIAG_COUNTER(rq_num_lpe, 0x18), 2066 DIAG_COUNTER(sq_num_lpe, 0x1C), 2067 DIAG_COUNTER(rq_num_wrfe, 0x20), 2068 DIAG_COUNTER(sq_num_wrfe, 0x24), 2069 DIAG_COUNTER(sq_num_mwbe, 0x2C), 2070 DIAG_COUNTER(sq_num_bre, 0x34), 2071 DIAG_COUNTER(sq_num_rire, 0x44), 2072 DIAG_COUNTER(rq_num_rire, 0x48), 2073 DIAG_COUNTER(sq_num_rae, 0x4C), 2074 DIAG_COUNTER(rq_num_rae, 0x50), 2075 DIAG_COUNTER(sq_num_roe, 0x54), 2076 DIAG_COUNTER(sq_num_tree, 0x5C), 2077 DIAG_COUNTER(sq_num_rree, 0x64), 2078 DIAG_COUNTER(rq_num_rnr, 0x68), 2079 DIAG_COUNTER(sq_num_rnr, 0x6C), 2080 DIAG_COUNTER(rq_num_oos, 0x100), 2081 DIAG_COUNTER(sq_num_oos, 0x104), 2082 }; 2083 2084 static const struct diag_counter diag_ext[] = { 2085 DIAG_COUNTER(rq_num_dup, 0x130), 2086 DIAG_COUNTER(sq_num_to, 0x134), 2087 }; 2088 2089 static const struct diag_counter diag_device_only[] = { 2090 DIAG_COUNTER(num_cqovf, 0x1A0), 2091 DIAG_COUNTER(rq_num_udsdprd, 0x118), 2092 }; 2093 2094 static struct rdma_hw_stats * 2095 mlx4_ib_alloc_hw_device_stats(struct ib_device *ibdev) 2096 { 2097 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2098 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2099 2100 if (!diag[0].descs) 2101 return NULL; 2102 2103 return rdma_alloc_hw_stats_struct(diag[0].descs, diag[0].num_counters, 2104 RDMA_HW_STATS_DEFAULT_LIFESPAN); 2105 } 2106 2107 static struct rdma_hw_stats * 2108 mlx4_ib_alloc_hw_port_stats(struct ib_device *ibdev, u32 port_num) 2109 { 2110 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2111 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2112 2113 if (!diag[1].descs) 2114 return NULL; 2115 2116 return rdma_alloc_hw_stats_struct(diag[1].descs, diag[1].num_counters, 2117 RDMA_HW_STATS_DEFAULT_LIFESPAN); 2118 } 2119 2120 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev, 2121 struct rdma_hw_stats *stats, 2122 u32 port, int index) 2123 { 2124 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2125 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2126 u32 hw_value[ARRAY_SIZE(diag_device_only) + 2127 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {}; 2128 int ret; 2129 int i; 2130 2131 ret = mlx4_query_diag_counters(dev->dev, 2132 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS, 2133 diag[!!port].offset, hw_value, 2134 diag[!!port].num_counters, port); 2135 2136 if (ret) 2137 return ret; 2138 2139 for (i = 0; i < diag[!!port].num_counters; i++) 2140 stats->value[i] = hw_value[i]; 2141 2142 return diag[!!port].num_counters; 2143 } 2144 2145 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev, 2146 struct rdma_stat_desc **pdescs, 2147 u32 **offset, u32 *num, bool port) 2148 { 2149 u32 num_counters; 2150 2151 num_counters = ARRAY_SIZE(diag_basic); 2152 2153 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) 2154 num_counters += ARRAY_SIZE(diag_ext); 2155 2156 if (!port) 2157 num_counters += ARRAY_SIZE(diag_device_only); 2158 2159 *pdescs = kzalloc_objs(struct rdma_stat_desc, num_counters); 2160 if (!*pdescs) 2161 return -ENOMEM; 2162 2163 *offset = kzalloc_objs(**offset, num_counters); 2164 if (!*offset) 2165 goto err; 2166 2167 *num = num_counters; 2168 2169 return 0; 2170 2171 err: 2172 kfree(*pdescs); 2173 return -ENOMEM; 2174 } 2175 2176 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev, 2177 struct rdma_stat_desc *descs, 2178 u32 *offset, bool port) 2179 { 2180 int i; 2181 int j; 2182 2183 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) { 2184 descs[i].name = diag_basic[i].name; 2185 offset[i] = diag_basic[i].offset; 2186 } 2187 2188 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) { 2189 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) { 2190 descs[j].name = diag_ext[i].name; 2191 offset[j] = diag_ext[i].offset; 2192 } 2193 } 2194 2195 if (!port) { 2196 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) { 2197 descs[j].name = diag_device_only[i].name; 2198 offset[j] = diag_device_only[i].offset; 2199 } 2200 } 2201 } 2202 2203 static const struct ib_device_ops mlx4_ib_hw_stats_ops = { 2204 .alloc_hw_device_stats = mlx4_ib_alloc_hw_device_stats, 2205 .alloc_hw_port_stats = mlx4_ib_alloc_hw_port_stats, 2206 .get_hw_stats = mlx4_ib_get_hw_stats, 2207 }; 2208 2209 static const struct ib_device_ops mlx4_ib_hw_stats_ops1 = { 2210 .alloc_hw_device_stats = mlx4_ib_alloc_hw_device_stats, 2211 .get_hw_stats = mlx4_ib_get_hw_stats, 2212 }; 2213 2214 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev) 2215 { 2216 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters; 2217 int i; 2218 int ret; 2219 bool per_port = !!(ibdev->dev->caps.flags2 & 2220 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT); 2221 2222 if (mlx4_is_slave(ibdev->dev)) 2223 return 0; 2224 2225 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2226 /* 2227 * i == 1 means we are building port counters, set a different 2228 * stats ops without port stats callback. 2229 */ 2230 if (i && !per_port) { 2231 ib_set_device_ops(&ibdev->ib_dev, 2232 &mlx4_ib_hw_stats_ops1); 2233 2234 return 0; 2235 } 2236 2237 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].descs, 2238 &diag[i].offset, 2239 &diag[i].num_counters, i); 2240 if (ret) 2241 goto err_alloc; 2242 2243 mlx4_ib_fill_diag_counters(ibdev, diag[i].descs, 2244 diag[i].offset, i); 2245 } 2246 2247 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_hw_stats_ops); 2248 2249 return 0; 2250 2251 err_alloc: 2252 if (i) { 2253 kfree(diag[i - 1].descs); 2254 kfree(diag[i - 1].offset); 2255 } 2256 2257 return ret; 2258 } 2259 2260 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev) 2261 { 2262 int i; 2263 2264 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2265 kfree(ibdev->diag_counters[i].offset); 2266 kfree(ibdev->diag_counters[i].descs); 2267 } 2268 } 2269 2270 #define MLX4_IB_INVALID_MAC ((u64)-1) 2271 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev, 2272 struct net_device *dev, 2273 int port) 2274 { 2275 u64 new_smac = 0; 2276 u64 release_mac = MLX4_IB_INVALID_MAC; 2277 struct mlx4_ib_qp *qp; 2278 2279 new_smac = ether_addr_to_u64(dev->dev_addr); 2280 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac); 2281 2282 /* no need for update QP1 and mac registration in non-SRIOV */ 2283 if (!mlx4_is_mfunc(ibdev->dev)) 2284 return; 2285 2286 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]); 2287 qp = ibdev->qp1_proxy[port - 1]; 2288 if (qp) { 2289 int new_smac_index; 2290 u64 old_smac; 2291 struct mlx4_update_qp_params update_params; 2292 2293 mutex_lock(&qp->mutex); 2294 old_smac = qp->pri.smac; 2295 if (new_smac == old_smac) 2296 goto unlock; 2297 2298 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac); 2299 2300 if (new_smac_index < 0) 2301 goto unlock; 2302 2303 update_params.smac_index = new_smac_index; 2304 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC, 2305 &update_params)) { 2306 release_mac = new_smac; 2307 goto unlock; 2308 } 2309 /* if old port was zero, no mac was yet registered for this QP */ 2310 if (qp->pri.smac_port) 2311 release_mac = old_smac; 2312 qp->pri.smac = new_smac; 2313 qp->pri.smac_port = port; 2314 qp->pri.smac_index = new_smac_index; 2315 } 2316 2317 unlock: 2318 if (release_mac != MLX4_IB_INVALID_MAC) 2319 mlx4_unregister_mac(ibdev->dev, port, release_mac); 2320 if (qp) 2321 mutex_unlock(&qp->mutex); 2322 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]); 2323 } 2324 2325 static void mlx4_ib_scan_netdev(struct mlx4_ib_dev *ibdev, 2326 struct net_device *dev, 2327 unsigned long event) 2328 2329 { 2330 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 2331 2332 ASSERT_RTNL(); 2333 2334 if (dev->dev.parent != ibdev->ib_dev.dev.parent) 2335 return; 2336 2337 spin_lock_bh(&iboe->lock); 2338 2339 iboe->netdevs[dev->dev_port] = event != NETDEV_UNREGISTER ? dev : NULL; 2340 2341 spin_unlock_bh(&iboe->lock); 2342 2343 if (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER) 2344 mlx4_ib_update_qps(ibdev, dev, dev->dev_port + 1); 2345 } 2346 2347 static void mlx4_ib_port_event(struct ib_device *ibdev, struct net_device *ndev, 2348 unsigned long event) 2349 { 2350 struct mlx4_ib_dev *mlx4_ibdev = 2351 container_of(ibdev, struct mlx4_ib_dev, ib_dev); 2352 struct mlx4_ib_iboe *iboe = &mlx4_ibdev->iboe; 2353 2354 if (!net_eq(dev_net(ndev), &init_net)) 2355 return; 2356 2357 ASSERT_RTNL(); 2358 2359 if (ndev->dev.parent != mlx4_ibdev->ib_dev.dev.parent) 2360 return; 2361 2362 spin_lock_bh(&iboe->lock); 2363 2364 iboe->netdevs[ndev->dev_port] = event != NETDEV_UNREGISTER ? ndev : NULL; 2365 2366 if (event == NETDEV_UP || event == NETDEV_DOWN) 2367 ib_dispatch_port_state_event(&mlx4_ibdev->ib_dev, ndev); 2368 2369 spin_unlock_bh(&iboe->lock); 2370 2371 if (event == NETDEV_UP || event == NETDEV_CHANGE) 2372 mlx4_ib_update_qps(mlx4_ibdev, ndev, ndev->dev_port + 1); 2373 } 2374 2375 static int mlx4_ib_netdev_event(struct notifier_block *this, 2376 unsigned long event, void *ptr) 2377 { 2378 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 2379 struct mlx4_ib_dev *ibdev; 2380 2381 if (!net_eq(dev_net(dev), &init_net)) 2382 return NOTIFY_DONE; 2383 2384 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); 2385 mlx4_ib_scan_netdev(ibdev, dev, event); 2386 2387 return NOTIFY_DONE; 2388 } 2389 2390 static void init_pkeys(struct mlx4_ib_dev *ibdev) 2391 { 2392 int port; 2393 int slave; 2394 int i; 2395 2396 if (mlx4_is_master(ibdev->dev)) { 2397 for (slave = 0; slave <= ibdev->dev->persist->num_vfs; 2398 ++slave) { 2399 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2400 for (i = 0; 2401 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2402 ++i) { 2403 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] = 2404 /* master has the identity virt2phys pkey mapping */ 2405 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i : 2406 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1; 2407 mlx4_sync_pkey_table(ibdev->dev, slave, port, i, 2408 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]); 2409 } 2410 } 2411 } 2412 /* initialize pkey cache */ 2413 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2414 for (i = 0; 2415 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2416 ++i) 2417 ibdev->pkeys.phys_pkey_cache[port-1][i] = 2418 (i) ? 0 : 0xFFFF; 2419 } 2420 } 2421 } 2422 2423 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2424 { 2425 int i, j, eq = 0, total_eqs = 0; 2426 2427 ibdev->eq_table = kzalloc_objs(ibdev->eq_table[0], 2428 dev->caps.num_comp_vectors); 2429 if (!ibdev->eq_table) 2430 return; 2431 2432 for (i = 1; i <= dev->caps.num_ports; i++) { 2433 for (j = 0; j < mlx4_get_eqs_per_port(dev, i); 2434 j++, total_eqs++) { 2435 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs)) 2436 continue; 2437 ibdev->eq_table[eq] = total_eqs; 2438 if (!mlx4_assign_eq(dev, i, 2439 &ibdev->eq_table[eq])) 2440 eq++; 2441 else 2442 ibdev->eq_table[eq] = -1; 2443 } 2444 } 2445 2446 for (i = eq; i < dev->caps.num_comp_vectors; 2447 ibdev->eq_table[i++] = -1) 2448 ; 2449 2450 /* Advertise the new number of EQs to clients */ 2451 ibdev->ib_dev.num_comp_vectors = eq; 2452 } 2453 2454 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2455 { 2456 int i; 2457 int total_eqs = ibdev->ib_dev.num_comp_vectors; 2458 2459 /* no eqs were allocated */ 2460 if (!ibdev->eq_table) 2461 return; 2462 2463 /* Reset the advertised EQ number */ 2464 ibdev->ib_dev.num_comp_vectors = 0; 2465 2466 for (i = 0; i < total_eqs; i++) 2467 mlx4_release_eq(dev, ibdev->eq_table[i]); 2468 2469 kfree(ibdev->eq_table); 2470 ibdev->eq_table = NULL; 2471 } 2472 2473 static int mlx4_port_immutable(struct ib_device *ibdev, u32 port_num, 2474 struct ib_port_immutable *immutable) 2475 { 2476 struct ib_port_attr attr; 2477 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 2478 int err; 2479 2480 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) { 2481 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; 2482 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2483 } else { 2484 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) 2485 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE; 2486 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 2487 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE | 2488 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; 2489 immutable->core_cap_flags |= RDMA_CORE_PORT_RAW_PACKET; 2490 if (immutable->core_cap_flags & (RDMA_CORE_PORT_IBA_ROCE | 2491 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP)) 2492 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2493 } 2494 2495 err = ib_query_port(ibdev, port_num, &attr); 2496 if (err) 2497 return err; 2498 2499 immutable->pkey_tbl_len = attr.pkey_tbl_len; 2500 immutable->gid_tbl_len = attr.gid_tbl_len; 2501 2502 return 0; 2503 } 2504 2505 static void get_fw_ver_str(struct ib_device *device, char *str) 2506 { 2507 struct mlx4_ib_dev *dev = 2508 container_of(device, struct mlx4_ib_dev, ib_dev); 2509 snprintf(str, IB_FW_VERSION_NAME_MAX, "%d.%d.%d", 2510 (int) (dev->dev->caps.fw_ver >> 32), 2511 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff, 2512 (int) dev->dev->caps.fw_ver & 0xffff); 2513 } 2514 2515 static const struct ib_device_ops mlx4_ib_dev_ops = { 2516 .owner = THIS_MODULE, 2517 .driver_id = RDMA_DRIVER_MLX4, 2518 .uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION, 2519 2520 .add_gid = mlx4_ib_add_gid, 2521 .alloc_mr = mlx4_ib_alloc_mr, 2522 .alloc_pd = mlx4_ib_alloc_pd, 2523 .alloc_ucontext = mlx4_ib_alloc_ucontext, 2524 .attach_mcast = mlx4_ib_mcg_attach, 2525 .create_ah = mlx4_ib_create_ah, 2526 .create_cq = mlx4_ib_create_cq, 2527 .create_user_cq = mlx4_ib_create_user_cq, 2528 .create_qp = mlx4_ib_create_qp, 2529 .create_srq = mlx4_ib_create_srq, 2530 .dealloc_pd = mlx4_ib_dealloc_pd, 2531 .dealloc_ucontext = mlx4_ib_dealloc_ucontext, 2532 .del_gid = mlx4_ib_del_gid, 2533 .dereg_mr = mlx4_ib_dereg_mr, 2534 .destroy_ah = mlx4_ib_destroy_ah, 2535 .destroy_cq = mlx4_ib_destroy_cq, 2536 .destroy_qp = mlx4_ib_destroy_qp, 2537 .destroy_srq = mlx4_ib_destroy_srq, 2538 .detach_mcast = mlx4_ib_mcg_detach, 2539 .device_group = &mlx4_attr_group, 2540 .disassociate_ucontext = mlx4_ib_disassociate_ucontext, 2541 .drain_rq = mlx4_ib_drain_rq, 2542 .drain_sq = mlx4_ib_drain_sq, 2543 .get_dev_fw_str = get_fw_ver_str, 2544 .get_dma_mr = mlx4_ib_get_dma_mr, 2545 .get_link_layer = mlx4_ib_port_link_layer, 2546 .get_netdev = mlx4_ib_get_netdev, 2547 .get_port_immutable = mlx4_port_immutable, 2548 .map_mr_sg = mlx4_ib_map_mr_sg, 2549 .mmap = mlx4_ib_mmap, 2550 .modify_cq = mlx4_ib_modify_cq, 2551 .modify_device = mlx4_ib_modify_device, 2552 .modify_port = mlx4_ib_modify_port, 2553 .modify_qp = mlx4_ib_modify_qp, 2554 .modify_srq = mlx4_ib_modify_srq, 2555 .poll_cq = mlx4_ib_poll_cq, 2556 .post_recv = mlx4_ib_post_recv, 2557 .post_send = mlx4_ib_post_send, 2558 .post_srq_recv = mlx4_ib_post_srq_recv, 2559 .process_mad = mlx4_ib_process_mad, 2560 .query_ah = mlx4_ib_query_ah, 2561 .query_device = mlx4_ib_query_device, 2562 .query_gid = mlx4_ib_query_gid, 2563 .query_pkey = mlx4_ib_query_pkey, 2564 .query_port = mlx4_ib_query_port, 2565 .query_qp = mlx4_ib_query_qp, 2566 .query_srq = mlx4_ib_query_srq, 2567 .reg_user_mr = mlx4_ib_reg_user_mr, 2568 .req_notify_cq = mlx4_ib_arm_cq, 2569 .rereg_user_mr = mlx4_ib_rereg_user_mr, 2570 .resize_user_cq = mlx4_ib_resize_cq, 2571 .report_port_event = mlx4_ib_port_event, 2572 2573 INIT_RDMA_OBJ_SIZE(ib_ah, mlx4_ib_ah, ibah), 2574 INIT_RDMA_OBJ_SIZE(ib_cq, mlx4_ib_cq, ibcq), 2575 INIT_RDMA_OBJ_SIZE(ib_pd, mlx4_ib_pd, ibpd), 2576 INIT_RDMA_OBJ_SIZE(ib_qp, mlx4_ib_qp, ibqp), 2577 INIT_RDMA_OBJ_SIZE(ib_srq, mlx4_ib_srq, ibsrq), 2578 INIT_RDMA_OBJ_SIZE(ib_ucontext, mlx4_ib_ucontext, ibucontext), 2579 }; 2580 2581 static const struct ib_device_ops mlx4_ib_dev_wq_ops = { 2582 .create_rwq_ind_table = mlx4_ib_create_rwq_ind_table, 2583 .create_wq = mlx4_ib_create_wq, 2584 .destroy_rwq_ind_table = mlx4_ib_destroy_rwq_ind_table, 2585 .destroy_wq = mlx4_ib_destroy_wq, 2586 .modify_wq = mlx4_ib_modify_wq, 2587 2588 INIT_RDMA_OBJ_SIZE(ib_rwq_ind_table, mlx4_ib_rwq_ind_table, 2589 ib_rwq_ind_tbl), 2590 }; 2591 2592 static const struct ib_device_ops mlx4_ib_dev_mw_ops = { 2593 .alloc_mw = mlx4_ib_alloc_mw, 2594 .dealloc_mw = mlx4_ib_dealloc_mw, 2595 2596 INIT_RDMA_OBJ_SIZE(ib_mw, mlx4_ib_mw, ibmw), 2597 }; 2598 2599 static const struct ib_device_ops mlx4_ib_dev_xrc_ops = { 2600 .alloc_xrcd = mlx4_ib_alloc_xrcd, 2601 .dealloc_xrcd = mlx4_ib_dealloc_xrcd, 2602 2603 INIT_RDMA_OBJ_SIZE(ib_xrcd, mlx4_ib_xrcd, ibxrcd), 2604 }; 2605 2606 static const struct ib_device_ops mlx4_ib_dev_fs_ops = { 2607 .create_flow = mlx4_ib_create_flow, 2608 .destroy_flow = mlx4_ib_destroy_flow, 2609 }; 2610 2611 static int mlx4_ib_probe(struct auxiliary_device *adev, 2612 const struct auxiliary_device_id *id) 2613 { 2614 struct mlx4_adev *madev = container_of(adev, struct mlx4_adev, adev); 2615 struct mlx4_dev *dev = madev->mdev; 2616 struct mlx4_ib_dev *ibdev; 2617 int num_ports = 0; 2618 int i, j; 2619 int err; 2620 struct mlx4_ib_iboe *iboe; 2621 int ib_num_ports = 0; 2622 int num_req_counters; 2623 int allocated; 2624 u32 counter_index; 2625 struct counter_index *new_counter_index; 2626 2627 pr_info_once("%s", mlx4_ib_version); 2628 2629 num_ports = 0; 2630 mlx4_foreach_ib_transport_port(i, dev) 2631 num_ports++; 2632 2633 /* No point in registering a device with no ports... */ 2634 if (num_ports == 0) 2635 return -ENODEV; 2636 2637 ibdev = ib_alloc_device(mlx4_ib_dev, ib_dev); 2638 if (!ibdev) { 2639 dev_err(&dev->persist->pdev->dev, 2640 "Device struct alloc failed\n"); 2641 return -ENOMEM; 2642 } 2643 2644 iboe = &ibdev->iboe; 2645 2646 err = mlx4_pd_alloc(dev, &ibdev->priv_pdn); 2647 if (err) 2648 goto err_dealloc; 2649 2650 err = mlx4_uar_alloc(dev, &ibdev->priv_uar); 2651 if (err) 2652 goto err_pd; 2653 2654 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT, 2655 PAGE_SIZE); 2656 if (!ibdev->uar_map) { 2657 err = -ENOMEM; 2658 goto err_uar; 2659 } 2660 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock); 2661 2662 ibdev->dev = dev; 2663 ibdev->bond_next_port = 0; 2664 2665 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA; 2666 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey; 2667 ibdev->num_ports = num_ports; 2668 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ? 2669 1 : ibdev->num_ports; 2670 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors; 2671 ibdev->ib_dev.dev.parent = &dev->persist->pdev->dev; 2672 2673 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_ops); 2674 2675 if ((dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) && 2676 ((mlx4_ib_port_link_layer(&ibdev->ib_dev, 1) == 2677 IB_LINK_LAYER_ETHERNET) || 2678 (mlx4_ib_port_link_layer(&ibdev->ib_dev, 2) == 2679 IB_LINK_LAYER_ETHERNET))) 2680 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_wq_ops); 2681 2682 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || 2683 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) 2684 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_mw_ops); 2685 2686 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) { 2687 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_xrc_ops); 2688 } 2689 2690 if (check_flow_steering_support(dev)) { 2691 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED; 2692 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_fs_ops); 2693 } 2694 2695 if (!dev->caps.userspace_caps) 2696 ibdev->ib_dev.ops.uverbs_abi_ver = 2697 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION; 2698 2699 mlx4_ib_alloc_eqs(dev, ibdev); 2700 2701 spin_lock_init(&iboe->lock); 2702 2703 err = init_node_data(ibdev); 2704 if (err) 2705 goto err_map; 2706 mlx4_init_sl2vl_tbl(ibdev); 2707 2708 for (i = 0; i < ibdev->num_ports; ++i) { 2709 mutex_init(&ibdev->counters_table[i].mutex); 2710 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list); 2711 iboe->last_port_state[i] = IB_PORT_DOWN; 2712 } 2713 2714 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports; 2715 for (i = 0; i < num_req_counters; ++i) { 2716 mutex_init(&ibdev->qp1_proxy_lock[i]); 2717 allocated = 0; 2718 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) == 2719 IB_LINK_LAYER_ETHERNET) { 2720 err = mlx4_counter_alloc(ibdev->dev, &counter_index, 2721 MLX4_RES_USAGE_DRIVER); 2722 /* if failed to allocate a new counter, use default */ 2723 if (err) 2724 counter_index = 2725 mlx4_get_default_counter_index(dev, 2726 i + 1); 2727 else 2728 allocated = 1; 2729 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */ 2730 counter_index = mlx4_get_default_counter_index(dev, 2731 i + 1); 2732 } 2733 new_counter_index = kmalloc_obj(*new_counter_index); 2734 if (!new_counter_index) { 2735 err = -ENOMEM; 2736 if (allocated) 2737 mlx4_counter_free(ibdev->dev, counter_index); 2738 goto err_counter; 2739 } 2740 new_counter_index->index = counter_index; 2741 new_counter_index->allocated = allocated; 2742 list_add_tail(&new_counter_index->list, 2743 &ibdev->counters_table[i].counters_list); 2744 ibdev->counters_table[i].default_counter = counter_index; 2745 pr_info("counter index %d for port %d allocated %d\n", 2746 counter_index, i + 1, allocated); 2747 } 2748 if (mlx4_is_bonded(dev)) 2749 for (i = 1; i < ibdev->num_ports ; ++i) { 2750 new_counter_index = 2751 kmalloc_obj(struct counter_index); 2752 if (!new_counter_index) { 2753 err = -ENOMEM; 2754 goto err_counter; 2755 } 2756 new_counter_index->index = counter_index; 2757 new_counter_index->allocated = 0; 2758 list_add_tail(&new_counter_index->list, 2759 &ibdev->counters_table[i].counters_list); 2760 ibdev->counters_table[i].default_counter = 2761 counter_index; 2762 } 2763 2764 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2765 ib_num_ports++; 2766 2767 spin_lock_init(&ibdev->sm_lock); 2768 mutex_init(&ibdev->cap_mask_mutex); 2769 INIT_LIST_HEAD(&ibdev->qp_list); 2770 spin_lock_init(&ibdev->reset_flow_resource_lock); 2771 2772 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED && 2773 ib_num_ports) { 2774 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS; 2775 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count, 2776 MLX4_IB_UC_STEER_QPN_ALIGN, 2777 &ibdev->steer_qpn_base, 0, 2778 MLX4_RES_USAGE_DRIVER); 2779 if (err) 2780 goto err_counter; 2781 2782 ibdev->ib_uc_qpns_bitmap = bitmap_alloc(ibdev->steer_qpn_count, 2783 GFP_KERNEL); 2784 if (!ibdev->ib_uc_qpns_bitmap) { 2785 err = -ENOMEM; 2786 goto err_steer_qp_release; 2787 } 2788 2789 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB) { 2790 bitmap_zero(ibdev->ib_uc_qpns_bitmap, 2791 ibdev->steer_qpn_count); 2792 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE( 2793 dev, ibdev->steer_qpn_base, 2794 ibdev->steer_qpn_base + 2795 ibdev->steer_qpn_count - 1); 2796 if (err) 2797 goto err_steer_free_bitmap; 2798 } else { 2799 bitmap_fill(ibdev->ib_uc_qpns_bitmap, 2800 ibdev->steer_qpn_count); 2801 } 2802 } 2803 2804 for (j = 1; j <= ibdev->dev->caps.num_ports; j++) 2805 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]); 2806 2807 err = mlx4_ib_alloc_diag_counters(ibdev); 2808 if (err) 2809 goto err_steer_free_bitmap; 2810 2811 err = ib_register_device(&ibdev->ib_dev, "mlx4_%d", 2812 &dev->persist->pdev->dev); 2813 if (err) 2814 goto err_diag_counters; 2815 2816 err = mlx4_ib_mad_init(ibdev); 2817 if (err) 2818 goto err_reg; 2819 2820 err = mlx4_ib_init_sriov(ibdev); 2821 if (err) 2822 goto err_mad; 2823 2824 if (!iboe->nb.notifier_call) { 2825 iboe->nb.notifier_call = mlx4_ib_netdev_event; 2826 err = register_netdevice_notifier(&iboe->nb); 2827 if (err) { 2828 iboe->nb.notifier_call = NULL; 2829 goto err_notif; 2830 } 2831 } 2832 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 2833 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT); 2834 if (err) 2835 goto err_notif; 2836 } 2837 2838 ibdev->ib_active = true; 2839 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2840 devlink_port_type_ib_set(mlx4_get_devlink_port(dev, i), 2841 &ibdev->ib_dev); 2842 2843 if (mlx4_is_mfunc(ibdev->dev)) 2844 init_pkeys(ibdev); 2845 2846 /* create paravirt contexts for any VFs which are active */ 2847 if (mlx4_is_master(ibdev->dev)) { 2848 for (j = 0; j < MLX4_MFUNC_MAX; j++) { 2849 if (j == mlx4_master_func_num(ibdev->dev)) 2850 continue; 2851 if (mlx4_is_slave_active(ibdev->dev, j)) 2852 do_slave_init(ibdev, j, 1); 2853 } 2854 } 2855 2856 /* register mlx4 core notifier */ 2857 ibdev->mlx_nb.notifier_call = mlx4_ib_event; 2858 err = mlx4_register_event_notifier(dev, &ibdev->mlx_nb); 2859 WARN(err, "failed to register mlx4 event notifier (%d)", err); 2860 2861 auxiliary_set_drvdata(adev, ibdev); 2862 return 0; 2863 2864 err_notif: 2865 if (ibdev->iboe.nb.notifier_call) { 2866 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2867 pr_warn("failure unregistering notifier\n"); 2868 ibdev->iboe.nb.notifier_call = NULL; 2869 } 2870 flush_workqueue(wq); 2871 2872 mlx4_ib_close_sriov(ibdev); 2873 2874 err_mad: 2875 mlx4_ib_mad_cleanup(ibdev); 2876 2877 err_reg: 2878 ib_unregister_device(&ibdev->ib_dev); 2879 2880 err_diag_counters: 2881 mlx4_ib_diag_cleanup(ibdev); 2882 2883 err_steer_free_bitmap: 2884 bitmap_free(ibdev->ib_uc_qpns_bitmap); 2885 2886 err_steer_qp_release: 2887 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 2888 ibdev->steer_qpn_count); 2889 err_counter: 2890 for (i = 0; i < ibdev->num_ports; ++i) 2891 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]); 2892 2893 err_map: 2894 mlx4_ib_free_eqs(dev, ibdev); 2895 iounmap(ibdev->uar_map); 2896 2897 err_uar: 2898 mlx4_uar_free(dev, &ibdev->priv_uar); 2899 2900 err_pd: 2901 mlx4_pd_free(dev, ibdev->priv_pdn); 2902 2903 err_dealloc: 2904 ib_dealloc_device(&ibdev->ib_dev); 2905 2906 return err; 2907 } 2908 2909 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn) 2910 { 2911 int offset; 2912 2913 WARN_ON(!dev->ib_uc_qpns_bitmap); 2914 2915 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap, 2916 dev->steer_qpn_count, 2917 get_count_order(count)); 2918 if (offset < 0) 2919 return offset; 2920 2921 *qpn = dev->steer_qpn_base + offset; 2922 return 0; 2923 } 2924 2925 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count) 2926 { 2927 if (!qpn || 2928 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED) 2929 return; 2930 2931 if (WARN(qpn < dev->steer_qpn_base, "qpn = %u, steer_qpn_base = %u\n", 2932 qpn, dev->steer_qpn_base)) 2933 /* not supposed to be here */ 2934 return; 2935 2936 bitmap_release_region(dev->ib_uc_qpns_bitmap, 2937 qpn - dev->steer_qpn_base, 2938 get_count_order(count)); 2939 } 2940 2941 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 2942 int is_attach) 2943 { 2944 int err; 2945 size_t flow_size; 2946 struct ib_flow_attr *flow; 2947 struct ib_flow_spec_ib *ib_spec; 2948 2949 if (is_attach) { 2950 flow_size = sizeof(struct ib_flow_attr) + 2951 sizeof(struct ib_flow_spec_ib); 2952 flow = kzalloc(flow_size, GFP_KERNEL); 2953 if (!flow) 2954 return -ENOMEM; 2955 flow->port = mqp->port; 2956 flow->num_of_specs = 1; 2957 flow->size = flow_size; 2958 ib_spec = (struct ib_flow_spec_ib *)(flow + 1); 2959 ib_spec->type = IB_FLOW_SPEC_IB; 2960 ib_spec->size = sizeof(struct ib_flow_spec_ib); 2961 /* Add an empty rule for IB L2 */ 2962 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask)); 2963 2964 err = __mlx4_ib_create_flow(&mqp->ibqp, flow, MLX4_DOMAIN_NIC, 2965 MLX4_FS_REGULAR, &mqp->reg_id); 2966 kfree(flow); 2967 return err; 2968 } 2969 2970 return __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id); 2971 } 2972 2973 static void mlx4_ib_remove(struct auxiliary_device *adev) 2974 { 2975 struct mlx4_adev *madev = container_of(adev, struct mlx4_adev, adev); 2976 struct mlx4_dev *dev = madev->mdev; 2977 struct mlx4_ib_dev *ibdev = auxiliary_get_drvdata(adev); 2978 int p; 2979 int i; 2980 2981 mlx4_unregister_event_notifier(dev, &ibdev->mlx_nb); 2982 2983 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2984 devlink_port_type_clear(mlx4_get_devlink_port(dev, i)); 2985 ibdev->ib_active = false; 2986 flush_workqueue(wq); 2987 2988 if (ibdev->iboe.nb.notifier_call) { 2989 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2990 pr_warn("failure unregistering notifier\n"); 2991 ibdev->iboe.nb.notifier_call = NULL; 2992 } 2993 2994 mlx4_ib_close_sriov(ibdev); 2995 mlx4_ib_mad_cleanup(ibdev); 2996 ib_unregister_device(&ibdev->ib_dev); 2997 mlx4_ib_diag_cleanup(ibdev); 2998 2999 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 3000 ibdev->steer_qpn_count); 3001 bitmap_free(ibdev->ib_uc_qpns_bitmap); 3002 3003 iounmap(ibdev->uar_map); 3004 for (p = 0; p < ibdev->num_ports; ++p) 3005 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]); 3006 3007 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) 3008 mlx4_CLOSE_PORT(dev, p); 3009 3010 mlx4_ib_free_eqs(dev, ibdev); 3011 3012 mlx4_uar_free(dev, &ibdev->priv_uar); 3013 mlx4_pd_free(dev, ibdev->priv_pdn); 3014 ib_dealloc_device(&ibdev->ib_dev); 3015 } 3016 3017 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init) 3018 { 3019 struct mlx4_ib_demux_work **dm; 3020 struct mlx4_dev *dev = ibdev->dev; 3021 int i; 3022 unsigned long flags; 3023 struct mlx4_active_ports actv_ports; 3024 unsigned int ports; 3025 unsigned int first_port; 3026 3027 if (!mlx4_is_master(dev)) 3028 return; 3029 3030 actv_ports = mlx4_get_active_ports(dev, slave); 3031 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports); 3032 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports); 3033 3034 dm = kzalloc_objs(*dm, ports, GFP_ATOMIC); 3035 if (!dm) 3036 return; 3037 3038 for (i = 0; i < ports; i++) { 3039 dm[i] = kmalloc_obj(struct mlx4_ib_demux_work, GFP_ATOMIC); 3040 if (!dm[i]) { 3041 while (--i >= 0) 3042 kfree(dm[i]); 3043 goto out; 3044 } 3045 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work); 3046 dm[i]->port = first_port + i + 1; 3047 dm[i]->slave = slave; 3048 dm[i]->do_init = do_init; 3049 dm[i]->dev = ibdev; 3050 } 3051 /* initialize or tear down tunnel QPs for the slave */ 3052 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags); 3053 if (!ibdev->sriov.is_going_down) { 3054 for (i = 0; i < ports; i++) 3055 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work); 3056 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3057 } else { 3058 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3059 for (i = 0; i < ports; i++) 3060 kfree(dm[i]); 3061 } 3062 out: 3063 kfree(dm); 3064 return; 3065 } 3066 3067 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev) 3068 { 3069 struct mlx4_ib_qp *mqp; 3070 unsigned long flags_qp; 3071 unsigned long flags_cq; 3072 struct mlx4_ib_cq *send_mcq, *recv_mcq; 3073 struct list_head cq_notify_list; 3074 struct mlx4_cq *mcq; 3075 unsigned long flags; 3076 3077 pr_warn("mlx4_ib_handle_catas_error was started\n"); 3078 INIT_LIST_HEAD(&cq_notify_list); 3079 3080 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/ 3081 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags); 3082 3083 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) { 3084 spin_lock_irqsave(&mqp->sq.lock, flags_qp); 3085 if (mqp->sq.tail != mqp->sq.head) { 3086 send_mcq = to_mcq(mqp->ibqp.send_cq); 3087 spin_lock_irqsave(&send_mcq->lock, flags_cq); 3088 if (send_mcq->mcq.comp && 3089 mqp->ibqp.send_cq->comp_handler) { 3090 if (!send_mcq->mcq.reset_notify_added) { 3091 send_mcq->mcq.reset_notify_added = 1; 3092 list_add_tail(&send_mcq->mcq.reset_notify, 3093 &cq_notify_list); 3094 } 3095 } 3096 spin_unlock_irqrestore(&send_mcq->lock, flags_cq); 3097 } 3098 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp); 3099 /* Now, handle the QP's receive queue */ 3100 spin_lock_irqsave(&mqp->rq.lock, flags_qp); 3101 /* no handling is needed for SRQ */ 3102 if (!mqp->ibqp.srq) { 3103 if (mqp->rq.tail != mqp->rq.head) { 3104 recv_mcq = to_mcq(mqp->ibqp.recv_cq); 3105 spin_lock_irqsave(&recv_mcq->lock, flags_cq); 3106 if (recv_mcq->mcq.comp && 3107 mqp->ibqp.recv_cq->comp_handler) { 3108 if (!recv_mcq->mcq.reset_notify_added) { 3109 recv_mcq->mcq.reset_notify_added = 1; 3110 list_add_tail(&recv_mcq->mcq.reset_notify, 3111 &cq_notify_list); 3112 } 3113 } 3114 spin_unlock_irqrestore(&recv_mcq->lock, 3115 flags_cq); 3116 } 3117 } 3118 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp); 3119 } 3120 3121 list_for_each_entry(mcq, &cq_notify_list, reset_notify) { 3122 mcq->comp(mcq); 3123 } 3124 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags); 3125 pr_warn("mlx4_ib_handle_catas_error ended\n"); 3126 } 3127 3128 static void handle_bonded_port_state_event(struct work_struct *work) 3129 { 3130 struct ib_event_work *ew = 3131 container_of(work, struct ib_event_work, work); 3132 struct mlx4_ib_dev *ibdev = ew->ib_dev; 3133 enum ib_port_state bonded_port_state = IB_PORT_NOP; 3134 int i; 3135 struct ib_event ibev; 3136 3137 kfree(ew); 3138 spin_lock_bh(&ibdev->iboe.lock); 3139 for (i = 0; i < MLX4_MAX_PORTS; ++i) { 3140 struct net_device *curr_netdev = ibdev->iboe.netdevs[i]; 3141 enum ib_port_state curr_port_state; 3142 3143 if (!curr_netdev) 3144 continue; 3145 3146 curr_port_state = 3147 (netif_running(curr_netdev) && 3148 netif_carrier_ok(curr_netdev)) ? 3149 IB_PORT_ACTIVE : IB_PORT_DOWN; 3150 3151 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ? 3152 curr_port_state : IB_PORT_ACTIVE; 3153 } 3154 spin_unlock_bh(&ibdev->iboe.lock); 3155 3156 ibev.device = &ibdev->ib_dev; 3157 ibev.element.port_num = 1; 3158 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ? 3159 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 3160 3161 ib_dispatch_event(&ibev); 3162 } 3163 3164 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port) 3165 { 3166 u64 sl2vl; 3167 int err; 3168 3169 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl); 3170 if (err) { 3171 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n", 3172 port, err); 3173 sl2vl = 0; 3174 } 3175 atomic64_set(&mdev->sl2vl[port - 1], sl2vl); 3176 } 3177 3178 static void ib_sl2vl_update_work(struct work_struct *work) 3179 { 3180 struct ib_event_work *ew = container_of(work, struct ib_event_work, work); 3181 struct mlx4_ib_dev *mdev = ew->ib_dev; 3182 int port = ew->port; 3183 3184 mlx4_ib_sl2vl_update(mdev, port); 3185 3186 kfree(ew); 3187 } 3188 3189 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev, 3190 int port) 3191 { 3192 struct ib_event_work *ew; 3193 3194 ew = kmalloc_obj(*ew, GFP_ATOMIC); 3195 if (ew) { 3196 INIT_WORK(&ew->work, ib_sl2vl_update_work); 3197 ew->port = port; 3198 ew->ib_dev = ibdev; 3199 queue_work(wq, &ew->work); 3200 } 3201 } 3202 3203 static int mlx4_ib_event(struct notifier_block *this, unsigned long event, 3204 void *param) 3205 { 3206 struct mlx4_ib_dev *ibdev = 3207 container_of(this, struct mlx4_ib_dev, mlx_nb); 3208 struct mlx4_dev *dev = ibdev->dev; 3209 struct ib_event ibev; 3210 struct mlx4_eqe *eqe = NULL; 3211 struct ib_event_work *ew; 3212 int p = 0; 3213 3214 if (mlx4_is_bonded(dev) && 3215 ((event == MLX4_DEV_EVENT_PORT_UP) || 3216 (event == MLX4_DEV_EVENT_PORT_DOWN))) { 3217 ew = kmalloc_obj(*ew, GFP_ATOMIC); 3218 if (!ew) 3219 return NOTIFY_DONE; 3220 INIT_WORK(&ew->work, handle_bonded_port_state_event); 3221 ew->ib_dev = ibdev; 3222 queue_work(wq, &ew->work); 3223 return NOTIFY_DONE; 3224 } 3225 3226 switch (event) { 3227 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: 3228 break; 3229 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE: 3230 eqe = (struct mlx4_eqe *)param; 3231 break; 3232 default: 3233 p = *(int *)param; 3234 break; 3235 } 3236 3237 switch (event) { 3238 case MLX4_DEV_EVENT_PORT_UP: 3239 if (p > ibdev->num_ports) 3240 return NOTIFY_DONE; 3241 if (!mlx4_is_slave(dev) && 3242 rdma_port_get_link_layer(&ibdev->ib_dev, p) == 3243 IB_LINK_LAYER_INFINIBAND) { 3244 if (mlx4_is_master(dev)) 3245 mlx4_ib_invalidate_all_guid_record(ibdev, p); 3246 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST && 3247 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)) 3248 mlx4_sched_ib_sl2vl_update_work(ibdev, p); 3249 } 3250 ibev.event = IB_EVENT_PORT_ACTIVE; 3251 break; 3252 3253 case MLX4_DEV_EVENT_PORT_DOWN: 3254 if (p > ibdev->num_ports) 3255 return NOTIFY_DONE; 3256 ibev.event = IB_EVENT_PORT_ERR; 3257 break; 3258 3259 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: 3260 ibdev->ib_active = false; 3261 ibev.event = IB_EVENT_DEVICE_FATAL; 3262 mlx4_ib_handle_catas_error(ibdev); 3263 break; 3264 3265 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE: 3266 ew = kmalloc_obj(*ew, GFP_ATOMIC); 3267 if (!ew) 3268 return NOTIFY_DONE; 3269 3270 INIT_WORK(&ew->work, handle_port_mgmt_change_event); 3271 memcpy(&ew->ib_eqe, eqe, sizeof *eqe); 3272 ew->ib_dev = ibdev; 3273 /* need to queue only for port owner, which uses GEN_EQE */ 3274 if (mlx4_is_master(dev)) 3275 queue_work(wq, &ew->work); 3276 else 3277 handle_port_mgmt_change_event(&ew->work); 3278 return NOTIFY_DONE; 3279 3280 case MLX4_DEV_EVENT_SLAVE_INIT: 3281 /* here, p is the slave id */ 3282 do_slave_init(ibdev, p, 1); 3283 if (mlx4_is_master(dev)) { 3284 int i; 3285 3286 for (i = 1; i <= ibdev->num_ports; i++) { 3287 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3288 == IB_LINK_LAYER_INFINIBAND) 3289 mlx4_ib_slave_alias_guid_event(ibdev, 3290 p, i, 3291 1); 3292 } 3293 } 3294 return NOTIFY_DONE; 3295 3296 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN: 3297 if (mlx4_is_master(dev)) { 3298 int i; 3299 3300 for (i = 1; i <= ibdev->num_ports; i++) { 3301 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3302 == IB_LINK_LAYER_INFINIBAND) 3303 mlx4_ib_slave_alias_guid_event(ibdev, 3304 p, i, 3305 0); 3306 } 3307 } 3308 /* here, p is the slave id */ 3309 do_slave_init(ibdev, p, 0); 3310 return NOTIFY_DONE; 3311 3312 default: 3313 return NOTIFY_DONE; 3314 } 3315 3316 ibev.device = &ibdev->ib_dev; 3317 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p; 3318 3319 ib_dispatch_event(&ibev); 3320 return NOTIFY_DONE; 3321 } 3322 3323 static const struct auxiliary_device_id mlx4_ib_id_table[] = { 3324 { .name = MLX4_ADEV_NAME ".ib" }, 3325 {}, 3326 }; 3327 3328 MODULE_DEVICE_TABLE(auxiliary, mlx4_ib_id_table); 3329 3330 static struct mlx4_adrv mlx4_ib_adrv = { 3331 .adrv = { 3332 .name = "ib", 3333 .probe = mlx4_ib_probe, 3334 .remove = mlx4_ib_remove, 3335 .id_table = mlx4_ib_id_table, 3336 }, 3337 .protocol = MLX4_PROT_IB_IPV6, 3338 .flags = MLX4_INTFF_BONDING 3339 }; 3340 3341 static int __init mlx4_ib_init(void) 3342 { 3343 int err; 3344 3345 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM); 3346 if (!wq) 3347 return -ENOMEM; 3348 3349 err = mlx4_ib_qp_event_init(); 3350 if (err) 3351 goto clean_qp_event; 3352 3353 err = mlx4_ib_cm_init(); 3354 if (err) 3355 goto clean_wq; 3356 3357 err = mlx4_ib_mcg_init(); 3358 if (err) 3359 goto clean_cm; 3360 3361 err = mlx4_register_auxiliary_driver(&mlx4_ib_adrv); 3362 if (err) 3363 goto clean_mcg; 3364 3365 return 0; 3366 3367 clean_mcg: 3368 mlx4_ib_mcg_destroy(); 3369 3370 clean_cm: 3371 mlx4_ib_cm_destroy(); 3372 3373 clean_wq: 3374 mlx4_ib_qp_event_cleanup(); 3375 3376 clean_qp_event: 3377 destroy_workqueue(wq); 3378 return err; 3379 } 3380 3381 static void __exit mlx4_ib_cleanup(void) 3382 { 3383 mlx4_unregister_auxiliary_driver(&mlx4_ib_adrv); 3384 mlx4_ib_mcg_destroy(); 3385 mlx4_ib_cm_destroy(); 3386 mlx4_ib_qp_event_cleanup(); 3387 destroy_workqueue(wq); 3388 } 3389 3390 module_init(mlx4_ib_init); 3391 module_exit(mlx4_ib_cleanup); 3392