1 // SPDX-License-Identifier: GPL-2.0-only 2 /**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2008-2013 Solarflare Communications Inc. 5 */ 6 7 #include <linux/delay.h> 8 #include <linux/moduleparam.h> 9 #include <linux/atomic.h> 10 #include <linux/slab.h> 11 #include "net_driver.h" 12 #include "nic.h" 13 #include "io.h" 14 #include "farch_regs.h" 15 #include "mcdi_pcol.h" 16 17 /************************************************************************** 18 * 19 * Management-Controller-to-Driver Interface 20 * 21 ************************************************************************** 22 */ 23 24 #define MCDI_RPC_TIMEOUT (10 * HZ) 25 26 /* A reboot/assertion causes the MCDI status word to be set after the 27 * command word is set or a REBOOT event is sent. If we notice a reboot 28 * via these mechanisms then wait 250ms for the status word to be set. 29 */ 30 #define MCDI_STATUS_DELAY_US 100 31 #define MCDI_STATUS_DELAY_COUNT 2500 32 #define MCDI_STATUS_SLEEP_MS \ 33 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000) 34 35 #define SEQ_MASK \ 36 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ)) 37 38 struct efx_mcdi_async_param { 39 struct list_head list; 40 unsigned int cmd; 41 size_t inlen; 42 size_t outlen; 43 bool quiet; 44 efx_mcdi_async_completer *complete; 45 unsigned long cookie; 46 /* followed by request/response buffer */ 47 }; 48 49 static void efx_mcdi_timeout_async(struct timer_list *t); 50 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, 51 bool *was_attached_out); 52 static bool efx_mcdi_poll_once(struct efx_nic *efx); 53 static void efx_mcdi_abandon(struct efx_nic *efx); 54 55 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING 56 static bool efx_siena_mcdi_logging_default; 57 module_param_named(mcdi_logging_default, efx_siena_mcdi_logging_default, 58 bool, 0644); 59 MODULE_PARM_DESC(mcdi_logging_default, 60 "Enable MCDI logging on newly-probed functions"); 61 #endif 62 63 int efx_siena_mcdi_init(struct efx_nic *efx) 64 { 65 struct efx_mcdi_iface *mcdi; 66 bool already_attached; 67 int rc = -ENOMEM; 68 69 efx->mcdi = kzalloc_obj(*efx->mcdi); 70 if (!efx->mcdi) 71 goto fail; 72 73 mcdi = efx_mcdi(efx); 74 mcdi->efx = efx; 75 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING 76 /* consuming code assumes buffer is page-sized */ 77 mcdi->logging_buffer = kmalloc(PAGE_SIZE, GFP_KERNEL); 78 if (!mcdi->logging_buffer) 79 goto fail1; 80 mcdi->logging_enabled = efx_siena_mcdi_logging_default; 81 #endif 82 init_waitqueue_head(&mcdi->wq); 83 init_waitqueue_head(&mcdi->proxy_rx_wq); 84 spin_lock_init(&mcdi->iface_lock); 85 mcdi->state = MCDI_STATE_QUIESCENT; 86 mcdi->mode = MCDI_MODE_POLL; 87 spin_lock_init(&mcdi->async_lock); 88 INIT_LIST_HEAD(&mcdi->async_list); 89 timer_setup(&mcdi->async_timer, efx_mcdi_timeout_async, 0); 90 91 (void)efx_siena_mcdi_poll_reboot(efx); 92 mcdi->new_epoch = true; 93 94 /* Recover from a failed assertion before probing */ 95 rc = efx_siena_mcdi_handle_assertion(efx); 96 if (rc) 97 goto fail2; 98 99 /* Let the MC (and BMC, if this is a LOM) know that the driver 100 * is loaded. We should do this before we reset the NIC. 101 */ 102 rc = efx_mcdi_drv_attach(efx, true, &already_attached); 103 if (rc) { 104 netif_err(efx, probe, efx->net_dev, 105 "Unable to register driver with MCPU\n"); 106 goto fail2; 107 } 108 if (already_attached) 109 /* Not a fatal error */ 110 netif_err(efx, probe, efx->net_dev, 111 "Host already registered with MCPU\n"); 112 113 if (efx->mcdi->fn_flags & 114 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY)) 115 efx->primary = efx; 116 117 return 0; 118 fail2: 119 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING 120 kfree(mcdi->logging_buffer); 121 fail1: 122 #endif 123 kfree(efx->mcdi); 124 efx->mcdi = NULL; 125 fail: 126 return rc; 127 } 128 129 void efx_siena_mcdi_detach(struct efx_nic *efx) 130 { 131 if (!efx->mcdi) 132 return; 133 134 BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT); 135 136 /* Relinquish the device (back to the BMC, if this is a LOM) */ 137 efx_mcdi_drv_attach(efx, false, NULL); 138 } 139 140 void efx_siena_mcdi_fini(struct efx_nic *efx) 141 { 142 if (!efx->mcdi) 143 return; 144 145 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING 146 kfree(efx->mcdi->iface.logging_buffer); 147 #endif 148 149 kfree(efx->mcdi); 150 } 151 152 static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd, 153 const efx_dword_t *inbuf, size_t inlen) 154 { 155 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 156 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING 157 char *buf = mcdi->logging_buffer; /* page-sized */ 158 #endif 159 efx_dword_t hdr[2]; 160 size_t hdr_len; 161 u32 xflags, seqno; 162 163 BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT); 164 165 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */ 166 spin_lock_bh(&mcdi->iface_lock); 167 ++mcdi->seqno; 168 seqno = mcdi->seqno & SEQ_MASK; 169 spin_unlock_bh(&mcdi->iface_lock); 170 171 xflags = 0; 172 if (mcdi->mode == MCDI_MODE_EVENTS) 173 xflags |= MCDI_HEADER_XFLAGS_EVREQ; 174 175 if (efx->type->mcdi_max_ver == 1) { 176 /* MCDI v1 */ 177 EFX_POPULATE_DWORD_7(hdr[0], 178 MCDI_HEADER_RESPONSE, 0, 179 MCDI_HEADER_RESYNC, 1, 180 MCDI_HEADER_CODE, cmd, 181 MCDI_HEADER_DATALEN, inlen, 182 MCDI_HEADER_SEQ, seqno, 183 MCDI_HEADER_XFLAGS, xflags, 184 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); 185 hdr_len = 4; 186 } else { 187 /* MCDI v2 */ 188 BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2); 189 EFX_POPULATE_DWORD_7(hdr[0], 190 MCDI_HEADER_RESPONSE, 0, 191 MCDI_HEADER_RESYNC, 1, 192 MCDI_HEADER_CODE, MC_CMD_V2_EXTN, 193 MCDI_HEADER_DATALEN, 0, 194 MCDI_HEADER_SEQ, seqno, 195 MCDI_HEADER_XFLAGS, xflags, 196 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); 197 EFX_POPULATE_DWORD_2(hdr[1], 198 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd, 199 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen); 200 hdr_len = 8; 201 } 202 203 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING 204 if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) { 205 int bytes = 0; 206 int i; 207 /* Lengths should always be a whole number of dwords, so scream 208 * if they're not. 209 */ 210 WARN_ON_ONCE(hdr_len % 4); 211 WARN_ON_ONCE(inlen % 4); 212 213 /* We own the logging buffer, as only one MCDI can be in 214 * progress on a NIC at any one time. So no need for locking. 215 */ 216 for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++) 217 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, 218 " %08x", 219 le32_to_cpu(hdr[i].u32[0])); 220 221 for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++) 222 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, 223 " %08x", 224 le32_to_cpu(inbuf[i].u32[0])); 225 226 netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf); 227 } 228 #endif 229 230 efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen); 231 232 mcdi->new_epoch = false; 233 } 234 235 static int efx_mcdi_errno(unsigned int mcdi_err) 236 { 237 switch (mcdi_err) { 238 case 0: 239 return 0; 240 #define TRANSLATE_ERROR(name) \ 241 case MC_CMD_ERR_ ## name: \ 242 return -name; 243 TRANSLATE_ERROR(EPERM); 244 TRANSLATE_ERROR(ENOENT); 245 TRANSLATE_ERROR(EINTR); 246 TRANSLATE_ERROR(EAGAIN); 247 TRANSLATE_ERROR(EACCES); 248 TRANSLATE_ERROR(EBUSY); 249 TRANSLATE_ERROR(EINVAL); 250 TRANSLATE_ERROR(EDEADLK); 251 TRANSLATE_ERROR(ENOSYS); 252 TRANSLATE_ERROR(ETIME); 253 TRANSLATE_ERROR(EALREADY); 254 TRANSLATE_ERROR(ENOSPC); 255 #undef TRANSLATE_ERROR 256 case MC_CMD_ERR_ENOTSUP: 257 return -EOPNOTSUPP; 258 case MC_CMD_ERR_ALLOC_FAIL: 259 return -ENOBUFS; 260 case MC_CMD_ERR_MAC_EXIST: 261 return -EADDRINUSE; 262 default: 263 return -EPROTO; 264 } 265 } 266 267 static void efx_mcdi_read_response_header(struct efx_nic *efx) 268 { 269 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 270 unsigned int respseq, respcmd, error; 271 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING 272 char *buf = mcdi->logging_buffer; /* page-sized */ 273 #endif 274 efx_dword_t hdr; 275 276 efx->type->mcdi_read_response(efx, &hdr, 0, 4); 277 respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ); 278 respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE); 279 error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR); 280 281 if (respcmd != MC_CMD_V2_EXTN) { 282 mcdi->resp_hdr_len = 4; 283 mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN); 284 } else { 285 efx->type->mcdi_read_response(efx, &hdr, 4, 4); 286 mcdi->resp_hdr_len = 8; 287 mcdi->resp_data_len = 288 EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN); 289 } 290 291 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING 292 if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) { 293 size_t hdr_len, data_len; 294 int bytes = 0; 295 int i; 296 297 WARN_ON_ONCE(mcdi->resp_hdr_len % 4); 298 hdr_len = mcdi->resp_hdr_len / 4; 299 /* MCDI_DECLARE_BUF ensures that underlying buffer is padded 300 * to dword size, and the MCDI buffer is always dword size 301 */ 302 data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4); 303 304 /* We own the logging buffer, as only one MCDI can be in 305 * progress on a NIC at any one time. So no need for locking. 306 */ 307 for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) { 308 efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4); 309 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, 310 " %08x", le32_to_cpu(hdr.u32[0])); 311 } 312 313 for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) { 314 efx->type->mcdi_read_response(efx, &hdr, 315 mcdi->resp_hdr_len + (i * 4), 4); 316 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, 317 " %08x", le32_to_cpu(hdr.u32[0])); 318 } 319 320 netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf); 321 } 322 #endif 323 324 mcdi->resprc_raw = 0; 325 if (error && mcdi->resp_data_len == 0) { 326 netif_err(efx, hw, efx->net_dev, "MC rebooted\n"); 327 mcdi->resprc = -EIO; 328 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) { 329 netif_err(efx, hw, efx->net_dev, 330 "MC response mismatch tx seq 0x%x rx seq 0x%x\n", 331 respseq, mcdi->seqno); 332 mcdi->resprc = -EIO; 333 } else if (error) { 334 efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4); 335 mcdi->resprc_raw = EFX_DWORD_FIELD(hdr, EFX_DWORD_0); 336 mcdi->resprc = efx_mcdi_errno(mcdi->resprc_raw); 337 } else { 338 mcdi->resprc = 0; 339 } 340 } 341 342 static bool efx_mcdi_poll_once(struct efx_nic *efx) 343 { 344 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 345 346 rmb(); 347 if (!efx->type->mcdi_poll_response(efx)) 348 return false; 349 350 spin_lock_bh(&mcdi->iface_lock); 351 efx_mcdi_read_response_header(efx); 352 spin_unlock_bh(&mcdi->iface_lock); 353 354 return true; 355 } 356 357 static int efx_mcdi_poll(struct efx_nic *efx) 358 { 359 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 360 unsigned long time, finish; 361 unsigned int spins; 362 int rc; 363 364 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */ 365 rc = efx_siena_mcdi_poll_reboot(efx); 366 if (rc) { 367 spin_lock_bh(&mcdi->iface_lock); 368 mcdi->resprc = rc; 369 mcdi->resp_hdr_len = 0; 370 mcdi->resp_data_len = 0; 371 spin_unlock_bh(&mcdi->iface_lock); 372 return 0; 373 } 374 375 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy, 376 * because generally mcdi responses are fast. After that, back off 377 * and poll once a jiffy (approximately) 378 */ 379 spins = USER_TICK_USEC; 380 finish = jiffies + MCDI_RPC_TIMEOUT; 381 382 while (1) { 383 if (spins != 0) { 384 --spins; 385 udelay(1); 386 } else { 387 schedule_timeout_uninterruptible(1); 388 } 389 390 time = jiffies; 391 392 if (efx_mcdi_poll_once(efx)) 393 break; 394 395 if (time_after(time, finish)) 396 return -ETIMEDOUT; 397 } 398 399 /* Return rc=0 like wait_event_timeout() */ 400 return 0; 401 } 402 403 /* Test and clear MC-rebooted flag for this port/function; reset 404 * software state as necessary. 405 */ 406 int efx_siena_mcdi_poll_reboot(struct efx_nic *efx) 407 { 408 if (!efx->mcdi) 409 return 0; 410 411 return efx->type->mcdi_poll_reboot(efx); 412 } 413 414 static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi) 415 { 416 return cmpxchg(&mcdi->state, 417 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) == 418 MCDI_STATE_QUIESCENT; 419 } 420 421 static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi) 422 { 423 /* Wait until the interface becomes QUIESCENT and we win the race 424 * to mark it RUNNING_SYNC. 425 */ 426 wait_event(mcdi->wq, 427 cmpxchg(&mcdi->state, 428 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) == 429 MCDI_STATE_QUIESCENT); 430 } 431 432 static int efx_mcdi_await_completion(struct efx_nic *efx) 433 { 434 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 435 436 if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED, 437 MCDI_RPC_TIMEOUT) == 0) 438 return -ETIMEDOUT; 439 440 /* Check if efx_mcdi_set_mode() switched us back to polled completions. 441 * In which case, poll for completions directly. If efx_mcdi_ev_cpl() 442 * completed the request first, then we'll just end up completing the 443 * request again, which is safe. 444 * 445 * We need an smp_rmb() to synchronise with efx_siena_mcdi_mode_poll(), which 446 * wait_event_timeout() implicitly provides. 447 */ 448 if (mcdi->mode == MCDI_MODE_POLL) 449 return efx_mcdi_poll(efx); 450 451 return 0; 452 } 453 454 /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the 455 * requester. Return whether this was done. Does not take any locks. 456 */ 457 static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi) 458 { 459 if (cmpxchg(&mcdi->state, 460 MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) == 461 MCDI_STATE_RUNNING_SYNC) { 462 wake_up(&mcdi->wq); 463 return true; 464 } 465 466 return false; 467 } 468 469 static void efx_mcdi_release(struct efx_mcdi_iface *mcdi) 470 { 471 if (mcdi->mode == MCDI_MODE_EVENTS) { 472 struct efx_mcdi_async_param *async; 473 struct efx_nic *efx = mcdi->efx; 474 475 /* Process the asynchronous request queue */ 476 spin_lock_bh(&mcdi->async_lock); 477 async = list_first_entry_or_null( 478 &mcdi->async_list, struct efx_mcdi_async_param, list); 479 if (async) { 480 mcdi->state = MCDI_STATE_RUNNING_ASYNC; 481 efx_mcdi_send_request(efx, async->cmd, 482 (const efx_dword_t *)(async + 1), 483 async->inlen); 484 mod_timer(&mcdi->async_timer, 485 jiffies + MCDI_RPC_TIMEOUT); 486 } 487 spin_unlock_bh(&mcdi->async_lock); 488 489 if (async) 490 return; 491 } 492 493 mcdi->state = MCDI_STATE_QUIESCENT; 494 wake_up(&mcdi->wq); 495 } 496 497 /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the 498 * asynchronous completion function, and release the interface. 499 * Return whether this was done. Must be called in bh-disabled 500 * context. Will take iface_lock and async_lock. 501 */ 502 static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout) 503 { 504 struct efx_nic *efx = mcdi->efx; 505 struct efx_mcdi_async_param *async; 506 size_t hdr_len, data_len, err_len; 507 efx_dword_t *outbuf; 508 MCDI_DECLARE_BUF_ERR(errbuf); 509 int rc; 510 511 if (cmpxchg(&mcdi->state, 512 MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) != 513 MCDI_STATE_RUNNING_ASYNC) 514 return false; 515 516 spin_lock(&mcdi->iface_lock); 517 if (timeout) { 518 /* Ensure that if the completion event arrives later, 519 * the seqno check in efx_mcdi_ev_cpl() will fail 520 */ 521 ++mcdi->seqno; 522 ++mcdi->credits; 523 rc = -ETIMEDOUT; 524 hdr_len = 0; 525 data_len = 0; 526 } else { 527 rc = mcdi->resprc; 528 hdr_len = mcdi->resp_hdr_len; 529 data_len = mcdi->resp_data_len; 530 } 531 spin_unlock(&mcdi->iface_lock); 532 533 /* Stop the timer. In case the timer function is running, we 534 * must wait for it to return so that there is no possibility 535 * of it aborting the next request. 536 */ 537 if (!timeout) 538 timer_delete_sync(&mcdi->async_timer); 539 540 spin_lock(&mcdi->async_lock); 541 async = list_first_entry(&mcdi->async_list, 542 struct efx_mcdi_async_param, list); 543 list_del(&async->list); 544 spin_unlock(&mcdi->async_lock); 545 546 outbuf = (efx_dword_t *)(async + 1); 547 efx->type->mcdi_read_response(efx, outbuf, hdr_len, 548 min(async->outlen, data_len)); 549 if (!timeout && rc && !async->quiet) { 550 err_len = min(sizeof(errbuf), data_len); 551 efx->type->mcdi_read_response(efx, errbuf, hdr_len, 552 sizeof(errbuf)); 553 efx_siena_mcdi_display_error(efx, async->cmd, async->inlen, 554 errbuf, err_len, rc); 555 } 556 557 if (async->complete) 558 async->complete(efx, async->cookie, rc, outbuf, 559 min(async->outlen, data_len)); 560 kfree(async); 561 562 efx_mcdi_release(mcdi); 563 564 return true; 565 } 566 567 static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno, 568 unsigned int datalen, unsigned int mcdi_err) 569 { 570 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 571 bool wake = false; 572 573 spin_lock(&mcdi->iface_lock); 574 575 if ((seqno ^ mcdi->seqno) & SEQ_MASK) { 576 if (mcdi->credits) 577 /* The request has been cancelled */ 578 --mcdi->credits; 579 else 580 netif_err(efx, hw, efx->net_dev, 581 "MC response mismatch tx seq 0x%x rx " 582 "seq 0x%x\n", seqno, mcdi->seqno); 583 } else { 584 if (efx->type->mcdi_max_ver >= 2) { 585 /* MCDI v2 responses don't fit in an event */ 586 efx_mcdi_read_response_header(efx); 587 } else { 588 mcdi->resprc = efx_mcdi_errno(mcdi_err); 589 mcdi->resp_hdr_len = 4; 590 mcdi->resp_data_len = datalen; 591 } 592 593 wake = true; 594 } 595 596 spin_unlock(&mcdi->iface_lock); 597 598 if (wake) { 599 if (!efx_mcdi_complete_async(mcdi, false)) 600 (void) efx_mcdi_complete_sync(mcdi); 601 602 /* If the interface isn't RUNNING_ASYNC or 603 * RUNNING_SYNC then we've received a duplicate 604 * completion after we've already transitioned back to 605 * QUIESCENT. [A subsequent invocation would increment 606 * seqno, so would have failed the seqno check]. 607 */ 608 } 609 } 610 611 static void efx_mcdi_timeout_async(struct timer_list *t) 612 { 613 struct efx_mcdi_iface *mcdi = timer_container_of(mcdi, t, async_timer); 614 615 efx_mcdi_complete_async(mcdi, true); 616 } 617 618 static int 619 efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen) 620 { 621 if (efx->type->mcdi_max_ver < 0 || 622 (efx->type->mcdi_max_ver < 2 && 623 cmd > MC_CMD_CMD_SPACE_ESCAPE_7)) 624 return -EINVAL; 625 626 if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 || 627 (efx->type->mcdi_max_ver < 2 && 628 inlen > MCDI_CTL_SDU_LEN_MAX_V1)) 629 return -EMSGSIZE; 630 631 return 0; 632 } 633 634 static bool efx_mcdi_get_proxy_handle(struct efx_nic *efx, 635 size_t hdr_len, size_t data_len, 636 u32 *proxy_handle) 637 { 638 MCDI_DECLARE_BUF_ERR(testbuf); 639 const size_t buflen = sizeof(testbuf); 640 641 if (!proxy_handle || data_len < buflen) 642 return false; 643 644 efx->type->mcdi_read_response(efx, testbuf, hdr_len, buflen); 645 if (MCDI_DWORD(testbuf, ERR_CODE) == MC_CMD_ERR_PROXY_PENDING) { 646 *proxy_handle = MCDI_DWORD(testbuf, ERR_PROXY_PENDING_HANDLE); 647 return true; 648 } 649 650 return false; 651 } 652 653 static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd, 654 size_t inlen, 655 efx_dword_t *outbuf, size_t outlen, 656 size_t *outlen_actual, bool quiet, 657 u32 *proxy_handle, int *raw_rc) 658 { 659 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 660 MCDI_DECLARE_BUF_ERR(errbuf); 661 int rc; 662 663 if (mcdi->mode == MCDI_MODE_POLL) 664 rc = efx_mcdi_poll(efx); 665 else 666 rc = efx_mcdi_await_completion(efx); 667 668 if (rc != 0) { 669 netif_err(efx, hw, efx->net_dev, 670 "MC command 0x%x inlen %d mode %d timed out\n", 671 cmd, (int)inlen, mcdi->mode); 672 673 if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) { 674 netif_err(efx, hw, efx->net_dev, 675 "MCDI request was completed without an event\n"); 676 rc = 0; 677 } 678 679 efx_mcdi_abandon(efx); 680 681 /* Close the race with efx_mcdi_ev_cpl() executing just too late 682 * and completing a request we've just cancelled, by ensuring 683 * that the seqno check therein fails. 684 */ 685 spin_lock_bh(&mcdi->iface_lock); 686 ++mcdi->seqno; 687 ++mcdi->credits; 688 spin_unlock_bh(&mcdi->iface_lock); 689 } 690 691 if (proxy_handle) 692 *proxy_handle = 0; 693 694 if (rc != 0) { 695 if (outlen_actual) 696 *outlen_actual = 0; 697 } else { 698 size_t hdr_len, data_len, err_len; 699 700 /* At the very least we need a memory barrier here to ensure 701 * we pick up changes from efx_mcdi_ev_cpl(). Protect against 702 * a spurious efx_mcdi_ev_cpl() running concurrently by 703 * acquiring the iface_lock. */ 704 spin_lock_bh(&mcdi->iface_lock); 705 rc = mcdi->resprc; 706 if (raw_rc) 707 *raw_rc = mcdi->resprc_raw; 708 hdr_len = mcdi->resp_hdr_len; 709 data_len = mcdi->resp_data_len; 710 err_len = min(sizeof(errbuf), data_len); 711 spin_unlock_bh(&mcdi->iface_lock); 712 713 BUG_ON(rc > 0); 714 715 efx->type->mcdi_read_response(efx, outbuf, hdr_len, 716 min(outlen, data_len)); 717 if (outlen_actual) 718 *outlen_actual = data_len; 719 720 efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len); 721 722 if (cmd == MC_CMD_REBOOT && rc == -EIO) { 723 /* Don't reset if MC_CMD_REBOOT returns EIO */ 724 } else if (rc == -EIO || rc == -EINTR) { 725 netif_err(efx, hw, efx->net_dev, "MC reboot detected\n"); 726 netif_dbg(efx, hw, efx->net_dev, "MC rebooted during command %d rc %d\n", 727 cmd, -rc); 728 if (efx->type->mcdi_reboot_detected) 729 efx->type->mcdi_reboot_detected(efx); 730 efx_siena_schedule_reset(efx, RESET_TYPE_MC_FAILURE); 731 } else if (proxy_handle && (rc == -EPROTO) && 732 efx_mcdi_get_proxy_handle(efx, hdr_len, data_len, 733 proxy_handle)) { 734 mcdi->proxy_rx_status = 0; 735 mcdi->proxy_rx_handle = 0; 736 mcdi->state = MCDI_STATE_PROXY_WAIT; 737 } else if (rc && !quiet) { 738 efx_siena_mcdi_display_error(efx, cmd, inlen, errbuf, 739 err_len, rc); 740 } 741 742 if (rc == -EIO || rc == -EINTR) { 743 msleep(MCDI_STATUS_SLEEP_MS); 744 efx_siena_mcdi_poll_reboot(efx); 745 mcdi->new_epoch = true; 746 } 747 } 748 749 if (!proxy_handle || !*proxy_handle) 750 efx_mcdi_release(mcdi); 751 return rc; 752 } 753 754 static void efx_mcdi_proxy_abort(struct efx_mcdi_iface *mcdi) 755 { 756 if (mcdi->state == MCDI_STATE_PROXY_WAIT) { 757 /* Interrupt the proxy wait. */ 758 mcdi->proxy_rx_status = -EINTR; 759 wake_up(&mcdi->proxy_rx_wq); 760 } 761 } 762 763 static void efx_mcdi_ev_proxy_response(struct efx_nic *efx, 764 u32 handle, int status) 765 { 766 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 767 768 WARN_ON(mcdi->state != MCDI_STATE_PROXY_WAIT); 769 770 mcdi->proxy_rx_status = efx_mcdi_errno(status); 771 /* Ensure the status is written before we update the handle, since the 772 * latter is used to check if we've finished. 773 */ 774 wmb(); 775 mcdi->proxy_rx_handle = handle; 776 wake_up(&mcdi->proxy_rx_wq); 777 } 778 779 static int efx_mcdi_proxy_wait(struct efx_nic *efx, u32 handle, bool quiet) 780 { 781 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 782 int rc; 783 784 /* Wait for a proxy event, or timeout. */ 785 rc = wait_event_timeout(mcdi->proxy_rx_wq, 786 mcdi->proxy_rx_handle != 0 || 787 mcdi->proxy_rx_status == -EINTR, 788 MCDI_RPC_TIMEOUT); 789 790 if (rc <= 0) { 791 netif_dbg(efx, hw, efx->net_dev, 792 "MCDI proxy timeout %d\n", handle); 793 return -ETIMEDOUT; 794 } else if (mcdi->proxy_rx_handle != handle) { 795 netif_warn(efx, hw, efx->net_dev, 796 "MCDI proxy unexpected handle %d (expected %d)\n", 797 mcdi->proxy_rx_handle, handle); 798 return -EINVAL; 799 } 800 801 return mcdi->proxy_rx_status; 802 } 803 804 static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned int cmd, 805 const efx_dword_t *inbuf, size_t inlen, 806 efx_dword_t *outbuf, size_t outlen, 807 size_t *outlen_actual, bool quiet, int *raw_rc) 808 { 809 u32 proxy_handle = 0; /* Zero is an invalid proxy handle. */ 810 int rc; 811 812 if (inbuf && inlen && (inbuf == outbuf)) { 813 /* The input buffer can't be aliased with the output. */ 814 WARN_ON(1); 815 return -EINVAL; 816 } 817 818 rc = efx_siena_mcdi_rpc_start(efx, cmd, inbuf, inlen); 819 if (rc) 820 return rc; 821 822 rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, 823 outlen_actual, quiet, &proxy_handle, raw_rc); 824 825 if (proxy_handle) { 826 /* Handle proxy authorisation. This allows approval of MCDI 827 * operations to be delegated to the admin function, allowing 828 * fine control over (eg) multicast subscriptions. 829 */ 830 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 831 832 netif_dbg(efx, hw, efx->net_dev, 833 "MCDI waiting for proxy auth %d\n", 834 proxy_handle); 835 rc = efx_mcdi_proxy_wait(efx, proxy_handle, quiet); 836 837 if (rc == 0) { 838 netif_dbg(efx, hw, efx->net_dev, 839 "MCDI proxy retry %d\n", proxy_handle); 840 841 /* We now retry the original request. */ 842 mcdi->state = MCDI_STATE_RUNNING_SYNC; 843 efx_mcdi_send_request(efx, cmd, inbuf, inlen); 844 845 rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, 846 outbuf, outlen, outlen_actual, 847 quiet, NULL, raw_rc); 848 } else { 849 netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err, 850 "MC command 0x%x failed after proxy auth rc=%d\n", 851 cmd, rc); 852 853 if (rc == -EINTR || rc == -EIO) 854 efx_siena_schedule_reset(efx, RESET_TYPE_MC_FAILURE); 855 efx_mcdi_release(mcdi); 856 } 857 } 858 859 return rc; 860 } 861 862 static int _efx_mcdi_rpc_evb_retry(struct efx_nic *efx, unsigned cmd, 863 const efx_dword_t *inbuf, size_t inlen, 864 efx_dword_t *outbuf, size_t outlen, 865 size_t *outlen_actual, bool quiet) 866 { 867 int raw_rc = 0; 868 int rc; 869 870 rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen, 871 outbuf, outlen, outlen_actual, true, &raw_rc); 872 873 if ((rc == -EPROTO) && (raw_rc == MC_CMD_ERR_NO_EVB_PORT) && 874 efx->type->is_vf) { 875 /* If the EVB port isn't available within a VF this may 876 * mean the PF is still bringing the switch up. We should 877 * retry our request shortly. 878 */ 879 unsigned long abort_time = jiffies + MCDI_RPC_TIMEOUT; 880 unsigned int delay_us = 10000; 881 882 netif_dbg(efx, hw, efx->net_dev, 883 "%s: NO_EVB_PORT; will retry request\n", 884 __func__); 885 886 do { 887 usleep_range(delay_us, delay_us + 10000); 888 rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen, 889 outbuf, outlen, outlen_actual, 890 true, &raw_rc); 891 if (delay_us < 100000) 892 delay_us <<= 1; 893 } while ((rc == -EPROTO) && 894 (raw_rc == MC_CMD_ERR_NO_EVB_PORT) && 895 time_before(jiffies, abort_time)); 896 } 897 898 if (rc && !quiet && !(cmd == MC_CMD_REBOOT && rc == -EIO)) 899 efx_siena_mcdi_display_error(efx, cmd, inlen, 900 outbuf, outlen, rc); 901 902 return rc; 903 } 904 905 /** 906 * efx_siena_mcdi_rpc - Issue an MCDI command and wait for completion 907 * @efx: NIC through which to issue the command 908 * @cmd: Command type number 909 * @inbuf: Command parameters 910 * @inlen: Length of command parameters, in bytes. Must be a multiple 911 * of 4 and no greater than %MCDI_CTL_SDU_LEN_MAX_V1. 912 * @outbuf: Response buffer. May be %NULL if @outlen is 0. 913 * @outlen: Length of response buffer, in bytes. If the actual 914 * response is longer than @outlen & ~3, it will be truncated 915 * to that length. 916 * @outlen_actual: Pointer through which to return the actual response 917 * length. May be %NULL if this is not needed. 918 * 919 * This function may sleep and therefore must be called in an appropriate 920 * context. 921 * 922 * Return: A negative error code, or zero if successful. The error 923 * code may come from the MCDI response or may indicate a failure 924 * to communicate with the MC. In the former case, the response 925 * will still be copied to @outbuf and *@outlen_actual will be 926 * set accordingly. In the latter case, *@outlen_actual will be 927 * set to zero. 928 */ 929 int efx_siena_mcdi_rpc(struct efx_nic *efx, unsigned int cmd, 930 const efx_dword_t *inbuf, size_t inlen, 931 efx_dword_t *outbuf, size_t outlen, 932 size_t *outlen_actual) 933 { 934 return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen, 935 outlen_actual, false); 936 } 937 938 /* Normally, on receiving an error code in the MCDI response, 939 * efx_siena_mcdi_rpc will log an error message containing (among other 940 * things) the raw error code, by means of efx_siena_mcdi_display_error. 941 * This _quiet version suppresses that; if the caller wishes to log 942 * the error conditionally on the return code, it should call this 943 * function and is then responsible for calling efx_siena_mcdi_display_error 944 * as needed. 945 */ 946 int efx_siena_mcdi_rpc_quiet(struct efx_nic *efx, unsigned int cmd, 947 const efx_dword_t *inbuf, size_t inlen, 948 efx_dword_t *outbuf, size_t outlen, 949 size_t *outlen_actual) 950 { 951 return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen, 952 outlen_actual, true); 953 } 954 955 int efx_siena_mcdi_rpc_start(struct efx_nic *efx, unsigned int cmd, 956 const efx_dword_t *inbuf, size_t inlen) 957 { 958 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 959 int rc; 960 961 rc = efx_mcdi_check_supported(efx, cmd, inlen); 962 if (rc) 963 return rc; 964 965 if (efx->mc_bist_for_other_fn) 966 return -ENETDOWN; 967 968 if (mcdi->mode == MCDI_MODE_FAIL) 969 return -ENETDOWN; 970 971 efx_mcdi_acquire_sync(mcdi); 972 efx_mcdi_send_request(efx, cmd, inbuf, inlen); 973 return 0; 974 } 975 976 static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, 977 const efx_dword_t *inbuf, size_t inlen, 978 size_t outlen, 979 efx_mcdi_async_completer *complete, 980 unsigned long cookie, bool quiet) 981 { 982 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 983 struct efx_mcdi_async_param *async; 984 int rc; 985 986 rc = efx_mcdi_check_supported(efx, cmd, inlen); 987 if (rc) 988 return rc; 989 990 if (efx->mc_bist_for_other_fn) 991 return -ENETDOWN; 992 993 async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4), 994 GFP_ATOMIC); 995 if (!async) 996 return -ENOMEM; 997 998 async->cmd = cmd; 999 async->inlen = inlen; 1000 async->outlen = outlen; 1001 async->quiet = quiet; 1002 async->complete = complete; 1003 async->cookie = cookie; 1004 memcpy(async + 1, inbuf, inlen); 1005 1006 spin_lock_bh(&mcdi->async_lock); 1007 1008 if (mcdi->mode == MCDI_MODE_EVENTS) { 1009 list_add_tail(&async->list, &mcdi->async_list); 1010 1011 /* If this is at the front of the queue, try to start it 1012 * immediately 1013 */ 1014 if (mcdi->async_list.next == &async->list && 1015 efx_mcdi_acquire_async(mcdi)) { 1016 efx_mcdi_send_request(efx, cmd, inbuf, inlen); 1017 mod_timer(&mcdi->async_timer, 1018 jiffies + MCDI_RPC_TIMEOUT); 1019 } 1020 } else { 1021 kfree(async); 1022 rc = -ENETDOWN; 1023 } 1024 1025 spin_unlock_bh(&mcdi->async_lock); 1026 1027 return rc; 1028 } 1029 1030 /** 1031 * efx_siena_mcdi_rpc_async - Schedule an MCDI command to run asynchronously 1032 * @efx: NIC through which to issue the command 1033 * @cmd: Command type number 1034 * @inbuf: Command parameters 1035 * @inlen: Length of command parameters, in bytes 1036 * @outlen: Length to allocate for response buffer, in bytes 1037 * @complete: Function to be called on completion or cancellation. 1038 * @cookie: Arbitrary value to be passed to @complete. 1039 * 1040 * This function does not sleep and therefore may be called in atomic 1041 * context. It will fail if event queues are disabled or if MCDI 1042 * event completions have been disabled due to an error. 1043 * 1044 * If it succeeds, the @complete function will be called exactly once 1045 * in atomic context, when one of the following occurs: 1046 * (a) the completion event is received (in NAPI context) 1047 * (b) event queues are disabled (in the process that disables them) 1048 * (c) the request times-out (in timer context) 1049 */ 1050 int 1051 efx_siena_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, 1052 const efx_dword_t *inbuf, size_t inlen, size_t outlen, 1053 efx_mcdi_async_completer *complete, 1054 unsigned long cookie) 1055 { 1056 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete, 1057 cookie, false); 1058 } 1059 1060 int efx_siena_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd, 1061 const efx_dword_t *inbuf, size_t inlen, 1062 size_t outlen, 1063 efx_mcdi_async_completer *complete, 1064 unsigned long cookie) 1065 { 1066 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete, 1067 cookie, true); 1068 } 1069 1070 int efx_siena_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd, 1071 size_t inlen, efx_dword_t *outbuf, size_t outlen, 1072 size_t *outlen_actual) 1073 { 1074 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, 1075 outlen_actual, false, NULL, NULL); 1076 } 1077 1078 int efx_siena_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned int cmd, 1079 size_t inlen, efx_dword_t *outbuf, 1080 size_t outlen, size_t *outlen_actual) 1081 { 1082 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, 1083 outlen_actual, true, NULL, NULL); 1084 } 1085 1086 void efx_siena_mcdi_display_error(struct efx_nic *efx, unsigned int cmd, 1087 size_t inlen, efx_dword_t *outbuf, 1088 size_t outlen, int rc) 1089 { 1090 int code = 0, err_arg = 0; 1091 1092 if (outlen >= MC_CMD_ERR_CODE_OFST + 4) 1093 code = MCDI_DWORD(outbuf, ERR_CODE); 1094 if (outlen >= MC_CMD_ERR_ARG_OFST + 4) 1095 err_arg = MCDI_DWORD(outbuf, ERR_ARG); 1096 netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err, 1097 "MC command 0x%x inlen %zu failed rc=%d (raw=%d) arg=%d\n", 1098 cmd, inlen, rc, code, err_arg); 1099 } 1100 1101 /* Switch to polled MCDI completions. This can be called in various 1102 * error conditions with various locks held, so it must be lockless. 1103 * Caller is responsible for flushing asynchronous requests later. 1104 */ 1105 void efx_siena_mcdi_mode_poll(struct efx_nic *efx) 1106 { 1107 struct efx_mcdi_iface *mcdi; 1108 1109 if (!efx->mcdi) 1110 return; 1111 1112 mcdi = efx_mcdi(efx); 1113 /* If already in polling mode, nothing to do. 1114 * If in fail-fast state, don't switch to polled completion. 1115 * FLR recovery will do that later. 1116 */ 1117 if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL) 1118 return; 1119 1120 /* We can switch from event completion to polled completion, because 1121 * mcdi requests are always completed in shared memory. We do this by 1122 * switching the mode to POLL'd then completing the request. 1123 * efx_mcdi_await_completion() will then call efx_mcdi_poll(). 1124 * 1125 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(), 1126 * which efx_mcdi_complete_sync() provides for us. 1127 */ 1128 mcdi->mode = MCDI_MODE_POLL; 1129 1130 efx_mcdi_complete_sync(mcdi); 1131 } 1132 1133 /* Flush any running or queued asynchronous requests, after event processing 1134 * is stopped 1135 */ 1136 void efx_siena_mcdi_flush_async(struct efx_nic *efx) 1137 { 1138 struct efx_mcdi_async_param *async, *next; 1139 struct efx_mcdi_iface *mcdi; 1140 1141 if (!efx->mcdi) 1142 return; 1143 1144 mcdi = efx_mcdi(efx); 1145 1146 /* We must be in poll or fail mode so no more requests can be queued */ 1147 BUG_ON(mcdi->mode == MCDI_MODE_EVENTS); 1148 1149 timer_delete_sync(&mcdi->async_timer); 1150 1151 /* If a request is still running, make sure we give the MC 1152 * time to complete it so that the response won't overwrite our 1153 * next request. 1154 */ 1155 if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) { 1156 efx_mcdi_poll(efx); 1157 mcdi->state = MCDI_STATE_QUIESCENT; 1158 } 1159 1160 /* Nothing else will access the async list now, so it is safe 1161 * to walk it without holding async_lock. If we hold it while 1162 * calling a completer then lockdep may warn that we have 1163 * acquired locks in the wrong order. 1164 */ 1165 list_for_each_entry_safe(async, next, &mcdi->async_list, list) { 1166 if (async->complete) 1167 async->complete(efx, async->cookie, -ENETDOWN, NULL, 0); 1168 list_del(&async->list); 1169 kfree(async); 1170 } 1171 } 1172 1173 void efx_siena_mcdi_mode_event(struct efx_nic *efx) 1174 { 1175 struct efx_mcdi_iface *mcdi; 1176 1177 if (!efx->mcdi) 1178 return; 1179 1180 mcdi = efx_mcdi(efx); 1181 /* If already in event completion mode, nothing to do. 1182 * If in fail-fast state, don't switch to event completion. FLR 1183 * recovery will do that later. 1184 */ 1185 if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL) 1186 return; 1187 1188 /* We can't switch from polled to event completion in the middle of a 1189 * request, because the completion method is specified in the request. 1190 * So acquire the interface to serialise the requestors. We don't need 1191 * to acquire the iface_lock to change the mode here, but we do need a 1192 * write memory barrier ensure that efx_siena_mcdi_rpc() sees it, which 1193 * efx_mcdi_acquire() provides. 1194 */ 1195 efx_mcdi_acquire_sync(mcdi); 1196 mcdi->mode = MCDI_MODE_EVENTS; 1197 efx_mcdi_release(mcdi); 1198 } 1199 1200 static void efx_mcdi_ev_death(struct efx_nic *efx, int rc) 1201 { 1202 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 1203 1204 /* If there is an outstanding MCDI request, it has been terminated 1205 * either by a BADASSERT or REBOOT event. If the mcdi interface is 1206 * in polled mode, then do nothing because the MC reboot handler will 1207 * set the header correctly. However, if the mcdi interface is waiting 1208 * for a CMDDONE event it won't receive it [and since all MCDI events 1209 * are sent to the same queue, we can't be racing with 1210 * efx_mcdi_ev_cpl()] 1211 * 1212 * If there is an outstanding asynchronous request, we can't 1213 * complete it now (efx_mcdi_complete() would deadlock). The 1214 * reset process will take care of this. 1215 * 1216 * There's a race here with efx_mcdi_send_request(), because 1217 * we might receive a REBOOT event *before* the request has 1218 * been copied out. In polled mode (during startup) this is 1219 * irrelevant, because efx_mcdi_complete_sync() is ignored. In 1220 * event mode, this condition is just an edge-case of 1221 * receiving a REBOOT event after posting the MCDI 1222 * request. Did the mc reboot before or after the copyout? The 1223 * best we can do always is just return failure. 1224 * 1225 * If there is an outstanding proxy response expected it is not going 1226 * to arrive. We should thus abort it. 1227 */ 1228 spin_lock(&mcdi->iface_lock); 1229 efx_mcdi_proxy_abort(mcdi); 1230 1231 if (efx_mcdi_complete_sync(mcdi)) { 1232 if (mcdi->mode == MCDI_MODE_EVENTS) { 1233 mcdi->resprc = rc; 1234 mcdi->resp_hdr_len = 0; 1235 mcdi->resp_data_len = 0; 1236 ++mcdi->credits; 1237 } 1238 } else { 1239 int count; 1240 1241 /* Consume the status word since efx_siena_mcdi_rpc_finish() won't */ 1242 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) { 1243 rc = efx_siena_mcdi_poll_reboot(efx); 1244 if (rc) 1245 break; 1246 udelay(MCDI_STATUS_DELAY_US); 1247 } 1248 1249 /* On EF10, a CODE_MC_REBOOT event can be received without the 1250 * reboot detection in efx_siena_mcdi_poll_reboot() being triggered. 1251 * If zero was returned from the final call to 1252 * efx_siena_mcdi_poll_reboot(), the MC reboot wasn't noticed but the 1253 * MC has definitely rebooted so prepare for the reset. 1254 */ 1255 if (!rc && efx->type->mcdi_reboot_detected) 1256 efx->type->mcdi_reboot_detected(efx); 1257 1258 mcdi->new_epoch = true; 1259 1260 /* Nobody was waiting for an MCDI request, so trigger a reset */ 1261 efx_siena_schedule_reset(efx, RESET_TYPE_MC_FAILURE); 1262 } 1263 1264 spin_unlock(&mcdi->iface_lock); 1265 } 1266 1267 /* The MC is going down in to BIST mode. set the BIST flag to block 1268 * new MCDI, cancel any outstanding MCDI and schedule a BIST-type reset 1269 * (which doesn't actually execute a reset, it waits for the controlling 1270 * function to reset it). 1271 */ 1272 static void efx_mcdi_ev_bist(struct efx_nic *efx) 1273 { 1274 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 1275 1276 spin_lock(&mcdi->iface_lock); 1277 efx->mc_bist_for_other_fn = true; 1278 efx_mcdi_proxy_abort(mcdi); 1279 1280 if (efx_mcdi_complete_sync(mcdi)) { 1281 if (mcdi->mode == MCDI_MODE_EVENTS) { 1282 mcdi->resprc = -EIO; 1283 mcdi->resp_hdr_len = 0; 1284 mcdi->resp_data_len = 0; 1285 ++mcdi->credits; 1286 } 1287 } 1288 mcdi->new_epoch = true; 1289 efx_siena_schedule_reset(efx, RESET_TYPE_MC_BIST); 1290 spin_unlock(&mcdi->iface_lock); 1291 } 1292 1293 /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try 1294 * to recover. 1295 */ 1296 static void efx_mcdi_abandon(struct efx_nic *efx) 1297 { 1298 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 1299 1300 if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL) 1301 return; /* it had already been done */ 1302 netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n"); 1303 efx_siena_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT); 1304 } 1305 1306 static void efx_handle_drain_event(struct efx_nic *efx) 1307 { 1308 if (atomic_dec_and_test(&efx->active_queues)) 1309 wake_up(&efx->flush_wq); 1310 1311 WARN_ON(atomic_read(&efx->active_queues) < 0); 1312 } 1313 1314 /* Called from efx_farch_ev_process and efx_ef10_ev_process for MCDI events */ 1315 void efx_siena_mcdi_process_event(struct efx_channel *channel, 1316 efx_qword_t *event) 1317 { 1318 struct efx_nic *efx = channel->efx; 1319 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE); 1320 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA); 1321 1322 switch (code) { 1323 case MCDI_EVENT_CODE_BADSSERT: 1324 netif_err(efx, hw, efx->net_dev, 1325 "MC watchdog or assertion failure at 0x%x\n", data); 1326 efx_mcdi_ev_death(efx, -EINTR); 1327 break; 1328 1329 case MCDI_EVENT_CODE_PMNOTICE: 1330 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n"); 1331 break; 1332 1333 case MCDI_EVENT_CODE_CMDDONE: 1334 efx_mcdi_ev_cpl(efx, 1335 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ), 1336 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN), 1337 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO)); 1338 break; 1339 1340 case MCDI_EVENT_CODE_LINKCHANGE: 1341 efx_siena_mcdi_process_link_change(efx, event); 1342 break; 1343 case MCDI_EVENT_CODE_SENSOREVT: 1344 efx_sensor_event(efx, event); 1345 break; 1346 case MCDI_EVENT_CODE_SCHEDERR: 1347 netif_dbg(efx, hw, efx->net_dev, 1348 "MC Scheduler alert (0x%x)\n", data); 1349 break; 1350 case MCDI_EVENT_CODE_REBOOT: 1351 case MCDI_EVENT_CODE_MC_REBOOT: 1352 netif_info(efx, hw, efx->net_dev, "MC Reboot\n"); 1353 efx_mcdi_ev_death(efx, -EIO); 1354 break; 1355 case MCDI_EVENT_CODE_MC_BIST: 1356 netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n"); 1357 efx_mcdi_ev_bist(efx); 1358 break; 1359 case MCDI_EVENT_CODE_MAC_STATS_DMA: 1360 /* MAC stats are gather lazily. We can ignore this. */ 1361 break; 1362 case MCDI_EVENT_CODE_FLR: 1363 if (efx->type->sriov_flr) 1364 efx->type->sriov_flr(efx, 1365 MCDI_EVENT_FIELD(*event, FLR_VF)); 1366 break; 1367 case MCDI_EVENT_CODE_PTP_RX: 1368 case MCDI_EVENT_CODE_PTP_FAULT: 1369 case MCDI_EVENT_CODE_PTP_PPS: 1370 efx_siena_ptp_event(efx, event); 1371 break; 1372 case MCDI_EVENT_CODE_PTP_TIME: 1373 efx_siena_time_sync_event(channel, event); 1374 break; 1375 case MCDI_EVENT_CODE_TX_FLUSH: 1376 case MCDI_EVENT_CODE_RX_FLUSH: 1377 /* Two flush events will be sent: one to the same event 1378 * queue as completions, and one to event queue 0. 1379 * In the latter case the {RX,TX}_FLUSH_TO_DRIVER 1380 * flag will be set, and we should ignore the event 1381 * because we want to wait for all completions. 1382 */ 1383 BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN != 1384 MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN); 1385 if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER)) 1386 efx_handle_drain_event(efx); 1387 break; 1388 case MCDI_EVENT_CODE_TX_ERR: 1389 case MCDI_EVENT_CODE_RX_ERR: 1390 netif_err(efx, hw, efx->net_dev, 1391 "%s DMA error (event: "EFX_QWORD_FMT")\n", 1392 code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX", 1393 EFX_QWORD_VAL(*event)); 1394 efx_siena_schedule_reset(efx, RESET_TYPE_DMA_ERROR); 1395 break; 1396 case MCDI_EVENT_CODE_PROXY_RESPONSE: 1397 efx_mcdi_ev_proxy_response(efx, 1398 MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_HANDLE), 1399 MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_RC)); 1400 break; 1401 default: 1402 netif_err(efx, hw, efx->net_dev, 1403 "Unknown MCDI event " EFX_QWORD_FMT "\n", 1404 EFX_QWORD_VAL(*event)); 1405 } 1406 } 1407 1408 /************************************************************************** 1409 * 1410 * Specific request functions 1411 * 1412 ************************************************************************** 1413 */ 1414 1415 void efx_siena_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len) 1416 { 1417 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN); 1418 size_t outlength; 1419 const __le16 *ver_words; 1420 size_t offset; 1421 int rc; 1422 1423 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0); 1424 rc = efx_siena_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0, 1425 outbuf, sizeof(outbuf), &outlength); 1426 if (rc) 1427 goto fail; 1428 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) { 1429 rc = -EIO; 1430 goto fail; 1431 } 1432 1433 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION); 1434 offset = scnprintf(buf, len, "%u.%u.%u.%u", 1435 le16_to_cpu(ver_words[0]), 1436 le16_to_cpu(ver_words[1]), 1437 le16_to_cpu(ver_words[2]), 1438 le16_to_cpu(ver_words[3])); 1439 1440 if (efx->type->print_additional_fwver) 1441 offset += efx->type->print_additional_fwver(efx, buf + offset, 1442 len - offset); 1443 1444 /* It's theoretically possible for the string to exceed 31 1445 * characters, though in practice the first three version 1446 * components are short enough that this doesn't happen. 1447 */ 1448 if (WARN_ON(offset >= len)) 1449 buf[0] = 0; 1450 1451 return; 1452 1453 fail: 1454 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1455 buf[0] = 0; 1456 } 1457 1458 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, 1459 bool *was_attached) 1460 { 1461 MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN); 1462 MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN); 1463 size_t outlen; 1464 int rc; 1465 1466 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE, 1467 driver_operating ? 1 : 0); 1468 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1); 1469 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY); 1470 1471 rc = efx_siena_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, 1472 sizeof(inbuf), outbuf, sizeof(outbuf), 1473 &outlen); 1474 /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID 1475 * specified will fail with EPERM, and we have to tell the MC we don't 1476 * care what firmware we get. 1477 */ 1478 if (rc == -EPERM) { 1479 netif_dbg(efx, probe, efx->net_dev, 1480 "efx_mcdi_drv_attach with fw-variant setting failed EPERM, trying without it\n"); 1481 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, 1482 MC_CMD_FW_DONT_CARE); 1483 rc = efx_siena_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, 1484 sizeof(inbuf), outbuf, 1485 sizeof(outbuf), &outlen); 1486 } 1487 if (rc) { 1488 efx_siena_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, 1489 sizeof(inbuf), outbuf, outlen, rc); 1490 goto fail; 1491 } 1492 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) { 1493 rc = -EIO; 1494 goto fail; 1495 } 1496 1497 if (driver_operating) { 1498 if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) { 1499 efx->mcdi->fn_flags = 1500 MCDI_DWORD(outbuf, 1501 DRV_ATTACH_EXT_OUT_FUNC_FLAGS); 1502 } else { 1503 /* Synthesise flags for Siena */ 1504 efx->mcdi->fn_flags = 1505 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL | 1506 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED | 1507 (efx_port_num(efx) == 0) << 1508 MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY; 1509 } 1510 } 1511 1512 /* We currently assume we have control of the external link 1513 * and are completely trusted by firmware. Abort probing 1514 * if that's not true for this function. 1515 */ 1516 1517 if (was_attached != NULL) 1518 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE); 1519 return 0; 1520 1521 fail: 1522 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1523 return rc; 1524 } 1525 1526 int efx_siena_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address, 1527 u16 *fw_subtype_list, u32 *capabilities) 1528 { 1529 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX); 1530 size_t outlen, i; 1531 int port_num = efx_port_num(efx); 1532 int rc; 1533 1534 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0); 1535 /* we need __aligned(2) for ether_addr_copy */ 1536 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1); 1537 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1); 1538 1539 rc = efx_siena_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0, 1540 outbuf, sizeof(outbuf), &outlen); 1541 if (rc) 1542 goto fail; 1543 1544 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { 1545 rc = -EIO; 1546 goto fail; 1547 } 1548 1549 if (mac_address) 1550 ether_addr_copy(mac_address, 1551 port_num ? 1552 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) : 1553 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0)); 1554 if (fw_subtype_list) { 1555 for (i = 0; 1556 i < MCDI_VAR_ARRAY_LEN(outlen, 1557 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST); 1558 i++) 1559 fw_subtype_list[i] = MCDI_ARRAY_WORD( 1560 outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i); 1561 for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++) 1562 fw_subtype_list[i] = 0; 1563 } 1564 if (capabilities) { 1565 if (port_num) 1566 *capabilities = MCDI_DWORD(outbuf, 1567 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1); 1568 else 1569 *capabilities = MCDI_DWORD(outbuf, 1570 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0); 1571 } 1572 1573 return 0; 1574 1575 fail: 1576 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n", 1577 __func__, rc, (int)outlen); 1578 1579 return rc; 1580 } 1581 1582 int efx_siena_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, 1583 u32 dest_evq) 1584 { 1585 MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN); 1586 u32 dest = 0; 1587 int rc; 1588 1589 if (uart) 1590 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART; 1591 if (evq) 1592 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ; 1593 1594 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest); 1595 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq); 1596 1597 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0); 1598 1599 rc = efx_siena_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf), 1600 NULL, 0, NULL); 1601 return rc; 1602 } 1603 1604 int efx_siena_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out) 1605 { 1606 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN); 1607 size_t outlen; 1608 int rc; 1609 1610 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0); 1611 1612 rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0, 1613 outbuf, sizeof(outbuf), &outlen); 1614 if (rc) 1615 goto fail; 1616 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) { 1617 rc = -EIO; 1618 goto fail; 1619 } 1620 1621 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES); 1622 return 0; 1623 1624 fail: 1625 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", 1626 __func__, rc); 1627 return rc; 1628 } 1629 1630 int efx_siena_mcdi_nvram_info(struct efx_nic *efx, unsigned int type, 1631 size_t *size_out, size_t *erase_size_out, 1632 bool *protected_out) 1633 { 1634 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN); 1635 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN); 1636 size_t outlen; 1637 int rc; 1638 1639 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type); 1640 1641 rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf), 1642 outbuf, sizeof(outbuf), &outlen); 1643 if (rc) 1644 goto fail; 1645 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) { 1646 rc = -EIO; 1647 goto fail; 1648 } 1649 1650 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE); 1651 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE); 1652 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) & 1653 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN)); 1654 return 0; 1655 1656 fail: 1657 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1658 return rc; 1659 } 1660 1661 static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type) 1662 { 1663 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN); 1664 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN); 1665 int rc; 1666 1667 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type); 1668 1669 rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf), 1670 outbuf, sizeof(outbuf), NULL); 1671 if (rc) 1672 return rc; 1673 1674 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) { 1675 case MC_CMD_NVRAM_TEST_PASS: 1676 case MC_CMD_NVRAM_TEST_NOTSUPP: 1677 return 0; 1678 default: 1679 return -EIO; 1680 } 1681 } 1682 1683 int efx_siena_mcdi_nvram_test_all(struct efx_nic *efx) 1684 { 1685 u32 nvram_types; 1686 unsigned int type; 1687 int rc; 1688 1689 rc = efx_siena_mcdi_nvram_types(efx, &nvram_types); 1690 if (rc) 1691 goto fail1; 1692 1693 type = 0; 1694 while (nvram_types != 0) { 1695 if (nvram_types & 1) { 1696 rc = efx_mcdi_nvram_test(efx, type); 1697 if (rc) 1698 goto fail2; 1699 } 1700 type++; 1701 nvram_types >>= 1; 1702 } 1703 1704 return 0; 1705 1706 fail2: 1707 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n", 1708 __func__, type); 1709 fail1: 1710 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1711 return rc; 1712 } 1713 1714 /* Returns 1 if an assertion was read, 0 if no assertion had fired, 1715 * negative on error. 1716 */ 1717 static int efx_mcdi_read_assertion(struct efx_nic *efx) 1718 { 1719 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN); 1720 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN); 1721 unsigned int flags, index; 1722 const char *reason; 1723 size_t outlen; 1724 int retry; 1725 int rc; 1726 1727 /* Attempt to read any stored assertion state before we reboot 1728 * the mcfw out of the assertion handler. Retry twice, once 1729 * because a boot-time assertion might cause this command to fail 1730 * with EINTR. And once again because GET_ASSERTS can race with 1731 * MC_CMD_REBOOT running on the other port. */ 1732 retry = 2; 1733 do { 1734 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1); 1735 rc = efx_siena_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS, 1736 inbuf, MC_CMD_GET_ASSERTS_IN_LEN, 1737 outbuf, sizeof(outbuf), &outlen); 1738 if (rc == -EPERM) 1739 return 0; 1740 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0); 1741 1742 if (rc) { 1743 efx_siena_mcdi_display_error(efx, MC_CMD_GET_ASSERTS, 1744 MC_CMD_GET_ASSERTS_IN_LEN, outbuf, 1745 outlen, rc); 1746 return rc; 1747 } 1748 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN) 1749 return -EIO; 1750 1751 /* Print out any recorded assertion state */ 1752 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS); 1753 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS) 1754 return 0; 1755 1756 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL) 1757 ? "system-level assertion" 1758 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL) 1759 ? "thread-level assertion" 1760 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED) 1761 ? "watchdog reset" 1762 : "unknown assertion"; 1763 netif_err(efx, hw, efx->net_dev, 1764 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason, 1765 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS), 1766 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS)); 1767 1768 /* Print out the registers */ 1769 for (index = 0; 1770 index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM; 1771 index++) 1772 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", 1773 1 + index, 1774 MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS, 1775 index)); 1776 1777 return 1; 1778 } 1779 1780 static int efx_mcdi_exit_assertion(struct efx_nic *efx) 1781 { 1782 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); 1783 int rc; 1784 1785 /* If the MC is running debug firmware, it might now be 1786 * waiting for a debugger to attach, but we just want it to 1787 * reboot. We set a flag that makes the command a no-op if it 1788 * has already done so. 1789 * The MCDI will thus return either 0 or -EIO. 1790 */ 1791 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); 1792 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 1793 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION); 1794 rc = efx_siena_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, 1795 MC_CMD_REBOOT_IN_LEN, NULL, 0, NULL); 1796 if (rc == -EIO) 1797 rc = 0; 1798 if (rc) 1799 efx_siena_mcdi_display_error(efx, MC_CMD_REBOOT, 1800 MC_CMD_REBOOT_IN_LEN, NULL, 0, rc); 1801 return rc; 1802 } 1803 1804 int efx_siena_mcdi_handle_assertion(struct efx_nic *efx) 1805 { 1806 int rc; 1807 1808 rc = efx_mcdi_read_assertion(efx); 1809 if (rc <= 0) 1810 return rc; 1811 1812 return efx_mcdi_exit_assertion(efx); 1813 } 1814 1815 int efx_siena_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode) 1816 { 1817 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN); 1818 1819 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF); 1820 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON); 1821 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT); 1822 1823 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0); 1824 1825 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode); 1826 1827 return efx_siena_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf), 1828 NULL, 0, NULL); 1829 } 1830 1831 static int efx_mcdi_reset_func(struct efx_nic *efx) 1832 { 1833 MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN); 1834 int rc; 1835 1836 BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0); 1837 MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG, 1838 ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1); 1839 rc = efx_siena_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf), 1840 NULL, 0, NULL); 1841 return rc; 1842 } 1843 1844 static int efx_mcdi_reset_mc(struct efx_nic *efx) 1845 { 1846 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); 1847 int rc; 1848 1849 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); 1850 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0); 1851 rc = efx_siena_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf), 1852 NULL, 0, NULL); 1853 /* White is black, and up is down */ 1854 if (rc == -EIO) 1855 return 0; 1856 if (rc == 0) 1857 rc = -EIO; 1858 return rc; 1859 } 1860 1861 enum reset_type efx_siena_mcdi_map_reset_reason(enum reset_type reason) 1862 { 1863 return RESET_TYPE_RECOVER_OR_ALL; 1864 } 1865 1866 int efx_siena_mcdi_reset(struct efx_nic *efx, enum reset_type method) 1867 { 1868 int rc; 1869 1870 /* If MCDI is down, we can't handle_assertion */ 1871 if (method == RESET_TYPE_MCDI_TIMEOUT) { 1872 rc = pci_reset_function(efx->pci_dev); 1873 if (rc) 1874 return rc; 1875 /* Re-enable polled MCDI completion */ 1876 if (efx->mcdi) { 1877 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 1878 mcdi->mode = MCDI_MODE_POLL; 1879 } 1880 return 0; 1881 } 1882 1883 /* Recover from a failed assertion pre-reset */ 1884 rc = efx_siena_mcdi_handle_assertion(efx); 1885 if (rc) 1886 return rc; 1887 1888 if (method == RESET_TYPE_DATAPATH) 1889 return 0; 1890 else if (method == RESET_TYPE_WORLD) 1891 return efx_mcdi_reset_mc(efx); 1892 else 1893 return efx_mcdi_reset_func(efx); 1894 } 1895 1896 static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type, 1897 const u8 *mac, int *id_out) 1898 { 1899 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN); 1900 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN); 1901 size_t outlen; 1902 int rc; 1903 1904 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type); 1905 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE, 1906 MC_CMD_FILTER_MODE_SIMPLE); 1907 ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac); 1908 1909 rc = efx_siena_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, 1910 sizeof(inbuf), outbuf, sizeof(outbuf), &outlen); 1911 if (rc) 1912 goto fail; 1913 1914 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) { 1915 rc = -EIO; 1916 goto fail; 1917 } 1918 1919 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID); 1920 1921 return 0; 1922 1923 fail: 1924 *id_out = -1; 1925 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1926 return rc; 1927 1928 } 1929 1930 1931 int efx_siena_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, 1932 int *id_out) 1933 { 1934 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out); 1935 } 1936 1937 1938 int efx_siena_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out) 1939 { 1940 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN); 1941 size_t outlen; 1942 int rc; 1943 1944 rc = efx_siena_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0, 1945 outbuf, sizeof(outbuf), &outlen); 1946 if (rc) 1947 goto fail; 1948 1949 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) { 1950 rc = -EIO; 1951 goto fail; 1952 } 1953 1954 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID); 1955 1956 return 0; 1957 1958 fail: 1959 *id_out = -1; 1960 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1961 return rc; 1962 } 1963 1964 1965 int efx_siena_mcdi_wol_filter_remove(struct efx_nic *efx, int id) 1966 { 1967 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN); 1968 int rc; 1969 1970 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id); 1971 1972 rc = efx_siena_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, 1973 sizeof(inbuf), NULL, 0, NULL); 1974 return rc; 1975 } 1976 1977 int efx_siena_mcdi_flush_rxqs(struct efx_nic *efx) 1978 { 1979 struct efx_channel *channel; 1980 struct efx_rx_queue *rx_queue; 1981 MCDI_DECLARE_BUF(inbuf, 1982 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); 1983 int rc, count; 1984 1985 BUILD_BUG_ON(EFX_MAX_CHANNELS > 1986 MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM); 1987 1988 count = 0; 1989 efx_for_each_channel(channel, efx) { 1990 efx_for_each_channel_rx_queue(rx_queue, channel) { 1991 if (rx_queue->flush_pending) { 1992 rx_queue->flush_pending = false; 1993 atomic_dec(&efx->rxq_flush_pending); 1994 MCDI_SET_ARRAY_DWORD( 1995 inbuf, FLUSH_RX_QUEUES_IN_QID_OFST, 1996 count, efx_rx_queue_index(rx_queue)); 1997 count++; 1998 } 1999 } 2000 } 2001 2002 rc = efx_siena_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf, 2003 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), 2004 NULL, 0, NULL); 2005 WARN_ON(rc < 0); 2006 2007 return rc; 2008 } 2009 2010 int efx_siena_mcdi_wol_filter_reset(struct efx_nic *efx) 2011 { 2012 int rc; 2013 2014 rc = efx_siena_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, 2015 NULL, 0, NULL); 2016 return rc; 2017 } 2018 2019 #ifdef CONFIG_SFC_SIENA_MTD 2020 2021 #define EFX_MCDI_NVRAM_LEN_MAX 128 2022 2023 static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type) 2024 { 2025 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_V2_IN_LEN); 2026 int rc; 2027 2028 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type); 2029 MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_START_V2_IN_FLAGS, 2030 NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT, 2031 1); 2032 2033 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0); 2034 2035 rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, 2036 sizeof(inbuf), NULL, 0, NULL); 2037 2038 return rc; 2039 } 2040 2041 static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type, 2042 loff_t offset, u8 *buffer, size_t length) 2043 { 2044 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_V2_LEN); 2045 MCDI_DECLARE_BUF(outbuf, 2046 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)); 2047 size_t outlen; 2048 int rc; 2049 2050 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type); 2051 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset); 2052 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length); 2053 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_V2_MODE, 2054 MC_CMD_NVRAM_READ_IN_V2_DEFAULT); 2055 2056 rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf), 2057 outbuf, sizeof(outbuf), &outlen); 2058 if (rc) 2059 return rc; 2060 2061 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length); 2062 return 0; 2063 } 2064 2065 static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type, 2066 loff_t offset, const u8 *buffer, size_t length) 2067 { 2068 MCDI_DECLARE_BUF(inbuf, 2069 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)); 2070 int rc; 2071 2072 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type); 2073 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset); 2074 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length); 2075 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length); 2076 2077 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0); 2078 2079 rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, 2080 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4), 2081 NULL, 0, NULL); 2082 return rc; 2083 } 2084 2085 static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type, 2086 loff_t offset, size_t length) 2087 { 2088 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN); 2089 int rc; 2090 2091 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type); 2092 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset); 2093 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length); 2094 2095 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0); 2096 2097 rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf), 2098 NULL, 0, NULL); 2099 return rc; 2100 } 2101 2102 static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type) 2103 { 2104 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_LEN); 2105 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN); 2106 size_t outlen; 2107 int rc, rc2; 2108 2109 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type); 2110 /* Always set this flag. Old firmware ignores it */ 2111 MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_FINISH_V2_IN_FLAGS, 2112 NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT, 2113 1); 2114 2115 rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, 2116 sizeof(inbuf), outbuf, sizeof(outbuf), &outlen); 2117 if (!rc && outlen >= MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN) { 2118 rc2 = MCDI_DWORD(outbuf, NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE); 2119 if (rc2 != MC_CMD_NVRAM_VERIFY_RC_SUCCESS) 2120 netif_err(efx, drv, efx->net_dev, 2121 "NVRAM update failed verification with code 0x%x\n", 2122 rc2); 2123 switch (rc2) { 2124 case MC_CMD_NVRAM_VERIFY_RC_SUCCESS: 2125 break; 2126 case MC_CMD_NVRAM_VERIFY_RC_CMS_CHECK_FAILED: 2127 case MC_CMD_NVRAM_VERIFY_RC_MESSAGE_DIGEST_CHECK_FAILED: 2128 case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHECK_FAILED: 2129 case MC_CMD_NVRAM_VERIFY_RC_TRUSTED_APPROVERS_CHECK_FAILED: 2130 case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHAIN_CHECK_FAILED: 2131 rc = -EIO; 2132 break; 2133 case MC_CMD_NVRAM_VERIFY_RC_INVALID_CMS_FORMAT: 2134 case MC_CMD_NVRAM_VERIFY_RC_BAD_MESSAGE_DIGEST: 2135 rc = -EINVAL; 2136 break; 2137 case MC_CMD_NVRAM_VERIFY_RC_NO_VALID_SIGNATURES: 2138 case MC_CMD_NVRAM_VERIFY_RC_NO_TRUSTED_APPROVERS: 2139 case MC_CMD_NVRAM_VERIFY_RC_NO_SIGNATURE_MATCH: 2140 rc = -EPERM; 2141 break; 2142 default: 2143 netif_err(efx, drv, efx->net_dev, 2144 "Unknown response to NVRAM_UPDATE_FINISH\n"); 2145 rc = -EIO; 2146 } 2147 } 2148 2149 return rc; 2150 } 2151 2152 int efx_siena_mcdi_mtd_read(struct mtd_info *mtd, loff_t start, 2153 size_t len, size_t *retlen, u8 *buffer) 2154 { 2155 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); 2156 struct efx_nic *efx = mtd->priv; 2157 loff_t offset = start; 2158 loff_t end = min_t(loff_t, start + len, mtd->size); 2159 size_t chunk; 2160 int rc = 0; 2161 2162 while (offset < end) { 2163 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); 2164 rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset, 2165 buffer, chunk); 2166 if (rc) 2167 goto out; 2168 offset += chunk; 2169 buffer += chunk; 2170 } 2171 out: 2172 *retlen = offset - start; 2173 return rc; 2174 } 2175 2176 int efx_siena_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len) 2177 { 2178 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); 2179 struct efx_nic *efx = mtd->priv; 2180 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1)); 2181 loff_t end = min_t(loff_t, start + len, mtd->size); 2182 size_t chunk = part->common.mtd.erasesize; 2183 int rc = 0; 2184 2185 if (!part->updating) { 2186 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); 2187 if (rc) 2188 goto out; 2189 part->updating = true; 2190 } 2191 2192 /* The MCDI interface can in fact do multiple erase blocks at once; 2193 * but erasing may be slow, so we make multiple calls here to avoid 2194 * tripping the MCDI RPC timeout. */ 2195 while (offset < end) { 2196 rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset, 2197 chunk); 2198 if (rc) 2199 goto out; 2200 offset += chunk; 2201 } 2202 out: 2203 return rc; 2204 } 2205 2206 int efx_siena_mcdi_mtd_write(struct mtd_info *mtd, loff_t start, 2207 size_t len, size_t *retlen, const u8 *buffer) 2208 { 2209 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); 2210 struct efx_nic *efx = mtd->priv; 2211 loff_t offset = start; 2212 loff_t end = min_t(loff_t, start + len, mtd->size); 2213 size_t chunk; 2214 int rc = 0; 2215 2216 if (!part->updating) { 2217 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); 2218 if (rc) 2219 goto out; 2220 part->updating = true; 2221 } 2222 2223 while (offset < end) { 2224 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); 2225 rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset, 2226 buffer, chunk); 2227 if (rc) 2228 goto out; 2229 offset += chunk; 2230 buffer += chunk; 2231 } 2232 out: 2233 *retlen = offset - start; 2234 return rc; 2235 } 2236 2237 int efx_siena_mcdi_mtd_sync(struct mtd_info *mtd) 2238 { 2239 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); 2240 struct efx_nic *efx = mtd->priv; 2241 int rc = 0; 2242 2243 if (part->updating) { 2244 part->updating = false; 2245 rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type); 2246 } 2247 2248 return rc; 2249 } 2250 2251 void efx_siena_mcdi_mtd_rename(struct efx_mtd_partition *part) 2252 { 2253 struct efx_mcdi_mtd_partition *mcdi_part = 2254 container_of(part, struct efx_mcdi_mtd_partition, common); 2255 struct efx_nic *efx = part->mtd.priv; 2256 2257 snprintf(part->name, sizeof(part->name), "%s %s:%02x", 2258 efx->name, part->type_name, mcdi_part->fw_subtype); 2259 } 2260 2261 #endif /* CONFIG_SFC_SIENA_MTD */ 2262