xref: /linux/arch/riscv/include/asm/thread_info.h (revision 69050f8d6d075dc01af7a5f2f550a8067510366f)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2009 Chen Liqin <liqin.chen@sunplusct.com>
4  * Copyright (C) 2012 Regents of the University of California
5  * Copyright (C) 2017 SiFive
6  */
7 
8 #ifndef _ASM_RISCV_THREAD_INFO_H
9 #define _ASM_RISCV_THREAD_INFO_H
10 
11 #include <asm/page.h>
12 #include <linux/const.h>
13 #include <linux/sizes.h>
14 
15 /* thread information allocation */
16 #ifdef CONFIG_KASAN
17 #define KASAN_STACK_ORDER	1
18 #else
19 #define KASAN_STACK_ORDER	0
20 #endif
21 #define THREAD_SIZE_ORDER	(CONFIG_THREAD_SIZE_ORDER + KASAN_STACK_ORDER)
22 #define THREAD_SIZE		(PAGE_SIZE << THREAD_SIZE_ORDER)
23 
24 /*
25  * By aligning VMAP'd stacks to 2 * THREAD_SIZE, we can detect overflow by
26  * checking sp & (1 << THREAD_SHIFT), which we can do cheaply in the entry
27  * assembly.
28  */
29 #ifdef CONFIG_VMAP_STACK
30 #define THREAD_ALIGN            (2 * THREAD_SIZE)
31 #else
32 #define THREAD_ALIGN            THREAD_SIZE
33 #endif
34 
35 #define THREAD_SHIFT            (PAGE_SHIFT + THREAD_SIZE_ORDER)
36 #define OVERFLOW_STACK_SIZE     SZ_4K
37 
38 #define IRQ_STACK_SIZE		THREAD_SIZE
39 
40 #ifndef __ASSEMBLER__
41 
42 #include <asm/processor.h>
43 #include <asm/csr.h>
44 
45 /*
46  * low level task data that entry.S needs immediate access to
47  * - this struct should fit entirely inside of one cache line
48  * - if the members of this struct changes, the assembly constants
49  *   in asm-offsets.c must be updated accordingly
50  * - thread_info is included in task_struct at an offset of 0.  This means that
51  *   tp points to both thread_info and task_struct.
52  */
53 struct thread_info {
54 	unsigned long		flags;		/* low level flags */
55 	int                     preempt_count;  /* 0=>preemptible, <0=>BUG */
56 	/*
57 	 * These stack pointers are overwritten on every system call or
58 	 * exception.  SP is also saved to the stack it can be recovered when
59 	 * overwritten.
60 	 */
61 	long			kernel_sp;	/* Kernel stack pointer */
62 	long			user_sp;	/* User stack pointer */
63 	int			cpu;
64 	unsigned long		syscall_work;	/* SYSCALL_WORK_ flags */
65 #ifdef CONFIG_SHADOW_CALL_STACK
66 	void			*scs_base;
67 	void			*scs_sp;
68 #endif
69 #ifdef CONFIG_64BIT
70 	/*
71 	 * Used in handle_exception() to save a0, a1 and a2 before knowing if we
72 	 * can access the kernel stack.
73 	 */
74 	unsigned long		a0, a1, a2;
75 #endif
76 #ifdef CONFIG_RISCV_USER_CFI
77 	struct cfi_state	user_cfi_state;
78 #endif
79 };
80 
81 #ifdef CONFIG_SHADOW_CALL_STACK
82 #define INIT_SCS							\
83 	.scs_base	= init_shadow_call_stack,			\
84 	.scs_sp		= init_shadow_call_stack,
85 #else
86 #define INIT_SCS
87 #endif
88 
89 /*
90  * macros/functions for gaining access to the thread information structure
91  *
92  * preempt_count needs to be 1 initially, until the scheduler is functional.
93  */
94 #define INIT_THREAD_INFO(tsk)			\
95 {						\
96 	.flags		= 0,			\
97 	.preempt_count	= INIT_PREEMPT_COUNT,	\
98 	INIT_SCS				\
99 }
100 
101 void arch_release_task_struct(struct task_struct *tsk);
102 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
103 
104 #endif /* !__ASSEMBLER__ */
105 
106 /*
107  * thread information flags
108  * - these are process state flags that various assembly files may need to
109  *   access
110  * - pending work-to-be-done flags are in lowest half-word
111  * - other flags in upper half-word(s)
112  */
113 
114 /*
115  * Tell the generic TIF infrastructure which bits riscv supports
116  */
117 #define HAVE_TIF_NEED_RESCHED_LAZY
118 #define HAVE_TIF_RESTORE_SIGMASK
119 
120 #include <asm-generic/thread_info_tif.h>
121 
122 #define TIF_32BIT			16	/* compat-mode 32bit process */
123 #define TIF_RISCV_V_DEFER_RESTORE	17	/* restore Vector before returing to user */
124 
125 #define _TIF_RISCV_V_DEFER_RESTORE	BIT(TIF_RISCV_V_DEFER_RESTORE)
126 
127 #endif /* _ASM_RISCV_THREAD_INFO_H */
128