1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "phy-caps.h" 24 #include "sfp.h" 25 #include "swphy.h" 26 27 enum { 28 PHYLINK_DISABLE_STOPPED, 29 PHYLINK_DISABLE_LINK, 30 PHYLINK_DISABLE_MAC_WOL, 31 PHYLINK_DISABLE_REPLAY, 32 33 PCS_STATE_DOWN = 0, 34 PCS_STATE_STARTING, 35 PCS_STATE_STARTED, 36 }; 37 38 /** 39 * struct phylink - internal data type for phylink 40 */ 41 struct phylink { 42 /* private: */ 43 struct net_device *netdev; 44 const struct phylink_mac_ops *mac_ops; 45 struct phylink_config *config; 46 struct phylink_pcs *pcs; 47 struct device *dev; 48 unsigned int old_link_state:1; 49 50 unsigned long phylink_disable_state; /* bitmask of disables */ 51 struct phy_device *phydev; 52 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 53 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 54 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 55 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 59 60 /* The link configuration settings */ 61 struct phylink_link_state link_config; 62 63 /* The current settings */ 64 phy_interface_t cur_interface; 65 66 struct gpio_desc *link_gpio; 67 unsigned int link_irq; 68 struct timer_list link_poll; 69 70 struct mutex state_mutex; 71 /* Serialize updates to pl->phydev with phylink_resolve() */ 72 struct mutex phydev_mutex; 73 struct phylink_link_state phy_state; 74 unsigned int phy_ib_mode; 75 struct work_struct resolve; 76 unsigned int pcs_neg_mode; 77 unsigned int pcs_state; 78 79 bool link_failed; 80 bool suspend_link_up; 81 bool force_major_config; 82 bool major_config_failed; 83 bool mac_supports_eee_ops; 84 bool mac_supports_eee; 85 bool phy_enable_tx_lpi; 86 bool mac_enable_tx_lpi; 87 bool mac_tx_clk_stop; 88 u32 mac_tx_lpi_timer; 89 u8 mac_rx_clk_stop_blocked; 90 91 struct sfp_bus *sfp_bus; 92 bool sfp_may_have_phy; 93 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 94 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 95 u8 sfp_port; 96 97 struct eee_config eee_cfg; 98 99 u32 wolopts_mac; 100 u8 wol_sopass[SOPASS_MAX]; 101 }; 102 103 #define phylink_printk(level, pl, fmt, ...) \ 104 do { \ 105 if ((pl)->config->type == PHYLINK_NETDEV) \ 106 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 107 else if ((pl)->config->type == PHYLINK_DEV) \ 108 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 109 } while (0) 110 111 #define phylink_err(pl, fmt, ...) \ 112 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 113 #define phylink_warn(pl, fmt, ...) \ 114 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 115 #define phylink_info(pl, fmt, ...) \ 116 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 117 #if defined(CONFIG_DYNAMIC_DEBUG) 118 #define phylink_dbg(pl, fmt, ...) \ 119 do { \ 120 if ((pl)->config->type == PHYLINK_NETDEV) \ 121 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 122 else if ((pl)->config->type == PHYLINK_DEV) \ 123 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 124 } while (0) 125 #elif defined(DEBUG) 126 #define phylink_dbg(pl, fmt, ...) \ 127 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 128 #else 129 #define phylink_dbg(pl, fmt, ...) \ 130 ({ \ 131 if (0) \ 132 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 133 }) 134 #endif 135 136 static const phy_interface_t phylink_sfp_interface_preference[] = { 137 PHY_INTERFACE_MODE_100GBASEP, 138 PHY_INTERFACE_MODE_50GBASER, 139 PHY_INTERFACE_MODE_LAUI, 140 PHY_INTERFACE_MODE_25GBASER, 141 PHY_INTERFACE_MODE_USXGMII, 142 PHY_INTERFACE_MODE_10GBASER, 143 PHY_INTERFACE_MODE_5GBASER, 144 PHY_INTERFACE_MODE_2500BASEX, 145 PHY_INTERFACE_MODE_SGMII, 146 PHY_INTERFACE_MODE_1000BASEX, 147 PHY_INTERFACE_MODE_100BASEX, 148 }; 149 150 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 151 152 /** 153 * phylink_set_port_modes() - set the port type modes in the ethtool mask 154 * @mask: ethtool link mode mask 155 * 156 * Sets all the port type modes in the ethtool mask. MAC drivers should 157 * use this in their 'validate' callback. 158 */ 159 void phylink_set_port_modes(unsigned long *mask) 160 { 161 phylink_set(mask, TP); 162 phylink_set(mask, AUI); 163 phylink_set(mask, MII); 164 phylink_set(mask, FIBRE); 165 phylink_set(mask, BNC); 166 phylink_set(mask, Backplane); 167 } 168 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 169 170 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 171 { 172 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 173 174 phylink_set_port_modes(tmp); 175 phylink_set(tmp, Autoneg); 176 phylink_set(tmp, Pause); 177 phylink_set(tmp, Asym_Pause); 178 179 return linkmode_subset(linkmode, tmp); 180 } 181 182 static const char *phylink_an_mode_str(unsigned int mode) 183 { 184 static const char *modestr[] = { 185 [MLO_AN_PHY] = "phy", 186 [MLO_AN_FIXED] = "fixed", 187 [MLO_AN_INBAND] = "inband", 188 }; 189 190 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 191 } 192 193 static const char *phylink_pcs_mode_str(unsigned int mode) 194 { 195 if (!mode) 196 return "none"; 197 198 if (mode & PHYLINK_PCS_NEG_OUTBAND) 199 return "outband"; 200 201 if (mode & PHYLINK_PCS_NEG_INBAND) { 202 if (mode & PHYLINK_PCS_NEG_ENABLED) 203 return "inband,an-enabled"; 204 else 205 return "inband,an-disabled"; 206 } 207 208 return "unknown"; 209 } 210 211 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 212 { 213 switch (interface) { 214 case PHY_INTERFACE_MODE_SGMII: 215 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 216 return 1250; 217 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 218 return 3125; 219 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 220 return 5156; 221 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 222 return 10313; 223 default: 224 return 0; 225 } 226 } 227 228 /** 229 * phylink_interface_max_speed() - get the maximum speed of a phy interface 230 * @interface: phy interface mode defined by &typedef phy_interface_t 231 * 232 * Determine the maximum speed of a phy interface. This is intended to help 233 * determine the correct speed to pass to the MAC when the phy is performing 234 * rate matching. 235 * 236 * Return: The maximum speed of @interface 237 */ 238 static int phylink_interface_max_speed(phy_interface_t interface) 239 { 240 switch (interface) { 241 case PHY_INTERFACE_MODE_100BASEX: 242 case PHY_INTERFACE_MODE_REVRMII: 243 case PHY_INTERFACE_MODE_RMII: 244 case PHY_INTERFACE_MODE_SMII: 245 case PHY_INTERFACE_MODE_REVMII: 246 case PHY_INTERFACE_MODE_MII: 247 case PHY_INTERFACE_MODE_MIILITE: 248 return SPEED_100; 249 250 case PHY_INTERFACE_MODE_TBI: 251 case PHY_INTERFACE_MODE_MOCA: 252 case PHY_INTERFACE_MODE_RTBI: 253 case PHY_INTERFACE_MODE_1000BASEX: 254 case PHY_INTERFACE_MODE_1000BASEKX: 255 case PHY_INTERFACE_MODE_TRGMII: 256 case PHY_INTERFACE_MODE_RGMII_TXID: 257 case PHY_INTERFACE_MODE_RGMII_RXID: 258 case PHY_INTERFACE_MODE_RGMII_ID: 259 case PHY_INTERFACE_MODE_RGMII: 260 case PHY_INTERFACE_MODE_PSGMII: 261 case PHY_INTERFACE_MODE_QSGMII: 262 case PHY_INTERFACE_MODE_QUSGMII: 263 case PHY_INTERFACE_MODE_SGMII: 264 case PHY_INTERFACE_MODE_GMII: 265 return SPEED_1000; 266 267 case PHY_INTERFACE_MODE_2500BASEX: 268 case PHY_INTERFACE_MODE_10G_QXGMII: 269 return SPEED_2500; 270 271 case PHY_INTERFACE_MODE_5GBASER: 272 return SPEED_5000; 273 274 case PHY_INTERFACE_MODE_XGMII: 275 case PHY_INTERFACE_MODE_RXAUI: 276 case PHY_INTERFACE_MODE_XAUI: 277 case PHY_INTERFACE_MODE_10GBASER: 278 case PHY_INTERFACE_MODE_10GKR: 279 case PHY_INTERFACE_MODE_USXGMII: 280 return SPEED_10000; 281 282 case PHY_INTERFACE_MODE_25GBASER: 283 return SPEED_25000; 284 285 case PHY_INTERFACE_MODE_XLGMII: 286 return SPEED_40000; 287 288 case PHY_INTERFACE_MODE_50GBASER: 289 case PHY_INTERFACE_MODE_LAUI: 290 return SPEED_50000; 291 292 case PHY_INTERFACE_MODE_100GBASEP: 293 return SPEED_100000; 294 295 case PHY_INTERFACE_MODE_INTERNAL: 296 case PHY_INTERFACE_MODE_NA: 297 case PHY_INTERFACE_MODE_MAX: 298 /* No idea! Garbage in, unknown out */ 299 return SPEED_UNKNOWN; 300 } 301 302 /* If we get here, someone forgot to add an interface mode above */ 303 WARN_ON_ONCE(1); 304 return SPEED_UNKNOWN; 305 } 306 307 static struct { 308 unsigned long mask; 309 int speed; 310 unsigned int duplex; 311 unsigned int caps_bit; 312 } phylink_caps_params[] = { 313 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) }, 314 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) }, 315 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) }, 316 { MAC_80000FD, SPEED_80000, DUPLEX_FULL, BIT(LINK_CAPA_80000FD) }, 317 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) }, 318 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) }, 319 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) }, 320 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) }, 321 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) }, 322 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) }, 323 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) }, 324 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) }, 325 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) }, 326 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) }, 327 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) }, 328 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) }, 329 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) }, 330 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) }, 331 }; 332 333 /** 334 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps 335 * @caps: A set of MAC capabilities 336 * 337 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h 338 */ 339 static unsigned long phylink_caps_to_link_caps(unsigned long caps) 340 { 341 unsigned long link_caps = 0; 342 int i; 343 344 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 345 if (caps & phylink_caps_params[i].mask) 346 link_caps |= phylink_caps_params[i].caps_bit; 347 348 return link_caps; 349 } 350 351 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps) 352 { 353 unsigned long caps = 0; 354 int i; 355 356 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 357 if (link_caps & phylink_caps_params[i].caps_bit) 358 caps |= phylink_caps_params[i].mask; 359 360 return caps; 361 } 362 363 /** 364 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 365 * @linkmodes: ethtool linkmode mask (must be already initialised) 366 * @caps: bitmask of MAC capabilities 367 * 368 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 369 * supported by the @caps. @linkmodes must have been initialised previously. 370 */ 371 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 372 unsigned long caps) 373 { 374 unsigned long link_caps = phylink_caps_to_link_caps(caps); 375 376 if (caps & MAC_SYM_PAUSE) 377 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 378 379 if (caps & MAC_ASYM_PAUSE) 380 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 381 382 phy_caps_linkmodes(link_caps, linkmodes); 383 } 384 385 /** 386 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 387 * @config: pointer to a &struct phylink_config 388 * @max_speed: maximum speed 389 * 390 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 391 * Any further motifications of config.mac_capabilities will override this. 392 */ 393 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 394 { 395 int i; 396 397 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 398 phylink_caps_params[i].speed > max_speed; i++) 399 config->mac_capabilities &= ~phylink_caps_params[i].mask; 400 } 401 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 402 403 /** 404 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 405 * @speed: the speed to search for 406 * @duplex: the duplex to search for 407 * 408 * Find the mac capability for a given speed and duplex. 409 * 410 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 411 * there were no matches. 412 */ 413 static unsigned long phylink_cap_from_speed_duplex(int speed, 414 unsigned int duplex) 415 { 416 int i; 417 418 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 419 if (speed == phylink_caps_params[i].speed && 420 duplex == phylink_caps_params[i].duplex) 421 return phylink_caps_params[i].mask; 422 } 423 424 return 0; 425 } 426 427 /** 428 * phylink_get_capabilities() - get capabilities for a given MAC 429 * @interface: phy interface mode defined by &typedef phy_interface_t 430 * @mac_capabilities: bitmask of MAC capabilities 431 * @rate_matching: type of rate matching being performed 432 * 433 * Get the MAC capabilities that are supported by the @interface mode and 434 * @mac_capabilities. 435 */ 436 static unsigned long phylink_get_capabilities(phy_interface_t interface, 437 unsigned long mac_capabilities, 438 int rate_matching) 439 { 440 unsigned long link_caps = phy_caps_from_interface(interface); 441 int max_speed = phylink_interface_max_speed(interface); 442 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 443 unsigned long matched_caps = 0; 444 445 caps |= phylink_link_caps_to_mac_caps(link_caps); 446 447 switch (rate_matching) { 448 case RATE_MATCH_OPEN_LOOP: 449 /* TODO */ 450 fallthrough; 451 case RATE_MATCH_NONE: 452 matched_caps = 0; 453 break; 454 case RATE_MATCH_PAUSE: { 455 /* The MAC must support asymmetric pause towards the local 456 * device for this. We could allow just symmetric pause, but 457 * then we might have to renegotiate if the link partner 458 * doesn't support pause. This is because there's no way to 459 * accept pause frames without transmitting them if we only 460 * support symmetric pause. 461 */ 462 if (!(mac_capabilities & MAC_SYM_PAUSE) || 463 !(mac_capabilities & MAC_ASYM_PAUSE)) 464 break; 465 466 /* We can't adapt if the MAC doesn't support the interface's 467 * max speed at full duplex. 468 */ 469 if (mac_capabilities & 470 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 471 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 472 break; 473 } 474 case RATE_MATCH_CRS: 475 /* The MAC must support half duplex at the interface's max 476 * speed. 477 */ 478 if (mac_capabilities & 479 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 480 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 481 matched_caps &= mac_capabilities; 482 } 483 break; 484 } 485 486 return (caps & mac_capabilities) | matched_caps; 487 } 488 489 /** 490 * phylink_validate_mask_caps() - Restrict link modes based on caps 491 * @supported: ethtool bitmask for supported link modes. 492 * @state: pointer to a &struct phylink_link_state. 493 * @mac_capabilities: bitmask of MAC capabilities 494 * 495 * Calculate the supported link modes based on @mac_capabilities, and restrict 496 * @supported and @state based on that. Use this function if your capabiliies 497 * aren't constant, such as if they vary depending on the interface. 498 */ 499 static void phylink_validate_mask_caps(unsigned long *supported, 500 struct phylink_link_state *state, 501 unsigned long mac_capabilities) 502 { 503 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 504 unsigned long caps; 505 506 phylink_set_port_modes(mask); 507 phylink_set(mask, Autoneg); 508 caps = phylink_get_capabilities(state->interface, mac_capabilities, 509 state->rate_matching); 510 phylink_caps_to_linkmodes(mask, caps); 511 512 linkmode_and(supported, supported, mask); 513 linkmode_and(state->advertising, state->advertising, mask); 514 } 515 516 static int phylink_validate_mac_and_pcs(struct phylink *pl, 517 unsigned long *supported, 518 struct phylink_link_state *state) 519 { 520 struct phylink_pcs *pcs = NULL; 521 unsigned long capabilities; 522 int ret; 523 524 /* Get the PCS for this interface mode */ 525 if (pl->mac_ops->mac_select_pcs) { 526 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 527 if (IS_ERR(pcs)) 528 return PTR_ERR(pcs); 529 } 530 531 if (pcs) { 532 /* The PCS, if present, must be setup before phylink_create() 533 * has been called. If the ops is not initialised, print an 534 * error and backtrace rather than oopsing the kernel. 535 */ 536 if (!pcs->ops) { 537 phylink_err(pl, "interface %s: uninitialised PCS\n", 538 phy_modes(state->interface)); 539 dump_stack(); 540 return -EINVAL; 541 } 542 543 /* Ensure that this PCS supports the interface which the MAC 544 * returned it for. It is an error for the MAC to return a PCS 545 * that does not support the interface mode. 546 */ 547 if (!phy_interface_empty(pcs->supported_interfaces) && 548 !test_bit(state->interface, pcs->supported_interfaces)) { 549 phylink_err(pl, "MAC returned PCS which does not support %s\n", 550 phy_modes(state->interface)); 551 return -EINVAL; 552 } 553 554 /* Validate the link parameters with the PCS */ 555 if (pcs->ops->pcs_validate) { 556 ret = pcs->ops->pcs_validate(pcs, supported, state); 557 if (ret < 0 || phylink_is_empty_linkmode(supported)) 558 return -EINVAL; 559 560 /* Ensure the advertising mask is a subset of the 561 * supported mask. 562 */ 563 linkmode_and(state->advertising, state->advertising, 564 supported); 565 } 566 } 567 568 /* Then validate the link parameters with the MAC */ 569 if (pl->mac_ops->mac_get_caps) 570 capabilities = pl->mac_ops->mac_get_caps(pl->config, 571 state->interface); 572 else 573 capabilities = pl->config->mac_capabilities; 574 575 phylink_validate_mask_caps(supported, state, capabilities); 576 577 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 578 } 579 580 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 581 const unsigned long *supported, 582 const struct phylink_link_state *state, 583 phy_interface_t interface, 584 unsigned long *accum_supported, 585 unsigned long *accum_advertising) 586 { 587 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 588 struct phylink_link_state tmp_state; 589 590 linkmode_copy(tmp_supported, supported); 591 592 tmp_state = *state; 593 tmp_state.interface = interface; 594 595 if (phy) 596 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 597 598 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 599 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 600 interface, phy_modes(interface), 601 phy_rate_matching_to_str(tmp_state.rate_matching), 602 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 603 604 linkmode_or(accum_supported, accum_supported, tmp_supported); 605 linkmode_or(accum_advertising, accum_advertising, 606 tmp_state.advertising); 607 } 608 } 609 610 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 611 unsigned long *supported, 612 struct phylink_link_state *state, 613 const unsigned long *interfaces) 614 { 615 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 616 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 617 int interface; 618 619 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 620 phylink_validate_one(pl, phy, supported, state, interface, 621 all_s, all_adv); 622 623 linkmode_copy(supported, all_s); 624 linkmode_copy(state->advertising, all_adv); 625 626 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 627 } 628 629 static int phylink_validate(struct phylink *pl, unsigned long *supported, 630 struct phylink_link_state *state) 631 { 632 const unsigned long *interfaces = pl->config->supported_interfaces; 633 634 if (state->interface == PHY_INTERFACE_MODE_NA) 635 return phylink_validate_mask(pl, NULL, supported, state, 636 interfaces); 637 638 if (!test_bit(state->interface, interfaces)) 639 return -EINVAL; 640 641 return phylink_validate_mac_and_pcs(pl, supported, state); 642 } 643 644 static void phylink_fill_fixedlink_supported(unsigned long *supported) 645 { 646 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, supported); 647 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported); 648 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, supported); 649 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); 650 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); 651 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); 652 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); 653 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); 654 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); 655 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); 656 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); 657 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported); 658 } 659 660 static int phylink_parse_fixedlink(struct phylink *pl, 661 const struct fwnode_handle *fwnode) 662 { 663 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, }; 664 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 665 const struct link_capabilities *c; 666 struct fwnode_handle *fixed_node; 667 struct gpio_desc *desc; 668 u32 speed; 669 int ret; 670 671 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 672 if (fixed_node) { 673 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 674 675 pl->link_config.speed = speed; 676 pl->link_config.duplex = DUPLEX_HALF; 677 678 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 679 pl->link_config.duplex = DUPLEX_FULL; 680 681 /* We treat the "pause" and "asym-pause" terminology as 682 * defining the link partner's ability. 683 */ 684 if (fwnode_property_read_bool(fixed_node, "pause")) 685 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 686 pl->link_config.lp_advertising); 687 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 688 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 689 pl->link_config.lp_advertising); 690 691 if (ret == 0) { 692 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 693 GPIOD_IN, "?"); 694 695 if (!IS_ERR(desc)) 696 pl->link_gpio = desc; 697 else if (desc == ERR_PTR(-EPROBE_DEFER)) 698 ret = -EPROBE_DEFER; 699 } 700 fwnode_handle_put(fixed_node); 701 702 if (ret) 703 return ret; 704 } else { 705 u32 prop[5]; 706 707 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 708 NULL, 0); 709 if (ret != ARRAY_SIZE(prop)) { 710 phylink_err(pl, "broken fixed-link?\n"); 711 return -EINVAL; 712 } 713 714 phylink_warn(pl, "%pfw uses deprecated array-style fixed-link binding!\n", 715 fwnode); 716 717 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 718 prop, ARRAY_SIZE(prop)); 719 if (!ret) { 720 pl->link_config.duplex = prop[1] ? 721 DUPLEX_FULL : DUPLEX_HALF; 722 pl->link_config.speed = prop[2]; 723 if (prop[3]) 724 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 725 pl->link_config.lp_advertising); 726 if (prop[4]) 727 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 728 pl->link_config.lp_advertising); 729 } 730 } 731 732 if (pl->link_config.speed > SPEED_1000 && 733 pl->link_config.duplex != DUPLEX_FULL) 734 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 735 pl->link_config.speed); 736 737 linkmode_zero(pl->supported); 738 phylink_fill_fixedlink_supported(pl->supported); 739 740 linkmode_copy(pl->link_config.advertising, pl->supported); 741 phylink_validate(pl, pl->supported, &pl->link_config); 742 743 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex, 744 pl->supported, true); 745 if (c) 746 linkmode_and(match, pl->supported, c->linkmodes); 747 748 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 749 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 750 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 751 linkmode_and(pl->supported, pl->supported, mask); 752 753 phylink_set(pl->supported, MII); 754 755 if (c) { 756 linkmode_or(pl->supported, pl->supported, match); 757 linkmode_or(pl->link_config.lp_advertising, 758 pl->link_config.lp_advertising, match); 759 } else { 760 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 761 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 762 pl->link_config.speed); 763 } 764 765 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 766 pl->supported); 767 768 pl->link_config.link = 1; 769 pl->link_config.an_complete = 1; 770 771 return 0; 772 } 773 774 static int phylink_parse_mode(struct phylink *pl, 775 const struct fwnode_handle *fwnode) 776 { 777 struct fwnode_handle *dn; 778 const char *managed; 779 unsigned long caps; 780 781 if (pl->config->default_an_inband) 782 pl->cfg_link_an_mode = MLO_AN_INBAND; 783 784 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 785 if (dn || fwnode_property_present(fwnode, "fixed-link")) 786 pl->cfg_link_an_mode = MLO_AN_FIXED; 787 fwnode_handle_put(dn); 788 789 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 790 strcmp(managed, "in-band-status") == 0)) { 791 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 792 phylink_err(pl, 793 "can't use both fixed-link and in-band-status\n"); 794 return -EINVAL; 795 } 796 797 pl->cfg_link_an_mode = MLO_AN_INBAND; 798 } 799 800 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 801 linkmode_zero(pl->supported); 802 phylink_set(pl->supported, MII); 803 phylink_set(pl->supported, Autoneg); 804 phylink_set(pl->supported, Asym_Pause); 805 phylink_set(pl->supported, Pause); 806 807 switch (pl->link_config.interface) { 808 case PHY_INTERFACE_MODE_SGMII: 809 case PHY_INTERFACE_MODE_PSGMII: 810 case PHY_INTERFACE_MODE_QSGMII: 811 case PHY_INTERFACE_MODE_QUSGMII: 812 case PHY_INTERFACE_MODE_RGMII: 813 case PHY_INTERFACE_MODE_RGMII_ID: 814 case PHY_INTERFACE_MODE_RGMII_RXID: 815 case PHY_INTERFACE_MODE_RGMII_TXID: 816 case PHY_INTERFACE_MODE_RTBI: 817 case PHY_INTERFACE_MODE_1000BASEX: 818 case PHY_INTERFACE_MODE_2500BASEX: 819 case PHY_INTERFACE_MODE_5GBASER: 820 case PHY_INTERFACE_MODE_25GBASER: 821 case PHY_INTERFACE_MODE_USXGMII: 822 case PHY_INTERFACE_MODE_10G_QXGMII: 823 case PHY_INTERFACE_MODE_10GKR: 824 case PHY_INTERFACE_MODE_10GBASER: 825 case PHY_INTERFACE_MODE_XLGMII: 826 case PHY_INTERFACE_MODE_50GBASER: 827 case PHY_INTERFACE_MODE_LAUI: 828 case PHY_INTERFACE_MODE_100GBASEP: 829 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 830 caps = phylink_get_capabilities(pl->link_config.interface, caps, 831 RATE_MATCH_NONE); 832 phylink_caps_to_linkmodes(pl->supported, caps); 833 break; 834 835 default: 836 phylink_err(pl, 837 "incorrect link mode %s for in-band status\n", 838 phy_modes(pl->link_config.interface)); 839 return -EINVAL; 840 } 841 842 linkmode_copy(pl->link_config.advertising, pl->supported); 843 844 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 845 phylink_err(pl, 846 "failed to validate link configuration for in-band status\n"); 847 return -EINVAL; 848 } 849 } 850 851 return 0; 852 } 853 854 static void phylink_apply_manual_flow(struct phylink *pl, 855 struct phylink_link_state *state) 856 { 857 /* If autoneg is disabled, pause AN is also disabled */ 858 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 859 state->advertising)) 860 state->pause &= ~MLO_PAUSE_AN; 861 862 /* Manual configuration of pause modes */ 863 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 864 state->pause = pl->link_config.pause; 865 } 866 867 static void phylink_resolve_an_pause(struct phylink_link_state *state) 868 { 869 bool tx_pause, rx_pause; 870 871 if (state->duplex == DUPLEX_FULL) { 872 linkmode_resolve_pause(state->advertising, 873 state->lp_advertising, 874 &tx_pause, &rx_pause); 875 if (tx_pause) 876 state->pause |= MLO_PAUSE_TX; 877 if (rx_pause) 878 state->pause |= MLO_PAUSE_RX; 879 } 880 } 881 882 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 883 phy_interface_t interface) 884 { 885 if (pcs && pcs->ops->pcs_inband_caps) 886 return pcs->ops->pcs_inband_caps(pcs, interface); 887 888 return 0; 889 } 890 891 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 892 phy_interface_t interface) 893 { 894 if (pcs && pcs->ops->pcs_pre_config) 895 pcs->ops->pcs_pre_config(pcs, interface); 896 } 897 898 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 899 phy_interface_t interface) 900 { 901 int err = 0; 902 903 if (pcs && pcs->ops->pcs_post_config) 904 err = pcs->ops->pcs_post_config(pcs, interface); 905 906 return err; 907 } 908 909 static void phylink_pcs_disable(struct phylink_pcs *pcs) 910 { 911 if (pcs && pcs->ops->pcs_disable) 912 pcs->ops->pcs_disable(pcs); 913 } 914 915 static int phylink_pcs_enable(struct phylink_pcs *pcs) 916 { 917 int err = 0; 918 919 if (pcs && pcs->ops->pcs_enable) 920 err = pcs->ops->pcs_enable(pcs); 921 922 return err; 923 } 924 925 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 926 const struct phylink_link_state *state, 927 bool permit_pause_to_mac) 928 { 929 if (!pcs) 930 return 0; 931 932 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 933 state->advertising, permit_pause_to_mac); 934 } 935 936 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 937 phy_interface_t interface, int speed, 938 int duplex) 939 { 940 if (pcs && pcs->ops->pcs_link_up) 941 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 942 } 943 944 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 945 { 946 if (pcs && pcs->ops->pcs_disable_eee) 947 pcs->ops->pcs_disable_eee(pcs); 948 } 949 950 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 951 { 952 if (pcs && pcs->ops->pcs_enable_eee) 953 pcs->ops->pcs_enable_eee(pcs); 954 } 955 956 /* Query inband for a specific interface mode, asking the MAC for the 957 * PCS which will be used to handle the interface mode. 958 */ 959 static unsigned int phylink_inband_caps(struct phylink *pl, 960 phy_interface_t interface) 961 { 962 struct phylink_pcs *pcs; 963 964 if (!pl->mac_ops->mac_select_pcs) 965 return 0; 966 967 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 968 if (!pcs) 969 return 0; 970 971 return phylink_pcs_inband_caps(pcs, interface); 972 } 973 974 static void phylink_pcs_poll_stop(struct phylink *pl) 975 { 976 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 977 timer_delete(&pl->link_poll); 978 } 979 980 static void phylink_pcs_poll_start(struct phylink *pl) 981 { 982 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 983 mod_timer(&pl->link_poll, jiffies + HZ); 984 } 985 986 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 987 { 988 int ret = 0; 989 990 /* Signal to PCS driver that MAC requires RX clock for init */ 991 if (pl->config->mac_requires_rxc) 992 pcs->rxc_always_on = true; 993 994 if (pcs->ops->pcs_pre_init) 995 ret = pcs->ops->pcs_pre_init(pcs); 996 997 return ret; 998 } 999 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 1000 1001 static void phylink_mac_config(struct phylink *pl, 1002 const struct phylink_link_state *state) 1003 { 1004 struct phylink_link_state st = *state; 1005 1006 /* Stop drivers incorrectly using these */ 1007 linkmode_zero(st.lp_advertising); 1008 st.speed = SPEED_UNKNOWN; 1009 st.duplex = DUPLEX_UNKNOWN; 1010 st.an_complete = false; 1011 st.link = false; 1012 1013 phylink_dbg(pl, 1014 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1015 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1016 phy_modes(st.interface), 1017 phy_rate_matching_to_str(st.rate_matching), 1018 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1019 st.pause); 1020 1021 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1022 } 1023 1024 static void phylink_pcs_an_restart(struct phylink *pl) 1025 { 1026 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1027 pl->link_config.advertising) && 1028 phy_interface_mode_is_8023z(pl->link_config.interface) && 1029 phylink_autoneg_inband(pl->act_link_an_mode)) 1030 pl->pcs->ops->pcs_an_restart(pl->pcs); 1031 } 1032 1033 enum inband_type { 1034 INBAND_NONE, 1035 INBAND_CISCO_SGMII, 1036 INBAND_BASEX, 1037 }; 1038 1039 static enum inband_type phylink_get_inband_type(phy_interface_t interface) 1040 { 1041 switch (interface) { 1042 case PHY_INTERFACE_MODE_SGMII: 1043 case PHY_INTERFACE_MODE_QSGMII: 1044 case PHY_INTERFACE_MODE_QUSGMII: 1045 case PHY_INTERFACE_MODE_USXGMII: 1046 case PHY_INTERFACE_MODE_10G_QXGMII: 1047 /* These protocols are designed for use with a PHY which 1048 * communicates its negotiation result back to the MAC via 1049 * inband communication. Note: there exist PHYs that run 1050 * with SGMII but do not send the inband data. 1051 */ 1052 return INBAND_CISCO_SGMII; 1053 1054 case PHY_INTERFACE_MODE_1000BASEX: 1055 case PHY_INTERFACE_MODE_2500BASEX: 1056 /* 1000base-X is designed for use media-side for Fibre 1057 * connections, and thus the Autoneg bit needs to be 1058 * taken into account. We also do this for 2500base-X 1059 * as well, but drivers may not support this, so may 1060 * need to override this. 1061 */ 1062 return INBAND_BASEX; 1063 1064 default: 1065 return INBAND_NONE; 1066 } 1067 } 1068 1069 /** 1070 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1071 * @pl: a pointer to a &struct phylink returned from phylink_create() 1072 * @pcs: a pointer to &struct phylink_pcs 1073 * @interface: interface mode to be used 1074 * @advertising: adertisement ethtool link mode mask 1075 * 1076 * Determines the negotiation mode to be used by the PCS, and returns 1077 * one of: 1078 * 1079 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1080 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1081 * will be used. 1082 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1083 * disabled 1084 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1085 * 1086 * Note: this is for cases where the PCS itself is involved in negotiation 1087 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1088 */ 1089 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1090 phy_interface_t interface, 1091 const unsigned long *advertising) 1092 { 1093 unsigned int pcs_ib_caps = 0; 1094 unsigned int phy_ib_caps = 0; 1095 unsigned int neg_mode, mode; 1096 enum inband_type type; 1097 1098 type = phylink_get_inband_type(interface); 1099 if (type == INBAND_NONE) { 1100 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1101 pl->act_link_an_mode = pl->req_link_an_mode; 1102 return; 1103 } 1104 1105 mode = pl->req_link_an_mode; 1106 1107 pl->phy_ib_mode = 0; 1108 1109 if (pcs) 1110 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1111 1112 if (pl->phydev) 1113 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1114 1115 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1116 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1117 1118 if (!phylink_autoneg_inband(mode)) { 1119 bool pcs_ib_only = false; 1120 bool phy_ib_only = false; 1121 1122 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1123 /* PCS supports reporting in-band capabilities, and 1124 * supports more than disable mode. 1125 */ 1126 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1127 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1128 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1129 pcs_ib_only = true; 1130 } 1131 1132 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1133 /* PHY supports in-band capabilities, and supports 1134 * more than disable mode. 1135 */ 1136 if (phy_ib_caps & LINK_INBAND_DISABLE) 1137 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1138 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1139 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1140 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1141 phy_ib_only = true; 1142 } 1143 1144 /* If either the PCS or PHY requires inband to be enabled, 1145 * this is an invalid configuration. Provide a diagnostic 1146 * message for this case, but don't try to force the issue. 1147 */ 1148 if (pcs_ib_only || phy_ib_only) 1149 phylink_warn(pl, 1150 "firmware wants %s mode, but %s%s%s requires inband\n", 1151 phylink_an_mode_str(mode), 1152 pcs_ib_only ? "PCS" : "", 1153 pcs_ib_only && phy_ib_only ? " and " : "", 1154 phy_ib_only ? "PHY" : ""); 1155 1156 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1157 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1158 /* For SGMII modes which are designed to be used with PHYs, or 1159 * Base-X with a PHY, we try to use in-band mode where-ever 1160 * possible. However, there are some PHYs e.g. BCM84881 which 1161 * do not support in-band. 1162 */ 1163 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1164 LINK_INBAND_BYPASS; 1165 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1166 LINK_INBAND_BYPASS; 1167 /* PCS PHY 1168 * D E D E 1169 * 0 0 0 0 no information inband enabled 1170 * 1 0 0 0 pcs doesn't support outband 1171 * 0 1 0 0 pcs required inband enabled 1172 * 1 1 0 0 pcs optional inband enabled 1173 * 0 0 1 0 phy doesn't support outband 1174 * 1 0 1 0 pcs+phy doesn't support outband 1175 * 0 1 1 0 pcs required, phy doesn't support, invalid 1176 * 1 1 1 0 pcs optional, phy doesn't support, outband 1177 * 0 0 0 1 phy required inband enabled 1178 * 1 0 0 1 pcs doesn't support, phy required, invalid 1179 * 0 1 0 1 pcs+phy required inband enabled 1180 * 1 1 0 1 pcs optional, phy required inband enabled 1181 * 0 0 1 1 phy optional inband enabled 1182 * 1 0 1 1 pcs doesn't support, phy optional, outband 1183 * 0 1 1 1 pcs required, phy optional inband enabled 1184 * 1 1 1 1 pcs+phy optional inband enabled 1185 */ 1186 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1187 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1188 /* In-band supported or unknown at both ends. Enable 1189 * in-band mode with or without bypass at the PHY. 1190 */ 1191 if (phy_ib_caps & LINK_INBAND_ENABLE) 1192 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1193 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1194 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1195 1196 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1197 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1198 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1199 /* Either in-band not supported at at least one end. 1200 * In-band bypass at the other end is possible. 1201 */ 1202 if (phy_ib_caps & LINK_INBAND_DISABLE) 1203 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1204 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1205 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1206 1207 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1208 if (pl->phydev) 1209 mode = MLO_AN_PHY; 1210 } else { 1211 /* invalid */ 1212 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1213 phy_modes(interface)); 1214 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1215 } 1216 } else { 1217 /* For Base-X without a PHY */ 1218 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1219 /* If the PCS doesn't support inband, then inband must 1220 * be disabled. 1221 */ 1222 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1223 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1224 /* If the PCS requires inband, then inband must always 1225 * be enabled. 1226 */ 1227 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1228 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1229 advertising)) 1230 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1231 else 1232 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1233 } 1234 1235 pl->pcs_neg_mode = neg_mode; 1236 pl->act_link_an_mode = mode; 1237 } 1238 1239 static void phylink_major_config(struct phylink *pl, bool restart, 1240 const struct phylink_link_state *state) 1241 { 1242 struct phylink_pcs *pcs = NULL; 1243 bool pcs_changed = false; 1244 unsigned int rate_kbd; 1245 int err; 1246 1247 phylink_dbg(pl, "major config, requested %s/%s\n", 1248 phylink_an_mode_str(pl->req_link_an_mode), 1249 phy_modes(state->interface)); 1250 1251 pl->major_config_failed = false; 1252 1253 if (pl->mac_ops->mac_select_pcs) { 1254 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1255 if (IS_ERR(pcs)) { 1256 phylink_err(pl, 1257 "mac_select_pcs unexpectedly failed: %pe\n", 1258 pcs); 1259 1260 pl->major_config_failed = true; 1261 return; 1262 } 1263 1264 pcs_changed = pl->pcs != pcs; 1265 } 1266 1267 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1268 1269 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1270 phylink_an_mode_str(pl->act_link_an_mode), 1271 phylink_pcs_mode_str(pl->pcs_neg_mode), 1272 phy_modes(state->interface)); 1273 1274 phylink_pcs_poll_stop(pl); 1275 1276 if (pl->mac_ops->mac_prepare) { 1277 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1278 state->interface); 1279 if (err < 0) { 1280 phylink_err(pl, "mac_prepare failed: %pe\n", 1281 ERR_PTR(err)); 1282 pl->major_config_failed = true; 1283 return; 1284 } 1285 } 1286 1287 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1288 * for the change. 1289 */ 1290 if (pcs_changed) { 1291 phylink_pcs_disable(pl->pcs); 1292 1293 if (pl->pcs) 1294 pl->pcs->phylink = NULL; 1295 1296 if (pcs) 1297 pcs->phylink = pl; 1298 1299 pl->pcs = pcs; 1300 } 1301 1302 if (pl->pcs) 1303 phylink_pcs_pre_config(pl->pcs, state->interface); 1304 1305 phylink_mac_config(pl, state); 1306 1307 if (pl->pcs) { 1308 err = phylink_pcs_post_config(pl->pcs, state->interface); 1309 if (err < 0) { 1310 phylink_err(pl, "pcs_post_config failed: %pe\n", 1311 ERR_PTR(err)); 1312 1313 pl->major_config_failed = true; 1314 } 1315 } 1316 1317 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1318 phylink_pcs_enable(pl->pcs); 1319 1320 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1321 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1322 if (err < 0) { 1323 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err)); 1324 pl->major_config_failed = true; 1325 } else if (err > 0) { 1326 restart = true; 1327 } 1328 1329 if (restart) 1330 phylink_pcs_an_restart(pl); 1331 1332 if (pl->mac_ops->mac_finish) { 1333 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1334 state->interface); 1335 if (err < 0) { 1336 phylink_err(pl, "mac_finish failed: %pe\n", 1337 ERR_PTR(err)); 1338 1339 pl->major_config_failed = true; 1340 } 1341 } 1342 1343 if (pl->phydev && pl->phy_ib_mode) { 1344 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1345 if (err < 0) { 1346 phylink_err(pl, "phy_config_inband: %pe\n", 1347 ERR_PTR(err)); 1348 1349 pl->major_config_failed = true; 1350 } 1351 } 1352 1353 if (pl->sfp_bus) { 1354 rate_kbd = phylink_interface_signal_rate(state->interface); 1355 if (rate_kbd) 1356 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1357 } 1358 1359 phylink_pcs_poll_start(pl); 1360 } 1361 1362 /* 1363 * Reconfigure for a change of inband advertisement. 1364 * If we have a separate PCS, we only need to call its pcs_config() method, 1365 * and then restart AN if it indicates something changed. Otherwise, we do 1366 * the full MAC reconfiguration. 1367 */ 1368 static int phylink_change_inband_advert(struct phylink *pl) 1369 { 1370 int ret; 1371 1372 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1373 return 0; 1374 1375 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1376 phylink_an_mode_str(pl->req_link_an_mode), 1377 phy_modes(pl->link_config.interface), 1378 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1379 pl->link_config.pause); 1380 1381 /* Recompute the PCS neg mode */ 1382 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1383 pl->link_config.advertising); 1384 1385 /* Modern PCS-based method; update the advert at the PCS, and 1386 * restart negotiation if the pcs_config() helper indicates that 1387 * the programmed advertisement has changed. 1388 */ 1389 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1390 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1391 if (ret < 0) 1392 return ret; 1393 1394 if (ret > 0) 1395 phylink_pcs_an_restart(pl); 1396 1397 return 0; 1398 } 1399 1400 static void phylink_mac_pcs_get_state(struct phylink *pl, 1401 struct phylink_link_state *state) 1402 { 1403 struct phylink_pcs *pcs; 1404 bool autoneg; 1405 1406 linkmode_copy(state->advertising, pl->link_config.advertising); 1407 linkmode_zero(state->lp_advertising); 1408 state->interface = pl->link_config.interface; 1409 state->rate_matching = pl->link_config.rate_matching; 1410 state->an_complete = 0; 1411 state->link = 1; 1412 1413 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1414 if (autoneg) { 1415 state->speed = SPEED_UNKNOWN; 1416 state->duplex = DUPLEX_UNKNOWN; 1417 state->pause = MLO_PAUSE_NONE; 1418 } else { 1419 state->speed = pl->link_config.speed; 1420 state->duplex = pl->link_config.duplex; 1421 state->pause = pl->link_config.pause; 1422 } 1423 1424 pcs = pl->pcs; 1425 if (pcs) 1426 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1427 else 1428 state->link = 0; 1429 } 1430 1431 /* The fixed state is... fixed except for the link state, 1432 * which may be determined by a GPIO or a callback. 1433 */ 1434 static void phylink_get_fixed_state(struct phylink *pl, 1435 struct phylink_link_state *state) 1436 { 1437 *state = pl->link_config; 1438 if (pl->config->get_fixed_state) 1439 pl->config->get_fixed_state(pl->config, state); 1440 else if (pl->link_gpio) 1441 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1442 1443 state->pause = MLO_PAUSE_NONE; 1444 phylink_resolve_an_pause(state); 1445 } 1446 1447 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1448 { 1449 struct phylink_link_state link_state; 1450 struct phy_device *phy = pl->phydev; 1451 1452 switch (pl->req_link_an_mode) { 1453 case MLO_AN_PHY: 1454 link_state = pl->phy_state; 1455 break; 1456 1457 case MLO_AN_FIXED: 1458 phylink_get_fixed_state(pl, &link_state); 1459 break; 1460 1461 case MLO_AN_INBAND: 1462 link_state = pl->link_config; 1463 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1464 link_state.pause = MLO_PAUSE_NONE; 1465 break; 1466 1467 default: /* can't happen */ 1468 return; 1469 } 1470 1471 link_state.link = false; 1472 1473 phylink_apply_manual_flow(pl, &link_state); 1474 if (phy) 1475 mutex_lock(&phy->lock); 1476 phylink_major_config(pl, force_restart, &link_state); 1477 if (phy) 1478 mutex_unlock(&phy->lock); 1479 } 1480 1481 static const char *phylink_pause_to_str(int pause) 1482 { 1483 switch (pause & MLO_PAUSE_TXRX_MASK) { 1484 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1485 return "rx/tx"; 1486 case MLO_PAUSE_TX: 1487 return "tx"; 1488 case MLO_PAUSE_RX: 1489 return "rx"; 1490 default: 1491 return "off"; 1492 } 1493 } 1494 1495 static void phylink_deactivate_lpi(struct phylink *pl) 1496 { 1497 if (pl->mac_enable_tx_lpi) { 1498 pl->mac_enable_tx_lpi = false; 1499 1500 phylink_dbg(pl, "disabling LPI\n"); 1501 1502 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1503 1504 phylink_pcs_disable_eee(pl->pcs); 1505 } 1506 } 1507 1508 static void phylink_activate_lpi(struct phylink *pl) 1509 { 1510 int err; 1511 1512 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1513 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1514 phy_modes(pl->cur_interface)); 1515 return; 1516 } 1517 1518 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1519 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1520 1521 phylink_pcs_enable_eee(pl->pcs); 1522 1523 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1524 pl->mac_tx_clk_stop); 1525 if (err) { 1526 phylink_pcs_disable_eee(pl->pcs); 1527 phylink_err(pl, "%ps() failed: %pe\n", 1528 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1529 return; 1530 } 1531 1532 pl->mac_enable_tx_lpi = true; 1533 } 1534 1535 static void phylink_link_up(struct phylink *pl, 1536 struct phylink_link_state link_state) 1537 { 1538 struct net_device *ndev = pl->netdev; 1539 int speed, duplex; 1540 bool rx_pause; 1541 1542 speed = link_state.speed; 1543 duplex = link_state.duplex; 1544 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1545 1546 switch (link_state.rate_matching) { 1547 case RATE_MATCH_PAUSE: 1548 /* The PHY is doing rate matchion from the media rate (in 1549 * the link_state) to the interface speed, and will send 1550 * pause frames to the MAC to limit its transmission speed. 1551 */ 1552 speed = phylink_interface_max_speed(link_state.interface); 1553 duplex = DUPLEX_FULL; 1554 rx_pause = true; 1555 break; 1556 1557 case RATE_MATCH_CRS: 1558 /* The PHY is doing rate matchion from the media rate (in 1559 * the link_state) to the interface speed, and will cause 1560 * collisions to the MAC to limit its transmission speed. 1561 */ 1562 speed = phylink_interface_max_speed(link_state.interface); 1563 duplex = DUPLEX_HALF; 1564 break; 1565 } 1566 1567 pl->cur_interface = link_state.interface; 1568 1569 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1570 duplex); 1571 1572 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1573 pl->cur_interface, speed, duplex, 1574 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1575 1576 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1577 phylink_activate_lpi(pl); 1578 1579 if (ndev) 1580 netif_carrier_on(ndev); 1581 1582 phylink_info(pl, 1583 "Link is Up - %s/%s - flow control %s\n", 1584 phy_speed_to_str(link_state.speed), 1585 phy_duplex_to_str(link_state.duplex), 1586 phylink_pause_to_str(link_state.pause)); 1587 } 1588 1589 static void phylink_link_down(struct phylink *pl) 1590 { 1591 struct net_device *ndev = pl->netdev; 1592 1593 if (ndev) 1594 netif_carrier_off(ndev); 1595 1596 phylink_deactivate_lpi(pl); 1597 1598 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1599 pl->cur_interface); 1600 phylink_info(pl, "Link is Down\n"); 1601 } 1602 1603 static bool phylink_link_is_up(struct phylink *pl) 1604 { 1605 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1606 } 1607 1608 static void phylink_resolve(struct work_struct *w) 1609 { 1610 struct phylink *pl = container_of(w, struct phylink, resolve); 1611 struct phylink_link_state link_state; 1612 bool mac_config = false; 1613 bool retrigger = false; 1614 struct phy_device *phy; 1615 bool cur_link_state; 1616 1617 mutex_lock(&pl->phydev_mutex); 1618 phy = pl->phydev; 1619 if (phy) 1620 mutex_lock(&phy->lock); 1621 mutex_lock(&pl->state_mutex); 1622 cur_link_state = phylink_link_is_up(pl); 1623 1624 if (pl->phylink_disable_state) { 1625 pl->link_failed = false; 1626 link_state.link = false; 1627 } else if (pl->link_failed) { 1628 link_state.link = false; 1629 retrigger = true; 1630 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1631 phylink_get_fixed_state(pl, &link_state); 1632 mac_config = link_state.link; 1633 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1634 link_state = pl->phy_state; 1635 mac_config = link_state.link; 1636 } else { 1637 phylink_mac_pcs_get_state(pl, &link_state); 1638 1639 /* The PCS may have a latching link-fail indicator. If the link 1640 * was up, bring the link down and re-trigger the resolve. 1641 * Otherwise, re-read the PCS state to get the current status 1642 * of the link. 1643 */ 1644 if (!link_state.link) { 1645 if (cur_link_state) 1646 retrigger = true; 1647 else 1648 phylink_mac_pcs_get_state(pl, &link_state); 1649 } 1650 1651 /* If we have a phy, the "up" state is the union of both the 1652 * PHY and the MAC 1653 */ 1654 if (phy) 1655 link_state.link &= pl->phy_state.link; 1656 1657 /* Only update if the PHY link is up */ 1658 if (phy && pl->phy_state.link) { 1659 /* If the interface has changed, force a link down 1660 * event if the link isn't already down, and re-resolve. 1661 */ 1662 if (link_state.interface != pl->phy_state.interface) { 1663 retrigger = true; 1664 link_state.link = false; 1665 } 1666 1667 link_state.interface = pl->phy_state.interface; 1668 1669 /* If we are doing rate matching, then the link 1670 * speed/duplex comes from the PHY 1671 */ 1672 if (pl->phy_state.rate_matching) { 1673 link_state.rate_matching = 1674 pl->phy_state.rate_matching; 1675 link_state.speed = pl->phy_state.speed; 1676 link_state.duplex = pl->phy_state.duplex; 1677 } 1678 1679 /* If we have a PHY, we need to update with the PHY 1680 * flow control bits. 1681 */ 1682 link_state.pause = pl->phy_state.pause; 1683 mac_config = true; 1684 } 1685 } 1686 1687 if (pl->act_link_an_mode != MLO_AN_FIXED) 1688 phylink_apply_manual_flow(pl, &link_state); 1689 1690 if ((mac_config && link_state.interface != pl->link_config.interface) || 1691 pl->force_major_config) { 1692 /* The interface has changed or a forced major configuration 1693 * was requested, so force the link down and then reconfigure. 1694 */ 1695 if (cur_link_state) { 1696 phylink_link_down(pl); 1697 cur_link_state = false; 1698 } 1699 phylink_major_config(pl, false, &link_state); 1700 pl->link_config.interface = link_state.interface; 1701 pl->force_major_config = false; 1702 } 1703 1704 /* If configuration of the interface failed, force the link down 1705 * until we get a successful configuration. 1706 */ 1707 if (pl->major_config_failed) 1708 link_state.link = false; 1709 1710 if (link_state.link != cur_link_state) { 1711 pl->old_link_state = link_state.link; 1712 if (!link_state.link) 1713 phylink_link_down(pl); 1714 else 1715 phylink_link_up(pl, link_state); 1716 } 1717 if (!link_state.link && retrigger) { 1718 pl->link_failed = false; 1719 queue_work(system_power_efficient_wq, &pl->resolve); 1720 } 1721 mutex_unlock(&pl->state_mutex); 1722 if (phy) 1723 mutex_unlock(&phy->lock); 1724 mutex_unlock(&pl->phydev_mutex); 1725 } 1726 1727 static void phylink_run_resolve(struct phylink *pl) 1728 { 1729 if (!pl->phylink_disable_state) 1730 queue_work(system_power_efficient_wq, &pl->resolve); 1731 } 1732 1733 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1734 { 1735 unsigned long state = pl->phylink_disable_state; 1736 1737 set_bit(bit, &pl->phylink_disable_state); 1738 if (state == 0) { 1739 queue_work(system_power_efficient_wq, &pl->resolve); 1740 flush_work(&pl->resolve); 1741 } 1742 } 1743 1744 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1745 { 1746 clear_bit(bit, &pl->phylink_disable_state); 1747 phylink_run_resolve(pl); 1748 } 1749 1750 static void phylink_fixed_poll(struct timer_list *t) 1751 { 1752 struct phylink *pl = container_of(t, struct phylink, link_poll); 1753 1754 mod_timer(t, jiffies + HZ); 1755 1756 phylink_run_resolve(pl); 1757 } 1758 1759 static const struct sfp_upstream_ops sfp_phylink_ops; 1760 1761 static int phylink_register_sfp(struct phylink *pl, 1762 const struct fwnode_handle *fwnode) 1763 { 1764 struct sfp_bus *bus; 1765 int ret; 1766 1767 if (!fwnode) 1768 return 0; 1769 1770 bus = sfp_bus_find_fwnode(fwnode); 1771 if (IS_ERR(bus)) { 1772 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1773 return PTR_ERR(bus); 1774 } 1775 1776 pl->sfp_bus = bus; 1777 1778 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1779 sfp_bus_put(bus); 1780 1781 return ret; 1782 } 1783 1784 /** 1785 * phylink_set_fixed_link() - set the fixed link 1786 * @pl: a pointer to a &struct phylink returned from phylink_create() 1787 * @state: a pointer to a struct phylink_link_state. 1788 * 1789 * This function is used when the link parameters are known and do not change, 1790 * making it suitable for certain types of network connections. 1791 * 1792 * Returns: zero on success or negative error code. 1793 */ 1794 int phylink_set_fixed_link(struct phylink *pl, 1795 const struct phylink_link_state *state) 1796 { 1797 const struct link_capabilities *c; 1798 unsigned long *adv; 1799 1800 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1801 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1802 return -EINVAL; 1803 1804 c = phy_caps_lookup(state->speed, state->duplex, 1805 pl->supported, true); 1806 if (!c) 1807 return -EINVAL; 1808 1809 adv = pl->link_config.advertising; 1810 linkmode_and(adv, pl->supported, c->linkmodes); 1811 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1812 1813 pl->link_config.speed = state->speed; 1814 pl->link_config.duplex = state->duplex; 1815 pl->link_config.link = 1; 1816 pl->link_config.an_complete = 1; 1817 1818 pl->cfg_link_an_mode = MLO_AN_FIXED; 1819 pl->req_link_an_mode = pl->cfg_link_an_mode; 1820 1821 return 0; 1822 } 1823 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1824 1825 /** 1826 * phylink_create() - create a phylink instance 1827 * @config: a pointer to the target &struct phylink_config 1828 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1829 * interface 1830 * @iface: the desired link mode defined by &typedef phy_interface_t 1831 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1832 * 1833 * Create a new phylink instance, and parse the link parameters found in @np. 1834 * This will parse in-band modes, fixed-link or SFP configuration. 1835 * 1836 * Note: the rtnl lock must not be held when calling this function. 1837 * 1838 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1839 * must use IS_ERR() to check for errors from this function. 1840 */ 1841 struct phylink *phylink_create(struct phylink_config *config, 1842 const struct fwnode_handle *fwnode, 1843 phy_interface_t iface, 1844 const struct phylink_mac_ops *mac_ops) 1845 { 1846 struct phylink *pl; 1847 int ret; 1848 1849 /* Validate the supplied configuration */ 1850 if (phy_interface_empty(config->supported_interfaces)) { 1851 dev_err(config->dev, 1852 "phylink: error: empty supported_interfaces\n"); 1853 return ERR_PTR(-EINVAL); 1854 } 1855 1856 pl = kzalloc_obj(*pl, GFP_KERNEL); 1857 if (!pl) 1858 return ERR_PTR(-ENOMEM); 1859 1860 mutex_init(&pl->phydev_mutex); 1861 mutex_init(&pl->state_mutex); 1862 INIT_WORK(&pl->resolve, phylink_resolve); 1863 1864 pl->config = config; 1865 if (config->type == PHYLINK_NETDEV) { 1866 pl->netdev = to_net_dev(config->dev); 1867 netif_carrier_off(pl->netdev); 1868 } else if (config->type == PHYLINK_DEV) { 1869 pl->dev = config->dev; 1870 } else { 1871 kfree(pl); 1872 return ERR_PTR(-EINVAL); 1873 } 1874 1875 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 1876 pl->mac_supports_eee = pl->mac_supports_eee_ops && 1877 pl->config->lpi_capabilities && 1878 !phy_interface_empty(pl->config->lpi_interfaces); 1879 1880 /* Set the default EEE configuration */ 1881 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 1882 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 1883 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 1884 1885 pl->phy_state.interface = iface; 1886 pl->link_interface = iface; 1887 if (iface == PHY_INTERFACE_MODE_MOCA) 1888 pl->link_port = PORT_BNC; 1889 else 1890 pl->link_port = PORT_MII; 1891 pl->link_config.interface = iface; 1892 pl->link_config.pause = MLO_PAUSE_AN; 1893 pl->link_config.speed = SPEED_UNKNOWN; 1894 pl->link_config.duplex = DUPLEX_UNKNOWN; 1895 pl->pcs_state = PCS_STATE_DOWN; 1896 pl->mac_ops = mac_ops; 1897 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1898 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1899 1900 linkmode_fill(pl->supported); 1901 linkmode_copy(pl->link_config.advertising, pl->supported); 1902 phylink_validate(pl, pl->supported, &pl->link_config); 1903 1904 ret = phylink_parse_mode(pl, fwnode); 1905 if (ret < 0) { 1906 kfree(pl); 1907 return ERR_PTR(ret); 1908 } 1909 1910 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1911 ret = phylink_parse_fixedlink(pl, fwnode); 1912 if (ret < 0) { 1913 kfree(pl); 1914 return ERR_PTR(ret); 1915 } 1916 } 1917 1918 pl->req_link_an_mode = pl->cfg_link_an_mode; 1919 1920 ret = phylink_register_sfp(pl, fwnode); 1921 if (ret < 0) { 1922 kfree(pl); 1923 return ERR_PTR(ret); 1924 } 1925 1926 return pl; 1927 } 1928 EXPORT_SYMBOL_GPL(phylink_create); 1929 1930 /** 1931 * phylink_destroy() - cleanup and destroy the phylink instance 1932 * @pl: a pointer to a &struct phylink returned from phylink_create() 1933 * 1934 * Destroy a phylink instance. Any PHY that has been attached must have been 1935 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1936 * 1937 * Note: the rtnl lock must not be held when calling this function. 1938 */ 1939 void phylink_destroy(struct phylink *pl) 1940 { 1941 sfp_bus_del_upstream(pl->sfp_bus); 1942 if (pl->link_gpio) 1943 gpiod_put(pl->link_gpio); 1944 1945 cancel_work_sync(&pl->resolve); 1946 kfree(pl); 1947 } 1948 EXPORT_SYMBOL_GPL(phylink_destroy); 1949 1950 /** 1951 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1952 * @pl: a pointer to a &struct phylink returned from phylink_create() 1953 * 1954 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1955 * no PHY is needed. 1956 * 1957 * Returns true if phylink will be expecting a PHY. 1958 */ 1959 bool phylink_expects_phy(struct phylink *pl) 1960 { 1961 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1962 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1963 phy_interface_mode_is_8023z(pl->link_interface))) 1964 return false; 1965 return true; 1966 } 1967 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1968 1969 static void phylink_phy_change(struct phy_device *phydev, bool up) 1970 { 1971 struct phylink *pl = phydev->phylink; 1972 bool tx_pause, rx_pause; 1973 1974 phy_get_pause(phydev, &tx_pause, &rx_pause); 1975 1976 mutex_lock(&pl->state_mutex); 1977 pl->phy_state.speed = phydev->speed; 1978 pl->phy_state.duplex = phydev->duplex; 1979 pl->phy_state.rate_matching = phydev->rate_matching; 1980 pl->phy_state.pause = MLO_PAUSE_NONE; 1981 if (tx_pause) 1982 pl->phy_state.pause |= MLO_PAUSE_TX; 1983 if (rx_pause) 1984 pl->phy_state.pause |= MLO_PAUSE_RX; 1985 pl->phy_state.interface = phydev->interface; 1986 pl->phy_state.link = up; 1987 if (!up) 1988 pl->link_failed = true; 1989 1990 /* Get the LPI state from phylib */ 1991 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 1992 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 1993 mutex_unlock(&pl->state_mutex); 1994 1995 phylink_run_resolve(pl); 1996 1997 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 1998 up ? "up" : "down", 1999 phy_modes(phydev->interface), 2000 phy_speed_to_str(phydev->speed), 2001 phy_duplex_to_str(phydev->duplex), 2002 phy_rate_matching_to_str(phydev->rate_matching), 2003 phylink_pause_to_str(pl->phy_state.pause), 2004 phydev->enable_tx_lpi ? "" : "no"); 2005 } 2006 2007 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 2008 unsigned long *supported, 2009 struct phylink_link_state *state) 2010 { 2011 DECLARE_PHY_INTERFACE_MASK(interfaces); 2012 2013 /* If the PHY provides a bitmap of the interfaces it will be using 2014 * depending on the negotiated media speeds, use this to validate 2015 * which ethtool link modes can be used. 2016 */ 2017 if (!phy_interface_empty(phy->possible_interfaces)) { 2018 /* We only care about the union of the PHY's interfaces and 2019 * those which the host supports. 2020 */ 2021 phy_interface_and(interfaces, phy->possible_interfaces, 2022 pl->config->supported_interfaces); 2023 2024 if (phy_interface_empty(interfaces)) { 2025 phylink_err(pl, "PHY has no common interfaces\n"); 2026 return -EINVAL; 2027 } 2028 2029 if (phy_on_sfp(phy)) { 2030 /* If the PHY is on a SFP, limit the interfaces to 2031 * those that can be used with a SFP module. 2032 */ 2033 phy_interface_and(interfaces, interfaces, 2034 phylink_sfp_interfaces); 2035 2036 if (phy_interface_empty(interfaces)) { 2037 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2038 return -EINVAL; 2039 } 2040 } 2041 2042 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2043 phydev_name(phy), 2044 (int)PHY_INTERFACE_MODE_MAX, 2045 phy->possible_interfaces, 2046 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2047 2048 return phylink_validate_mask(pl, phy, supported, state, 2049 interfaces); 2050 } 2051 2052 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2053 phydev_name(phy)); 2054 2055 /* Check whether we would use rate matching for the proposed interface 2056 * mode. 2057 */ 2058 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2059 2060 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2061 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2062 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2063 * their Serdes is either unnecessary or not reasonable. 2064 * 2065 * For these which switch interface modes, we really need to know which 2066 * interface modes the PHY supports to properly work out which ethtool 2067 * linkmodes can be supported. For now, as a work-around, we validate 2068 * against all interface modes, which may lead to more ethtool link 2069 * modes being advertised than are actually supported. 2070 */ 2071 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2072 state->interface != PHY_INTERFACE_MODE_RXAUI && 2073 state->interface != PHY_INTERFACE_MODE_XAUI && 2074 state->interface != PHY_INTERFACE_MODE_USXGMII) 2075 state->interface = PHY_INTERFACE_MODE_NA; 2076 2077 return phylink_validate(pl, supported, state); 2078 } 2079 2080 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2081 phy_interface_t interface) 2082 { 2083 struct phylink_link_state config; 2084 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2085 char *irq_str; 2086 int ret; 2087 2088 /* 2089 * This is the new way of dealing with flow control for PHYs, 2090 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2091 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 2092 * using our validate call to the MAC, we rely upon the MAC 2093 * clearing the bits from both supported and advertising fields. 2094 */ 2095 phy_support_asym_pause(phy); 2096 2097 memset(&config, 0, sizeof(config)); 2098 linkmode_copy(supported, phy->supported); 2099 linkmode_copy(config.advertising, phy->advertising); 2100 config.interface = interface; 2101 2102 ret = phylink_validate_phy(pl, phy, supported, &config); 2103 if (ret) { 2104 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2105 phy_modes(config.interface), 2106 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2107 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2108 ERR_PTR(ret)); 2109 return ret; 2110 } 2111 2112 phy->phylink = pl; 2113 phy->phy_link_change = phylink_phy_change; 2114 2115 irq_str = phy_attached_info_irq(phy); 2116 phylink_info(pl, 2117 "PHY [%s] driver [%s] (irq=%s)\n", 2118 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2119 kfree(irq_str); 2120 2121 mutex_lock(&pl->phydev_mutex); 2122 mutex_lock(&phy->lock); 2123 mutex_lock(&pl->state_mutex); 2124 pl->phydev = phy; 2125 pl->phy_state.interface = interface; 2126 pl->phy_state.pause = MLO_PAUSE_NONE; 2127 pl->phy_state.speed = SPEED_UNKNOWN; 2128 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2129 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2130 linkmode_copy(pl->supported, supported); 2131 linkmode_copy(pl->link_config.advertising, config.advertising); 2132 2133 /* Restrict the phy advertisement according to the MAC support. */ 2134 linkmode_copy(phy->advertising, config.advertising); 2135 2136 /* If the MAC supports phylink managed EEE, restrict the EEE 2137 * advertisement according to the MAC's LPI capabilities. 2138 */ 2139 if (pl->mac_supports_eee) { 2140 /* If EEE is enabled, then we need to call phy_support_eee() 2141 * to ensure that the advertising mask is appropriately set. 2142 * This also enables EEE at the PHY. 2143 */ 2144 if (pl->eee_cfg.eee_enabled) 2145 phy_support_eee(phy); 2146 2147 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2148 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2149 2150 /* Convert the MAC's LPI capabilities to linkmodes */ 2151 linkmode_zero(pl->supported_lpi); 2152 phylink_caps_to_linkmodes(pl->supported_lpi, 2153 pl->config->lpi_capabilities); 2154 2155 /* Restrict the PHYs EEE support/advertisement to the modes 2156 * that the MAC supports. 2157 */ 2158 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2159 pl->supported_lpi); 2160 } else if (pl->mac_supports_eee_ops) { 2161 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2162 phy_disable_eee(phy); 2163 } 2164 2165 mutex_unlock(&pl->state_mutex); 2166 mutex_unlock(&phy->lock); 2167 mutex_unlock(&pl->phydev_mutex); 2168 2169 phylink_dbg(pl, 2170 "phy: %s setting supported %*pb advertising %*pb\n", 2171 phy_modes(interface), 2172 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2173 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2174 2175 if (pl->config->mac_managed_pm) 2176 phy->mac_managed_pm = true; 2177 2178 /* Allow the MAC to stop its clock if the PHY has the capability */ 2179 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2180 2181 if (pl->mac_supports_eee_ops) { 2182 /* Explicitly configure whether the PHY is allowed to stop it's 2183 * receive clock. 2184 */ 2185 ret = phy_eee_rx_clock_stop(phy, 2186 pl->config->eee_rx_clk_stop_enable); 2187 if (ret == -EOPNOTSUPP) 2188 ret = 0; 2189 } 2190 2191 if (ret == 0 && phy_interrupt_is_valid(phy)) 2192 phy_request_interrupt(phy); 2193 2194 return ret; 2195 } 2196 2197 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2198 phy_interface_t interface) 2199 { 2200 u32 flags = 0; 2201 2202 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 2203 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2204 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 2205 return -EINVAL; 2206 2207 if (pl->phydev) 2208 return -EBUSY; 2209 2210 if (pl->config->mac_requires_rxc) 2211 flags |= PHY_F_RXC_ALWAYS_ON; 2212 2213 return phy_attach_direct(pl->netdev, phy, flags, interface); 2214 } 2215 2216 /** 2217 * phylink_connect_phy() - connect a PHY to the phylink instance 2218 * @pl: a pointer to a &struct phylink returned from phylink_create() 2219 * @phy: a pointer to a &struct phy_device. 2220 * 2221 * Connect @phy to the phylink instance specified by @pl by calling 2222 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2223 * capabilities, start the PHYLIB state machine and enable any interrupts 2224 * that the PHY supports. 2225 * 2226 * This updates the phylink's ethtool supported and advertising link mode 2227 * masks. 2228 * 2229 * Returns 0 on success or a negative errno. 2230 */ 2231 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2232 { 2233 int ret; 2234 2235 /* Use PHY device/driver interface */ 2236 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2237 pl->link_interface = phy->interface; 2238 pl->link_config.interface = pl->link_interface; 2239 } 2240 2241 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2242 if (ret < 0) 2243 return ret; 2244 2245 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2246 if (ret) 2247 phy_detach(phy); 2248 2249 return ret; 2250 } 2251 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2252 2253 /** 2254 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2255 * @pl: a pointer to a &struct phylink returned from phylink_create() 2256 * @dn: a pointer to a &struct device_node. 2257 * @flags: PHY-specific flags to communicate to the PHY device driver 2258 * 2259 * Connect the phy specified in the device node @dn to the phylink instance 2260 * specified by @pl. Actions specified in phylink_connect_phy() will be 2261 * performed. 2262 * 2263 * Returns 0 on success or a negative errno. 2264 */ 2265 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2266 u32 flags) 2267 { 2268 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2269 } 2270 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2271 2272 /** 2273 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2274 * @pl: a pointer to a &struct phylink returned from phylink_create() 2275 * @fwnode: a pointer to a &struct fwnode_handle. 2276 * @flags: PHY-specific flags to communicate to the PHY device driver 2277 * 2278 * Connect the phy specified @fwnode to the phylink instance specified 2279 * by @pl. 2280 * 2281 * Returns 0 on success or a negative errno. 2282 */ 2283 int phylink_fwnode_phy_connect(struct phylink *pl, 2284 const struct fwnode_handle *fwnode, 2285 u32 flags) 2286 { 2287 struct fwnode_handle *phy_fwnode; 2288 struct phy_device *phy_dev; 2289 int ret; 2290 2291 /* Fixed links and 802.3z are handled without needing a PHY */ 2292 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2293 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2294 phy_interface_mode_is_8023z(pl->link_interface))) 2295 return 0; 2296 2297 phy_fwnode = fwnode_get_phy_node(fwnode); 2298 if (IS_ERR(phy_fwnode)) { 2299 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2300 return -ENODEV; 2301 return 0; 2302 } 2303 2304 phy_dev = fwnode_phy_find_device(phy_fwnode); 2305 /* We're done with the phy_node handle */ 2306 fwnode_handle_put(phy_fwnode); 2307 if (!phy_dev) 2308 return -ENODEV; 2309 2310 /* Use PHY device/driver interface */ 2311 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2312 pl->link_interface = phy_dev->interface; 2313 pl->link_config.interface = pl->link_interface; 2314 } 2315 2316 if (pl->config->mac_requires_rxc) 2317 flags |= PHY_F_RXC_ALWAYS_ON; 2318 2319 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2320 pl->link_interface); 2321 phy_device_free(phy_dev); 2322 if (ret) 2323 return ret; 2324 2325 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2326 if (ret) 2327 phy_detach(phy_dev); 2328 2329 return ret; 2330 } 2331 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2332 2333 /** 2334 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2335 * instance. 2336 * @pl: a pointer to a &struct phylink returned from phylink_create() 2337 * 2338 * Disconnect any current PHY from the phylink instance described by @pl. 2339 */ 2340 void phylink_disconnect_phy(struct phylink *pl) 2341 { 2342 struct phy_device *phy; 2343 2344 ASSERT_RTNL(); 2345 2346 mutex_lock(&pl->phydev_mutex); 2347 phy = pl->phydev; 2348 if (phy) { 2349 mutex_lock(&phy->lock); 2350 mutex_lock(&pl->state_mutex); 2351 pl->phydev = NULL; 2352 pl->phy_enable_tx_lpi = false; 2353 pl->mac_tx_clk_stop = false; 2354 mutex_unlock(&pl->state_mutex); 2355 mutex_unlock(&phy->lock); 2356 } 2357 mutex_unlock(&pl->phydev_mutex); 2358 2359 if (phy) { 2360 flush_work(&pl->resolve); 2361 phy_disconnect(phy); 2362 } 2363 } 2364 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2365 2366 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2367 { 2368 if (!up) 2369 pl->link_failed = true; 2370 phylink_run_resolve(pl); 2371 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2372 } 2373 2374 /** 2375 * phylink_mac_change() - notify phylink of a change in MAC state 2376 * @pl: a pointer to a &struct phylink returned from phylink_create() 2377 * @up: indicates whether the link is currently up. 2378 * 2379 * The MAC driver should call this driver when the state of its link 2380 * changes (eg, link failure, new negotiation results, etc.) 2381 */ 2382 void phylink_mac_change(struct phylink *pl, bool up) 2383 { 2384 phylink_link_changed(pl, up, "mac"); 2385 } 2386 EXPORT_SYMBOL_GPL(phylink_mac_change); 2387 2388 /** 2389 * phylink_pcs_change() - notify phylink of a change to PCS link state 2390 * @pcs: pointer to &struct phylink_pcs 2391 * @up: indicates whether the link is currently up. 2392 * 2393 * The PCS driver should call this when the state of its link changes 2394 * (e.g. link failure, new negotiation results, etc.) Note: it should 2395 * not determine "up" by reading the BMSR. If in doubt about the link 2396 * state at interrupt time, then pass true if pcs_get_state() returns 2397 * the latched link-down state, otherwise pass false. 2398 */ 2399 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2400 { 2401 struct phylink *pl = pcs->phylink; 2402 2403 if (pl) 2404 phylink_link_changed(pl, up, "pcs"); 2405 } 2406 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2407 2408 static irqreturn_t phylink_link_handler(int irq, void *data) 2409 { 2410 struct phylink *pl = data; 2411 2412 phylink_run_resolve(pl); 2413 2414 return IRQ_HANDLED; 2415 } 2416 2417 /** 2418 * phylink_start() - start a phylink instance 2419 * @pl: a pointer to a &struct phylink returned from phylink_create() 2420 * 2421 * Start the phylink instance specified by @pl, configuring the MAC for the 2422 * desired link mode(s) and negotiation style. This should be called from the 2423 * network device driver's &struct net_device_ops ndo_open() method. 2424 */ 2425 void phylink_start(struct phylink *pl) 2426 { 2427 bool poll = false; 2428 2429 ASSERT_RTNL(); 2430 2431 phylink_info(pl, "configuring for %s/%s link mode\n", 2432 phylink_an_mode_str(pl->req_link_an_mode), 2433 phy_modes(pl->link_config.interface)); 2434 2435 /* Always set the carrier off */ 2436 if (pl->netdev) 2437 netif_carrier_off(pl->netdev); 2438 2439 pl->pcs_state = PCS_STATE_STARTING; 2440 2441 /* Apply the link configuration to the MAC when starting. This allows 2442 * a fixed-link to start with the correct parameters, and also 2443 * ensures that we set the appropriate advertisement for Serdes links. 2444 * 2445 * Restart autonegotiation if using 802.3z to ensure that the link 2446 * parameters are properly negotiated. This is necessary for DSA 2447 * switches using 802.3z negotiation to ensure they see our modes. 2448 */ 2449 phylink_mac_initial_config(pl, true); 2450 2451 pl->pcs_state = PCS_STATE_STARTED; 2452 2453 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2454 2455 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2456 int irq = gpiod_to_irq(pl->link_gpio); 2457 2458 if (irq > 0) { 2459 if (!request_irq(irq, phylink_link_handler, 2460 IRQF_TRIGGER_RISING | 2461 IRQF_TRIGGER_FALLING, 2462 "netdev link", pl)) 2463 pl->link_irq = irq; 2464 else 2465 irq = 0; 2466 } 2467 if (irq <= 0) 2468 poll = true; 2469 } 2470 2471 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2472 poll |= pl->config->poll_fixed_state; 2473 2474 if (poll) 2475 mod_timer(&pl->link_poll, jiffies + HZ); 2476 if (pl->phydev) 2477 phy_start(pl->phydev); 2478 if (pl->sfp_bus) 2479 sfp_upstream_start(pl->sfp_bus); 2480 } 2481 EXPORT_SYMBOL_GPL(phylink_start); 2482 2483 /** 2484 * phylink_stop() - stop a phylink instance 2485 * @pl: a pointer to a &struct phylink returned from phylink_create() 2486 * 2487 * Stop the phylink instance specified by @pl. This should be called from the 2488 * network device driver's &struct net_device_ops ndo_stop() method. The 2489 * network device's carrier state should not be changed prior to calling this 2490 * function. 2491 * 2492 * This will synchronously bring down the link if the link is not already 2493 * down (in other words, it will trigger a mac_link_down() method call.) 2494 */ 2495 void phylink_stop(struct phylink *pl) 2496 { 2497 ASSERT_RTNL(); 2498 2499 if (pl->sfp_bus) 2500 sfp_upstream_stop(pl->sfp_bus); 2501 if (pl->phydev) 2502 phy_stop(pl->phydev); 2503 timer_delete_sync(&pl->link_poll); 2504 if (pl->link_irq) { 2505 free_irq(pl->link_irq, pl); 2506 pl->link_irq = 0; 2507 } 2508 2509 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2510 2511 pl->pcs_state = PCS_STATE_DOWN; 2512 2513 phylink_pcs_disable(pl->pcs); 2514 } 2515 EXPORT_SYMBOL_GPL(phylink_stop); 2516 2517 /** 2518 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI 2519 * @pl: a pointer to a &struct phylink returned from phylink_create() 2520 * 2521 * Disable the PHY's ability to stop the receive clock while the receive path 2522 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block() 2523 * are balanced by calls to phylink_rx_clk_stop_unblock(). 2524 */ 2525 void phylink_rx_clk_stop_block(struct phylink *pl) 2526 { 2527 ASSERT_RTNL(); 2528 2529 if (pl->mac_rx_clk_stop_blocked == U8_MAX) { 2530 phylink_warn(pl, "%s called too many times - ignoring\n", 2531 __func__); 2532 dump_stack(); 2533 return; 2534 } 2535 2536 /* Disable PHY receive clock stop if this is the first time this 2537 * function has been called and clock-stop was previously enabled. 2538 */ 2539 if (pl->mac_rx_clk_stop_blocked++ == 0 && 2540 pl->mac_supports_eee_ops && pl->phydev && 2541 pl->config->eee_rx_clk_stop_enable) 2542 phy_eee_rx_clock_stop(pl->phydev, false); 2543 } 2544 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block); 2545 2546 /** 2547 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock 2548 * @pl: a pointer to a &struct phylink returned from phylink_create() 2549 * 2550 * All calls to phylink_rx_clk_stop_block() must be balanced with a 2551 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs 2552 * ability to stop the receive clock when the receive path is in EEE LPI mode. 2553 */ 2554 void phylink_rx_clk_stop_unblock(struct phylink *pl) 2555 { 2556 ASSERT_RTNL(); 2557 2558 if (pl->mac_rx_clk_stop_blocked == 0) { 2559 phylink_warn(pl, "%s called too many times - ignoring\n", 2560 __func__); 2561 dump_stack(); 2562 return; 2563 } 2564 2565 /* Re-enable PHY receive clock stop if the number of unblocks matches 2566 * the number of calls to the block function above. 2567 */ 2568 if (--pl->mac_rx_clk_stop_blocked == 0 && 2569 pl->mac_supports_eee_ops && pl->phydev && 2570 pl->config->eee_rx_clk_stop_enable) 2571 phy_eee_rx_clock_stop(pl->phydev, true); 2572 } 2573 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock); 2574 2575 static bool phylink_mac_supports_wol(struct phylink *pl) 2576 { 2577 return !!pl->mac_ops->mac_wol_set; 2578 } 2579 2580 static bool phylink_phy_supports_wol(struct phylink *pl, 2581 struct phy_device *phydev) 2582 { 2583 return phydev && (pl->config->wol_phy_legacy || phy_can_wakeup(phydev)); 2584 } 2585 2586 static bool phylink_phy_pm_speed_ctrl(struct phylink *pl) 2587 { 2588 return pl->config->wol_phy_speed_ctrl && !pl->wolopts_mac && 2589 pl->phydev && phy_may_wakeup(pl->phydev); 2590 } 2591 2592 /** 2593 * phylink_suspend() - handle a network device suspend event 2594 * @pl: a pointer to a &struct phylink returned from phylink_create() 2595 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2596 * 2597 * Handle a network device suspend event. There are several cases: 2598 * 2599 * - If Wake-on-Lan is not active, we can bring down the link between 2600 * the MAC and PHY by calling phylink_stop(). 2601 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2602 * can also bring down the link between the MAC and PHY. 2603 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2604 * still needs to receive packets, so we can not bring the link down. 2605 * 2606 * Note: when phylink managed Wake-on-Lan is in use, @mac_wol is ignored. 2607 * (struct phylink_mac_ops.mac_set_wol populated.) 2608 */ 2609 void phylink_suspend(struct phylink *pl, bool mac_wol) 2610 { 2611 ASSERT_RTNL(); 2612 2613 if (phylink_mac_supports_wol(pl)) 2614 mac_wol = !!pl->wolopts_mac; 2615 2616 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2617 /* Wake-on-Lan enabled, MAC handling */ 2618 mutex_lock(&pl->state_mutex); 2619 2620 /* Stop the resolver bringing the link up */ 2621 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2622 2623 pl->suspend_link_up = phylink_link_is_up(pl); 2624 if (pl->suspend_link_up) { 2625 /* Disable the carrier, to prevent transmit timeouts, 2626 * but one would hope all packets have been sent. This 2627 * also means phylink_resolve() will do nothing. 2628 */ 2629 if (pl->netdev) 2630 netif_carrier_off(pl->netdev); 2631 pl->old_link_state = false; 2632 } 2633 2634 /* We do not call mac_link_down() here as we want the 2635 * link to remain up to receive the WoL packets. 2636 */ 2637 mutex_unlock(&pl->state_mutex); 2638 } else { 2639 phylink_stop(pl); 2640 } 2641 2642 if (phylink_phy_pm_speed_ctrl(pl)) 2643 phylink_speed_down(pl, false); 2644 } 2645 EXPORT_SYMBOL_GPL(phylink_suspend); 2646 2647 /** 2648 * phylink_prepare_resume() - prepare to resume a network device 2649 * @pl: a pointer to a &struct phylink returned from phylink_create() 2650 * 2651 * Optional, but if called must be called prior to phylink_resume(). 2652 * 2653 * Prepare to resume a network device, preparing the PHY as necessary. 2654 */ 2655 void phylink_prepare_resume(struct phylink *pl) 2656 { 2657 struct phy_device *phydev = pl->phydev; 2658 2659 ASSERT_RTNL(); 2660 2661 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock 2662 * when PDOWN is set. However, some MACs require RXC to be running 2663 * in order to resume. If the MAC requires RXC, and we have a PHY, 2664 * then resume the PHY. Note that 802.3 allows PHYs 500ms before 2665 * the clock meets requirements. We do not implement this delay. 2666 */ 2667 if (pl->config->mac_requires_rxc && phydev && phydev->suspended) 2668 phy_resume(phydev); 2669 } 2670 EXPORT_SYMBOL_GPL(phylink_prepare_resume); 2671 2672 /** 2673 * phylink_resume() - handle a network device resume event 2674 * @pl: a pointer to a &struct phylink returned from phylink_create() 2675 * 2676 * Undo the effects of phylink_suspend(), returning the link to an 2677 * operational state. 2678 */ 2679 void phylink_resume(struct phylink *pl) 2680 { 2681 ASSERT_RTNL(); 2682 2683 if (phylink_phy_pm_speed_ctrl(pl)) 2684 phylink_speed_up(pl); 2685 2686 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2687 /* Wake-on-Lan enabled, MAC handling */ 2688 2689 if (pl->suspend_link_up) { 2690 /* Call mac_link_down() so we keep the overall state 2691 * balanced. Do this under the state_mutex lock for 2692 * consistency. This will cause a "Link Down" message 2693 * to be printed during resume, which is harmless - 2694 * the true link state will be printed when we run a 2695 * resolve. 2696 */ 2697 mutex_lock(&pl->state_mutex); 2698 phylink_link_down(pl); 2699 mutex_unlock(&pl->state_mutex); 2700 } 2701 2702 /* Re-apply the link parameters so that all the settings get 2703 * restored to the MAC. 2704 */ 2705 phylink_mac_initial_config(pl, true); 2706 2707 /* Re-enable and re-resolve the link parameters */ 2708 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2709 } else { 2710 phylink_start(pl); 2711 } 2712 } 2713 EXPORT_SYMBOL_GPL(phylink_resume); 2714 2715 /** 2716 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2717 * @pl: a pointer to a &struct phylink returned from phylink_create() 2718 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2719 * 2720 * Read the wake on lan parameters from the PHY attached to the phylink 2721 * instance specified by @pl. If no PHY is currently attached, report no 2722 * support for wake on lan. 2723 */ 2724 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2725 { 2726 ASSERT_RTNL(); 2727 2728 wol->supported = 0; 2729 wol->wolopts = 0; 2730 2731 if (phylink_mac_supports_wol(pl)) { 2732 if (phylink_phy_supports_wol(pl, pl->phydev)) 2733 phy_ethtool_get_wol(pl->phydev, wol); 2734 2735 /* Where the MAC augments the WoL support, merge its support and 2736 * current configuration. 2737 */ 2738 if (~wol->wolopts & pl->wolopts_mac & WAKE_MAGICSECURE) 2739 memcpy(wol->sopass, pl->wol_sopass, 2740 sizeof(wol->sopass)); 2741 2742 wol->supported |= pl->config->wol_mac_support; 2743 wol->wolopts |= pl->wolopts_mac; 2744 } else { 2745 /* Legacy */ 2746 if (pl->phydev) 2747 phy_ethtool_get_wol(pl->phydev, wol); 2748 } 2749 } 2750 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2751 2752 /** 2753 * phylink_ethtool_set_wol() - set wake on lan parameters 2754 * @pl: a pointer to a &struct phylink returned from phylink_create() 2755 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2756 * 2757 * Set the wake on lan parameters for the PHY attached to the phylink 2758 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2759 * error. 2760 * 2761 * Returns zero on success or negative errno code. 2762 */ 2763 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2764 { 2765 struct ethtool_wolinfo w = { .cmd = ETHTOOL_GWOL }; 2766 int ret = -EOPNOTSUPP; 2767 bool changed; 2768 u32 wolopts; 2769 2770 ASSERT_RTNL(); 2771 2772 if (phylink_mac_supports_wol(pl)) { 2773 wolopts = wol->wolopts; 2774 2775 if (phylink_phy_supports_wol(pl, pl->phydev)) { 2776 ret = phy_ethtool_set_wol(pl->phydev, wol); 2777 if (ret != 0 && ret != -EOPNOTSUPP) 2778 return ret; 2779 2780 phy_ethtool_get_wol(pl->phydev, &w); 2781 2782 /* Any Wake-on-Lan modes which the PHY is handling 2783 * should not be passed on to the MAC. 2784 */ 2785 wolopts &= ~w.wolopts; 2786 } 2787 2788 wolopts &= pl->config->wol_mac_support; 2789 changed = pl->wolopts_mac != wolopts; 2790 if (wolopts & WAKE_MAGICSECURE) 2791 changed |= !!memcmp(wol->sopass, pl->wol_sopass, 2792 sizeof(wol->sopass)); 2793 memcpy(pl->wol_sopass, wol->sopass, sizeof(pl->wol_sopass)); 2794 2795 if (changed) { 2796 ret = pl->mac_ops->mac_wol_set(pl->config, wolopts, 2797 wol->sopass); 2798 if (!ret) 2799 pl->wolopts_mac = wolopts; 2800 } else { 2801 ret = 0; 2802 } 2803 } else { 2804 if (pl->phydev) 2805 ret = phy_ethtool_set_wol(pl->phydev, wol); 2806 } 2807 2808 return ret; 2809 } 2810 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2811 2812 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2813 const unsigned long *link_modes) 2814 { 2815 phy_interface_t interface; 2816 2817 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2818 if (interface == PHY_INTERFACE_MODE_NA) { 2819 phylink_err(pl, 2820 "selection of interface failed, advertisement %*pb\n", 2821 __ETHTOOL_LINK_MODE_MASK_NBITS, 2822 link_modes); 2823 return interface; 2824 } 2825 2826 if (!test_bit(interface, pl->config->supported_interfaces)) { 2827 phylink_err(pl, 2828 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2829 phy_modes(interface), interface, 2830 (int)PHY_INTERFACE_MODE_MAX, 2831 pl->config->supported_interfaces); 2832 return PHY_INTERFACE_MODE_NA; 2833 } 2834 2835 return interface; 2836 } 2837 2838 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl, 2839 u32 speed) 2840 { 2841 phy_interface_t best_interface = PHY_INTERFACE_MODE_NA; 2842 phy_interface_t interface; 2843 u32 max_speed; 2844 int i; 2845 2846 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) { 2847 interface = phylink_sfp_interface_preference[i]; 2848 if (!test_bit(interface, pl->sfp_interfaces)) 2849 continue; 2850 2851 max_speed = phylink_interface_max_speed(interface); 2852 2853 /* The logic here is: if speed == max_speed, then we've found 2854 * the best interface. Otherwise we find the interface that 2855 * can just support the requested speed. 2856 */ 2857 if (max_speed >= speed) 2858 best_interface = interface; 2859 2860 if (max_speed <= speed) 2861 break; 2862 } 2863 2864 if (best_interface == PHY_INTERFACE_MODE_NA) 2865 phylink_err(pl, "selection of interface failed, speed %u\n", 2866 speed); 2867 2868 return best_interface; 2869 } 2870 2871 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2872 { 2873 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2874 2875 linkmode_zero(mask); 2876 phylink_set_port_modes(mask); 2877 2878 linkmode_and(dst, dst, mask); 2879 linkmode_or(dst, dst, b); 2880 } 2881 2882 static void phylink_get_ksettings(const struct phylink_link_state *state, 2883 struct ethtool_link_ksettings *kset) 2884 { 2885 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2886 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2887 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2888 kset->base.speed = state->speed; 2889 kset->base.duplex = state->duplex; 2890 } 2891 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2892 state->advertising) ? 2893 AUTONEG_ENABLE : AUTONEG_DISABLE; 2894 } 2895 2896 /** 2897 * phylink_ethtool_ksettings_get() - get the current link settings 2898 * @pl: a pointer to a &struct phylink returned from phylink_create() 2899 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2900 * 2901 * Read the current link settings for the phylink instance specified by @pl. 2902 * This will be the link settings read from the MAC, PHY or fixed link 2903 * settings depending on the current negotiation mode. 2904 */ 2905 int phylink_ethtool_ksettings_get(struct phylink *pl, 2906 struct ethtool_link_ksettings *kset) 2907 { 2908 struct phylink_link_state link_state; 2909 2910 ASSERT_RTNL(); 2911 2912 if (pl->phydev) 2913 phy_ethtool_ksettings_get(pl->phydev, kset); 2914 else 2915 kset->base.port = pl->link_port; 2916 2917 linkmode_copy(kset->link_modes.supported, pl->supported); 2918 2919 switch (pl->act_link_an_mode) { 2920 case MLO_AN_FIXED: 2921 /* We are using fixed settings. Report these as the 2922 * current link settings - and note that these also 2923 * represent the supported speeds/duplex/pause modes. 2924 */ 2925 phylink_get_fixed_state(pl, &link_state); 2926 phylink_get_ksettings(&link_state, kset); 2927 break; 2928 2929 case MLO_AN_INBAND: 2930 /* If there is a phy attached, then use the reported 2931 * settings from the phy with no modification. 2932 */ 2933 if (pl->phydev) 2934 break; 2935 2936 phylink_mac_pcs_get_state(pl, &link_state); 2937 2938 /* The MAC is reporting the link results from its own PCS 2939 * layer via in-band status. Report these as the current 2940 * link settings. 2941 */ 2942 phylink_get_ksettings(&link_state, kset); 2943 break; 2944 } 2945 2946 return 0; 2947 } 2948 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2949 2950 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 2951 phy_interface_t interface, 2952 unsigned long *adv) 2953 { 2954 unsigned int inband = phylink_inband_caps(pl, interface); 2955 unsigned int mask; 2956 2957 /* If the PCS doesn't implement inband support, be permissive. */ 2958 if (!inband) 2959 return true; 2960 2961 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 2962 mask = LINK_INBAND_ENABLE; 2963 else 2964 mask = LINK_INBAND_DISABLE; 2965 2966 /* Check whether the PCS implements the required mode */ 2967 return !!(inband & mask); 2968 } 2969 2970 /** 2971 * phylink_ethtool_ksettings_set() - set the link settings 2972 * @pl: a pointer to a &struct phylink returned from phylink_create() 2973 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2974 */ 2975 int phylink_ethtool_ksettings_set(struct phylink *pl, 2976 const struct ethtool_link_ksettings *kset) 2977 { 2978 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2979 const struct link_capabilities *c; 2980 struct phylink_link_state config; 2981 2982 ASSERT_RTNL(); 2983 2984 if (pl->phydev) { 2985 struct ethtool_link_ksettings phy_kset = *kset; 2986 2987 linkmode_and(phy_kset.link_modes.advertising, 2988 phy_kset.link_modes.advertising, 2989 pl->supported); 2990 2991 /* We can rely on phylib for this update; we also do not need 2992 * to update the pl->link_config settings: 2993 * - the configuration returned via ksettings_get() will come 2994 * from phylib whenever a PHY is present. 2995 * - link_config.interface will be updated by the PHY calling 2996 * back via phylink_phy_change() and a subsequent resolve. 2997 * - initial link configuration for PHY mode comes from the 2998 * last phy state updated via phylink_phy_change(). 2999 * - other configuration changes (e.g. pause modes) are 3000 * performed directly via phylib. 3001 * - if in in-band mode with a PHY, the link configuration 3002 * is passed on the link from the PHY, and all of 3003 * link_config.{speed,duplex,an_enabled,pause} are not used. 3004 * - the only possible use would be link_config.advertising 3005 * pause modes when in 1000base-X mode with a PHY, but in 3006 * the presence of a PHY, this should not be changed as that 3007 * should be determined from the media side advertisement. 3008 */ 3009 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 3010 } 3011 3012 config = pl->link_config; 3013 /* Mask out unsupported advertisements */ 3014 linkmode_and(config.advertising, kset->link_modes.advertising, 3015 pl->supported); 3016 3017 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 3018 switch (kset->base.autoneg) { 3019 case AUTONEG_DISABLE: 3020 /* Autonegotiation disabled, select a suitable speed and 3021 * duplex. 3022 */ 3023 c = phy_caps_lookup(kset->base.speed, kset->base.duplex, 3024 pl->supported, false); 3025 if (!c) 3026 return -EINVAL; 3027 3028 /* If we have a fixed link, refuse to change link parameters. 3029 * If the link parameters match, accept them but do nothing. 3030 */ 3031 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3032 if (c->speed != pl->link_config.speed || 3033 c->duplex != pl->link_config.duplex) 3034 return -EINVAL; 3035 return 0; 3036 } 3037 3038 config.speed = c->speed; 3039 config.duplex = c->duplex; 3040 break; 3041 3042 case AUTONEG_ENABLE: 3043 /* If we have a fixed link, allow autonegotiation (since that 3044 * is our default case) but do not allow the advertisement to 3045 * be changed. If the advertisement matches, simply return. 3046 */ 3047 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3048 if (!linkmode_equal(config.advertising, 3049 pl->link_config.advertising)) 3050 return -EINVAL; 3051 return 0; 3052 } 3053 3054 config.speed = SPEED_UNKNOWN; 3055 config.duplex = DUPLEX_UNKNOWN; 3056 break; 3057 3058 default: 3059 return -EINVAL; 3060 } 3061 3062 /* We have ruled out the case with a PHY attached, and the 3063 * fixed-link cases. All that is left are in-band links. 3064 */ 3065 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 3066 kset->base.autoneg == AUTONEG_ENABLE); 3067 3068 /* If this link is with an SFP, ensure that changes to advertised modes 3069 * also cause the associated interface to be selected such that the 3070 * link can be configured correctly. 3071 */ 3072 if (pl->sfp_bus) { 3073 if (kset->base.autoneg == AUTONEG_ENABLE) 3074 config.interface = 3075 phylink_sfp_select_interface(pl, 3076 config.advertising); 3077 else 3078 config.interface = 3079 phylink_sfp_select_interface_speed(pl, 3080 config.speed); 3081 if (config.interface == PHY_INTERFACE_MODE_NA) 3082 return -EINVAL; 3083 3084 /* Revalidate with the selected interface */ 3085 linkmode_copy(support, pl->supported); 3086 if (phylink_validate(pl, support, &config)) { 3087 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 3088 phylink_an_mode_str(pl->req_link_an_mode), 3089 phy_modes(config.interface), 3090 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3091 return -EINVAL; 3092 } 3093 } else { 3094 /* Validate without changing the current supported mask. */ 3095 linkmode_copy(support, pl->supported); 3096 if (phylink_validate(pl, support, &config)) 3097 return -EINVAL; 3098 } 3099 3100 /* If autonegotiation is enabled, we must have an advertisement */ 3101 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3102 config.advertising) && 3103 phylink_is_empty_linkmode(config.advertising)) 3104 return -EINVAL; 3105 3106 /* Validate the autonegotiation state. We don't have a PHY in this 3107 * situation, so the PCS is the media-facing entity. 3108 */ 3109 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 3110 config.advertising)) 3111 return -EINVAL; 3112 3113 mutex_lock(&pl->state_mutex); 3114 pl->link_config.speed = config.speed; 3115 pl->link_config.duplex = config.duplex; 3116 3117 if (pl->link_config.interface != config.interface) { 3118 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 3119 /* We need to force the link down, then change the interface */ 3120 if (pl->old_link_state) { 3121 phylink_link_down(pl); 3122 pl->old_link_state = false; 3123 } 3124 if (!test_bit(PHYLINK_DISABLE_STOPPED, 3125 &pl->phylink_disable_state)) 3126 phylink_major_config(pl, false, &config); 3127 pl->link_config.interface = config.interface; 3128 linkmode_copy(pl->link_config.advertising, config.advertising); 3129 } else if (!linkmode_equal(pl->link_config.advertising, 3130 config.advertising)) { 3131 linkmode_copy(pl->link_config.advertising, config.advertising); 3132 phylink_change_inband_advert(pl); 3133 } 3134 mutex_unlock(&pl->state_mutex); 3135 3136 return 0; 3137 } 3138 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 3139 3140 /** 3141 * phylink_ethtool_nway_reset() - restart negotiation 3142 * @pl: a pointer to a &struct phylink returned from phylink_create() 3143 * 3144 * Restart negotiation for the phylink instance specified by @pl. This will 3145 * cause any attached phy to restart negotiation with the link partner, and 3146 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 3147 * negotiation. 3148 * 3149 * Returns zero on success, or negative error code. 3150 */ 3151 int phylink_ethtool_nway_reset(struct phylink *pl) 3152 { 3153 int ret = 0; 3154 3155 ASSERT_RTNL(); 3156 3157 if (pl->phydev) 3158 ret = phy_restart_aneg(pl->phydev); 3159 phylink_pcs_an_restart(pl); 3160 3161 return ret; 3162 } 3163 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 3164 3165 /** 3166 * phylink_ethtool_get_pauseparam() - get the current pause parameters 3167 * @pl: a pointer to a &struct phylink returned from phylink_create() 3168 * @pause: a pointer to a &struct ethtool_pauseparam 3169 */ 3170 void phylink_ethtool_get_pauseparam(struct phylink *pl, 3171 struct ethtool_pauseparam *pause) 3172 { 3173 ASSERT_RTNL(); 3174 3175 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 3176 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3177 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3178 } 3179 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3180 3181 /** 3182 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3183 * @pl: a pointer to a &struct phylink returned from phylink_create() 3184 * @pause: a pointer to a &struct ethtool_pauseparam 3185 */ 3186 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3187 struct ethtool_pauseparam *pause) 3188 { 3189 struct phylink_link_state *config = &pl->link_config; 3190 bool manual_changed; 3191 int pause_state; 3192 3193 ASSERT_RTNL(); 3194 3195 if (pl->req_link_an_mode == MLO_AN_FIXED) 3196 return -EOPNOTSUPP; 3197 3198 if (!phylink_test(pl->supported, Pause) && 3199 !phylink_test(pl->supported, Asym_Pause)) 3200 return -EOPNOTSUPP; 3201 3202 if (!phylink_test(pl->supported, Asym_Pause) && 3203 pause->rx_pause != pause->tx_pause) 3204 return -EINVAL; 3205 3206 pause_state = 0; 3207 if (pause->autoneg) 3208 pause_state |= MLO_PAUSE_AN; 3209 if (pause->rx_pause) 3210 pause_state |= MLO_PAUSE_RX; 3211 if (pause->tx_pause) 3212 pause_state |= MLO_PAUSE_TX; 3213 3214 mutex_lock(&pl->state_mutex); 3215 /* 3216 * See the comments for linkmode_set_pause(), wrt the deficiencies 3217 * with the current implementation. A solution to this issue would 3218 * be: 3219 * ethtool Local device 3220 * rx tx Pause AsymDir 3221 * 0 0 0 0 3222 * 1 0 1 1 3223 * 0 1 0 1 3224 * 1 1 1 1 3225 * and then use the ethtool rx/tx enablement status to mask the 3226 * rx/tx pause resolution. 3227 */ 3228 linkmode_set_pause(config->advertising, pause->tx_pause, 3229 pause->rx_pause); 3230 3231 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 3232 (!(pause_state & MLO_PAUSE_AN) && 3233 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 3234 3235 config->pause = pause_state; 3236 3237 /* Update our in-band advertisement, triggering a renegotiation if 3238 * the advertisement changed. 3239 */ 3240 if (!pl->phydev) 3241 phylink_change_inband_advert(pl); 3242 3243 mutex_unlock(&pl->state_mutex); 3244 3245 /* If we have a PHY, a change of the pause frame advertisement will 3246 * cause phylib to renegotiate (if AN is enabled) which will in turn 3247 * call our phylink_phy_change() and trigger a resolve. Note that 3248 * we can't hold our state mutex while calling phy_set_asym_pause(). 3249 */ 3250 if (pl->phydev) 3251 phy_set_asym_pause(pl->phydev, pause->rx_pause, 3252 pause->tx_pause); 3253 3254 /* If the manual pause settings changed, make sure we trigger a 3255 * resolve to update their state; we can not guarantee that the 3256 * link will cycle. 3257 */ 3258 if (manual_changed) { 3259 pl->link_failed = true; 3260 phylink_run_resolve(pl); 3261 } 3262 3263 return 0; 3264 } 3265 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3266 3267 /** 3268 * phylink_get_eee_err() - read the energy efficient ethernet error 3269 * counter 3270 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3271 * 3272 * Read the Energy Efficient Ethernet error counter from the PHY associated 3273 * with the phylink instance specified by @pl. 3274 * 3275 * Returns positive error counter value, or negative error code. 3276 */ 3277 int phylink_get_eee_err(struct phylink *pl) 3278 { 3279 int ret = 0; 3280 3281 ASSERT_RTNL(); 3282 3283 if (pl->phydev) 3284 ret = phy_get_eee_err(pl->phydev); 3285 3286 return ret; 3287 } 3288 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3289 3290 /** 3291 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3292 * @pl: a pointer to a &struct phylink returned from phylink_create() 3293 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3294 */ 3295 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3296 { 3297 int ret = -EOPNOTSUPP; 3298 3299 ASSERT_RTNL(); 3300 3301 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3302 return ret; 3303 3304 if (pl->phydev) { 3305 ret = phy_ethtool_get_eee(pl->phydev, eee); 3306 /* Restrict supported linkmode mask */ 3307 if (ret == 0 && pl->mac_supports_eee_ops) 3308 linkmode_and(eee->supported, eee->supported, 3309 pl->supported_lpi); 3310 } 3311 3312 return ret; 3313 } 3314 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3315 3316 /** 3317 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3318 * @pl: a pointer to a &struct phylink returned from phylink_create() 3319 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3320 */ 3321 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3322 { 3323 bool mac_eee = pl->mac_supports_eee; 3324 int ret = -EOPNOTSUPP; 3325 3326 ASSERT_RTNL(); 3327 3328 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3329 mac_eee ? "supports" : "does not support", 3330 eee->eee_enabled ? ", enabled" : "", 3331 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3332 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3333 3334 if (pl->mac_supports_eee_ops && !mac_eee) 3335 return ret; 3336 3337 if (pl->phydev) { 3338 /* Restrict advertisement mask */ 3339 if (pl->mac_supports_eee_ops) 3340 linkmode_and(eee->advertised, eee->advertised, 3341 pl->supported_lpi); 3342 ret = phy_ethtool_set_eee(pl->phydev, eee); 3343 if (ret == 0) 3344 eee_to_eeecfg(&pl->eee_cfg, eee); 3345 } 3346 3347 return ret; 3348 } 3349 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3350 3351 /* This emulates MII registers for a fixed-mode phy operating as per the 3352 * passed in state. "aneg" defines if we report negotiation is possible. 3353 * 3354 * FIXME: should deal with negotiation state too. 3355 */ 3356 static int phylink_mii_emul_read(unsigned int reg, 3357 struct phylink_link_state *state) 3358 { 3359 struct fixed_phy_status fs; 3360 unsigned long *lpa = state->lp_advertising; 3361 int val; 3362 3363 fs.link = state->link; 3364 fs.speed = state->speed; 3365 fs.duplex = state->duplex; 3366 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3367 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3368 3369 val = swphy_read_reg(reg, &fs); 3370 if (reg == MII_BMSR) { 3371 if (!state->an_complete) 3372 val &= ~BMSR_ANEGCOMPLETE; 3373 } 3374 return val; 3375 } 3376 3377 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3378 unsigned int reg) 3379 { 3380 struct phy_device *phydev = pl->phydev; 3381 int prtad, devad; 3382 3383 if (mdio_phy_id_is_c45(phy_id)) { 3384 prtad = mdio_phy_id_prtad(phy_id); 3385 devad = mdio_phy_id_devad(phy_id); 3386 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3387 reg); 3388 } 3389 3390 if (phydev->is_c45) { 3391 switch (reg) { 3392 case MII_BMCR: 3393 case MII_BMSR: 3394 case MII_PHYSID1: 3395 case MII_PHYSID2: 3396 devad = __ffs(phydev->c45_ids.mmds_present); 3397 break; 3398 case MII_ADVERTISE: 3399 case MII_LPA: 3400 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3401 return -EINVAL; 3402 devad = MDIO_MMD_AN; 3403 if (reg == MII_ADVERTISE) 3404 reg = MDIO_AN_ADVERTISE; 3405 else 3406 reg = MDIO_AN_LPA; 3407 break; 3408 default: 3409 return -EINVAL; 3410 } 3411 prtad = phy_id; 3412 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3413 reg); 3414 } 3415 3416 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3417 } 3418 3419 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3420 unsigned int reg, unsigned int val) 3421 { 3422 struct phy_device *phydev = pl->phydev; 3423 int prtad, devad; 3424 3425 if (mdio_phy_id_is_c45(phy_id)) { 3426 prtad = mdio_phy_id_prtad(phy_id); 3427 devad = mdio_phy_id_devad(phy_id); 3428 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3429 reg, val); 3430 } 3431 3432 if (phydev->is_c45) { 3433 switch (reg) { 3434 case MII_BMCR: 3435 case MII_BMSR: 3436 case MII_PHYSID1: 3437 case MII_PHYSID2: 3438 devad = __ffs(phydev->c45_ids.mmds_present); 3439 break; 3440 case MII_ADVERTISE: 3441 case MII_LPA: 3442 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3443 return -EINVAL; 3444 devad = MDIO_MMD_AN; 3445 if (reg == MII_ADVERTISE) 3446 reg = MDIO_AN_ADVERTISE; 3447 else 3448 reg = MDIO_AN_LPA; 3449 break; 3450 default: 3451 return -EINVAL; 3452 } 3453 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3454 reg, val); 3455 } 3456 3457 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3458 } 3459 3460 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3461 unsigned int reg) 3462 { 3463 struct phylink_link_state state; 3464 int val = 0xffff; 3465 3466 switch (pl->act_link_an_mode) { 3467 case MLO_AN_FIXED: 3468 if (phy_id == 0) { 3469 phylink_get_fixed_state(pl, &state); 3470 val = phylink_mii_emul_read(reg, &state); 3471 } 3472 break; 3473 3474 case MLO_AN_PHY: 3475 return -EOPNOTSUPP; 3476 3477 case MLO_AN_INBAND: 3478 if (phy_id == 0) { 3479 phylink_mac_pcs_get_state(pl, &state); 3480 val = phylink_mii_emul_read(reg, &state); 3481 } 3482 break; 3483 } 3484 3485 return val & 0xffff; 3486 } 3487 3488 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3489 unsigned int reg, unsigned int val) 3490 { 3491 switch (pl->act_link_an_mode) { 3492 case MLO_AN_FIXED: 3493 break; 3494 3495 case MLO_AN_PHY: 3496 return -EOPNOTSUPP; 3497 3498 case MLO_AN_INBAND: 3499 break; 3500 } 3501 3502 return 0; 3503 } 3504 3505 /** 3506 * phylink_mii_ioctl() - generic mii ioctl interface 3507 * @pl: a pointer to a &struct phylink returned from phylink_create() 3508 * @ifr: a pointer to a &struct ifreq for socket ioctls 3509 * @cmd: ioctl cmd to execute 3510 * 3511 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3512 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3513 * 3514 * Returns: zero on success or negative error code. 3515 * 3516 * %SIOCGMIIPHY: 3517 * read register from the current PHY. 3518 * %SIOCGMIIREG: 3519 * read register from the specified PHY. 3520 * %SIOCSMIIREG: 3521 * set a register on the specified PHY. 3522 */ 3523 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3524 { 3525 struct mii_ioctl_data *mii = if_mii(ifr); 3526 int ret; 3527 3528 ASSERT_RTNL(); 3529 3530 if (pl->phydev) { 3531 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3532 switch (cmd) { 3533 case SIOCGMIIPHY: 3534 mii->phy_id = pl->phydev->mdio.addr; 3535 fallthrough; 3536 3537 case SIOCGMIIREG: 3538 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3539 if (ret >= 0) { 3540 mii->val_out = ret; 3541 ret = 0; 3542 } 3543 break; 3544 3545 case SIOCSMIIREG: 3546 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3547 mii->val_in); 3548 break; 3549 3550 default: 3551 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3552 break; 3553 } 3554 } else { 3555 switch (cmd) { 3556 case SIOCGMIIPHY: 3557 mii->phy_id = 0; 3558 fallthrough; 3559 3560 case SIOCGMIIREG: 3561 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3562 if (ret >= 0) { 3563 mii->val_out = ret; 3564 ret = 0; 3565 } 3566 break; 3567 3568 case SIOCSMIIREG: 3569 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3570 mii->val_in); 3571 break; 3572 3573 default: 3574 ret = -EOPNOTSUPP; 3575 break; 3576 } 3577 } 3578 3579 return ret; 3580 } 3581 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3582 3583 /** 3584 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3585 * link partners 3586 * @pl: a pointer to a &struct phylink returned from phylink_create() 3587 * @sync: perform action synchronously 3588 * 3589 * If we have a PHY that is not part of a SFP module, then set the speed 3590 * as described in the phy_speed_down() function. Please see this function 3591 * for a description of the @sync parameter. 3592 * 3593 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3594 */ 3595 int phylink_speed_down(struct phylink *pl, bool sync) 3596 { 3597 int ret = 0; 3598 3599 ASSERT_RTNL(); 3600 3601 if (!pl->sfp_bus && pl->phydev) 3602 ret = phy_speed_down(pl->phydev, sync); 3603 3604 return ret; 3605 } 3606 EXPORT_SYMBOL_GPL(phylink_speed_down); 3607 3608 /** 3609 * phylink_speed_up() - restore the advertised speeds prior to the call to 3610 * phylink_speed_down() 3611 * @pl: a pointer to a &struct phylink returned from phylink_create() 3612 * 3613 * If we have a PHY that is not part of a SFP module, then restore the 3614 * PHY speeds as per phy_speed_up(). 3615 * 3616 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3617 */ 3618 int phylink_speed_up(struct phylink *pl) 3619 { 3620 int ret = 0; 3621 3622 ASSERT_RTNL(); 3623 3624 if (!pl->sfp_bus && pl->phydev) 3625 ret = phy_speed_up(pl->phydev); 3626 3627 return ret; 3628 } 3629 EXPORT_SYMBOL_GPL(phylink_speed_up); 3630 3631 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3632 { 3633 struct phylink *pl = upstream; 3634 3635 pl->netdev->sfp_bus = bus; 3636 } 3637 3638 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3639 { 3640 struct phylink *pl = upstream; 3641 3642 pl->netdev->sfp_bus = NULL; 3643 } 3644 3645 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3646 const unsigned long *intf) 3647 { 3648 phy_interface_t interface; 3649 size_t i; 3650 3651 interface = PHY_INTERFACE_MODE_NA; 3652 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3653 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3654 interface = phylink_sfp_interface_preference[i]; 3655 break; 3656 } 3657 3658 return interface; 3659 } 3660 3661 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3662 struct phylink_link_state *state, 3663 bool changed) 3664 { 3665 u8 mode = MLO_AN_INBAND; 3666 3667 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3668 phylink_an_mode_str(mode), phy_modes(state->interface), 3669 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3670 3671 if (!linkmode_equal(pl->supported, supported)) { 3672 linkmode_copy(pl->supported, supported); 3673 changed = true; 3674 } 3675 3676 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3677 linkmode_copy(pl->link_config.advertising, state->advertising); 3678 changed = true; 3679 } 3680 3681 if (pl->req_link_an_mode != mode || 3682 pl->link_config.interface != state->interface) { 3683 pl->req_link_an_mode = mode; 3684 pl->link_config.interface = state->interface; 3685 3686 changed = true; 3687 3688 phylink_info(pl, "switched to %s/%s link mode\n", 3689 phylink_an_mode_str(mode), 3690 phy_modes(state->interface)); 3691 } 3692 3693 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3694 &pl->phylink_disable_state)) 3695 phylink_mac_initial_config(pl, false); 3696 } 3697 3698 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3699 { 3700 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3701 struct phylink_link_state config; 3702 int ret; 3703 3704 /* We're not using pl->sfp_interfaces, so clear it. */ 3705 phy_interface_zero(pl->sfp_interfaces); 3706 linkmode_copy(support, phy->supported); 3707 3708 memset(&config, 0, sizeof(config)); 3709 linkmode_copy(config.advertising, phy->advertising); 3710 config.interface = PHY_INTERFACE_MODE_NA; 3711 config.speed = SPEED_UNKNOWN; 3712 config.duplex = DUPLEX_UNKNOWN; 3713 config.pause = MLO_PAUSE_AN; 3714 3715 /* Ignore errors if we're expecting a PHY to attach later */ 3716 ret = phylink_validate(pl, support, &config); 3717 if (ret) { 3718 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3719 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3720 ERR_PTR(ret)); 3721 return ret; 3722 } 3723 3724 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3725 if (config.interface == PHY_INTERFACE_MODE_NA) 3726 return -EINVAL; 3727 3728 /* Attach the PHY so that the PHY is present when we do the major 3729 * configuration step. 3730 */ 3731 ret = phylink_attach_phy(pl, phy, config.interface); 3732 if (ret < 0) 3733 return ret; 3734 3735 /* This will validate the configuration for us. */ 3736 ret = phylink_bringup_phy(pl, phy, config.interface); 3737 if (ret < 0) { 3738 phy_detach(phy); 3739 return ret; 3740 } 3741 3742 pl->link_port = pl->sfp_port; 3743 3744 phylink_sfp_set_config(pl, support, &config, true); 3745 3746 return 0; 3747 } 3748 3749 static int phylink_sfp_config_optical(struct phylink *pl) 3750 { 3751 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3752 struct phylink_link_state config; 3753 enum inband_type inband_type; 3754 phy_interface_t interface; 3755 int ret; 3756 3757 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3758 (int)PHY_INTERFACE_MODE_MAX, 3759 pl->config->supported_interfaces, 3760 (int)PHY_INTERFACE_MODE_MAX, 3761 pl->sfp_interfaces); 3762 3763 /* Find the union of the supported interfaces by the PCS/MAC and 3764 * the SFP module. 3765 */ 3766 phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces, 3767 pl->sfp_interfaces); 3768 if (phy_interface_empty(pl->sfp_interfaces)) { 3769 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3770 return -EINVAL; 3771 } 3772 3773 memset(&config, 0, sizeof(config)); 3774 linkmode_copy(support, pl->sfp_support); 3775 linkmode_copy(config.advertising, pl->sfp_support); 3776 config.speed = SPEED_UNKNOWN; 3777 config.duplex = DUPLEX_UNKNOWN; 3778 config.pause = MLO_PAUSE_AN; 3779 3780 /* For all the interfaces that are supported, reduce the sfp_support 3781 * mask to only those link modes that can be supported. 3782 */ 3783 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3784 pl->sfp_interfaces); 3785 if (ret) { 3786 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3787 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3788 return ret; 3789 } 3790 3791 interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces); 3792 if (interface == PHY_INTERFACE_MODE_NA) { 3793 phylink_err(pl, "failed to select SFP interface\n"); 3794 return -EINVAL; 3795 } 3796 3797 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3798 phy_modes(interface)); 3799 3800 inband_type = phylink_get_inband_type(interface); 3801 if (inband_type == INBAND_NONE) { 3802 /* If this is the sole interface, and there is no inband 3803 * support, clear the advertising mask and Autoneg bit in 3804 * the support mask. Otherwise, just clear the Autoneg bit 3805 * in the advertising mask. 3806 */ 3807 if (phy_interface_weight(pl->sfp_interfaces) == 1) { 3808 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3809 pl->sfp_support); 3810 linkmode_zero(config.advertising); 3811 } else { 3812 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3813 config.advertising); 3814 } 3815 } 3816 3817 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3818 config.advertising)) { 3819 phylink_err(pl, "autoneg setting not compatible with PCS"); 3820 return -EINVAL; 3821 } 3822 3823 config.interface = interface; 3824 3825 /* Ignore errors if we're expecting a PHY to attach later */ 3826 ret = phylink_validate(pl, support, &config); 3827 if (ret) { 3828 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3829 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3830 ERR_PTR(ret)); 3831 return ret; 3832 } 3833 3834 pl->link_port = pl->sfp_port; 3835 3836 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3837 3838 return 0; 3839 } 3840 3841 static int phylink_sfp_module_insert(void *upstream, 3842 const struct sfp_eeprom_id *id) 3843 { 3844 const struct sfp_module_caps *caps; 3845 struct phylink *pl = upstream; 3846 3847 ASSERT_RTNL(); 3848 3849 caps = sfp_get_module_caps(pl->sfp_bus); 3850 phy_interface_copy(pl->sfp_interfaces, caps->interfaces); 3851 linkmode_copy(pl->sfp_support, caps->link_modes); 3852 pl->sfp_may_have_phy = caps->may_have_phy; 3853 pl->sfp_port = caps->port; 3854 3855 /* If this module may have a PHY connecting later, defer until later */ 3856 if (pl->sfp_may_have_phy) 3857 return 0; 3858 3859 return phylink_sfp_config_optical(pl); 3860 } 3861 3862 static void phylink_sfp_module_remove(void *upstream) 3863 { 3864 struct phylink *pl = upstream; 3865 3866 phy_interface_zero(pl->sfp_interfaces); 3867 } 3868 3869 static int phylink_sfp_module_start(void *upstream) 3870 { 3871 struct phylink *pl = upstream; 3872 3873 /* If this SFP module has a PHY, start the PHY now. */ 3874 if (pl->phydev) { 3875 phy_start(pl->phydev); 3876 return 0; 3877 } 3878 3879 /* If the module may have a PHY but we didn't detect one we 3880 * need to configure the MAC here. 3881 */ 3882 if (!pl->sfp_may_have_phy) 3883 return 0; 3884 3885 return phylink_sfp_config_optical(pl); 3886 } 3887 3888 static void phylink_sfp_module_stop(void *upstream) 3889 { 3890 struct phylink *pl = upstream; 3891 3892 /* If this SFP module has a PHY, stop it. */ 3893 if (pl->phydev) 3894 phy_stop(pl->phydev); 3895 } 3896 3897 static void phylink_sfp_link_down(void *upstream) 3898 { 3899 struct phylink *pl = upstream; 3900 3901 ASSERT_RTNL(); 3902 3903 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3904 } 3905 3906 static void phylink_sfp_link_up(void *upstream) 3907 { 3908 struct phylink *pl = upstream; 3909 3910 ASSERT_RTNL(); 3911 3912 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3913 } 3914 3915 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3916 { 3917 struct phylink *pl = upstream; 3918 3919 if (!phy->drv) { 3920 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 3921 phydev_name(phy), (unsigned long)phy->phy_id); 3922 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 3923 return -EINVAL; 3924 } 3925 3926 /* 3927 * This is the new way of dealing with flow control for PHYs, 3928 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3929 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3930 * using our validate call to the MAC, we rely upon the MAC 3931 * clearing the bits from both supported and advertising fields. 3932 */ 3933 phy_support_asym_pause(phy); 3934 3935 /* Set the PHY's host supported interfaces */ 3936 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3937 pl->config->supported_interfaces); 3938 3939 /* Do the initial configuration */ 3940 return phylink_sfp_config_phy(pl, phy); 3941 } 3942 3943 static void phylink_sfp_disconnect_phy(void *upstream, 3944 struct phy_device *phydev) 3945 { 3946 phylink_disconnect_phy(upstream); 3947 } 3948 3949 static const struct sfp_upstream_ops sfp_phylink_ops = { 3950 .attach = phylink_sfp_attach, 3951 .detach = phylink_sfp_detach, 3952 .module_insert = phylink_sfp_module_insert, 3953 .module_remove = phylink_sfp_module_remove, 3954 .module_start = phylink_sfp_module_start, 3955 .module_stop = phylink_sfp_module_stop, 3956 .link_up = phylink_sfp_link_up, 3957 .link_down = phylink_sfp_link_down, 3958 .connect_phy = phylink_sfp_connect_phy, 3959 .disconnect_phy = phylink_sfp_disconnect_phy, 3960 }; 3961 3962 /* Helpers for MAC drivers */ 3963 3964 static struct { 3965 int bit; 3966 int speed; 3967 } phylink_c73_priority_resolution[] = { 3968 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3969 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3970 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3971 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3972 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3973 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3974 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3975 /* 5GBASE-KR not supported */ 3976 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3977 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3978 }; 3979 3980 void phylink_resolve_c73(struct phylink_link_state *state) 3981 { 3982 int i; 3983 3984 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3985 int bit = phylink_c73_priority_resolution[i].bit; 3986 if (linkmode_test_bit(bit, state->advertising) && 3987 linkmode_test_bit(bit, state->lp_advertising)) 3988 break; 3989 } 3990 3991 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3992 state->speed = phylink_c73_priority_resolution[i].speed; 3993 state->duplex = DUPLEX_FULL; 3994 } else { 3995 /* negotiation failure */ 3996 state->link = false; 3997 } 3998 3999 phylink_resolve_an_pause(state); 4000 } 4001 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 4002 4003 static void phylink_decode_c37_word(struct phylink_link_state *state, 4004 uint16_t config_reg, int speed) 4005 { 4006 int fd_bit; 4007 4008 if (speed == SPEED_2500) 4009 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 4010 else 4011 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 4012 4013 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 4014 4015 if (linkmode_test_bit(fd_bit, state->advertising) && 4016 linkmode_test_bit(fd_bit, state->lp_advertising)) { 4017 state->speed = speed; 4018 state->duplex = DUPLEX_FULL; 4019 } else { 4020 /* negotiation failure */ 4021 state->link = false; 4022 } 4023 4024 phylink_resolve_an_pause(state); 4025 } 4026 4027 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 4028 uint16_t config_reg) 4029 { 4030 if (!(config_reg & LPA_SGMII_LINK)) { 4031 state->link = false; 4032 return; 4033 } 4034 4035 switch (config_reg & LPA_SGMII_SPD_MASK) { 4036 case LPA_SGMII_10: 4037 state->speed = SPEED_10; 4038 break; 4039 case LPA_SGMII_100: 4040 state->speed = SPEED_100; 4041 break; 4042 case LPA_SGMII_1000: 4043 state->speed = SPEED_1000; 4044 break; 4045 default: 4046 state->link = false; 4047 return; 4048 } 4049 if (config_reg & LPA_SGMII_FULL_DUPLEX) 4050 state->duplex = DUPLEX_FULL; 4051 else 4052 state->duplex = DUPLEX_HALF; 4053 } 4054 4055 /** 4056 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 4057 * @state: a pointer to a struct phylink_link_state. 4058 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 4059 * 4060 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 4061 * code word. Decode the USXGMII code word and populate the corresponding fields 4062 * (speed, duplex) into the phylink_link_state structure. 4063 */ 4064 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 4065 uint16_t lpa) 4066 { 4067 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4068 case MDIO_USXGMII_10: 4069 state->speed = SPEED_10; 4070 break; 4071 case MDIO_USXGMII_100: 4072 state->speed = SPEED_100; 4073 break; 4074 case MDIO_USXGMII_1000: 4075 state->speed = SPEED_1000; 4076 break; 4077 case MDIO_USXGMII_2500: 4078 state->speed = SPEED_2500; 4079 break; 4080 case MDIO_USXGMII_5000: 4081 state->speed = SPEED_5000; 4082 break; 4083 case MDIO_USXGMII_10G: 4084 state->speed = SPEED_10000; 4085 break; 4086 default: 4087 state->link = false; 4088 return; 4089 } 4090 4091 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4092 state->duplex = DUPLEX_FULL; 4093 else 4094 state->duplex = DUPLEX_HALF; 4095 } 4096 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 4097 4098 /** 4099 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 4100 * @state: a pointer to a struct phylink_link_state. 4101 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 4102 * 4103 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 4104 * code word. Decode the USGMII code word and populate the corresponding fields 4105 * (speed, duplex) into the phylink_link_state structure. The structure for this 4106 * word is the same as the USXGMII word, except it only supports speeds up to 4107 * 1Gbps. 4108 */ 4109 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 4110 uint16_t lpa) 4111 { 4112 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4113 case MDIO_USXGMII_10: 4114 state->speed = SPEED_10; 4115 break; 4116 case MDIO_USXGMII_100: 4117 state->speed = SPEED_100; 4118 break; 4119 case MDIO_USXGMII_1000: 4120 state->speed = SPEED_1000; 4121 break; 4122 default: 4123 state->link = false; 4124 return; 4125 } 4126 4127 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4128 state->duplex = DUPLEX_FULL; 4129 else 4130 state->duplex = DUPLEX_HALF; 4131 } 4132 4133 /** 4134 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 4135 * @state: a pointer to a &struct phylink_link_state. 4136 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4137 * @bmsr: The value of the %MII_BMSR register 4138 * @lpa: The value of the %MII_LPA register 4139 * 4140 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4141 * clause 37 negotiation and/or SGMII control. 4142 * 4143 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 4144 * the phylink @state structure. This is suitable to be used for implementing 4145 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 4146 * accessing @bmsr and @lpa cannot be done with MDIO directly. 4147 */ 4148 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 4149 unsigned int neg_mode, u16 bmsr, u16 lpa) 4150 { 4151 state->link = !!(bmsr & BMSR_LSTATUS); 4152 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 4153 4154 /* If the link is down, the advertisement data is undefined. */ 4155 if (!state->link) 4156 return; 4157 4158 switch (state->interface) { 4159 case PHY_INTERFACE_MODE_1000BASEX: 4160 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4161 phylink_decode_c37_word(state, lpa, SPEED_1000); 4162 } else { 4163 state->speed = SPEED_1000; 4164 state->duplex = DUPLEX_FULL; 4165 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4166 } 4167 break; 4168 4169 case PHY_INTERFACE_MODE_2500BASEX: 4170 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4171 phylink_decode_c37_word(state, lpa, SPEED_2500); 4172 } else { 4173 state->speed = SPEED_2500; 4174 state->duplex = DUPLEX_FULL; 4175 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4176 } 4177 break; 4178 4179 case PHY_INTERFACE_MODE_SGMII: 4180 case PHY_INTERFACE_MODE_QSGMII: 4181 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4182 phylink_decode_sgmii_word(state, lpa); 4183 break; 4184 4185 case PHY_INTERFACE_MODE_QUSGMII: 4186 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4187 phylink_decode_usgmii_word(state, lpa); 4188 break; 4189 4190 default: 4191 state->link = false; 4192 break; 4193 } 4194 } 4195 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 4196 4197 /** 4198 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 4199 * @pcs: a pointer to a &struct mdio_device. 4200 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4201 * @state: a pointer to a &struct phylink_link_state. 4202 * 4203 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4204 * clause 37 negotiation and/or SGMII control. 4205 * 4206 * Read the MAC PCS state from the MII device configured in @config and 4207 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4208 * the phylink @state structure. This is suitable to be directly plugged 4209 * into the pcs_get_state() member of the struct phylink_pcs_ops 4210 * structure. 4211 */ 4212 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4213 unsigned int neg_mode, 4214 struct phylink_link_state *state) 4215 { 4216 int bmsr, lpa; 4217 4218 bmsr = mdiodev_read(pcs, MII_BMSR); 4219 lpa = mdiodev_read(pcs, MII_LPA); 4220 if (bmsr < 0 || lpa < 0) { 4221 state->link = false; 4222 return; 4223 } 4224 4225 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4226 } 4227 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4228 4229 /** 4230 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4231 * advertisement 4232 * @interface: the PHY interface mode being configured 4233 * @advertising: the ethtool advertisement mask 4234 * 4235 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4236 * clause 37 negotiation and/or SGMII control. 4237 * 4238 * Encode the clause 37 PCS advertisement as specified by @interface and 4239 * @advertising. 4240 * 4241 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4242 */ 4243 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4244 const unsigned long *advertising) 4245 { 4246 u16 adv; 4247 4248 switch (interface) { 4249 case PHY_INTERFACE_MODE_1000BASEX: 4250 case PHY_INTERFACE_MODE_2500BASEX: 4251 adv = ADVERTISE_1000XFULL; 4252 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4253 advertising)) 4254 adv |= ADVERTISE_1000XPAUSE; 4255 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4256 advertising)) 4257 adv |= ADVERTISE_1000XPSE_ASYM; 4258 return adv; 4259 case PHY_INTERFACE_MODE_SGMII: 4260 case PHY_INTERFACE_MODE_QSGMII: 4261 return 0x0001; 4262 default: 4263 /* Nothing to do for other modes */ 4264 return -EINVAL; 4265 } 4266 } 4267 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4268 4269 /** 4270 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4271 * @pcs: a pointer to a &struct mdio_device. 4272 * @interface: the PHY interface mode being configured 4273 * @advertising: the ethtool advertisement mask 4274 * @neg_mode: PCS negotiation mode 4275 * 4276 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4277 * parameters for the @mode, @interface and @advertising parameters. 4278 * Returns negative error number on failure, zero if the advertisement 4279 * has not changed, or positive if there is a change. 4280 */ 4281 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4282 phy_interface_t interface, 4283 const unsigned long *advertising, 4284 unsigned int neg_mode) 4285 { 4286 bool changed = 0; 4287 u16 bmcr; 4288 int ret, adv; 4289 4290 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4291 if (adv >= 0) { 4292 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4293 MII_ADVERTISE, 0xffff, adv); 4294 if (ret < 0) 4295 return ret; 4296 changed = ret; 4297 } 4298 4299 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4300 bmcr = BMCR_ANENABLE; 4301 else 4302 bmcr = 0; 4303 4304 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4305 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4306 if (ret < 0) 4307 return ret; 4308 4309 return changed; 4310 } 4311 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4312 4313 /** 4314 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4315 * @pcs: a pointer to a &struct mdio_device. 4316 * 4317 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4318 * clause 37 negotiation. 4319 * 4320 * Restart the clause 37 negotiation with the link partner. This is 4321 * suitable to be directly plugged into the pcs_get_state() member 4322 * of the struct phylink_pcs_ops structure. 4323 */ 4324 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4325 { 4326 int val = mdiodev_read(pcs, MII_BMCR); 4327 4328 if (val >= 0) { 4329 val |= BMCR_ANRESTART; 4330 4331 mdiodev_write(pcs, MII_BMCR, val); 4332 } 4333 } 4334 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4335 4336 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4337 struct phylink_link_state *state) 4338 { 4339 struct mii_bus *bus = pcs->bus; 4340 int addr = pcs->addr; 4341 int stat; 4342 4343 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4344 if (stat < 0) { 4345 state->link = false; 4346 return; 4347 } 4348 4349 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4350 if (!state->link) 4351 return; 4352 4353 switch (state->interface) { 4354 case PHY_INTERFACE_MODE_10GBASER: 4355 state->speed = SPEED_10000; 4356 state->duplex = DUPLEX_FULL; 4357 break; 4358 4359 default: 4360 break; 4361 } 4362 } 4363 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4364 4365 /** 4366 * phylink_replay_link_begin() - begin replay of link callbacks for driver 4367 * which loses state 4368 * @pl: a pointer to a &struct phylink returned from phylink_create() 4369 * 4370 * Helper for MAC drivers which may perform a destructive reset at runtime. 4371 * Both the own driver's mac_link_down() method is called, as well as the 4372 * pcs_link_down() method of the split PCS (if any). 4373 * 4374 * This is similar to phylink_stop(), except it does not alter the state of 4375 * the phylib PHY (it is assumed that it is not affected by the MAC destructive 4376 * reset). 4377 */ 4378 void phylink_replay_link_begin(struct phylink *pl) 4379 { 4380 ASSERT_RTNL(); 4381 4382 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_REPLAY); 4383 } 4384 EXPORT_SYMBOL_GPL(phylink_replay_link_begin); 4385 4386 /** 4387 * phylink_replay_link_end() - end replay of link callbacks for driver 4388 * which lost state 4389 * @pl: a pointer to a &struct phylink returned from phylink_create() 4390 * 4391 * Helper for MAC drivers which may perform a destructive reset at runtime. 4392 * Both the own driver's mac_config() and mac_link_up() methods, as well as the 4393 * pcs_config() and pcs_link_up() method of the split PCS (if any), are called. 4394 * 4395 * This is similar to phylink_start(), except it does not alter the state of 4396 * the phylib PHY. 4397 * 4398 * One must call this method only within the same rtnl_lock() critical section 4399 * as a previous phylink_replay_link_start(). 4400 */ 4401 void phylink_replay_link_end(struct phylink *pl) 4402 { 4403 ASSERT_RTNL(); 4404 4405 if (WARN(!test_bit(PHYLINK_DISABLE_REPLAY, 4406 &pl->phylink_disable_state), 4407 "phylink_replay_link_end() called without a prior phylink_replay_link_begin()\n")) 4408 return; 4409 4410 pl->force_major_config = true; 4411 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_REPLAY); 4412 flush_work(&pl->resolve); 4413 } 4414 EXPORT_SYMBOL_GPL(phylink_replay_link_end); 4415 4416 static int __init phylink_init(void) 4417 { 4418 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4419 __set_bit(phylink_sfp_interface_preference[i], 4420 phylink_sfp_interfaces); 4421 4422 return 0; 4423 } 4424 4425 module_init(phylink_init); 4426 4427 MODULE_LICENSE("GPL v2"); 4428 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4429