1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2023 Axis Communications AB 4 * 5 * Datasheet: https://www.ti.com/lit/gpn/opt4001 6 * 7 * Device driver for the Texas Instruments OPT4001. 8 */ 9 10 #include <linux/bitfield.h> 11 #include <linux/i2c.h> 12 #include <linux/iio/iio.h> 13 #include <linux/math64.h> 14 #include <linux/module.h> 15 #include <linux/property.h> 16 #include <linux/regmap.h> 17 #include <linux/regulator/consumer.h> 18 19 /* OPT4001 register set */ 20 #define OPT4001_LIGHT1_MSB 0x00 21 #define OPT4001_LIGHT1_LSB 0x01 22 #define OPT4001_CTRL 0x0A 23 #define OPT4001_DEVICE_ID 0x11 24 25 /* OPT4001 register mask */ 26 #define OPT4001_EXPONENT_MASK GENMASK(15, 12) 27 #define OPT4001_MSB_MASK GENMASK(11, 0) 28 #define OPT4001_LSB_MASK GENMASK(15, 8) 29 #define OPT4001_COUNTER_MASK GENMASK(7, 4) 30 #define OPT4001_CRC_MASK GENMASK(3, 0) 31 32 /* OPT4001 device id mask */ 33 #define OPT4001_DEVICE_ID_MASK GENMASK(11, 0) 34 35 /* OPT4001 control registers mask */ 36 #define OPT4001_CTRL_QWAKE_MASK GENMASK(15, 15) 37 #define OPT4001_CTRL_RANGE_MASK GENMASK(13, 10) 38 #define OPT4001_CTRL_CONV_TIME_MASK GENMASK(9, 6) 39 #define OPT4001_CTRL_OPER_MODE_MASK GENMASK(5, 4) 40 #define OPT4001_CTRL_LATCH_MASK GENMASK(3, 3) 41 #define OPT4001_CTRL_INT_POL_MASK GENMASK(2, 2) 42 #define OPT4001_CTRL_FAULT_COUNT_MASK GENMASK(1, 0) 43 44 /* OPT4001 constants */ 45 #define OPT4001_DEVICE_ID_VAL 0x121 46 47 /* OPT4001 operating modes */ 48 #define OPT4001_CTRL_OPER_MODE_OFF 0x0 49 #define OPT4001_CTRL_OPER_MODE_FORCED 0x1 50 #define OPT4001_CTRL_OPER_MODE_ONE_SHOT 0x2 51 #define OPT4001_CTRL_OPER_MODE_CONTINUOUS 0x3 52 53 /* OPT4001 conversion control register definitions */ 54 #define OPT4001_CTRL_CONVERSION_0_6MS 0x0 55 #define OPT4001_CTRL_CONVERSION_1MS 0x1 56 #define OPT4001_CTRL_CONVERSION_1_8MS 0x2 57 #define OPT4001_CTRL_CONVERSION_3_4MS 0x3 58 #define OPT4001_CTRL_CONVERSION_6_5MS 0x4 59 #define OPT4001_CTRL_CONVERSION_12_7MS 0x5 60 #define OPT4001_CTRL_CONVERSION_25MS 0x6 61 #define OPT4001_CTRL_CONVERSION_50MS 0x7 62 #define OPT4001_CTRL_CONVERSION_100MS 0x8 63 #define OPT4001_CTRL_CONVERSION_200MS 0x9 64 #define OPT4001_CTRL_CONVERSION_400MS 0xa 65 #define OPT4001_CTRL_CONVERSION_800MS 0xb 66 67 /* OPT4001 scale light level range definitions */ 68 #define OPT4001_CTRL_LIGHT_SCALE_AUTO 12 69 70 /* OPT4001 default values */ 71 #define OPT4001_DEFAULT_CONVERSION_TIME OPT4001_CTRL_CONVERSION_800MS 72 73 /* 74 * The different packaging of OPT4001 has different constants used when calculating 75 * lux values. 76 */ 77 struct opt4001_chip_info { 78 int mul; 79 int div; 80 const char *name; 81 }; 82 83 struct opt4001_chip { 84 struct regmap *regmap; 85 struct i2c_client *client; 86 u8 int_time; 87 const struct opt4001_chip_info *chip_info; 88 }; 89 90 static const struct opt4001_chip_info opt4001_sot_5x3_info = { 91 .mul = 4375, 92 .div = 10000000, 93 .name = "opt4001-sot-5x3" 94 }; 95 96 static const struct opt4001_chip_info opt4001_picostar_info = { 97 .mul = 3125, 98 .div = 10000000, 99 .name = "opt4001-picostar" 100 }; 101 102 static const int opt4001_int_time_available[][2] = { 103 { 0, 600 }, 104 { 0, 1000 }, 105 { 0, 1800 }, 106 { 0, 3400 }, 107 { 0, 6500 }, 108 { 0, 12700 }, 109 { 0, 25000 }, 110 { 0, 50000 }, 111 { 0, 100000 }, 112 { 0, 200000 }, 113 { 0, 400000 }, 114 { 0, 800000 }, 115 }; 116 117 /* 118 * Conversion time is integration time + time to set register 119 * this is used as integration time. 120 */ 121 static const int opt4001_int_time_reg[][2] = { 122 { 600, OPT4001_CTRL_CONVERSION_0_6MS }, 123 { 1000, OPT4001_CTRL_CONVERSION_1MS }, 124 { 1800, OPT4001_CTRL_CONVERSION_1_8MS }, 125 { 3400, OPT4001_CTRL_CONVERSION_3_4MS }, 126 { 6500, OPT4001_CTRL_CONVERSION_6_5MS }, 127 { 12700, OPT4001_CTRL_CONVERSION_12_7MS }, 128 { 25000, OPT4001_CTRL_CONVERSION_25MS }, 129 { 50000, OPT4001_CTRL_CONVERSION_50MS }, 130 { 100000, OPT4001_CTRL_CONVERSION_100MS }, 131 { 200000, OPT4001_CTRL_CONVERSION_200MS }, 132 { 400000, OPT4001_CTRL_CONVERSION_400MS }, 133 { 800000, OPT4001_CTRL_CONVERSION_800MS }, 134 }; 135 136 static int opt4001_als_time_to_index(const u32 als_integration_time) 137 { 138 int i; 139 140 for (i = 0; i < ARRAY_SIZE(opt4001_int_time_available); i++) { 141 if (als_integration_time == opt4001_int_time_available[i][1]) 142 return i; 143 } 144 145 return -EINVAL; 146 } 147 148 static u8 opt4001_calculate_crc(u8 exp, u32 mantissa, u8 count) 149 { 150 u8 crc; 151 152 crc = (hweight32(mantissa) + hweight32(exp) + hweight32(count)) % 2; 153 crc |= ((hweight32(mantissa & 0xAAAAA) + hweight32(exp & 0xA) 154 + hweight32(count & 0xA)) % 2) << 1; 155 crc |= ((hweight32(mantissa & 0x88888) + hweight32(exp & 0x8) 156 + hweight32(count & 0x8)) % 2) << 2; 157 crc |= (hweight32(mantissa & 0x80808) % 2) << 3; 158 159 return crc; 160 } 161 162 static int opt4001_read_lux_value(struct iio_dev *indio_dev, 163 int *val, int *val2) 164 { 165 struct opt4001_chip *chip = iio_priv(indio_dev); 166 struct device *dev = &chip->client->dev; 167 unsigned int light1; 168 unsigned int light2; 169 u16 msb; 170 u16 lsb; 171 u8 exp; 172 u8 count; 173 u8 crc; 174 u8 calc_crc; 175 u64 lux_raw; 176 u32 rem; 177 int ret; 178 179 ret = regmap_read(chip->regmap, OPT4001_LIGHT1_MSB, &light1); 180 if (ret < 0) { 181 dev_err(dev, "Failed to read data bytes"); 182 return ret; 183 } 184 185 ret = regmap_read(chip->regmap, OPT4001_LIGHT1_LSB, &light2); 186 if (ret < 0) { 187 dev_err(dev, "Failed to read data bytes"); 188 return ret; 189 } 190 191 count = FIELD_GET(OPT4001_COUNTER_MASK, light2); 192 exp = FIELD_GET(OPT4001_EXPONENT_MASK, light1); 193 crc = FIELD_GET(OPT4001_CRC_MASK, light2); 194 msb = FIELD_GET(OPT4001_MSB_MASK, light1); 195 lsb = FIELD_GET(OPT4001_LSB_MASK, light2); 196 lux_raw = (msb << 8) + lsb; 197 calc_crc = opt4001_calculate_crc(exp, lux_raw, count); 198 if (calc_crc != crc) 199 return -EIO; 200 201 lux_raw = lux_raw << exp; 202 lux_raw = lux_raw * chip->chip_info->mul; 203 *val = div_u64_rem(lux_raw, chip->chip_info->div, &rem); 204 *val2 = rem * 100; 205 206 return IIO_VAL_INT_PLUS_NANO; 207 } 208 209 static int opt4001_set_conf(struct opt4001_chip *chip) 210 { 211 struct device *dev = &chip->client->dev; 212 u16 reg; 213 int ret; 214 215 reg = FIELD_PREP(OPT4001_CTRL_RANGE_MASK, OPT4001_CTRL_LIGHT_SCALE_AUTO); 216 reg |= FIELD_PREP(OPT4001_CTRL_CONV_TIME_MASK, chip->int_time); 217 reg |= FIELD_PREP(OPT4001_CTRL_OPER_MODE_MASK, OPT4001_CTRL_OPER_MODE_CONTINUOUS); 218 219 ret = regmap_write(chip->regmap, OPT4001_CTRL, reg); 220 if (ret) 221 dev_err(dev, "Failed to set configuration\n"); 222 223 return ret; 224 } 225 226 static void opt4001_chip_off_action(void *data) 227 { 228 struct opt4001_chip *chip = data; 229 int ret; 230 231 ret = regmap_clear_bits(chip->regmap, OPT4001_CTRL, OPT4001_CTRL_OPER_MODE_MASK); 232 if (ret) 233 dev_err(&chip->client->dev, "Failed to power down\n"); 234 } 235 236 static const struct iio_chan_spec opt4001_channels[] = { 237 { 238 .type = IIO_LIGHT, 239 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 240 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME), 241 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) 242 }, 243 }; 244 245 static int opt4001_read_raw(struct iio_dev *indio_dev, 246 struct iio_chan_spec const *chan, 247 int *val, int *val2, long mask) 248 { 249 struct opt4001_chip *chip = iio_priv(indio_dev); 250 251 switch (mask) { 252 case IIO_CHAN_INFO_PROCESSED: 253 return opt4001_read_lux_value(indio_dev, val, val2); 254 case IIO_CHAN_INFO_INT_TIME: 255 *val = 0; 256 *val2 = opt4001_int_time_reg[chip->int_time][0]; 257 return IIO_VAL_INT_PLUS_MICRO; 258 default: 259 return -EINVAL; 260 } 261 } 262 263 static int opt4001_write_raw(struct iio_dev *indio_dev, 264 struct iio_chan_spec const *chan, 265 int val, int val2, long mask) 266 { 267 struct opt4001_chip *chip = iio_priv(indio_dev); 268 int int_time; 269 270 switch (mask) { 271 case IIO_CHAN_INFO_INT_TIME: 272 if (val) 273 return -EINVAL; 274 275 int_time = opt4001_als_time_to_index(val2); 276 if (int_time < 0) 277 return int_time; 278 chip->int_time = int_time; 279 return opt4001_set_conf(chip); 280 default: 281 return -EINVAL; 282 } 283 } 284 285 static int opt4001_read_available(struct iio_dev *indio_dev, 286 struct iio_chan_spec const *chan, 287 const int **vals, int *type, int *length, 288 long mask) 289 { 290 switch (mask) { 291 case IIO_CHAN_INFO_INT_TIME: 292 *length = ARRAY_SIZE(opt4001_int_time_available) * 2; 293 *vals = (const int *)opt4001_int_time_available; 294 *type = IIO_VAL_INT_PLUS_MICRO; 295 return IIO_AVAIL_LIST; 296 297 default: 298 return -EINVAL; 299 } 300 } 301 302 static const struct iio_info opt4001_info_no_irq = { 303 .read_raw = opt4001_read_raw, 304 .write_raw = opt4001_write_raw, 305 .read_avail = opt4001_read_available, 306 }; 307 308 static int opt4001_load_defaults(struct opt4001_chip *chip) 309 { 310 chip->int_time = OPT4001_DEFAULT_CONVERSION_TIME; 311 312 return opt4001_set_conf(chip); 313 } 314 315 static bool opt4001_readable_reg(struct device *dev, unsigned int reg) 316 { 317 switch (reg) { 318 case OPT4001_LIGHT1_MSB: 319 case OPT4001_LIGHT1_LSB: 320 case OPT4001_CTRL: 321 case OPT4001_DEVICE_ID: 322 return true; 323 default: 324 return false; 325 } 326 } 327 328 static bool opt4001_writable_reg(struct device *dev, unsigned int reg) 329 { 330 switch (reg) { 331 case OPT4001_CTRL: 332 return true; 333 default: 334 return false; 335 } 336 } 337 338 static bool opt4001_volatile_reg(struct device *dev, unsigned int reg) 339 { 340 switch (reg) { 341 case OPT4001_LIGHT1_MSB: 342 case OPT4001_LIGHT1_LSB: 343 return true; 344 default: 345 return false; 346 } 347 } 348 349 static const struct regmap_config opt4001_regmap_config = { 350 .name = "opt4001", 351 .reg_bits = 8, 352 .val_bits = 16, 353 .cache_type = REGCACHE_RBTREE, 354 .max_register = OPT4001_DEVICE_ID, 355 .readable_reg = opt4001_readable_reg, 356 .writeable_reg = opt4001_writable_reg, 357 .volatile_reg = opt4001_volatile_reg, 358 .val_format_endian = REGMAP_ENDIAN_BIG, 359 }; 360 361 static int opt4001_probe(struct i2c_client *client) 362 { 363 struct opt4001_chip *chip; 364 struct iio_dev *indio_dev; 365 int ret; 366 uint dev_id; 367 368 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip)); 369 if (!indio_dev) 370 return -ENOMEM; 371 372 chip = iio_priv(indio_dev); 373 374 ret = devm_regulator_get_enable(&client->dev, "vdd"); 375 if (ret) 376 return dev_err_probe(&client->dev, ret, "Failed to enable vdd supply\n"); 377 378 chip->regmap = devm_regmap_init_i2c(client, &opt4001_regmap_config); 379 if (IS_ERR(chip->regmap)) 380 return dev_err_probe(&client->dev, PTR_ERR(chip->regmap), 381 "regmap initialization failed\n"); 382 chip->client = client; 383 384 indio_dev->info = &opt4001_info_no_irq; 385 386 ret = regmap_reinit_cache(chip->regmap, &opt4001_regmap_config); 387 if (ret) 388 return dev_err_probe(&client->dev, ret, 389 "failed to reinit regmap cache\n"); 390 391 ret = regmap_read(chip->regmap, OPT4001_DEVICE_ID, &dev_id); 392 if (ret < 0) 393 return dev_err_probe(&client->dev, ret, 394 "Failed to read the device ID register\n"); 395 396 dev_id = FIELD_GET(OPT4001_DEVICE_ID_MASK, dev_id); 397 if (dev_id != OPT4001_DEVICE_ID_VAL) 398 dev_warn(&client->dev, "Device ID: %#04x unknown\n", dev_id); 399 400 chip->chip_info = i2c_get_match_data(client); 401 402 indio_dev->channels = opt4001_channels; 403 indio_dev->num_channels = ARRAY_SIZE(opt4001_channels); 404 indio_dev->modes = INDIO_DIRECT_MODE; 405 indio_dev->name = chip->chip_info->name; 406 407 ret = opt4001_load_defaults(chip); 408 if (ret < 0) 409 return dev_err_probe(&client->dev, ret, 410 "Failed to set sensor defaults\n"); 411 412 ret = devm_add_action_or_reset(&client->dev, 413 opt4001_chip_off_action, 414 chip); 415 if (ret < 0) 416 return ret; 417 418 return devm_iio_device_register(&client->dev, indio_dev); 419 } 420 421 /* 422 * The compatible string determines which constants to use depending on 423 * opt4001 packaging 424 */ 425 static const struct i2c_device_id opt4001_id[] = { 426 { .name = "opt4001-sot-5x3", .driver_data = (kernel_ulong_t)&opt4001_sot_5x3_info }, 427 { .name = "opt4001-picostar", .driver_data = (kernel_ulong_t)&opt4001_picostar_info }, 428 { } 429 }; 430 MODULE_DEVICE_TABLE(i2c, opt4001_id); 431 432 static const struct of_device_id opt4001_of_match[] = { 433 { .compatible = "ti,opt4001-sot-5x3", .data = &opt4001_sot_5x3_info}, 434 { .compatible = "ti,opt4001-picostar", .data = &opt4001_picostar_info}, 435 { } 436 }; 437 MODULE_DEVICE_TABLE(of, opt4001_of_match); 438 439 static struct i2c_driver opt4001_driver = { 440 .driver = { 441 .name = "opt4001", 442 .of_match_table = opt4001_of_match, 443 }, 444 .probe = opt4001_probe, 445 .id_table = opt4001_id, 446 }; 447 module_i2c_driver(opt4001_driver); 448 449 MODULE_AUTHOR("Stefan Windfeldt-Prytz <stefan.windfeldt-prytz@axis.com>"); 450 MODULE_DESCRIPTION("Texas Instruments opt4001 ambient light sensor driver"); 451 MODULE_LICENSE("GPL"); 452