1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/slab.h> 8 #include <linux/uaccess.h> 9 #include <linux/debugfs.h> 10 #include <linux/component.h> 11 #include <linux/of_irq.h> 12 #include <linux/phy/phy.h> 13 #include <linux/delay.h> 14 #include <linux/string_choices.h> 15 #include <drm/display/drm_dp_aux_bus.h> 16 #include <drm/display/drm_hdmi_audio_helper.h> 17 #include <drm/drm_edid.h> 18 19 #include "msm_drv.h" 20 #include "msm_kms.h" 21 #include "dp_ctrl.h" 22 #include "dp_aux.h" 23 #include "dp_reg.h" 24 #include "dp_link.h" 25 #include "dp_panel.h" 26 #include "dp_display.h" 27 #include "dp_drm.h" 28 #include "dp_audio.h" 29 #include "dp_debug.h" 30 31 static bool psr_enabled = false; 32 module_param(psr_enabled, bool, 0); 33 MODULE_PARM_DESC(psr_enabled, "enable PSR for eDP and DP displays"); 34 35 #define HPD_STRING_SIZE 30 36 37 enum { 38 ISR_DISCONNECTED, 39 ISR_CONNECT_PENDING, 40 ISR_CONNECTED, 41 ISR_HPD_IO_GLITCH_COUNT, 42 ISR_IRQ_HPD_PULSE_COUNT, 43 ISR_HPD_REPLUG_COUNT, 44 }; 45 46 struct msm_dp_display_private { 47 int irq; 48 49 unsigned int id; 50 51 /* state variables */ 52 bool core_initialized; 53 bool phy_initialized; 54 bool audio_supported; 55 56 struct mutex plugged_lock; 57 bool plugged; 58 59 struct drm_device *drm_dev; 60 61 struct drm_dp_aux *aux; 62 struct msm_dp_link *link; 63 struct msm_dp_panel *panel; 64 struct msm_dp_ctrl *ctrl; 65 66 struct msm_dp msm_dp_display; 67 68 /* wait for audio signaling */ 69 struct completion audio_comp; 70 71 /* HPD IRQ handling */ 72 spinlock_t irq_thread_lock; 73 u32 hpd_isr_status; 74 75 bool wide_bus_supported; 76 77 struct msm_dp_audio *audio; 78 79 void __iomem *ahb_base; 80 size_t ahb_len; 81 82 void __iomem *aux_base; 83 size_t aux_len; 84 85 void __iomem *link_base; 86 size_t link_len; 87 88 void __iomem *p0_base; 89 size_t p0_len; 90 }; 91 92 struct msm_dp_desc { 93 phys_addr_t io_start; 94 unsigned int id; 95 bool wide_bus_supported; 96 }; 97 98 static const struct msm_dp_desc msm_dp_desc_glymur[] = { 99 { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 100 { .io_start = 0x0af5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 101 { .io_start = 0x0af64000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 102 { .io_start = 0x0af6c000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, 103 {} 104 }; 105 106 static const struct msm_dp_desc msm_dp_desc_sa8775p[] = { 107 { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 108 { .io_start = 0x0af5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 109 { .io_start = 0x22154000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 110 { .io_start = 0x2215c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 111 {} 112 }; 113 114 static const struct msm_dp_desc msm_dp_desc_sdm845[] = { 115 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0 }, 116 {} 117 }; 118 119 static const struct msm_dp_desc msm_dp_desc_sc7180[] = { 120 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 121 {} 122 }; 123 124 static const struct msm_dp_desc msm_dp_desc_sc7280[] = { 125 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 126 { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 127 {} 128 }; 129 130 static const struct msm_dp_desc msm_dp_desc_sc8180x[] = { 131 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 132 { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 133 { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 134 {} 135 }; 136 137 static const struct msm_dp_desc msm_dp_desc_sc8280xp[] = { 138 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 139 { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 140 { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 141 { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, 142 { .io_start = 0x22090000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 143 { .io_start = 0x22098000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 144 { .io_start = 0x2209a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 145 { .io_start = 0x220a0000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, 146 {} 147 }; 148 149 static const struct msm_dp_desc msm_dp_desc_sm8650[] = { 150 { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 151 {} 152 }; 153 154 static const struct msm_dp_desc msm_dp_desc_x1e80100[] = { 155 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 156 { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 157 { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 158 { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, 159 {} 160 }; 161 162 static const struct of_device_id msm_dp_dt_match[] = { 163 { .compatible = "qcom,glymur-dp", .data = &msm_dp_desc_glymur }, 164 { .compatible = "qcom,sa8775p-dp", .data = &msm_dp_desc_sa8775p }, 165 { .compatible = "qcom,sc7180-dp", .data = &msm_dp_desc_sc7180 }, 166 { .compatible = "qcom,sc7280-dp", .data = &msm_dp_desc_sc7280 }, 167 { .compatible = "qcom,sc7280-edp", .data = &msm_dp_desc_sc7280 }, 168 { .compatible = "qcom,sc8180x-dp", .data = &msm_dp_desc_sc8180x }, 169 { .compatible = "qcom,sc8180x-edp", .data = &msm_dp_desc_sc8180x }, 170 { .compatible = "qcom,sc8280xp-dp", .data = &msm_dp_desc_sc8280xp }, 171 { .compatible = "qcom,sc8280xp-edp", .data = &msm_dp_desc_sc8280xp }, 172 { .compatible = "qcom,sdm845-dp", .data = &msm_dp_desc_sdm845 }, 173 { .compatible = "qcom,sm8350-dp", .data = &msm_dp_desc_sc7180 }, 174 { .compatible = "qcom,sm8650-dp", .data = &msm_dp_desc_sm8650 }, 175 { .compatible = "qcom,x1e80100-dp", .data = &msm_dp_desc_x1e80100 }, 176 {} 177 }; 178 MODULE_DEVICE_TABLE(of, msm_dp_dt_match); 179 180 static struct msm_dp_display_private *dev_get_dp_display_private(struct device *dev) 181 { 182 struct msm_dp *dp = dev_get_drvdata(dev); 183 184 return container_of(dp, struct msm_dp_display_private, msm_dp_display); 185 } 186 187 void msm_dp_display_signal_audio_start(struct msm_dp *msm_dp_display) 188 { 189 struct msm_dp_display_private *dp; 190 191 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 192 193 reinit_completion(&dp->audio_comp); 194 } 195 196 void msm_dp_display_signal_audio_complete(struct msm_dp *msm_dp_display) 197 { 198 struct msm_dp_display_private *dp; 199 200 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 201 202 complete_all(&dp->audio_comp); 203 } 204 205 static int msm_dp_display_bind(struct device *dev, struct device *master, 206 void *data) 207 { 208 int rc = 0; 209 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 210 struct msm_drm_private *priv = dev_get_drvdata(master); 211 struct drm_device *drm = priv->dev; 212 213 dp->msm_dp_display.drm_dev = drm; 214 priv->kms->dp[dp->id] = &dp->msm_dp_display; 215 216 dp->drm_dev = drm; 217 dp->aux->drm_dev = drm; 218 rc = msm_dp_aux_register(dp->aux); 219 if (rc) { 220 DRM_ERROR("DRM DP AUX register failed\n"); 221 goto end; 222 } 223 224 return 0; 225 end: 226 return rc; 227 } 228 229 static void msm_dp_display_unbind(struct device *dev, struct device *master, 230 void *data) 231 { 232 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 233 struct msm_drm_private *priv = dev_get_drvdata(master); 234 235 of_dp_aux_depopulate_bus(dp->aux); 236 237 msm_dp_aux_unregister(dp->aux); 238 dp->drm_dev = NULL; 239 dp->aux->drm_dev = NULL; 240 priv->kms->dp[dp->id] = NULL; 241 } 242 243 static const struct component_ops msm_dp_display_comp_ops = { 244 .bind = msm_dp_display_bind, 245 .unbind = msm_dp_display_unbind, 246 }; 247 248 static int msm_dp_display_lttpr_init(struct msm_dp_display_private *dp, u8 *dpcd) 249 { 250 int rc, lttpr_count; 251 252 if (drm_dp_read_lttpr_common_caps(dp->aux, dpcd, dp->link->lttpr_common_caps)) 253 return 0; 254 255 lttpr_count = drm_dp_lttpr_count(dp->link->lttpr_common_caps); 256 rc = drm_dp_lttpr_init(dp->aux, lttpr_count); 257 if (rc) { 258 DRM_ERROR("failed to set LTTPRs transparency mode, rc=%d\n", rc); 259 return 0; 260 } 261 262 return lttpr_count; 263 } 264 265 static int msm_dp_display_process_hpd_high(struct msm_dp_display_private *dp) 266 { 267 struct drm_connector *connector = dp->msm_dp_display.connector; 268 const struct drm_display_info *info = &connector->display_info; 269 int rc = 0; 270 u8 dpcd[DP_RECEIVER_CAP_SIZE]; 271 const struct drm_edid *drm_edid = NULL; 272 273 rc = drm_dp_read_dpcd_caps(dp->aux, dpcd); 274 if (rc) 275 goto end; 276 277 dp->link->lttpr_count = msm_dp_display_lttpr_init(dp, dpcd); 278 279 rc = msm_dp_panel_read_link_caps(dp->panel, connector); 280 if (rc) 281 goto end; 282 283 drm_edid = drm_edid_read_ddc(connector, &dp->aux->ddc); 284 drm_edid_connector_update(connector, drm_edid); 285 286 if (!drm_edid) { 287 DRM_ERROR("panel edid read failed\n"); 288 /* check edid read fail is due to unplug */ 289 if (!msm_dp_aux_is_link_connected(dp->aux)) 290 return -ETIMEDOUT; 291 } 292 293 msm_dp_link_process_request(dp->link); 294 295 if (!dp->msm_dp_display.is_edp) 296 drm_dp_set_subconnector_property(connector, 297 connector_status_connected, 298 dp->panel->dpcd, 299 dp->panel->downstream_ports); 300 301 dp->msm_dp_display.psr_supported = dp->panel->psr_cap.version && psr_enabled; 302 303 dp->audio_supported = info->has_audio; 304 msm_dp_panel_handle_sink_request(dp->panel, drm_edid); 305 306 /* 307 * set sink to normal operation mode -- D0 308 * before dpcd read 309 */ 310 msm_dp_link_psm_config(dp->link, &dp->panel->link_info, false); 311 312 msm_dp_link_reset_phy_params_vx_px(dp->link); 313 314 end: 315 drm_edid_free(drm_edid); 316 return rc; 317 } 318 319 /** 320 * msm_dp_display_host_phy_init() - start up DP PHY 321 * @dp: main display data structure 322 * 323 * Prepare DP PHY for the AUX transactions to succeed. 324 * 325 * Returns: true if this call has initliazed the PHY and false if the PHY has 326 * already been setup beforehand. 327 */ 328 static bool msm_dp_display_host_phy_init(struct msm_dp_display_private *dp) 329 { 330 drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 331 dp->msm_dp_display.connector_type, dp->core_initialized, 332 dp->phy_initialized); 333 334 if (!dp->phy_initialized) { 335 msm_dp_ctrl_phy_init(dp->ctrl); 336 dp->phy_initialized = true; 337 return true; 338 } 339 340 return false; 341 } 342 343 static void msm_dp_display_host_phy_exit(struct msm_dp_display_private *dp) 344 { 345 drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 346 dp->msm_dp_display.connector_type, dp->core_initialized, 347 dp->phy_initialized); 348 349 if (dp->phy_initialized) { 350 msm_dp_ctrl_phy_exit(dp->ctrl); 351 dp->phy_initialized = false; 352 } 353 } 354 355 static void msm_dp_display_host_init(struct msm_dp_display_private *dp) 356 { 357 drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 358 dp->msm_dp_display.connector_type, dp->core_initialized, 359 dp->phy_initialized); 360 361 msm_dp_ctrl_core_clk_enable(dp->ctrl); 362 msm_dp_ctrl_reset(dp->ctrl, dp->panel); 363 msm_dp_ctrl_enable_irq(dp->ctrl); 364 msm_dp_aux_init(dp->aux); 365 dp->core_initialized = true; 366 } 367 368 static void msm_dp_display_host_deinit(struct msm_dp_display_private *dp) 369 { 370 drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 371 dp->msm_dp_display.connector_type, dp->core_initialized, 372 dp->phy_initialized); 373 374 msm_dp_ctrl_reset(dp->ctrl, dp->panel); 375 msm_dp_ctrl_disable_irq(dp->ctrl); 376 msm_dp_aux_deinit(dp->aux); 377 msm_dp_ctrl_core_clk_disable(dp->ctrl); 378 dp->core_initialized = false; 379 } 380 381 static void msm_dp_display_handle_video_request(struct msm_dp_display_private *dp) 382 { 383 if (dp->link->sink_request & DP_TEST_LINK_VIDEO_PATTERN) { 384 dp->panel->video_test = true; 385 msm_dp_link_send_test_response(dp->link); 386 } 387 } 388 389 static int msm_dp_display_handle_irq_hpd(struct msm_dp_display_private *dp) 390 { 391 u32 sink_request = dp->link->sink_request; 392 393 drm_dbg_dp(dp->drm_dev, "%d\n", sink_request); 394 395 msm_dp_ctrl_handle_sink_request(dp->ctrl, dp->panel); 396 397 if (sink_request & DP_TEST_LINK_VIDEO_PATTERN) 398 msm_dp_display_handle_video_request(dp); 399 400 return 0; 401 } 402 403 static int msm_dp_hpd_plug_handle(struct msm_dp_display_private *dp) 404 { 405 int ret; 406 struct platform_device *pdev = dp->msm_dp_display.pdev; 407 408 drm_dbg_dp(dp->drm_dev, "Before, type=%d sink_count=%d\n", 409 dp->msm_dp_display.connector_type, 410 dp->link->sink_count); 411 412 guard(mutex)(&dp->plugged_lock); 413 414 ret = pm_runtime_resume_and_get(&pdev->dev); 415 if (ret) { 416 DRM_ERROR("failed to pm_runtime_resume\n"); 417 return ret; 418 } 419 420 msm_dp_aux_enable_xfers(dp->aux, true); 421 422 msm_dp_display_host_phy_init(dp); 423 424 ret = msm_dp_display_process_hpd_high(dp); 425 426 drm_dbg_dp(dp->drm_dev, "After, type=%d sink_count=%d\n", 427 dp->msm_dp_display.connector_type, 428 dp->link->sink_count); 429 430 dp->plugged = true; 431 432 return ret; 433 }; 434 435 static void msm_dp_display_handle_plugged_change(struct msm_dp *msm_dp_display, 436 bool plugged) 437 { 438 struct msm_dp_display_private *dp; 439 440 dp = container_of(msm_dp_display, 441 struct msm_dp_display_private, msm_dp_display); 442 443 /* notify audio subsystem only if sink supports audio */ 444 if (dp->audio_supported) 445 drm_connector_hdmi_audio_plugged_notify(msm_dp_display->connector, 446 plugged); 447 } 448 449 static int msm_dp_hpd_unplug_handle(struct msm_dp_display_private *dp) 450 { 451 struct platform_device *pdev = dp->msm_dp_display.pdev; 452 453 dp->panel->video_test = false; 454 455 msm_dp_aux_enable_xfers(dp->aux, false); 456 457 drm_dbg_dp(dp->drm_dev, "Before, type=%d sink_count=%d\n", 458 dp->msm_dp_display.connector_type, 459 dp->link->sink_count); 460 461 guard(mutex)(&dp->plugged_lock); 462 if (!dp->plugged) 463 return 0; 464 465 /* Don't forget modes for eDP */ 466 if (!dp->msm_dp_display.is_edp) 467 drm_edid_connector_update(dp->msm_dp_display.connector, NULL); 468 469 /* triggered by irq_hdp with sink_count = 0 */ 470 if (dp->link->sink_count == 0) 471 msm_dp_display_host_phy_exit(dp); 472 473 /* 474 * We don't need separate work for disconnect as 475 * connect/attention interrupts are disabled 476 */ 477 if (!dp->msm_dp_display.is_edp) 478 drm_dp_set_subconnector_property(dp->msm_dp_display.connector, 479 connector_status_disconnected, 480 dp->panel->dpcd, 481 dp->panel->downstream_ports); 482 483 /* signal the disconnect event early to ensure proper teardown */ 484 msm_dp_display_handle_plugged_change(&dp->msm_dp_display, false); 485 486 drm_dbg_dp(dp->drm_dev, "After, type=%d, sink_count=%d\n", 487 dp->msm_dp_display.connector_type, 488 dp->link->sink_count); 489 490 if (dp->plugged) { 491 pm_runtime_put_sync(&pdev->dev); 492 dp->plugged = false; 493 } 494 495 return 0; 496 } 497 498 static int msm_dp_irq_hpd_handle(struct msm_dp_display_private *dp) 499 { 500 u32 sink_request; 501 int rc = 0; 502 503 /* irq_hpd can happen at either connected or disconnected state */ 504 drm_dbg_dp(dp->drm_dev, "Before, type=%d, sink_count=%d\n", 505 dp->msm_dp_display.connector_type, 506 dp->link->sink_count); 507 508 /* check for any test request issued by sink */ 509 rc = msm_dp_link_process_request(dp->link); 510 if (!rc) { 511 sink_request = dp->link->sink_request; 512 drm_dbg_dp(dp->drm_dev, "sink_request=%d\n", sink_request); 513 if (sink_request & DS_PORT_STATUS_CHANGED) 514 rc = msm_dp_display_process_hpd_high(dp); 515 else 516 rc = msm_dp_display_handle_irq_hpd(dp); 517 } 518 519 drm_dbg_dp(dp->drm_dev, "After, type=%d, sink_count=%d\n", 520 dp->msm_dp_display.connector_type, 521 dp->link->sink_count); 522 523 return rc; 524 } 525 526 static void msm_dp_display_deinit_sub_modules(struct msm_dp_display_private *dp) 527 { 528 msm_dp_audio_put(dp->audio); 529 msm_dp_aux_put(dp->aux); 530 } 531 532 static int msm_dp_init_sub_modules(struct msm_dp_display_private *dp) 533 { 534 int rc = 0; 535 struct device *dev = &dp->msm_dp_display.pdev->dev; 536 struct phy *phy; 537 538 phy = devm_phy_get(dev, "dp"); 539 if (IS_ERR(phy)) 540 return PTR_ERR(phy); 541 542 rc = phy_set_mode_ext(phy, PHY_MODE_DP, 543 dp->msm_dp_display.is_edp ? PHY_SUBMODE_EDP : PHY_SUBMODE_DP); 544 if (rc) { 545 DRM_ERROR("failed to set phy submode, rc = %d\n", rc); 546 goto error; 547 } 548 549 dp->aux = msm_dp_aux_get(dev, phy, dp->msm_dp_display.is_edp, dp->aux_base); 550 if (IS_ERR(dp->aux)) { 551 rc = PTR_ERR(dp->aux); 552 DRM_ERROR("failed to initialize aux, rc = %d\n", rc); 553 dp->aux = NULL; 554 goto error; 555 } 556 557 dp->link = msm_dp_link_get(dev, dp->aux); 558 if (IS_ERR(dp->link)) { 559 rc = PTR_ERR(dp->link); 560 DRM_ERROR("failed to initialize link, rc = %d\n", rc); 561 dp->link = NULL; 562 goto error_link; 563 } 564 565 dp->panel = msm_dp_panel_get(dev, dp->aux, dp->link, dp->link_base, dp->p0_base); 566 if (IS_ERR(dp->panel)) { 567 rc = PTR_ERR(dp->panel); 568 DRM_ERROR("failed to initialize panel, rc = %d\n", rc); 569 dp->panel = NULL; 570 goto error_link; 571 } 572 573 dp->ctrl = msm_dp_ctrl_get(dev, dp->link, dp->aux, 574 phy, dp->ahb_base, dp->link_base); 575 if (IS_ERR(dp->ctrl)) { 576 rc = PTR_ERR(dp->ctrl); 577 DRM_ERROR("failed to initialize ctrl, rc = %d\n", rc); 578 dp->ctrl = NULL; 579 goto error_link; 580 } 581 582 dp->audio = msm_dp_audio_get(dp->msm_dp_display.pdev, dp->link_base); 583 if (IS_ERR(dp->audio)) { 584 rc = PTR_ERR(dp->audio); 585 pr_err("failed to initialize audio, rc = %d\n", rc); 586 dp->audio = NULL; 587 goto error_link; 588 } 589 590 return rc; 591 592 error_link: 593 msm_dp_aux_put(dp->aux); 594 error: 595 return rc; 596 } 597 598 static int msm_dp_display_set_mode(struct msm_dp *msm_dp_display, 599 const struct drm_display_mode *adjusted_mode, 600 struct msm_dp_panel *msm_dp_panel) 601 { 602 struct msm_dp_display_private *dp; 603 u32 bpp; 604 605 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 606 607 if (msm_dp_display_check_video_test(msm_dp_display)) 608 bpp = msm_dp_display_get_test_bpp(msm_dp_display); 609 else 610 bpp = msm_dp_panel->connector->display_info.bpc * 3; 611 612 msm_dp_panel_init_panel_info(msm_dp_panel, adjusted_mode, bpp ? bpp : 24); 613 614 /* populate wide_bus_support to different layers */ 615 dp->ctrl->wide_bus_en = 616 msm_dp_panel->msm_dp_mode.out_fmt_is_yuv_420 ? false : dp->wide_bus_supported; 617 return 0; 618 } 619 620 static int msm_dp_display_prepare_link(struct msm_dp_display_private *dp) 621 { 622 struct msm_dp *msm_dp_display = &dp->msm_dp_display; 623 int rc = 0; 624 bool force_link_train = false; 625 626 drm_dbg_dp(dp->drm_dev, "sink_count=%d\n", dp->link->sink_count); 627 628 if (msm_dp_display->is_edp) 629 msm_dp_hpd_plug_handle(dp); 630 631 rc = pm_runtime_resume_and_get(&msm_dp_display->pdev->dev); 632 if (rc) { 633 DRM_ERROR("failed to pm_runtime_resume\n"); 634 return rc; 635 } 636 637 if (dp->link->sink_count == 0) 638 return -ENOTCONN; 639 640 if (!msm_dp_display->power_on) { 641 msm_dp_display_host_phy_init(dp); 642 force_link_train = true; 643 } 644 645 rc = msm_dp_ctrl_on_link(dp->ctrl, dp->panel); 646 if (rc) { 647 DRM_ERROR("Failed link training (rc=%d)\n", rc); 648 // TODO: schedule drm_connector_set_link_status_property() 649 return rc; 650 } 651 652 return msm_dp_ctrl_prepare_stream_on(dp->ctrl, dp->panel, force_link_train); 653 } 654 655 static int msm_dp_display_enable(struct msm_dp_display_private *dp, 656 struct msm_dp_panel *msm_dp_panel) 657 { 658 int rc = 0; 659 struct msm_dp *msm_dp_display = &dp->msm_dp_display; 660 661 drm_dbg_dp(dp->drm_dev, "sink_count=%d\n", dp->link->sink_count); 662 if (msm_dp_display->power_on) { 663 drm_dbg_dp(dp->drm_dev, "Link already setup, return\n"); 664 return 0; 665 } 666 667 rc = msm_dp_ctrl_on_stream(dp->ctrl, msm_dp_panel); 668 if (!rc) 669 msm_dp_display->power_on = true; 670 671 return rc; 672 } 673 674 static int msm_dp_display_post_enable(struct msm_dp *msm_dp_display) 675 { 676 struct msm_dp_display_private *dp; 677 u32 rate; 678 679 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 680 681 rate = dp->link->link_params.rate; 682 683 if (dp->audio_supported) { 684 dp->audio->bw_code = drm_dp_link_rate_to_bw_code(rate); 685 dp->audio->lane_count = dp->link->link_params.num_lanes; 686 } 687 688 /* signal the connect event late to synchronize video and display */ 689 msm_dp_display_handle_plugged_change(msm_dp_display, true); 690 691 if (msm_dp_display->psr_supported) 692 msm_dp_ctrl_config_psr(dp->ctrl, dp->panel); 693 694 return 0; 695 } 696 697 static void msm_dp_display_audio_notify_disable(struct msm_dp_display_private *dp) 698 { 699 struct msm_dp *msm_dp_display = &dp->msm_dp_display; 700 701 /* wait only if audio was enabled */ 702 if (msm_dp_display->audio_enabled) { 703 /* signal the disconnect event */ 704 msm_dp_display_handle_plugged_change(msm_dp_display, false); 705 if (!wait_for_completion_timeout(&dp->audio_comp, 706 HZ * 5)) 707 DRM_ERROR("audio comp timeout\n"); 708 } 709 710 msm_dp_display->audio_enabled = false; 711 } 712 713 static int msm_dp_display_disable(struct msm_dp_display_private *dp, 714 struct msm_dp_panel *msm_dp_panel) 715 { 716 struct msm_dp *msm_dp_display = &dp->msm_dp_display; 717 718 if (!msm_dp_display->power_on) 719 return 0; 720 721 msm_dp_panel_disable_vsc_sdp(msm_dp_panel); 722 723 msm_dp_ctrl_off_pixel_clk(dp->ctrl); 724 725 /* dongle is still connected but sinks are disconnected */ 726 if (dp->link->sink_count == 0) 727 msm_dp_link_psm_config(dp->link, &msm_dp_panel->link_info, true); 728 729 msm_dp_ctrl_off_link(dp->ctrl, msm_dp_panel); 730 731 if (dp->link->sink_count == 0) 732 /* re-init the PHY so that we can listen to Dongle disconnect */ 733 msm_dp_ctrl_reinit_phy(dp->ctrl); 734 else 735 msm_dp_display_host_phy_exit(dp); 736 737 msm_dp_display->power_on = false; 738 739 drm_dbg_dp(dp->drm_dev, "sink count: %d\n", dp->link->sink_count); 740 return 0; 741 } 742 743 /** 744 * msm_dp_display_mode_valid - callback to determine if specified mode is valid 745 * @dp: Pointer to dp display structure 746 * @info: display info 747 * @mode: Pointer to drm mode structure 748 * Returns: Validity status for specified mode 749 */ 750 enum drm_mode_status msm_dp_display_mode_valid(struct msm_dp *dp, 751 const struct drm_display_info *info, 752 const struct drm_display_mode *mode) 753 { 754 const u32 num_components = 3, default_bpp = 24; 755 struct msm_dp_display_private *msm_dp_display; 756 struct msm_dp_link_info *link_info; 757 u32 mode_rate_khz = 0, supported_rate_khz = 0, mode_bpp = 0; 758 int mode_pclk_khz = mode->clock; 759 bool is_yuv_420; 760 761 if (!dp || !mode_pclk_khz || !dp->connector) { 762 DRM_ERROR("invalid params\n"); 763 return -EINVAL; 764 } 765 766 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 767 link_info = &msm_dp_display->panel->link_info; 768 769 is_yuv_420 = drm_mode_is_420_only(&dp->connector->display_info, mode); 770 771 /* 772 * YUV 420 is carried over DP by signalling the colorimetry through a 773 * VSC SDP, so a 420-only mode cannot be driven without VSC SDP support. 774 */ 775 if (is_yuv_420 && !msm_dp_display->panel->vsc_sdp_supported) 776 return MODE_NO_420; 777 778 if (is_yuv_420 || msm_dp_display->wide_bus_supported) 779 mode_pclk_khz /= 2; 780 781 if (mode_pclk_khz > DP_MAX_PIXEL_CLK_KHZ) 782 return MODE_CLOCK_HIGH; 783 784 mode_bpp = dp->connector->display_info.bpc * num_components; 785 if (!mode_bpp) 786 mode_bpp = default_bpp; 787 788 mode_bpp = msm_dp_panel_get_mode_bpp(msm_dp_display->panel, 789 mode_bpp, mode_pclk_khz); 790 791 mode_rate_khz = mode_pclk_khz * mode_bpp; 792 supported_rate_khz = link_info->num_lanes * link_info->rate * 8; 793 794 if (mode_rate_khz > supported_rate_khz) 795 return MODE_BAD; 796 797 return MODE_OK; 798 } 799 800 int msm_dp_display_get_modes(struct msm_dp *dp) 801 { 802 struct msm_dp_display_private *msm_dp_display; 803 804 if (!dp) { 805 DRM_ERROR("invalid params\n"); 806 return 0; 807 } 808 809 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 810 811 return drm_edid_connector_add_modes(msm_dp_display->panel->connector); 812 } 813 814 bool msm_dp_display_check_video_test(struct msm_dp *dp) 815 { 816 struct msm_dp_display_private *msm_dp_display; 817 818 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 819 820 return msm_dp_display->panel->video_test; 821 } 822 823 int msm_dp_display_get_test_bpp(struct msm_dp *dp) 824 { 825 struct msm_dp_display_private *msm_dp_display; 826 827 if (!dp) { 828 DRM_ERROR("invalid params\n"); 829 return 0; 830 } 831 832 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 833 834 return msm_dp_link_bit_depth_to_bpp( 835 msm_dp_display->link->test_video.test_bit_depth); 836 } 837 838 void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp) 839 { 840 struct msm_dp_display_private *msm_dp_display; 841 842 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 843 844 /* 845 * if we are reading registers we need the link clocks to be on 846 * however till DP cable is connected this will not happen as we 847 * do not know the resolution to power up with. Hence check the 848 * power_on status before dumping DP registers to avoid crash due 849 * to unclocked access 850 */ 851 if (!dp->power_on) 852 return; 853 854 msm_disp_snapshot_add_block(disp_state, msm_dp_display->ahb_len, 855 msm_dp_display->ahb_base, "dp_ahb"); 856 msm_disp_snapshot_add_block(disp_state, msm_dp_display->aux_len, 857 msm_dp_display->aux_base, "dp_aux"); 858 msm_disp_snapshot_add_block(disp_state, msm_dp_display->link_len, 859 msm_dp_display->link_base, "dp_link"); 860 msm_disp_snapshot_add_block(disp_state, msm_dp_display->p0_len, 861 msm_dp_display->p0_base, "dp_p0"); 862 } 863 864 void msm_dp_display_set_psr(struct msm_dp *msm_dp_display, bool enter) 865 { 866 struct msm_dp_display_private *dp; 867 868 if (!msm_dp_display) { 869 DRM_ERROR("invalid params\n"); 870 return; 871 } 872 873 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 874 msm_dp_ctrl_set_psr(dp->ctrl, dp->panel, enter); 875 } 876 877 /** 878 * msm_dp_bridge_detect - callback to determine if connector is connected 879 * 880 * @bridge: Pointer to drm bridge structure 881 * @connector: Pointer to drm connector structure 882 * 883 * Returns: where there is a display connected to the DPTX (returning 884 * disconnected for branch devices without DP Sinks being connected). 885 */ 886 enum drm_connector_status msm_dp_bridge_detect(struct drm_bridge *bridge, 887 struct drm_connector *connector) 888 { 889 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge); 890 struct msm_dp *dp = msm_dp_bridge->msm_dp_display; 891 int status = connector_status_disconnected; 892 struct msm_dp_display_private *priv; 893 u8 dpcd[DP_RECEIVER_CAP_SIZE]; 894 struct drm_dp_desc desc; 895 bool phy_deinit; 896 int ret; 897 898 dp = to_dp_bridge(bridge)->msm_dp_display; 899 900 priv = container_of(dp, struct msm_dp_display_private, msm_dp_display); 901 902 guard(mutex)(&priv->plugged_lock); 903 ret = pm_runtime_resume_and_get(&dp->pdev->dev); 904 if (ret) { 905 DRM_ERROR("failed to pm_runtime_resume\n"); 906 return status; 907 } 908 909 phy_deinit = msm_dp_display_host_phy_init(priv); 910 911 msm_dp_aux_enable_xfers(priv->aux, true); 912 913 ret = msm_dp_aux_is_link_connected(priv->aux); 914 DRM_DEBUG_DP("aux link status: %x\n", ret); 915 if (!priv->plugged && !ret) { 916 DRM_DEBUG_DP("aux not connected\n"); 917 priv->plugged = false; 918 goto end; 919 } 920 921 ret = drm_dp_read_dpcd_caps(priv->aux, dpcd); 922 if (ret) { 923 DRM_DEBUG_DP("failed to read caps\n"); 924 priv->plugged = false; 925 goto end; 926 } 927 928 ret = drm_dp_read_desc(priv->aux, &desc, drm_dp_is_branch(dpcd)); 929 if (ret) { 930 DRM_DEBUG_DP("failed to read desc\n"); 931 priv->plugged = false; 932 goto end; 933 } 934 935 status = connector_status_connected; 936 priv->plugged = true; 937 938 if (drm_dp_read_sink_count_cap(connector, dpcd, &desc)) { 939 int sink_count = drm_dp_read_sink_count(priv->aux); 940 941 drm_dbg_dp(dp->drm_dev, "sink_count = %d\n", sink_count); 942 943 if (sink_count <= 0) 944 status = connector_status_disconnected; 945 } 946 947 end: 948 /* 949 * If we detected the DPRX, leave the controller on so that it doesn't 950 * lose the state. 951 */ 952 if (!priv->plugged) { 953 if (phy_deinit) { 954 msm_dp_aux_enable_xfers(priv->aux, false); 955 msm_dp_display_host_phy_exit(priv); 956 } 957 958 pm_runtime_put_sync(&dp->pdev->dev); 959 } 960 961 return status; 962 } 963 964 static irqreturn_t msm_dp_display_irq_handler(int irq, void *dev_id) 965 { 966 struct msm_dp_display_private *dp = dev_id; 967 u32 hpd_isr_status; 968 unsigned long flags; 969 irqreturn_t ret = IRQ_HANDLED; 970 971 hpd_isr_status = msm_dp_aux_get_hpd_intr_status(dp->aux); 972 973 if (hpd_isr_status & 0x0F) { 974 drm_dbg_dp(dp->drm_dev, "type=%d isr=0x%x\n", 975 dp->msm_dp_display.connector_type, hpd_isr_status); 976 977 spin_lock_irqsave(&dp->irq_thread_lock, flags); 978 dp->hpd_isr_status |= hpd_isr_status; 979 ret = IRQ_WAKE_THREAD; 980 spin_unlock_irqrestore(&dp->irq_thread_lock, flags); 981 } 982 983 /* DP controller isr */ 984 ret |= msm_dp_ctrl_isr(dp->ctrl, dp->panel); 985 986 return ret; 987 } 988 989 static irqreturn_t msm_dp_display_irq_thread(int irq, void *dev_id) 990 { 991 struct msm_dp_display_private *dp = dev_id; 992 irqreturn_t ret = IRQ_NONE; 993 unsigned long flags; 994 u32 hpd_isr_status; 995 996 spin_lock_irqsave(&dp->irq_thread_lock, flags); 997 hpd_isr_status = dp->hpd_isr_status; 998 dp->hpd_isr_status = 0; 999 spin_unlock_irqrestore(&dp->irq_thread_lock, flags); 1000 1001 if (hpd_isr_status & DP_DP_HPD_UNPLUG_INT_MASK) 1002 drm_bridge_hpd_notify(dp->msm_dp_display.bridge, 1003 connector_status_disconnected); 1004 1005 if (hpd_isr_status & DP_DP_HPD_PLUG_INT_MASK) 1006 drm_bridge_hpd_notify(dp->msm_dp_display.bridge, 1007 connector_status_connected); 1008 1009 /* Send HPD as connected and distinguish it in the notifier */ 1010 if (hpd_isr_status & DP_DP_IRQ_HPD_INT_MASK) 1011 drm_bridge_hpd_notify(dp->msm_dp_display.bridge, 1012 connector_status_connected); 1013 1014 ret = IRQ_HANDLED; 1015 1016 return ret; 1017 } 1018 1019 static int msm_dp_display_request_irq(struct msm_dp_display_private *dp) 1020 { 1021 int rc = 0; 1022 struct platform_device *pdev = dp->msm_dp_display.pdev; 1023 1024 dp->irq = platform_get_irq(pdev, 0); 1025 if (dp->irq < 0) { 1026 DRM_ERROR("failed to get irq\n"); 1027 return dp->irq; 1028 } 1029 1030 spin_lock_init(&dp->irq_thread_lock); 1031 irq_set_status_flags(dp->irq, IRQ_NOAUTOEN); 1032 rc = devm_request_threaded_irq(&pdev->dev, dp->irq, 1033 msm_dp_display_irq_handler, 1034 msm_dp_display_irq_thread, 1035 IRQ_TYPE_LEVEL_HIGH, 1036 "dp_display_isr", dp); 1037 1038 if (rc < 0) { 1039 DRM_ERROR("failed to request IRQ%u: %d\n", 1040 dp->irq, rc); 1041 return rc; 1042 } 1043 1044 return 0; 1045 } 1046 1047 static const struct msm_dp_desc *msm_dp_display_get_desc(struct platform_device *pdev) 1048 { 1049 const struct msm_dp_desc *descs = of_device_get_match_data(&pdev->dev); 1050 struct resource *res; 1051 int i; 1052 1053 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1054 if (!res) 1055 return NULL; 1056 1057 for (i = 0; i < descs[i].io_start; i++) { 1058 if (descs[i].io_start == res->start) 1059 return &descs[i]; 1060 } 1061 1062 dev_err(&pdev->dev, "unknown displayport instance\n"); 1063 return NULL; 1064 } 1065 1066 static int msm_dp_display_probe_tail(struct device *dev) 1067 { 1068 struct msm_dp *dp = dev_get_drvdata(dev); 1069 int ret; 1070 1071 /* 1072 * External bridges are mandatory for eDP interfaces: one has to 1073 * provide at least an eDP panel (which gets wrapped into panel-bridge). 1074 * 1075 * For DisplayPort interfaces external bridges are optional, so 1076 * silently ignore an error if one is not present (-ENODEV). 1077 */ 1078 dp->next_bridge = devm_drm_of_get_bridge(&dp->pdev->dev, dp->pdev->dev.of_node, 1, 0); 1079 if (IS_ERR(dp->next_bridge)) { 1080 ret = PTR_ERR(dp->next_bridge); 1081 dp->next_bridge = NULL; 1082 if (dp->is_edp || ret != -ENODEV) 1083 return ret; 1084 } 1085 1086 ret = component_add(dev, &msm_dp_display_comp_ops); 1087 if (ret) 1088 DRM_ERROR("component add failed, rc=%d\n", ret); 1089 1090 return ret; 1091 } 1092 1093 static int msm_dp_auxbus_done_probe(struct drm_dp_aux *aux) 1094 { 1095 return msm_dp_display_probe_tail(aux->dev); 1096 } 1097 1098 static int msm_dp_display_get_connector_type(struct platform_device *pdev, 1099 const struct msm_dp_desc *desc) 1100 { 1101 struct device_node *node = pdev->dev.of_node; 1102 struct device_node *aux_bus = of_get_child_by_name(node, "aux-bus"); 1103 struct device_node *panel = of_get_child_by_name(aux_bus, "panel"); 1104 int connector_type; 1105 1106 if (panel) 1107 connector_type = DRM_MODE_CONNECTOR_eDP; 1108 else 1109 connector_type = DRM_MODE_SUBCONNECTOR_DisplayPort; 1110 1111 of_node_put(panel); 1112 of_node_put(aux_bus); 1113 1114 return connector_type; 1115 } 1116 1117 static void __iomem *msm_dp_ioremap(struct platform_device *pdev, int idx, size_t *len) 1118 { 1119 struct resource *res; 1120 void __iomem *base; 1121 1122 base = devm_platform_get_and_ioremap_resource(pdev, idx, &res); 1123 if (!IS_ERR(base)) 1124 *len = resource_size(res); 1125 1126 return base; 1127 } 1128 1129 #define DP_DEFAULT_AHB_OFFSET 0x0000 1130 #define DP_DEFAULT_AHB_SIZE 0x0200 1131 #define DP_DEFAULT_AUX_OFFSET 0x0200 1132 #define DP_DEFAULT_AUX_SIZE 0x0200 1133 #define DP_DEFAULT_LINK_OFFSET 0x0400 1134 #define DP_DEFAULT_LINK_SIZE 0x0C00 1135 #define DP_DEFAULT_P0_OFFSET 0x1000 1136 #define DP_DEFAULT_P0_SIZE 0x0400 1137 1138 static int msm_dp_display_get_io(struct msm_dp_display_private *display) 1139 { 1140 struct platform_device *pdev = display->msm_dp_display.pdev; 1141 1142 display->ahb_base = msm_dp_ioremap(pdev, 0, &display->ahb_len); 1143 if (IS_ERR(display->ahb_base)) 1144 return PTR_ERR(display->ahb_base); 1145 1146 display->aux_base = msm_dp_ioremap(pdev, 1, &display->aux_len); 1147 if (IS_ERR(display->aux_base)) { 1148 if (display->aux_base != ERR_PTR(-EINVAL)) { 1149 DRM_ERROR("unable to remap aux region: %pe\n", display->aux_base); 1150 return PTR_ERR(display->aux_base); 1151 } 1152 1153 /* 1154 * The initial binding had a single reg, but in order to 1155 * support variation in the sub-region sizes this was split. 1156 * msm_dp_ioremap() will fail with -EINVAL here if only a single 1157 * reg is specified, so fill in the sub-region offsets and 1158 * lengths based on this single region. 1159 */ 1160 if (display->ahb_len < DP_DEFAULT_P0_OFFSET + DP_DEFAULT_P0_SIZE) { 1161 DRM_ERROR("legacy memory region not large enough\n"); 1162 return -EINVAL; 1163 } 1164 1165 display->ahb_len = DP_DEFAULT_AHB_SIZE; 1166 display->aux_base = display->ahb_base + DP_DEFAULT_AUX_OFFSET; 1167 display->aux_len = DP_DEFAULT_AUX_SIZE; 1168 display->link_base = display->ahb_base + DP_DEFAULT_LINK_OFFSET; 1169 display->link_len = DP_DEFAULT_LINK_SIZE; 1170 display->p0_base = display->ahb_base + DP_DEFAULT_P0_OFFSET; 1171 display->p0_len = DP_DEFAULT_P0_SIZE; 1172 1173 return 0; 1174 } 1175 1176 display->link_base = msm_dp_ioremap(pdev, 2, &display->link_len); 1177 if (IS_ERR(display->link_base)) { 1178 DRM_ERROR("unable to remap link region: %pe\n", display->link_base); 1179 return PTR_ERR(display->link_base); 1180 } 1181 1182 display->p0_base = msm_dp_ioremap(pdev, 3, &display->p0_len); 1183 if (IS_ERR(display->p0_base)) { 1184 DRM_ERROR("unable to remap p0 region: %pe\n", display->p0_base); 1185 return PTR_ERR(display->p0_base); 1186 } 1187 1188 return 0; 1189 } 1190 1191 static int msm_dp_display_probe(struct platform_device *pdev) 1192 { 1193 int rc = 0; 1194 struct msm_dp_display_private *dp; 1195 const struct msm_dp_desc *desc; 1196 1197 if (!pdev || !pdev->dev.of_node) { 1198 DRM_ERROR("pdev not found\n"); 1199 return -ENODEV; 1200 } 1201 1202 dp = devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL); 1203 if (!dp) 1204 return -ENOMEM; 1205 1206 desc = msm_dp_display_get_desc(pdev); 1207 if (!desc) 1208 return -EINVAL; 1209 1210 dp->msm_dp_display.pdev = pdev; 1211 dp->id = desc->id; 1212 dp->msm_dp_display.connector_type = msm_dp_display_get_connector_type(pdev, desc); 1213 dp->wide_bus_supported = desc->wide_bus_supported; 1214 dp->msm_dp_display.is_edp = 1215 (dp->msm_dp_display.connector_type == DRM_MODE_CONNECTOR_eDP); 1216 dp->hpd_isr_status = 0; 1217 1218 mutex_init(&dp->plugged_lock); 1219 1220 rc = msm_dp_display_get_io(dp); 1221 if (rc) 1222 return rc; 1223 1224 rc = msm_dp_init_sub_modules(dp); 1225 if (rc) { 1226 DRM_ERROR("init sub module failed\n"); 1227 return -EPROBE_DEFER; 1228 } 1229 1230 /* Store DP audio handle inside DP display */ 1231 dp->msm_dp_display.msm_dp_audio = dp->audio; 1232 1233 init_completion(&dp->audio_comp); 1234 1235 platform_set_drvdata(pdev, &dp->msm_dp_display); 1236 1237 rc = devm_pm_runtime_enable(&pdev->dev); 1238 if (rc) 1239 goto err; 1240 1241 rc = msm_dp_display_request_irq(dp); 1242 if (rc) 1243 goto err; 1244 1245 if (dp->msm_dp_display.is_edp) { 1246 rc = devm_of_dp_aux_populate_bus(dp->aux, msm_dp_auxbus_done_probe); 1247 if (rc) { 1248 DRM_ERROR("eDP auxbus population failed, rc=%d\n", rc); 1249 goto err; 1250 } 1251 } else { 1252 rc = msm_dp_display_probe_tail(&pdev->dev); 1253 if (rc) 1254 goto err; 1255 } 1256 1257 return rc; 1258 1259 err: 1260 msm_dp_display_deinit_sub_modules(dp); 1261 return rc; 1262 } 1263 1264 static void msm_dp_display_remove(struct platform_device *pdev) 1265 { 1266 struct msm_dp_display_private *dp = dev_get_dp_display_private(&pdev->dev); 1267 1268 component_del(&pdev->dev, &msm_dp_display_comp_ops); 1269 msm_dp_display_deinit_sub_modules(dp); 1270 platform_set_drvdata(pdev, NULL); 1271 } 1272 1273 static int msm_dp_pm_runtime_suspend(struct device *dev) 1274 { 1275 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 1276 1277 disable_irq(dp->irq); 1278 1279 if (dp->msm_dp_display.is_edp) { 1280 msm_dp_display_host_phy_exit(dp); 1281 msm_dp_aux_hpd_disable(dp->aux); 1282 } 1283 msm_dp_display_host_deinit(dp); 1284 1285 return 0; 1286 } 1287 1288 static int msm_dp_pm_runtime_resume(struct device *dev) 1289 { 1290 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 1291 1292 /* 1293 * for eDP, host cotroller, HPD block and PHY are enabled here 1294 * but with HPD irq disabled 1295 * 1296 * for DP, only host controller is enabled here. 1297 * HPD block is enabled at msm_dp_bridge_hpd_enable() 1298 * PHY will be enabled at plugin handler later 1299 */ 1300 msm_dp_display_host_init(dp); 1301 if (dp->msm_dp_display.is_edp) { 1302 msm_dp_aux_hpd_enable(dp->aux); 1303 msm_dp_display_host_phy_init(dp); 1304 } 1305 1306 enable_irq(dp->irq); 1307 return 0; 1308 } 1309 1310 static const struct dev_pm_ops msm_dp_pm_ops = { 1311 SET_RUNTIME_PM_OPS(msm_dp_pm_runtime_suspend, msm_dp_pm_runtime_resume, NULL) 1312 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 1313 pm_runtime_force_resume) 1314 }; 1315 1316 static struct platform_driver msm_dp_display_driver = { 1317 .probe = msm_dp_display_probe, 1318 .remove = msm_dp_display_remove, 1319 .driver = { 1320 .name = "msm-dp-display", 1321 .of_match_table = msm_dp_dt_match, 1322 .suppress_bind_attrs = true, 1323 .pm = &msm_dp_pm_ops, 1324 }, 1325 }; 1326 1327 int __init msm_dp_register(void) 1328 { 1329 int ret; 1330 1331 ret = platform_driver_register(&msm_dp_display_driver); 1332 if (ret) 1333 DRM_ERROR("Dp display driver register failed"); 1334 1335 return ret; 1336 } 1337 1338 void __exit msm_dp_unregister(void) 1339 { 1340 platform_driver_unregister(&msm_dp_display_driver); 1341 } 1342 1343 bool msm_dp_needs_periph_flush(const struct msm_dp *msm_dp_display, 1344 const struct drm_display_mode *mode) 1345 { 1346 return drm_mode_is_420_only(&msm_dp_display->connector->display_info, mode); 1347 } 1348 1349 bool msm_dp_wide_bus_available(const struct msm_dp *msm_dp_display) 1350 { 1351 struct msm_dp_display_private *dp; 1352 1353 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1354 1355 if (dp->panel->msm_dp_mode.out_fmt_is_yuv_420) 1356 return false; 1357 1358 return dp->wide_bus_supported; 1359 } 1360 1361 void msm_dp_display_debugfs_init(struct msm_dp *msm_dp_display, struct dentry *root, bool is_edp) 1362 { 1363 struct msm_dp_display_private *dp; 1364 struct device *dev; 1365 int rc; 1366 1367 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1368 dev = &dp->msm_dp_display.pdev->dev; 1369 1370 rc = msm_dp_debug_init(dev, dp->panel, dp->link, dp->msm_dp_display.connector, root, is_edp); 1371 if (rc) 1372 DRM_ERROR("failed to initialize debug, rc = %d\n", rc); 1373 } 1374 1375 int msm_dp_modeset_init(struct msm_dp *msm_dp_display, struct drm_device *dev, 1376 struct drm_encoder *encoder, bool yuv_supported) 1377 { 1378 struct msm_dp_display_private *msm_dp_priv; 1379 int ret; 1380 1381 msm_dp_display->drm_dev = dev; 1382 1383 msm_dp_priv = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1384 1385 ret = msm_dp_bridge_init(msm_dp_display, dev, encoder, yuv_supported); 1386 if (ret) { 1387 DRM_DEV_ERROR(dev->dev, 1388 "failed to create dp bridge: %d\n", ret); 1389 return ret; 1390 } 1391 1392 msm_dp_display->connector = msm_dp_drm_connector_init(msm_dp_display, encoder); 1393 if (IS_ERR(msm_dp_display->connector)) { 1394 ret = PTR_ERR(msm_dp_display->connector); 1395 DRM_DEV_ERROR(dev->dev, 1396 "failed to create dp connector: %d\n", ret); 1397 msm_dp_display->connector = NULL; 1398 return ret; 1399 } 1400 1401 msm_dp_priv->panel->connector = msm_dp_display->connector; 1402 1403 return 0; 1404 } 1405 1406 void msm_dp_display_atomic_pre_enable(struct msm_dp *msm_dp_display, 1407 struct drm_atomic_commit *state) 1408 { 1409 struct msm_dp_display_private *dp; 1410 struct drm_crtc *crtc; 1411 struct drm_crtc_state *crtc_state; 1412 1413 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1414 1415 crtc = drm_atomic_get_new_crtc_for_encoder(state, msm_dp_display->bridge->encoder); 1416 if (!crtc) 1417 return; 1418 crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 1419 1420 /* 1421 * The DPU encoder's .atomic_enable() reads the mode's YUV420 / wide bus 1422 * state and runs before the bridge's .atomic_enable(), so the mode must 1423 * be programmed here, in .atomic_pre_enable(). 1424 */ 1425 msm_dp_display_set_mode(msm_dp_display, &crtc_state->adjusted_mode, dp->panel); 1426 } 1427 1428 void msm_dp_display_atomic_enable(struct msm_dp *msm_dp_display, 1429 struct drm_atomic_commit *state) 1430 { 1431 int rc = 0; 1432 struct msm_dp_display_private *dp; 1433 1434 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1435 1436 rc = msm_dp_display_prepare_link(dp); 1437 if (rc) { 1438 DRM_ERROR("DP display prepare failed, rc=%d\n", rc); 1439 return; 1440 } 1441 1442 rc = msm_dp_display_enable(dp, dp->panel); 1443 if (rc) 1444 DRM_ERROR("DP display enable failed, rc=%d\n", rc); 1445 1446 rc = msm_dp_display_post_enable(msm_dp_display); 1447 if (rc) { 1448 DRM_ERROR("DP display post enable failed, rc=%d\n", rc); 1449 msm_dp_display_disable(dp, dp->panel); 1450 } 1451 1452 drm_dbg_dp(msm_dp_display->drm_dev, "type=%d Done\n", msm_dp_display->connector_type); 1453 } 1454 1455 void msm_dp_display_atomic_disable(struct msm_dp *dp) 1456 { 1457 struct msm_dp_display_private *msm_dp_display; 1458 1459 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 1460 1461 msm_dp_ctrl_push_idle(msm_dp_display->ctrl); 1462 } 1463 1464 static void msm_dp_display_unprepare(struct msm_dp_display_private *dp) 1465 { 1466 struct msm_dp *msm_dp_display = &dp->msm_dp_display; 1467 1468 pm_runtime_put_sync(&msm_dp_display->pdev->dev); 1469 1470 drm_dbg_dp(dp->drm_dev, "type=%d Done\n", msm_dp_display->connector_type); 1471 } 1472 1473 void msm_dp_display_atomic_post_disable(struct msm_dp *dp) 1474 { 1475 struct msm_dp_display_private *msm_dp_display; 1476 1477 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 1478 1479 if (dp->is_edp) 1480 msm_dp_hpd_unplug_handle(msm_dp_display); 1481 1482 msm_dp_display_audio_notify_disable(msm_dp_display); 1483 1484 msm_dp_display_disable(msm_dp_display, msm_dp_display->panel); 1485 1486 msm_dp_display_unprepare(msm_dp_display); 1487 } 1488 1489 void msm_dp_bridge_hpd_enable(struct drm_bridge *bridge) 1490 { 1491 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge); 1492 struct msm_dp *msm_dp_display = msm_dp_bridge->msm_dp_display; 1493 struct msm_dp_display_private *dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1494 1495 /* 1496 * this is for external DP with hpd irq enabled case, 1497 * step-1: msm_dp_pm_runtime_resume() enable dp host only 1498 * step-2: enable hdp block and have hpd irq enabled here 1499 * step-3: waiting for plugin irq while phy is not initialized 1500 * step-4: DP PHY is initialized at plugin handler before link training 1501 * 1502 */ 1503 if (pm_runtime_resume_and_get(&msm_dp_display->pdev->dev)) { 1504 DRM_ERROR("failed to resume power\n"); 1505 return; 1506 } 1507 1508 msm_dp_aux_hpd_enable(dp->aux); 1509 msm_dp_aux_hpd_intr_enable(dp->aux); 1510 } 1511 1512 void msm_dp_bridge_hpd_disable(struct drm_bridge *bridge) 1513 { 1514 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge); 1515 struct msm_dp *msm_dp_display = msm_dp_bridge->msm_dp_display; 1516 struct msm_dp_display_private *dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1517 1518 msm_dp_aux_hpd_intr_disable(dp->aux); 1519 msm_dp_aux_hpd_disable(dp->aux); 1520 1521 pm_runtime_put_sync(&msm_dp_display->pdev->dev); 1522 } 1523 1524 void msm_dp_bridge_hpd_notify(struct drm_bridge *bridge, 1525 struct drm_connector *connector, 1526 enum drm_connector_status status) 1527 { 1528 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge); 1529 struct msm_dp *msm_dp_display = msm_dp_bridge->msm_dp_display; 1530 struct msm_dp_display_private *dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1531 u32 hpd_link_status = 0; 1532 1533 if (pm_runtime_resume_and_get(&msm_dp_display->pdev->dev)) { 1534 DRM_ERROR("failed to pm_runtime_resume\n"); 1535 return; 1536 } 1537 1538 hpd_link_status = msm_dp_aux_is_link_connected(dp->aux); 1539 1540 drm_dbg_dp(dp->drm_dev, "type=%d link hpd_link_status=0x%x, status=%d\n", 1541 msm_dp_display->connector_type, hpd_link_status, status); 1542 1543 if (status == connector_status_connected) { 1544 if (hpd_link_status == ISR_HPD_REPLUG_COUNT) { 1545 msm_dp_hpd_unplug_handle(dp); 1546 msm_dp_hpd_plug_handle(dp); 1547 } else if (hpd_link_status == ISR_IRQ_HPD_PULSE_COUNT) { 1548 msm_dp_irq_hpd_handle(dp); 1549 } else { 1550 msm_dp_hpd_plug_handle(dp); 1551 } 1552 } else { 1553 msm_dp_hpd_unplug_handle(dp); 1554 } 1555 1556 pm_runtime_put_sync(&msm_dp_display->pdev->dev); 1557 } 1558