1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (c) 2020 Silex Insight 3 4 #include <linux/delay.h> 5 #include <linux/hw_random.h> 6 #include <linux/io.h> 7 #include <linux/iopoll.h> 8 #include <linux/kernel.h> 9 #include <linux/module.h> 10 #include <linux/platform_device.h> 11 #include <linux/workqueue.h> 12 13 #define BA431_RESET_DELAY 1 /* usec */ 14 #define BA431_RESET_READ_STATUS_TIMEOUT 1000 /* usec */ 15 #define BA431_RESET_READ_STATUS_INTERVAL 10 /* usec */ 16 #define BA431_READ_RETRY_INTERVAL 1 /* usec */ 17 18 #define BA431_REG_CTRL 0x00 19 #define BA431_REG_FIFO_LEVEL 0x04 20 #define BA431_REG_STATUS 0x30 21 #define BA431_REG_FIFODATA 0x80 22 23 #define BA431_CTRL_ENABLE BIT(0) 24 #define BA431_CTRL_SOFTRESET BIT(8) 25 26 #define BA431_STATUS_STATE_MASK (BIT(1) | BIT(2) | BIT(3)) 27 #define BA431_STATUS_STATE_OFFSET 1 28 29 enum ba431_state { 30 BA431_STATE_RESET, 31 BA431_STATE_STARTUP, 32 BA431_STATE_FIFOFULLON, 33 BA431_STATE_FIFOFULLOFF, 34 BA431_STATE_RUNNING, 35 BA431_STATE_ERROR 36 }; 37 38 struct ba431_trng { 39 struct device *dev; 40 void __iomem *base; 41 struct hwrng rng; 42 atomic_t reset_pending; 43 struct work_struct reset_work; 44 }; 45 46 static inline u32 ba431_trng_read_reg(struct ba431_trng *ba431, u32 reg) 47 { 48 return ioread32(ba431->base + reg); 49 } 50 51 static inline void ba431_trng_write_reg(struct ba431_trng *ba431, u32 reg, 52 u32 val) 53 { 54 iowrite32(val, ba431->base + reg); 55 } 56 57 static inline enum ba431_state ba431_trng_get_state(struct ba431_trng *ba431) 58 { 59 u32 status = ba431_trng_read_reg(ba431, BA431_REG_STATUS); 60 61 return (status & BA431_STATUS_STATE_MASK) >> BA431_STATUS_STATE_OFFSET; 62 } 63 64 static int ba431_trng_is_in_error(struct ba431_trng *ba431) 65 { 66 enum ba431_state state = ba431_trng_get_state(ba431); 67 68 if ((state < BA431_STATE_STARTUP) || 69 (state >= BA431_STATE_ERROR)) 70 return 1; 71 72 return 0; 73 } 74 75 static int ba431_trng_reset(struct ba431_trng *ba431) 76 { 77 int ret; 78 79 /* Disable interrupts, random generation and enable the softreset */ 80 ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_SOFTRESET); 81 udelay(BA431_RESET_DELAY); 82 ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_ENABLE); 83 84 /* Wait until the state changed */ 85 if (readx_poll_timeout(ba431_trng_is_in_error, ba431, ret, !ret, 86 BA431_RESET_READ_STATUS_INTERVAL, 87 BA431_RESET_READ_STATUS_TIMEOUT)) { 88 dev_err(ba431->dev, "reset failed (state: %d)\n", 89 ba431_trng_get_state(ba431)); 90 return -ETIMEDOUT; 91 } 92 93 dev_info(ba431->dev, "reset done\n"); 94 95 return 0; 96 } 97 98 static void ba431_trng_reset_work(struct work_struct *work) 99 { 100 struct ba431_trng *ba431 = container_of(work, struct ba431_trng, 101 reset_work); 102 ba431_trng_reset(ba431); 103 atomic_set(&ba431->reset_pending, 0); 104 } 105 106 static void ba431_trng_schedule_reset(struct ba431_trng *ba431) 107 { 108 if (atomic_cmpxchg(&ba431->reset_pending, 0, 1)) 109 return; 110 111 schedule_work(&ba431->reset_work); 112 } 113 114 static int ba431_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait) 115 { 116 struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng); 117 u32 *data = buf; 118 unsigned int level, i; 119 int n = 0; 120 121 while (max > 0) { 122 level = ba431_trng_read_reg(ba431, BA431_REG_FIFO_LEVEL); 123 if (!level) { 124 if (ba431_trng_is_in_error(ba431)) { 125 ba431_trng_schedule_reset(ba431); 126 break; 127 } 128 129 if (!wait) 130 break; 131 132 udelay(BA431_READ_RETRY_INTERVAL); 133 continue; 134 } 135 136 i = level; 137 do { 138 data[n++] = ba431_trng_read_reg(ba431, 139 BA431_REG_FIFODATA); 140 max -= sizeof(*data); 141 } while (--i && (max > 0)); 142 143 if (ba431_trng_is_in_error(ba431)) { 144 n -= (level - i); 145 ba431_trng_schedule_reset(ba431); 146 break; 147 } 148 } 149 150 n *= sizeof(data); 151 return (n || !wait) ? n : -EIO; 152 } 153 154 static void ba431_trng_cleanup(struct hwrng *rng) 155 { 156 struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng); 157 158 ba431_trng_write_reg(ba431, BA431_REG_CTRL, 0); 159 cancel_work_sync(&ba431->reset_work); 160 } 161 162 static int ba431_trng_init(struct hwrng *rng) 163 { 164 struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng); 165 166 return ba431_trng_reset(ba431); 167 } 168 169 static int ba431_trng_probe(struct platform_device *pdev) 170 { 171 struct ba431_trng *ba431; 172 int ret; 173 174 ba431 = devm_kzalloc(&pdev->dev, sizeof(*ba431), GFP_KERNEL); 175 if (!ba431) 176 return -ENOMEM; 177 178 ba431->dev = &pdev->dev; 179 180 ba431->base = devm_platform_ioremap_resource(pdev, 0); 181 if (IS_ERR(ba431->base)) 182 return PTR_ERR(ba431->base); 183 184 atomic_set(&ba431->reset_pending, 0); 185 INIT_WORK(&ba431->reset_work, ba431_trng_reset_work); 186 ba431->rng.name = pdev->name; 187 ba431->rng.init = ba431_trng_init; 188 ba431->rng.cleanup = ba431_trng_cleanup; 189 ba431->rng.read = ba431_trng_read; 190 191 ret = devm_hwrng_register(&pdev->dev, &ba431->rng); 192 if (ret) 193 return dev_err_probe(&pdev->dev, ret, "BA431 registration failed\n"); 194 195 dev_info(&pdev->dev, "BA431 TRNG registered\n"); 196 197 return 0; 198 } 199 200 static const struct of_device_id ba431_trng_dt_ids[] = { 201 { .compatible = "silex-insight,ba431-rng" }, 202 { /* sentinel */ } 203 }; 204 MODULE_DEVICE_TABLE(of, ba431_trng_dt_ids); 205 206 static struct platform_driver ba431_trng_driver = { 207 .driver = { 208 .name = "ba431-rng", 209 .of_match_table = ba431_trng_dt_ids, 210 }, 211 .probe = ba431_trng_probe, 212 }; 213 214 module_platform_driver(ba431_trng_driver); 215 216 MODULE_AUTHOR("Olivier Sobrie <olivier@sobrie.be>"); 217 MODULE_DESCRIPTION("TRNG driver for Silex Insight BA431"); 218 MODULE_LICENSE("GPL"); 219