xref: /linux/arch/arm64/include/asm/ptrace.h (revision 3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Based on arch/arm/include/asm/ptrace.h
4  *
5  * Copyright (C) 1996-2003 Russell King
6  * Copyright (C) 2012 ARM Ltd.
7  */
8 #ifndef __ASM_PTRACE_H
9 #define __ASM_PTRACE_H
10 
11 #include <asm/cpufeature.h>
12 
13 #include <uapi/asm/ptrace.h>
14 
15 /* Current Exception Level values, as contained in CurrentEL */
16 #define CurrentEL_EL1		(1 << 2)
17 #define CurrentEL_EL2		(2 << 2)
18 
19 #define INIT_PSTATE_EL1 \
20 	(PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1h)
21 
22 #include <linux/irqchip/arm-gic-v3-prio.h>
23 
24 #define GIC_PRIO_IRQON		GICV3_PRIO_UNMASKED
25 #define GIC_PRIO_IRQOFF		GICV3_PRIO_IRQ
26 
27 #define GIC_PRIO_PSR_I_SET	GICV3_PRIO_PSR_I_SET
28 
29 /* Additional SPSR bits not exposed in the UABI */
30 #define PSR_MODE_THREAD_BIT	(1 << 0)
31 #define PSR_IL_BIT		(1 << 20)
32 
33 /* AArch32-specific ptrace requests */
34 #define COMPAT_PTRACE_GETREGS		12
35 #define COMPAT_PTRACE_SETREGS		13
36 #define COMPAT_PTRACE_GET_THREAD_AREA	22
37 #define COMPAT_PTRACE_SET_SYSCALL	23
38 #define COMPAT_PTRACE_GETVFPREGS	27
39 #define COMPAT_PTRACE_SETVFPREGS	28
40 #define COMPAT_PTRACE_GETHBPREGS	29
41 #define COMPAT_PTRACE_SETHBPREGS	30
42 
43 /* SPSR_ELx bits for exceptions taken from AArch32 */
44 #define PSR_AA32_MODE_MASK	0x0000001f
45 #define PSR_AA32_MODE_USR	0x00000010
46 #define PSR_AA32_MODE_FIQ	0x00000011
47 #define PSR_AA32_MODE_IRQ	0x00000012
48 #define PSR_AA32_MODE_SVC	0x00000013
49 #define PSR_AA32_MODE_ABT	0x00000017
50 #define PSR_AA32_MODE_HYP	0x0000001a
51 #define PSR_AA32_MODE_UND	0x0000001b
52 #define PSR_AA32_MODE_SYS	0x0000001f
53 #define PSR_AA32_T_BIT		0x00000020
54 #define PSR_AA32_F_BIT		0x00000040
55 #define PSR_AA32_I_BIT		0x00000080
56 #define PSR_AA32_A_BIT		0x00000100
57 #define PSR_AA32_E_BIT		0x00000200
58 #define PSR_AA32_PAN_BIT	0x00400000
59 #define PSR_AA32_SSBS_BIT	0x00800000
60 #define PSR_AA32_DIT_BIT	0x01000000
61 #define PSR_AA32_Q_BIT		0x08000000
62 #define PSR_AA32_V_BIT		0x10000000
63 #define PSR_AA32_C_BIT		0x20000000
64 #define PSR_AA32_Z_BIT		0x40000000
65 #define PSR_AA32_N_BIT		0x80000000
66 #define PSR_AA32_IT_MASK	0x0600fc00	/* If-Then execution state mask */
67 #define PSR_AA32_GE_MASK	0x000f0000
68 
69 #ifdef CONFIG_CPU_BIG_ENDIAN
70 #define PSR_AA32_ENDSTATE	PSR_AA32_E_BIT
71 #else
72 #define PSR_AA32_ENDSTATE	0
73 #endif
74 
75 /* AArch32 CPSR bits, as seen in AArch32 */
76 #define COMPAT_PSR_DIT_BIT	0x00200000
77 
78 /*
79  * These are 'magic' values for PTRACE_PEEKUSR that return info about where a
80  * process is located in memory.
81  */
82 #define COMPAT_PT_TEXT_ADDR		0x10000
83 #define COMPAT_PT_DATA_ADDR		0x10004
84 #define COMPAT_PT_TEXT_END_ADDR		0x10008
85 
86 /*
87  * If pt_regs.syscallno == NO_SYSCALL, then the thread is not executing
88  * a syscall -- i.e., its most recent entry into the kernel from
89  * userspace was not via SVC, or otherwise a tracer cancelled the syscall.
90  *
91  * This must have the value -1, for ABI compatibility with ptrace etc.
92  */
93 #define NO_SYSCALL (-1)
94 
95 #ifndef __ASSEMBLER__
96 #include <linux/bug.h>
97 #include <linux/types.h>
98 
99 #include <asm/stacktrace/frame.h>
100 
101 /* sizeof(struct user) for AArch32 */
102 #define COMPAT_USER_SZ	296
103 
104 /* Architecturally defined mapping between AArch32 and AArch64 registers */
105 #define compat_usr(x)	regs[(x)]
106 #define compat_fp	regs[11]
107 #define compat_sp	regs[13]
108 #define compat_lr	regs[14]
109 #define compat_sp_hyp	regs[15]
110 #define compat_lr_irq	regs[16]
111 #define compat_sp_irq	regs[17]
112 #define compat_lr_svc	regs[18]
113 #define compat_sp_svc	regs[19]
114 #define compat_lr_abt	regs[20]
115 #define compat_sp_abt	regs[21]
116 #define compat_lr_und	regs[22]
117 #define compat_sp_und	regs[23]
118 #define compat_r8_fiq	regs[24]
119 #define compat_r9_fiq	regs[25]
120 #define compat_r10_fiq	regs[26]
121 #define compat_r11_fiq	regs[27]
122 #define compat_r12_fiq	regs[28]
123 #define compat_sp_fiq	regs[29]
124 #define compat_lr_fiq	regs[30]
125 
126 static inline unsigned long compat_psr_to_pstate(const unsigned long psr)
127 {
128 	unsigned long pstate;
129 
130 	pstate = psr & ~COMPAT_PSR_DIT_BIT;
131 
132 	if (psr & COMPAT_PSR_DIT_BIT)
133 		pstate |= PSR_AA32_DIT_BIT;
134 
135 	return pstate;
136 }
137 
138 static inline unsigned long pstate_to_compat_psr(const unsigned long pstate)
139 {
140 	unsigned long psr;
141 
142 	psr = pstate & ~PSR_AA32_DIT_BIT;
143 
144 	if (pstate & PSR_AA32_DIT_BIT)
145 		psr |= COMPAT_PSR_DIT_BIT;
146 
147 	return psr;
148 }
149 
150 /*
151  * This struct defines the way the registers are stored on the stack during an
152  * exception. struct user_pt_regs must form a prefix of struct pt_regs.
153  */
154 struct pt_regs {
155 	union {
156 		struct user_pt_regs user_regs;
157 		struct {
158 			u64 regs[31];
159 			u64 sp;
160 			u64 pc;
161 			u64 pstate;
162 		};
163 	};
164 	u64 orig_x0;
165 	s32 syscallno;
166 	u32 pmr;
167 
168 	u64 sdei_ttbr1;
169 	struct frame_record_meta stackframe;
170 };
171 
172 /* For correct stack alignment, pt_regs has to be a multiple of 16 bytes. */
173 static_assert(IS_ALIGNED(sizeof(struct pt_regs), 16));
174 
175 static inline bool in_syscall(struct pt_regs const *regs)
176 {
177 	return regs->syscallno != NO_SYSCALL;
178 }
179 
180 static inline void forget_syscall(struct pt_regs *regs)
181 {
182 	regs->syscallno = NO_SYSCALL;
183 }
184 
185 #define MAX_REG_OFFSET offsetof(struct pt_regs, pstate)
186 
187 #define arch_has_single_step()	(1)
188 
189 #ifdef CONFIG_COMPAT
190 #define compat_thumb_mode(regs) \
191 	(((regs)->pstate & PSR_AA32_T_BIT))
192 #else
193 #define compat_thumb_mode(regs) (0)
194 #endif
195 
196 #define user_mode(regs)	\
197 	(((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t)
198 
199 #define compat_user_mode(regs)	\
200 	(((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \
201 	 (PSR_MODE32_BIT | PSR_MODE_EL0t))
202 
203 #define processor_mode(regs) \
204 	((regs)->pstate & PSR_MODE_MASK)
205 
206 #define irqs_priority_unmasked(regs)					\
207 	(system_uses_irq_prio_masking() ?				\
208 		(regs)->pmr == GIC_PRIO_IRQON :				\
209 		true)
210 
211 static __always_inline bool regs_irqs_disabled(const struct pt_regs *regs)
212 {
213 	return (regs->pstate & PSR_I_BIT) || !irqs_priority_unmasked(regs);
214 }
215 
216 #define interrupts_enabled(regs)	(!regs_irqs_disabled(regs))
217 
218 static inline unsigned long user_stack_pointer(struct pt_regs *regs)
219 {
220 	if (compat_user_mode(regs))
221 		return regs->compat_sp;
222 	return regs->sp;
223 }
224 
225 extern int regs_query_register_offset(const char *name);
226 extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
227 					       unsigned int n);
228 
229 /**
230  * regs_get_register() - get register value from its offset
231  * @regs:	pt_regs from which register value is gotten
232  * @offset:	offset of the register.
233  *
234  * regs_get_register returns the value of a register whose offset from @regs.
235  * The @offset is the offset of the register in struct pt_regs.
236  * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
237  */
238 static inline u64 regs_get_register(struct pt_regs *regs, unsigned int offset)
239 {
240 	u64 val = 0;
241 
242 	WARN_ON(offset & 7);
243 
244 	offset >>= 3;
245 	switch (offset) {
246 	case 0 ... 30:
247 		val = regs->regs[offset];
248 		break;
249 	case offsetof(struct pt_regs, sp) >> 3:
250 		val = regs->sp;
251 		break;
252 	case offsetof(struct pt_regs, pc) >> 3:
253 		val = regs->pc;
254 		break;
255 	case offsetof(struct pt_regs, pstate) >> 3:
256 		val = regs->pstate;
257 		break;
258 	default:
259 		val = 0;
260 	}
261 
262 	return val;
263 }
264 
265 /*
266  * Read a register given an architectural register index r.
267  * This handles the common case where 31 means XZR, not SP.
268  */
269 static inline unsigned long pt_regs_read_reg(const struct pt_regs *regs, int r)
270 {
271 	return (r == 31) ? 0 : regs->regs[r];
272 }
273 
274 /*
275  * Write a register given an architectural register index r.
276  * This handles the common case where 31 means XZR, not SP.
277  */
278 static inline void pt_regs_write_reg(struct pt_regs *regs, int r,
279 				     unsigned long val)
280 {
281 	if (r != 31)
282 		regs->regs[r] = val;
283 }
284 
285 /* Valid only for Kernel mode traps. */
286 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
287 {
288 	return regs->sp;
289 }
290 
291 static inline unsigned long regs_return_value(struct pt_regs *regs)
292 {
293 	unsigned long val = regs->regs[0];
294 
295 	/*
296 	 * Audit currently uses regs_return_value() instead of
297 	 * syscall_get_return_value(). Apply the same sign-extension here until
298 	 * audit is updated to use syscall_get_return_value().
299 	 */
300 	if (compat_user_mode(regs))
301 		val = sign_extend64(val, 31);
302 
303 	return val;
304 }
305 
306 static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc)
307 {
308 	regs->regs[0] = rc;
309 }
310 
311 /**
312  * regs_get_kernel_argument() - get Nth function argument in kernel
313  * @regs:	pt_regs of that context
314  * @n:		function argument number (start from 0)
315  *
316  * regs_get_argument() returns @n th argument of the function call.
317  *
318  * Note that this chooses the most likely register mapping. In very rare
319  * cases this may not return correct data, for example, if one of the
320  * function parameters is 16 bytes or bigger. In such cases, we cannot
321  * get access the parameter correctly and the register assignment of
322  * subsequent parameters will be shifted.
323  */
324 static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs,
325 						     unsigned int n)
326 {
327 #define NR_REG_ARGUMENTS 8
328 	if (n < NR_REG_ARGUMENTS)
329 		return pt_regs_read_reg(regs, n);
330 	return 0;
331 }
332 
333 /* We must avoid circular header include via sched.h */
334 struct task_struct;
335 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task);
336 
337 static inline unsigned long instruction_pointer(struct pt_regs *regs)
338 {
339 	return regs->pc;
340 }
341 static inline void instruction_pointer_set(struct pt_regs *regs,
342 		unsigned long val)
343 {
344 	regs->pc = val;
345 }
346 
347 static inline unsigned long frame_pointer(struct pt_regs *regs)
348 {
349 	return regs->regs[29];
350 }
351 
352 #define procedure_link_pointer(regs)	((regs)->regs[30])
353 
354 static inline void procedure_link_pointer_set(struct pt_regs *regs,
355 					   unsigned long val)
356 {
357 	procedure_link_pointer(regs) = val;
358 }
359 
360 extern unsigned long profile_pc(struct pt_regs *regs);
361 
362 #endif /* __ASSEMBLER__ */
363 #endif
364